JP2009054999A5 - - Google Patents

Claims (7)

A trench structure formed in the first conductivity type semiconductor substrate, the depth of which varies intermittently in the gate width direction;
A gate electrode formed on the inside of the trench portion defined by the trench structure and the upper surface of the planar portion via a gate insulating film;
A second conductivity type source region formed on the first conductivity type semiconductor substrate on one side of the gate electrode;
A drain region of a second conductivity type formed in the first conductivity type semiconductor substrate on the other side of the gate electrode ;
A channel region sandwiched between the source region and the drain region;
In a semiconductor device comprising:
Of the source region and the drain region, the portion facing across the trench portion have a same or a depth reaching the more the bottom from the top surface of the trench structure,
A thickness of the gate insulating film disposed on the surface of the source region and the drain region is greater than a thickness of the gate insulating film disposed on the surface of the channel region . A first conductivity type semiconductor substrate;
A source region and a drain region of a second conductivity type that are spaced apart in the vicinity of the surface of the first conductivity type semiconductor substrate;
A flat planar portion serving as a first channel region disposed between the source region and the drain region;
A trench portion having a certain depth, the side surface and the bottom surface of which are arranged along the planar portion, and which serve as a second channel region;
A gate insulating film provided on the surfaces of the planar part and the trench part;
A semiconductor device comprising a gate electrode provided on the gate insulating film,
The depth of the diffusion region of the portion facing through the trench portion have a same or a depth reaching the more the bottom from the top surface of the trench structure of the source region and the drain region,
A thickness of the gate insulating film disposed on the surfaces of the source region and the drain region is greater than a thickness of the gate insulating film disposed on the surface of the second channel region. .   2. The distance between the contact on the surface of the source region and the drain region of the planar portion and the gate electrode is shorter than the distance between the contact on the surface of the source region and the drain region of the trench portion and the gate electrode. The semiconductor device according to claim 2. Preparing a semiconductor substrate; and
Removing a part of a region to be a channel region of the semiconductor substrate from the surface to the inside, forming a trench having a side surface and a bottom surface, and arranging a planar portion and a trench portion;
Forming an oxide film on the surfaces of the trench part and the planar part;
Applying a resist material and patterning so that impurities can be introduced from the top surface to the bottom surface in the direction of the source and drain regions of the trench; and
Ion-implanting impurities forming the first source region and the drain region while rotating the semiconductor substrate;
Removing the resist material and the oxide film to form a gate insulating film;
Forming a gate electrode after forming the gate insulating film and depositing polycrystalline silicon;
Forming a second source region and a drain region with the gate electrode interposed therebetween. The first source region and the drain region formed from the top surface to the bottom of the trench portion are ion-implanted at a dose of 1 × 10 ¹³ atoms / cm ² to 1 × 10 ¹⁶ atoms / cm ^2. A method for manufacturing a semiconductor device according to claim 4.   5. The semiconductor according to claim 4, wherein impurity diffusion and activation of the first source region and the drain region formed from the upper surface to the bottom of the trench portion are performed simultaneously with the step of forming the gate insulating film. Device manufacturing method. 5. The impurity introduction step of the first source region and the drain region formed from the top surface to the bottom portion of the trench portion can be performed both before and after the formation step of the gate insulating film. The manufacturing method of the semiconductor device as described in 2. above.