JP2009031832A - Wiring design device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring design device for easily arranging a through-hole in designing of wiring of a printed board having a plurality of layers or semiconductor components. <P>SOLUTION: The CPU 211 of the wiring design device sets the value of start layer designation information as the value of end layer designation information (S506), and when deciding that information acquired from a mouse 215 shows the operation of a left button LB (S507), the CPU 11 subtracts "1" from the end layer designation information (S509). When deciding that information acquired from the mouse 215 shows the operation of a right button RB (S507), the CPU 211 adds "1" to the end layer designation information (S511). The CPU 211 arranges a via hole V1 on a multi-layer printed board P on the basis of a start layer (first wiring layer ) and an end layer (sixth wiring layer) and positional information (S523). Thus, it is possible to easily arrange the via hole only by operating the button of the mouse. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a wiring design apparatus for designing wiring of a printed circuit board or a semiconductor component having a plurality of layers, and more particularly to a device that can easily arrange a through hole.

  A conventional wiring design apparatus will be described. Wiring design equipment is a multilayer printed circuit board that uses via holes (hereinafter referred to as non-through via holes) other than via holes (hereinafter referred to as through via holes) that penetrate from the top layer to the bottom layer, and builds that do not have via holes. The wiring design of the up board is performed. The wiring design device inputs the layer name when connecting the layers, selects a plurality of via holes that connect the specific layers necessary for this, generates a land that connects the via holes, and specifies them In this format, the data is stored as new one via hole data.

  Regarding the input of the layer name when the layers are connected by via holes, the layer numbers of the layers at both ends forming the via holes are input numerically via the keyboard.

JP-A-11-259540

  The wiring design apparatus described above has the following problems. In general, in wiring design, there are many operations performed with a mouse. Therefore, if the layer numbers of the layers at both ends forming the via hole are input via the keyboard, it is necessary to release the hand from the mouse, and the continuity of the operation is interrupted. For this reason, there is a problem that the work of forming the via hole becomes complicated and takes time.

  An object of the present invention is to provide a wiring design apparatus that can easily arrange through holes in wiring design of printed circuit boards or semiconductor components having a plurality of layers.

  Means for solving the problems relating to the present invention and effects of the present invention will be described below.

  In the wiring design device, the wiring design device program, and the wiring design method according to the present invention, the through-hole placement work, which is a work of placing the through-holes passing through a plurality of layers among the layers belonging to the printed circuit board or the semiconductor component. Display of the planar configuration of the printed circuit board or the semiconductor component when the through-hole placement work start information is acquired and the through-hole placement work start information is obtained after the through-hole placement work start information is acquired. The plane end designation information for designating a position on the plane on which the through hole is arranged is acquired, and the end layer that designates an end layer that is a layer on which the through hole is arranged when in the through hole arrangement work state End layer generation information for generating layer designation information is obtained via an end layer generation information input unit included in the pointer movement instruction means, and based on the end layer generation information, an indeterminate state is obtained. Generating the end layer designation information, obtaining the confirmation information in which the end layer designation information in the uncertain state is in a definite state, and based on the deterministic information, setting the end layer designation information in the undetermined state as a definite state, Corresponding to the start layer designation information and the end layer designation information at the position on the plane corresponding to the plane position information, using the plane position information, the start layer designation information, and the final layer designation information in the fixed state A through hole penetrating the layers from the start layer to the end layer is arranged.

  Thereby, a through-hole can be easily arrange | positioned using a pointer movement instruction | indication means. Therefore, the user can easily arrange the through holes simply by using the pointer movement instruction means in the wiring design.

  In the wiring design device and the wiring design device program according to the present invention, the end layer generation information based on the operation amount of the end layer generation information input unit is acquired.

  Thereby, a through-hole can be arrange | positioned only by operating the end layer production | generation information input part of a pointer movement instruction | indication means. Therefore, the user can easily arrange the through holes using only the pointer movement instruction means in the wiring design.

  In the wiring design device and the wiring design device program according to the present invention, the end layer designation information is generated with the layer existing below the start layer by the operation amount as the end layer.

  Thereby, a through-hole can be arrange | positioned from a start layer toward a lower layer only by operating the end layer production | generation information input part of a pointer movement instruction | indication means. Therefore, the user can easily arrange the through-holes from the start layer to the lower layer simply by operating the pointer movement instruction means in the wiring design.

  In the wiring design apparatus and the wiring design apparatus program according to the present invention, the end layer designation information is generated in which the end layer is the layer that exists above the start layer by the operation amount.

  Thereby, the through-hole can be arranged from the start layer toward the upper layer only by operating the end layer generation information input unit of the pointer movement instruction means. Therefore, the user can easily arrange the through-holes from the start layer to the upper layer simply by operating the pointer movement instruction means in the wiring design.

  In the wiring design device according to the present invention, the pointer movement instructing means is such that the pointer movement instructing means is a mouse and the end layer generation information input unit is a button of the mouse. Therefore, the user can easily arrange the through holes simply by operating the mouse in the wiring design.

  In the wiring design device according to the present invention, the pointer movement instruction means is a mouse, and the end layer generation information input unit is a scroll unit included in the mouse. Therefore, the user can easily arrange the through holes simply by operating the mouse in the wiring design.

  In the wiring design device according to the present invention, generating the end layer designation information with the layer existing as many times as the number of operations of the first end layer generation information input button from the start layer as the end layer, The end layer designation information is generated with the layer existing above the start layer by the number of times of operation of the second end layer generation information input button.

  Thus, by simply operating the first end layer generation information input button or the second end layer generation information input button of the end layer designation information input means, it is possible to arrange the through holes from the start layer to the upper layer or the lower layer it can. Therefore, the user can easily arrange the through holes from the start layer to the upper layer or the lower layer in the wiring design.

  In the wiring design device according to the present invention, the pointer movement instruction means is a mouse, the first end layer generation information input button is a left button of the mouse, and the second end layer generation information input button is the mouse. The right button. Therefore, the user can easily arrange the through-holes from the start layer to the upper layer or the lower layer simply by operating the mouse in the wiring design.

  In the wiring design device according to the present invention, the pointer movement instruction means is a mouse, and the first end layer generation information input unit and the second end layer generation information input unit are scroll units of the mouse. Thus, in the wiring design, the user can easily arrange the through holes from the start layer to the upper layer or the lower layer simply by operating the mouse.

  Here, the correspondence relationship between the elements described in the claims and the elements in the embodiment is shown. The wiring design device corresponds to the wiring design device 21, and the wiring design device program corresponds to the wiring design device program recorded in the CD-ROM 210. The pointer movement instruction means is the mouse 215, the end layer designation information input unit is the right button RB and the left button LB or the scroll button SB of the mouse 215, and the first end layer designation information input unit is the left button LB or the scroll button SB. The second end layer designation information input unit corresponds to the right button RB or the scroll button SB, respectively. The through hole placement work start information acquisition means is in the CPU 211 and the memory 212, the plane position designation information acquisition means is in the CPU 211 and the memory 212, the start layer designation information acquisition means is in the CPU 211 and the memory 212, and the end layer generation information acquisition means is in the CPU 211 and In the memory 212, the end layer designation information generating means is in the CPU 211 and the memory 212, the confirmation information acquisition means is in the CPU 211 and the memory 212, the end layer designation information confirmation means is in the CPU 211 and the memory 212, and the through hole arrangement means is in the CPU 211 and the memory 212. Respectively.

  The confirmation information corresponds to the designation end information.

The through hole corresponds to a via hole provided in the multilayer printed circuit board, and passes through all the layers from the uppermost layer to the lowermost layer of the wiring layer, or one of the layers from the uppermost layer to the lowermost layer of the wiring layer Including those penetrating through the layers.

  An embodiment of the wiring design apparatus according to the present invention will be described below.

1. Overview FIG. 1 shows a functional block diagram according to Embodiment 1 of a wiring design apparatus according to the present invention. The wiring design apparatus M1 includes a pointer movement instruction unit m101, a through hole placement work start information acquisition unit m103, a plane position designation information acquisition unit m105, a start layer designation information acquisition unit m107, an end layer generation information acquisition unit m109, and an end layer designation information. A generation unit m111, a confirmation information acquisition unit m113, an end layer designation information determination unit m115, and a through-hole arrangement unit m117 are provided.

  The pointer movement instruction unit m101 instructs the movement of the pointer displayed on the display unit. Further, the pointer movement instructing unit m101 has a first end layer designation information input button and a second end layer designation information input button.

  The through-hole placement work start information acquisition unit m103 indicates that the through-hole placement work, which is a work of placing through holes penetrating any plurality of layers among the layers belonging to the printed circuit board or the semiconductor component, is started. Get placement work start information.

  The plane position designation information acquisition unit m105 arranges the through hole in the display of the planar configuration of the printed circuit board or the semiconductor component when in the through hole arrangement work state after acquiring the through hole arrangement work start information. The plane position designation information for designating the position on the plane to be acquired is acquired.

  The start layer designation information acquisition unit m107 acquires start layer designation information for designating a start layer that is a layer in which the through holes are arranged when in the through hole arrangement work state.

  The end layer generation information acquisition unit m109 outputs end layer generation information for generating the end layer specification information for specifying the end layer, which is a layer in which the through hole is disposed, in the through hole arrangement work state. Obtained via the end layer generation information input unit of the pointer movement instruction means.

  The end layer designation information generation unit m111 generates the end layer designation information in an undetermined state based on the end layer generation information.

The confirmation information acquisition unit m113 acquires the confirmation information in which the end layer designation information that is in the indeterminate state is in the definite state. The information is in a final state.

  The through-hole arrangement means m117 uses the plane position information, the start layer designation information, and the final layer designation information in the finalized state, and at the position on the plane corresponding to the plane position information, the start layer designation information and A through hole penetrating the layers from the start layer to the end layer corresponding to the end layer designation information is disposed.

  Thereby, a through-hole can be easily arrange | positioned using a pointer movement instruction | indication means. Therefore, the user can easily arrange the through holes simply by using the pointer movement instruction means in the wiring design.

2. Hardware Configuration The hardware configuration of the wiring design device 21 will be described with reference to FIG. The wiring design device 21 includes a CPU 211, a memory 212, a hard disk 213, a keyboard 214, a mouse 215, a display 216, and a CD-ROM drive 217.

  The CPU 211 performs processing based on other applications such as an operating system (OS) and a wiring design program recorded in the hard disk 213. The memory 212 provides a work area for the CPU 211. The hard disk 213 records and holds other applications such as an operating system (OS) and a wiring design program. The hard disk 213 stores and holds data necessary for the wiring design program. The mouse 215 instructs to move the pointer displayed on the display 216. The mouse 215 has a right button RB and a left button LB.

  The CD-ROM drive 217 reads data from a CD-ROM, such as reading a wiring design program from a CD-ROM 210 in which a wiring design program is recorded, and a program of another application from another CD-ROM. Do.

  The keyboard 214 receives an input signal when the user presses the key top. The display 216 displays a user interface and the like.

3. Via hole placement processing of the wiring design device 21
3.1. Premises In order to specifically explain the via hole placement process in the wiring design device 21 described below, the wiring design has been completed up to the stage shown in FIG. Assume that the wiring design finally reaches the state shown in FIG. 5B. As shown in FIG. 5A, the multilayer printed circuit board P is composed of five insulating plates (hereinafter referred to as insulating plates) P1, P2, P3, P4, and P5. Here, FIG. 7 shows an exploded view of the multilayer printed board P exploded for each insulating plate. The insulating plates P1, P2, P3, and P4 have wiring on the front surface (upper side in FIG. 7) of the front surface and the back surface. Wiring J11 is provided on the insulating plate P1, wiring J32 is provided on the insulating plate P2, wirings J13 and J33 are provided on the insulating plate P3, and wiring J34 is provided on the insulating plate P4.

  On the other hand, the insulating plate P5 has wiring on both the front surface and the back surface. Wirings J15 and J35 are provided on the front surface of the insulating plate P5, and wirings J16 and J36 are provided on the back surface, respectively.

  Bonding between the back surface of the insulating plate P1 and the surface of the insulating plate P2, bonding between the back surface of the insulating plate P2 and the surface of the insulating plate P3, bonding between the back surface of the insulating plate P3 and the surface of the insulating plate P4, and the insulating plate P4 The joining of the back surface and the surface of the insulating plate P5 is realized, for example, by applying an insulating material for adhesion to the surface and then pressing it.

  In the multilayer printed circuit board P to which the insulating plates P1 to P5 are bonded, the first wiring layer is insulated on the surface of the insulating plate P1, and the second wiring layer is insulated between the back surface of the insulating plate P1 and the surface of the insulating plate P2. The third wiring layer is between the back surface of the plate P2 and the surface of the insulating plate P3, the fourth wiring layer is between the back surface of the insulating plate P3 and the surface of the insulating plate P4, and the back surface of the insulating plate P4 and the insulating plate P5. A fifth wiring layer and a sixth wiring layer are formed on the back surface of the insulating plate P5 (see FIG. 5A). That is, the multilayer printed circuit board P is composed of six wiring layers.

  In FIGS. 5A, 5B and 7, the wiring applied to each wiring layer is depicted so as to erode the insulating plate existing on the upper side, but this is for simplification of drawing. . In actuality, when the wiring bites into the upper and lower bidirectional insulating plates, the gap between the insulating plates (the same thickness as the wiring thickness) may be filled with an adhesive insulator.

3.2. Via Hole Placement Processing The via hole placement processing in the wiring design device 21 is shown in FIGS. In the following description, it is assumed that the via hole V1 in FIG. 5B is arranged.

  When the CPU 211 of the wiring design device 21 acquires via hole placement work start information indicating that a via hole placement work, which is a work of placing a via hole on the multilayer printed circuit board, is started in a state where the wiring design program is activated, Start processing. Here, the via hole arrangement start information is an icon indicating the start of the via hole arrangement work displayed on the display 216 or an item indicating the start of the via hole arrangement work in the menu by the user using the keyboard 214 or the mouse 215. Generated by selecting.

  As shown in FIG. 3, when the via hole placement work is started, the CPU 211 determines whether or not the plane position designation information has been acquired (S501). The plane position information is input by the user on a plan view displaying a plane configuration when the multilayer printed board P shown in FIG. 5A is viewed from the arrow A1 side. FIG. 6 shows a state where a plan view in which the plane configuration is displayed is displayed. In FIG. 6, the first wiring layer, the third wiring layer, and the fifth wiring layer are displayed, and the other wiring layers are not displayed. A wiring layer to which wiring shown by a dark solid line is applied is shown in the first wiring layer, and a wiring layer to which wiring shown by a dotted line is applied is shown in the third wiring layer by a thin solid line. The wiring layer to which the wiring is applied corresponds to the fifth wiring layer.

  The user activates the wiring layer in which the via hole is to be arranged by a predetermined operation. In FIG. 6, the first wiring layer is active. Then, the user uses the mouse 215 or the like to specify the via hole arrangement position (xy coordinate value) on the plane of the multilayer printed board P where the via hole is arranged. For example, the user designates the point Q1 in FIG.

  Returning to FIG. 3, when the CPU 211 determines that the xy coordinate value of the designated point Q1 has been acquired as plane position information, the CPU 211 stores the acquired plane position information in the memory 212 (S502). Then, the CPU 211 stores the number corresponding to the currently active layer in the memory 212 as start layer designation information (S503). For example, when the first wiring layer is active, the CPU 211 stores the number “1” as start layer designation information.

  The CPU 211 initializes end layer designation information indicating the end layer of the via hole (S505), and sets the value of the start layer designation information as the value of the end layer designation information (S506). When the CPU 211 determines that the information acquired from the mouse 215 indicates the operation of the right button RB (S507), the CPU 211 adds “1” to the value of the end layer designation information (S509). If the CPU 211 determines that the information acquired from the mouse 215 indicates the operation of the left button LB (S507), it subtracts “1” from the value of the end layer designation information (S511).

  The user uses the mouse 215 to input the number of via holes penetrating through the via hole. For example, in forming the via hole V1 in FIG. 5B, the left button LB of the mouse 215 is operated five times if the via hole V1 is to be formed by penetrating through the five wiring layers using the first wiring layer as a start layer. . If the via hole V1 is to be formed by penetrating the five wiring layers starting from the sixth wiring layer, the right button RB of the mouse 215 is operated five times.

  If the information acquired from the mouse 215 is not related to the left button LB or the right button RB in step S507, the CPU 211 performs a corresponding process (S512).

  4, when the CPU 211 determines that the designation end information indicating that the designation of the end layer is completed (S513), the CPU 211 acquires the number N of the wiring layers of the printed circuit board from the memory 212 or the hard disk 213 ( S515). Since the printed circuit board in this embodiment has six wiring layers from the first wiring layer to the sixth wiring layer, the value of N is “6”.

  Then, the CPU 211 determines whether or not the value of the end layer designation information is within the range of 1 to N (S517). When the CPU 211 determines that the value of the end layer designation information is within the range of 1 to N, the wiring layer corresponding to the start layer designation information is the start layer, and the wiring layer corresponding to the end layer designation information is the end layer. Judgment is made (S519).

  If the CPU 211 determines in step S515 that the value of the end layer designation information is not within the range of 1 or more and N or less, the CPU 211 performs predetermined error processing (S521). The designation end information in step S513 corresponds to double-clicking the left button LB of the mouse 215.

  The CPU 211 starts from the start layer (first wiring layer) to the end layer (sixth wiring layer) on the multilayer printed circuit board P based on the start layer (first wiring layer), the end layer (sixth wiring layer), and the position information. A via hole V1 penetrating up to is disposed (S523). FIG. 5B shows a state in which the via hole V1 is arranged by specifying the wiring layer in which the via hole is arranged in this way.

  As shown in FIG. 5B, the intermediate layer such as the second wiring layer to the fifth wiring layer excluding the first wiring layer and the sixth wiring layer at both ends of the via hole V1 receives the receiving land around the through hole H1. L12, L13, and L14 are formed. However, if the potential applied to the formed via hole V1 is the same as the potential applied to the wiring at the position where the via hole V1 passes in the intermediate layer, for example, the via hole V1 passes through the wiring J15 in the fifth wiring layer in FIG. 5A. In this case, the receiving land is not formed.

  Further, when the potential applied to the formed via hole is different from the potential applied to the wiring at the position where the via hole V1 passes in the intermediate layer, for example, the wiring J13 in the third wiring layer which is the ground layer in FIG. When V1 passes, the window K is provided in the wiring J13 of the intermediate layer, and the receiving land L13 is formed therein. The formation process of the window K and the receiving land L13 in such wiring design uses a conventionally used technique.

  In the description so far, the case where the via hole V1 penetrating from the first wiring layer to the sixth wiring layer of the multilayer printed board P as shown on the left side of FIG. 5B is shown, but as shown on the right side of FIG. 5B. It is also possible to arrange the via hole V3 in the intermediate layer such as the third wiring layer to the fifth wiring layer of the multilayer printed board P. In the following, it is assumed that the via hole V3 is arranged continuously to the arrangement of the via hole V1.

  In the plan view shown in FIG. 6, the user activates the fifth wiring layer and designates the via hole arrangement position (xy coordinate value), for example, the point Q3 with the mouse 215 or the like.

  When the CPU 211 determines that the xy coordinate value of the designated point Q3 has been acquired as plane position information (FIG. 3: S501), the CPU 211 stores the acquired plane position information in the memory 212 (FIG. 3: S502). Then, the CPU 211 stores the number “5” corresponding to the currently active wiring layer (fifth wiring layer) in the memory 212 as start layer designation information (FIG. 3: S503). The CPU 211 initializes end layer designation information indicating the end layer of the via hole (FIG. 3: S505), and sets the value “5” of the start layer designation information as the value of the end layer designation information (FIG. 3: S506).

  Since the fifth wiring layer is currently active, the user needs to form a via hole toward the upper layer as viewed from the fifth wiring layer, which is the active wiring layer. Therefore, the user operates the right button RB of the mouse 215 twice and double-clicks the left button LB.

  Since the CPU 211 performs the processing of step S507 and step S511 twice, when the double click of the left button LB that is the designation end information is acquired (FIG. 3: S513), the value of the end layer designation information is “ 3 "is set.

The CPU 211 acquires the number “6” of the wiring layers of the printed circuit board from the memory 212 or the hard disk 213 (FIG. 4: S515). Since the value “3” of the end layer designation information is within the range of 1 to 6 (FIG. 4: S517), the CPU 211 sets the fifth wiring layer corresponding to the start layer designation information “5” as the start layer and end. The third wiring layer corresponding to the layer designation information “3” is determined as the end layer (FIG. 4: S519). Then, based on the start layer (fifth wiring layer), the end layer (third wiring layer), and the position information, the CPU 211 passes through the multilayer printed board P from the fifth wiring layer to the third wiring layer via hole V3. (FIG. 4: S523). A state where the via hole V3 is arranged is shown in FIG. 5B.

  In the wiring design device 21 in the first embodiment described above, it is determined by the user the left button LB or the right button RB of the mouse 215 from which wiring layer a via hole is to be formed. In the wiring design device 31 according to the present embodiment, it is determined which via layer is to be formed from the start layer to which wiring layer by using the scroll button SB of the mouse 215 by the user.

  In the following description, parts different from the first embodiment will be mainly described, and the same components as those in the first embodiment are denoted by the same reference numerals as those in the first embodiment. A hardware configuration of the wiring design apparatus 31 will be described with reference to FIG. The wiring design device 21 includes a CPU 211, a memory 212, a hard disk 213, a keyboard 214, a mouse 215, a display 216, and a CD-ROM drive 217. The mouse 215 has a scroll button SB that can be rotated in the vertical direction.

The via hole placement processing of the wiring design device 31 will be described with reference to the flowchart shown in FIG. When the CPU 211 sets the value of the start layer designation information as the value of the end layer designation information in step S506, the CPU 211 determines that the information acquired from the mouse 215 indicates a predetermined amount of operation in the downward direction of the scroll button SB. (S907), “1” is added to the value of the end layer designation information (S509). When the CPU 211 determines that the information acquired from the mouse 215 indicates a predetermined amount of upward operation of the scroll button SB (S907), the CPU 211 subtracts “1” from the value of the end layer designation information (S511). . Other processes are the same as those in the first embodiment.

  In the wiring design device 31 in the above-described second embodiment, the end layer designation information is generated and confirmed using the scroll button SB of the mouse 215 by the user. However, the start layer designation information is fixed after being set in step S503. It was. In the wiring design device 41 in the present embodiment, the start layer designation information can also be reset using the scroll button SB.

  In the following description, parts different from those in the first and second embodiments will be mainly described, and the same reference numerals as those in the first and second embodiments are given to the same configurations as those in the first and second embodiments. .

  The hardware configuration of the wiring design device 41 is the same as that of the second embodiment.

  The via hole placement processing of the wiring design device 41 will be described with reference to the flowcharts shown in FIGS. In FIG. 10, when the CPU 211 determines that the information acquired from the mouse 215 in step S1007 indicates the operation of the left button LB, the CPU 211 determines the type of information acquired from the mouse 215 next, as shown in FIG. (S1107).

  When the CPU 211 determines that the information acquired from the mouse 215 indicates a predetermined amount of operation in the downward direction of the scroll button SB (S1107), the CPU 211 adds “1” to the value of the start layer designation information (S1109). . When the CPU 211 determines that the information acquired from the mouse 215 indicates a predetermined amount of upward operation of the scroll button SB (S1107), the CPU 211 subtracts “1” from the value of the start layer designation information (S1111). . If the CPU 211 determines that the information acquired from the mouse 215 indicates the operation of the left button LB, the CPU 211 exits the process of resetting the value of the start layer designation information, and returns to step S1007 (see FIG. 10). .

If the information acquired from the mouse 215 is not related to the operation of the scroll button SB or the operation of the left button LB in step S1107, the CPU 211 performs a corresponding process (S1112).

[Other Embodiments]
(1) Multilayer Printed Circuit Board In the first embodiment described above, a multilayer printed circuit board having a plurality of wiring layers is exemplified as a target for arranging via holes, but a semiconductor component having a plurality of layers may be used. For example, it may be a semiconductor component such as an LSI package having a plurality of layers.

(2) Mouse 215
In the first embodiment, the mouse 215 is exemplified as the pointer movement instruction means. However, the pointer 215 designates the movement of the pointer displayed on the display means, and includes a first end layer designation information input button and a second end layer designation. As long as it has an information input button, it is not limited to the example. For example, a trackball or a touch pen may be used.

(3) Left button LB, right button RB
In the first embodiment, a via hole is formed from the layer to the lower layer according to the number of operations of the left button LB, while a via hole is formed from the layer to the upper layer according to the number of operations of the right button RB. It is not limited to. For example, if the left button LB or the right button RB is operated, a via hole from the start layer to the lower layer may be formed. Further, when the button is operated, a via hole from the start layer to the upper layer may be formed.

  Furthermore, only the operation of either the left button LB or the right button RB may be set as a processing target.

(4) Display of plane configuration and cross-sectional configuration In the above-described first embodiment, the plan view is illustrated as the display of the plane configuration, but is not limited to the illustrated example as long as the plane configuration can be displayed. For example, it may be a 3D display diagram including a surface such as a multilayer printed board or an intermediate surface. The same applies to the cross-sectional configuration.

(5) Via Hole Arrangement Process In the first embodiment, when the via hole arrangement process is executed, the value of the end layer designation information is directly generated based on the operation of the left button LB or the right button RB of the mouse 215. However, the value of the parameter n may be set based on the operation of the left button LB or the right button RB of the mouse 215, and the end layer designation information may be indirectly generated using the parameter n. For example, when the CPU 211 determines that the information acquired from the mouse 215 indicates the operation of the right button RB, “1” is added to the parameter n, and the information acquired from the mouse 215 indicates the operation of the left button LB. If it is determined that it is, “1” is subtracted from the parameter n. When the CPU 211 determines that the designation end information indicating that the designation of the end layer is completed, the CPU 211 may generate the end layer designation information by adding the parameter n to the start layer designation information. . The same applies to Example 2 and Example 3.

(6) Designation end information In the above-described first embodiment, the designation end information in step S513 corresponds to the double click of the left button LB of the mouse 215, but is not limited to the example. For example, the operation of the left button LB of the mouse 215 for setting an xy coordinate value in order to newly arrange a via hole in another place, or the operation of a command for executing a process different from the via hole arrangement process. Also good.

(7) Wiring design program In the above-described first to third embodiments, the function of arranging the via hole is provided as a part of the wiring design program. However, if the function of arranging the via hole can be provided, It does not have to be part of the wiring design program. For example, the function may be provided by an additional module, plug-in, add-on, or the like for the basic wiring design program.

(8) Configuration of Wiring Design Device 21 In the first to third embodiments, the wiring design device 21 includes the CPU 211, the memory 212, the hard disk 213, the keyboard 214, the mouse 215, the display 216, and the CD-ROM drive 217. However, only the CPU 211, the memory 212, the hard disk 213, and the mouse 215 may be included.

(9) Order of processing in flowchart In the first to third embodiments, each processing is realized based on each flowchart shown in the figure. However, as long as each process can be realized, the order of the processes in each flowchart is not limited to the example.

It is the figure which showed the functional block diagram in Example 1 of the wiring design apparatus in this invention. 2 is a diagram illustrating a hardware configuration of a wiring design device 21. FIG. 5 is a flowchart showing the operation of the wiring design device 21. 5 is a flowchart showing the operation of the wiring design device 21. It is the figure which showed the state before work of the via hole arrangement | positioning, and the work completion state, A is a figure which showed the state before work, and B was the work completion state. It is the figure which showed the state in which the top view is displayed. It is the figure which showed the exploded view of the multilayer printed circuit board P. FIG. 2 is a diagram illustrating a hardware configuration of a wiring design device 31. FIG. 5 is a flowchart showing the operation of the wiring design device 31. 5 is a flowchart showing the operation of the wiring design device 41. 5 is a flowchart showing the operation of the wiring design device 41.

Explanation of symbols

M1... Wiring design apparatus m101... Pointer movement instruction means m103... Through-hole placement work start information acquisition means m105... Plane position designation information acquisition means m107. Start layer designation information acquisition means m109 ... End layer generation information acquisition means m111 ... End layer designation information generation means m113 ... Final information acquisition means m115 ... End layer designation Information determination means m117... Through-hole placement means 21... Wiring design device 210.
211 ... CPU
212 ... Memory 213 ... Hard disk 214 ... Keyboard 215 ... Mouse LB ... Left button RB ... Right button 216 ... Display 217... CD-ROM drive 31... Wiring design device SB... Scroll button 41.

Claims (11)

A wiring design device for designing wiring of a printed circuit board or a semiconductor component having a plurality of layers,
Pointer movement instruction means for instructing movement of the pointer displayed on the display means;
Through-hole placement work for obtaining through-hole placement work start information indicating that a through-hole placement work is started, which is a work for placing through holes penetrating through a plurality of layers among layers belonging to the printed circuit board or semiconductor component. Starting information acquisition means,
A plane for designating a position on a plane on which the through hole is arranged in the display of the planar configuration of the printed circuit board or the semiconductor component when the through hole arrangement work state is obtained after acquiring the through hole arrangement work start information. Plane position designation information acquisition means for acquiring position designation information;
Start layer designation information acquisition means for acquiring start layer designation information for designating a start layer that is a layer in which the through holes are arranged when in the through hole arrangement work state;
End layer generation in which the pointer movement instructing means has end layer generation information for generating the end layer designation information for designating the end layer which is the layer in which the through hole is arranged when in the through hole arrangement work state End layer generation information acquisition means acquired via an information input unit,
End layer designation information generating means for generating the end layer designation information in an indeterminate state based on the end layer generation information;
Confirmation information acquisition means for acquiring confirmation information in which the end layer designation information in the unconfirmed state is in a confirmation state;
Based on the confirmed information, an end layer designation information confirming means for setting the end layer designation information in an unconfirmed state as a confirmed state,
Corresponding to the start layer designation information and the end layer designation information at the position on the plane corresponding to the plane position information, using the plane position information, the start layer designation information, and the final layer designation information in the fixed state A through hole arrangement means for arranging a through hole penetrating the layer from the start layer to the end layer,
Wiring design apparatus having A wiring design program for designing wiring of a printed circuit board or a semiconductor component having a plurality of layers,
The wiring design program is
A computer having pointer movement instruction means for instructing movement of a pointer displayed on the display means,
Through-hole placement work for obtaining through-hole placement work start information indicating that a through-hole placement work is started, which is a work for placing through holes penetrating through a plurality of layers among layers belonging to the printed circuit board or semiconductor component. Starting information acquisition means,
A plane for designating a position on a plane on which the through hole is arranged in the display of the planar configuration of the printed circuit board or the semiconductor component when the through hole arrangement work state is obtained after acquiring the through hole arrangement work start information. Plane position designation information acquisition means for acquiring position designation information;
Start layer designation information acquisition means for acquiring start layer designation information for designating a start layer that is a layer in which the through holes are arranged when in the through hole arrangement work state;
End layer generation in which the pointer movement instructing means has end layer generation information for generating the end layer designation information for designating the end layer which is the layer in which the through hole is arranged when in the through hole arrangement work state End layer generation information acquisition means acquired via an information input unit,
End layer designation information generating means for generating the end layer designation information in an indeterminate state based on the end layer generation information;
Confirmation information acquisition means for acquiring confirmation information in which the end layer designation information in the unconfirmed state is in a confirmation state,
Based on the confirmed information, an end layer designation information confirming means for setting the end layer designation information in an unconfirmed state as a confirmed state,
Corresponding to the start layer designation information and the end layer designation information at the position on the plane corresponding to the plane position information, using the plane position information, the start layer designation information, and the final layer designation information in the fixed state A through hole arrangement means for arranging a through hole penetrating the layer from the start layer to the end layer,
A wiring design program for functioning as a wiring design device having In either the wiring design device according to claim 1 or the wiring design program according to claim 2,
The end layer generation information acquisition means further includes:
Obtaining the end layer generation information based on an operation amount of the end layer generation information input unit;
It is characterized by. In either the wiring design device or the wiring design program according to claim 3,
The end layer designation information generating means further includes:
Generating the end layer designation information in which the end layer is the layer existing below the start layer by the operation amount;
It is characterized by. In either the wiring design device or the wiring design program according to claim 3,
The end layer designation information generating means further includes:
Generating the end layer designation information in which the end layer is the layer existing above the start layer by the operation amount;
It is characterized by. In either of the wiring design apparatus or the wiring design program according to claim 1,
The pointer movement instruction means is a mouse, and the end layer generation information input unit is a button of the mouse;
It is characterized by. In either of the wiring design apparatus or the wiring design program according to claim 1,
The pointer movement instruction means is a mouse, and the end layer generation information input unit is a scroll unit of the mouse;
It is characterized by. In either the wiring design device or the wiring design program according to claims 1 to 3,
The end layer generation information input unit further includes:
A first end layer generation information input unit and a second end layer generation information input unit;
Have
The end layer designation information generating means further includes:
The end layer specifying information is generated with the layer existing below the start layer by an operation amount of the first end layer specifying information input unit as the end layer, and the second end layer specification is generated from the start layer. Generating the end layer designation information in which the end layer is the layer existing above the operation amount of the information input unit;
It is characterized by. Either of the wiring design device or the wiring design program according to claim 8,
The pointer movement instruction means is a mouse, the first end layer generation information input unit is a left button of the mouse, and the second end layer generation information input unit is a right button of the mouse;
It is characterized by. In either of the wiring design device or the wiring design program according to claim 9,
The pointer movement instructing means is a mouse, and the first end layer generation information input unit and the second end layer generation information input unit are scroll units of the mouse;
It is characterized by. In a wiring design method for designing wiring of a printed circuit board or a semiconductor component having a plurality of layers using a computer having pointer movement instruction means for instructing movement of a pointer displayed on a display means,
The computer acquires through-hole placement work start information indicating that a through-hole placement work is started, which is a work of placing through holes penetrating a plurality of layers among layers belonging to the printed circuit board or the semiconductor component. ,
A plane for designating a position on a plane on which the through hole is arranged in the display of the planar configuration of the printed circuit board or the semiconductor component when the through hole arrangement work state is obtained after acquiring the through hole arrangement work start information. Get location info,
End layer generation in which the pointer movement instructing means has end layer generation information for generating the end layer designation information for designating the end layer which is the layer in which the through hole is arranged when in the through hole arrangement work state Obtained via the information input unit,
Based on the end layer generation information, generate the end layer designation information in an indeterminate state,
Obtain finalized information with the finalized layer designation information in the final status as finalized,
Based on the confirmation information, the end layer designation information in the unconfirmed state is a confirmed state,
Corresponding to the start layer designation information and the end layer designation information at the position on the plane corresponding to the plane position information, using the plane position information, the start layer designation information, and the final layer designation information in the fixed state Disposing a through-hole penetrating a layer from the start layer to the end layer,
Wiring design method characterized by

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