JPH10222546A - Multi-layer printed circuit board pattern design processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To plot via on a display screen so that layers that are connected by via may intuitively and easily be decided in a printed circuit board pattern design processor. SOLUTION: A processing part 2 reads position data of via on a layer, layers connecting data and prescribed shape data from a storing part 3. The prescribed shape is divided into layer sections D1 to D6 which correspond to each layer and shown at a position of a display part 4 which corresponds to the position data, and also, via section V that corresponds to layers which are connected by via based on the layers connecting data, synthesized and shown. Furthermore, plural sections V that exist at the same display position are combined and shown.

Description

DETAILED DESCRIPTION OF THE INVENTION

The present invention relates to a multilayer printed wiring board pattern design processing apparatus, and more particularly to an apparatus for drawing vias of a multilayer printed wiring board pattern on a screen.

In recent years, due to advances in electronic device technology, high-density mounting technology, and the like, printed wiring boards have been increased in multilayer and density. As a mounting technology effective for increasing the number of layers and increasing the density, there is a via that connects different layers.

[0002] It is necessary for the efficiency of pattern design work to be able to easily confirm the layers connected by vias on the display screen of the printed wiring board pattern design processing apparatus.

[0003]

2. Description of the Related Art FIG. 11 shows the structure of a general multilayer printed wiring board. FIG. 1 (1) shows a plan view, and FIG. 2 (2) shows a line AA 'in FIG. 1 (1). FIG. 2 shows a cross-sectional view when cut by a circle.

As shown in FIG. 1B, a printed wiring board 10 includes conductor layers 11-1 to 11-6 (hereinafter, may be simply referred to as layers) and laminates 12-1 to 12-5 alternately. It is configured to be laminated.

The via 13a-1 has a conductor pattern 14-1 on the conductor layer 11-1 and a conductor pattern 14--1 on the conductor layer 11-3.
2 are electrically connected. Vias 13a-2 and 13a
-3 is also a conductor pattern of a different conductor layer (not shown)
It is installed to connect.

[0006] The types of vias are vias 13a-1 to 13a-.
IVH not penetrating the printed wiring board indicated by 3
(Inner Via Hole) and through via holes indicated by vias 13b.

In FIG. 1A, XY coordinates are set on the plane of the printed wiring board to specify the installation positions of the vias, and the positions of the vias 13a-1 and 13a-2 are set to the same coordinates ( X1, Y1), and the positions of the vias 13a-3 and 13b are specified by coordinates (X2, Y2) and coordinates (X3, Y3), respectively.

FIG. 12 shows an example of drawing a via on a display screen of a conventional printed wiring board pattern design processing apparatus.

In this drawing example, for example, FIG.
As shown in (2), brown, red, orange, yellow, green, and blue are determined in advance as the conductor layer colors corresponding to the conductor layers 11-1 to 11-6, respectively.

For example, circles C1 to C3 indicating the conductor layers 11-3 to 11-5 connected by the via 13a-3 in the shape C0 indicating the via 13a-3 are orange, yellow,
And green.

[0011]

In such a conventional multilayer printed wiring board pattern design processing apparatus, skill is required to visually and intuitively determine the layer to which the via is connected from the displayed color.

In particular, as for the IVH, different layers are connected for each via, and different vias are displayed at the same position on the screen as vias 13a-1 and 13a-2 shown in FIG. In some cases, the design has to be performed while being aware of the interlayer for each individual via.

Accordingly, it is an object of the present invention to provide a multilayer printed wiring board pattern design processing apparatus which draws vias on a display screen so that layers connected by vias can be intuitively determined.

[0014]

In order to achieve the above object, a multi-layer printed wiring board pattern design processing apparatus according to the present invention comprises a display section, position data on via layers, interlayer connection data, and a predetermined shape. A storage unit for storing data and
Each data is read from the storage unit, the predetermined shape is divided into layer sections corresponding to the respective layers, displayed at the positions of the display unit corresponding to the position data, and connected by the vias based on the interlayer connection data. And a processing unit for selecting and composing and displaying via sections corresponding to the layers.

FIG. 1 is a diagram for illustrating and explaining the principle (No. 1) of the present invention described above.
The vias are displayed on the screen of the display unit by the processing unit based on the position data, interlayer connection data, and predetermined shape data of the one via.

In this example, an ellipse having a predetermined shape has a layer section D corresponding to six layers of a multilayer printed wiring board at a position centered on coordinates (X1, Y1) corresponding to position data.
1 to D6.

Then, layer sections D3 to D5 indicating the layers 3 to 5 to which the vias are connected are selected as via sections V (shaded portions) and are synthesized and displayed.

It can be immediately read from the via section V having a shape indicating the via that the via connects the layers 3 to 5.

In the present invention, the position data, the interlayer connection data, and the predetermined shape data can be provided from the input unit to the storage unit.

That is, position data, interlayer connection data, and predetermined shape data of each via can be written in the storage unit using the input unit.

In the present invention, the predetermined shape may be a circle or a rectangle.

That is, as shown in FIG. 2 for explaining the principle of the present invention (part 2), the display shape of the via may be a circle shown in FIG. 1A or a rectangle shown in FIG.

Furthermore, in the above-mentioned present invention, when the predetermined shape is a circle, the section may be divided by a sector or a parallel chord.

That is, as shown in FIG. 3 which illustrates the principle of the present invention (part 3), the display circle of the via is divided into fan-shaped sections D1 to D6 as shown in FIG. Section D with parallel strings G1 to G5 as shown in FIG.
It may be divided into 1 to D6.

Further, in the above-mentioned present invention, the predetermined shape may be displayed so as to be equally divided or equally divided into sections corresponding to the respective layers.

That is, as shown in FIG. 4 (part 4) of the principle of the present invention, a rectangular display shape of a via may be displayed in equally divided sections D1 to D6.

Further, in the present invention described above, it is possible to display a plurality of via sections at the same display position in combination with the predetermined shape.

That is, in the principle explanatory view (part 5) of the present invention exemplified in FIG. 5, the shapes of the vias shown in FIGS. 1 (1) and (2) correspond to the layers provided at the same positions of the printed wiring board pattern. Vias 13a-1 connecting the first through third vias (FIG. 1)
1) and vias 13a-2 (same as above) connecting the layers 4 and 5 are indicated by shaded via sections V1 and V2.

FIG. 3C shows an example in which FIGS. 1A and 1B are combined and displayed, and the via sections V1 and V2 are displayed on the same circle with different nets. I have.

By the combined display, the vias 13a-2, 13a-2,
13a-2 can be displayed so as to be superimposed on the installation position, and the layer between the vias 13a-1 and 13a-2 can be easily checked.

Further, in the present invention, when the via is specified on the display unit by the input unit, the via section can be temporarily displayed.

That is, for example, in FIG. 3A, a via is normally displayed only in a circle at normal times, and the via section V is not displayed.
Via section V only when necessary when a circle is specified by the input unit
Can be displayed temporarily. Therefore, it is not necessary to always display the via section V when unnecessary.

Further, according to the present invention, the processing section can draw a boundary line between different via sections.

That is, for example, in FIG. 5 (3), different vias 13a-1 and 13a-2 installed at the same position.
Of the via sections V1 and V2 can be drawn more clearly to clearly indicate the boundaries.

In the present invention, a plurality of types of the predetermined shape data are prepared in the storage unit, and any one of them can be selected by an instruction from the input unit.

That is, FIG.
The shape shown in (1) and the shape shown in FIG. 4 can be prepared in the storage unit, and any one of the shapes can be selected and displayed on the display unit based on the designation of the input unit.

Therefore, it is possible to switch to the display shape most suitable for the purpose by using the input unit as needed.

In the present invention, a symbol may be displayed in the via section or the layer section according to an instruction from the input section.

That is, in accordance with an instruction from the input unit, a symbol corresponding to each layer can be displayed in each layer section. As a result, the conductor layer corresponding to each layer section can be easily confirmed.

[0040]

FIG. 6 shows an embodiment of a multilayer printed wiring board pattern design processing apparatus according to the present invention, in which a processing section 2 included in a computer 1 and a storage section connected to the processing section 2 are shown. 3, a display unit 4, a keyboard 8 and a mouse 9 as input units.

The storage section 3 further incorporates a design database section 5 which further stores printed wiring board design information. The design database section 5 includes a via data section 6 and a via display mode definition table 7.

The processing section 2 performs a process of displaying the printed wiring board design information stored in the design database section 5 on the display section 4.

FIG. 7 shows an example of the data configuration of one via in the via data section 6, where the via position is indicated by XY coordinates on the printed wiring board, the installation position Y, and the layer to which the via is connected. Layer L1 indicating the starting end layer number of
(= 2) and the To layer L2 (= 4) indicating the end end layer number, the shape data R (for example, the radius of a circle), and the display mode number M
And so on.

FIG. 8 shows one of the via display mode definition tables 7.
5 shows a display mode data configuration example of one via, and shows a display mode number M specified by the via data section 6, a display mode indicating a display shape and a division method, and whether or not to display a layer number (layer symbol). It is composed of layer number ON / OFF, and selection / non-selection items indicating whether or not the layer number has been selected.

The contents of the via data section 6 and the display mode definition table 7 can be set in advance by the computer 1 or can be set and changed by an input operation of the keyboard 8 or the mouse 9.

An operation example of such an embodiment will be described below. First, in the embodiment of the display screen shown in FIG. 9 for setting the display mode of the via, when the operator selects the via display mode (FIG. 1 (1)) displayed on the screen with the mouse 9 or the like, the display is performed. A mode selection menu ((2) in the figure) is displayed. Here, as an example, the equally divided circle display mode (see FIG. 3A) is designated.

In response to the designation of the equally divided display mode, the processing unit 2 selects the equally divided circle display mode in the via display definition table 7 of the storage unit 3.

Similarly, it is possible to designate with the mouse 9 or the like whether or not to display the layer number.

The processing section 2 registers the designated display mode and the display / non-display of the layer number in the mode definition table 7. That is, the item “display mode” of the mode definition table 7 is an equally-divided circle display, and an item whose item “layer number ON / OFF” is, for example, “layer number ON” is set to “selection”. "Not selected" (see FIG. 8).

Then, the processing section 2 reads the display mode number "1" selected from the item "display mode number", registers this "1" in the display mode number M of the via data section 7, and registers the display mode number M The setting is completed.

Next, a procedure in which the processing section 2 displays a via will be described with reference to FIG. When there is a via to be displayed on the display unit 4 in the via data unit 6, the processing unit 2 reads the data and display mode of the via from the via data unit 6 and the display mode definition table 7, respectively.

That is, the processing unit 2 determines the installation positions X and Y, the From layer L1 = 2, and the To layer L from the via data unit 6 in FIG.
2 = 4, shape data (radius = R), display mode number M =
Know "1" etc.

Further, the processing unit 2 sets the display mode number M =
From “1”, it is known that the currently specified display mode is “equally divided circle display” and “layer number ON” with reference to the mode definition table 7 shown in FIG.

An embodiment in which the vias are displayed on the display unit 4 based on the display data of such vias will be described for the case where the display mode shown in FIG.

The number of layers N = “4” of the design printed wiring board is read from the design database unit 5. The database of the number of layers and the like is prepared in advance in the design database unit 5 as in the prior art. The circumferential angle of 360 ° is divided by the number of layers N = “4” to obtain a distribution angle per layer = 90 °. Sectors D1 to D4 each having a radius R and an angle of 90 ° are sequentially created from the position at 12 o'clock of the clock, and drawn at positions on the screen corresponding to the installation positions X and Y.

From the From layer L1 (= 2) to the To layer L2
For example, the sector portions D2 to D4 between (= 4) are painted in the same color and displayed as via sections. Since the drawing of the layer number is ON, each fan shape D1 to D4
, Corresponding layer numbers 1 to 4 are drawn. Further, if there is a via at the same position as the installation positions X and Y (see the example of FIG. 11), the same drawing is repeated. If there is a boundary line between the via sections, the boundary line is drawn. That is, when there are two vias at the same position as in the example shown in FIG.
Are in contact with each other across the boundary line L, so that the boundary line L can be visually recognized for the time being. However, it is preferable to draw the boundary line L itself for further clarity.

It is to be noted that the via display is not limited to the display for the number of layers, but may be performed for only a part thereof.

FIG. 2B shows an embodiment in the case where the display mode is a slice circle display divided by strings, and the procedure in this case will be described.

The number of layers N = “4” of the design printed wiring board is read from the design database unit 5. The slice length per layer is determined by dividing the diameter 2R by the number of layers N = “4”. The slice circles D1 to D4 are created by equally dividing the three parallel strings, and are drawn at positions on the screen corresponding to the installation positions X and Y. The vias to be displayed are filled with slice circles D2 to D4 between the From layer and the To layer.

When the drawing of the layer numbers is ON, the layer numbers 1 to 4 corresponding to the slice circles D1 to D4 are drawn. Further, if there is a via at the same position as the installation positions X and Y, similar drawing is repeated. If there is a boundary line between the via sections, the boundary line is drawn more clearly.

[0061]

As described above, according to the multilayer printed wiring board pattern design processing apparatus of the present invention, the processing unit stores the position data on the layer surface of the via, the interlayer connection data, and the predetermined shape data. The predetermined shape is divided into layer sections corresponding to each layer and displayed at the position of the display unit corresponding to the position data, and the via corresponding to the layer connected by the via based on the interlayer connection data Since the sections are selected and synthesized and displayed, the layer to which the via is connected can be displayed so that it can be intuitively determined, which greatly contributes to the efficiency of the pattern design work. In addition, a plurality of via sections at the same display position can be combined and displayed.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram (part 1) illustrating the principle of via display in a multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 2 is an explanatory diagram (part 2) illustrating the principle of via display in the multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 3 is an explanatory view (part 3) showing the principle of via display in the multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 4 is an explanatory view (part 4) showing the principle of via display in the multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 5 is an explanatory view (No. 5) showing the principle of via display in the multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 6 is a block diagram showing an embodiment of a multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 7 is a configuration diagram showing via data in the multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 8 is a table diagram for defining a via display mode in the multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 9 is a view showing a display mode setting screen in the multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 10 is a pattern diagram showing an embodiment for drawing vias in the multilayer printed wiring board pattern design processing apparatus according to the present invention.

FIG. 11 is a plan view and a cross-sectional view illustrating a structure of a general multilayer printed wiring board.

FIG. 12 is a pattern diagram showing a via display example in a conventional multilayer printed wiring board pattern design processing apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Computer 2 Processing part 3 Storage part 4 Display part 5 Design database part 6 Via data part 7 Via display mode definition table 8 Keyboard 9 Mouse 10 Multilayer printed wiring board 11 Conductive layer 12 Laminated board 13 Via 13a Inner via hole (IVH) 13b penetration Via hole 14 Conductor pattern In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (10)

[Claims] 1. A display unit, a storage unit for storing position data of vias on a layer surface, interlayer connection data, and predetermined shape data, each data being read from the storage unit, and the predetermined shape corresponding to each layer. A processing unit that divides into layer sections, displays at the position of the display unit corresponding to the position data, and selects and combines and displays via sections corresponding to layers connected by the via based on the interlayer connection data; A multilayer printed wiring board pattern design processing apparatus characterized by comprising: 2. A multilayer printed wiring board pattern design processing apparatus according to claim 1, wherein said position data, said interlayer connection data, and said predetermined shape data are provided from said input section to said storage section. 3. An apparatus according to claim 1, wherein said predetermined shape is a circle or a rectangle. 4. The multilayer printed wiring board pattern design processing apparatus according to claim 3, wherein when the predetermined shape is a circle, the section is divided by a sector or a parallel chord. 5. The multilayer printed wiring board pattern design processing apparatus according to claim 1, wherein the predetermined shape is displayed in a section corresponding to each layer so as to be equally divided or equally divided. . 6. A multilayer printed wiring board pattern design processing apparatus according to claim 1, wherein a plurality of via sections at the same display position are displayed in such a manner as to be merged into the predetermined shape. 7. The method according to claim 2, wherein when the via is designated on the display unit by the input unit,
A multilayer printed wiring board pattern design processing apparatus characterized by temporarily displaying the via section. 8. A multilayer printed wiring board pattern design processing apparatus according to claim 6, wherein said processing section draws a boundary between different via sections. 9. The multi-layer printing method according to claim 2, wherein a plurality of types of said predetermined shape data are prepared in said storage unit, and one of them is selected by an instruction from said input unit. Wiring board pattern design processing equipment. 10. A multilayer printed wiring board pattern design processing apparatus according to claim 2, wherein a symbol is displayed in said via section or said layer section in response to an instruction from said input section.