JP2009026982A - Electronic device and manufacturing method therefor - Google Patents

Electronic device and manufacturing method therefor Download PDF

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JP2009026982A
JP2009026982A JP2007189106A JP2007189106A JP2009026982A JP 2009026982 A JP2009026982 A JP 2009026982A JP 2007189106 A JP2007189106 A JP 2007189106A JP 2007189106 A JP2007189106 A JP 2007189106A JP 2009026982 A JP2009026982 A JP 2009026982A
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wiring
film
electronic device
integrated circuit
semiconductor integrated
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Asao Iijima
朝雄 飯島
Akiko Iijima
章子 飯島
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SIT KK
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device provided with at least a wiring substrate 20, including at least an IC mounting part and a wiring film 22 connected to terminals 11 of an IC 10 mounted on the IC-mounting part, and the IC 10 mounted thereon, capable of preventing migration in the electronic device in which the respective terminals 11 of the IC 10 and the wiring film 22 corresponding to them are connected, improving the moisture resistance, water resistance, dust tightness, and corrosion resistance, so as to improve the reliability and prolong the service life of the electronic device, and reduce the environmental pollution associated with the manufacture of the electronic device. <P>SOLUTION: A double film formed of a solder resist film 28 and a coating film 30, mainly having silica protects between at least the wiring films 22 and 22 of at least the wiring substrate 20. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、半導体集積回路装置搭載部(以下、「IC搭載部」という。)及びこのIC搭載部に搭載される半導体集積回路装置(以下、「IC」という。)の複数の端子と接続される配線膜を少なくとも有する配線基板とその配線基板の上記IC搭載部に搭載されたICを少なくとも備え、このICの各端子とそれと対応する配線膜とを接続した電子装置と、その製造方法に関する。   The present invention is connected to a semiconductor integrated circuit device mounting portion (hereinafter referred to as “IC mounting portion”) and a plurality of terminals of a semiconductor integrated circuit device (hereinafter referred to as “IC”) mounted on the IC mounting portion. The present invention relates to an electronic device including at least a wiring board having a wiring film and an IC mounted on the IC mounting portion of the wiring board, and connecting each terminal of the IC to a corresponding wiring film, and a method for manufacturing the same.

電子装置として、例えば特開平6−310844号公報に示されたように、配線基板にIC、例えばQFPタイプのICと、それ以外の電子部品を搭載したものがある。
図3(a)〜(f)はそのような電子装置の一例の要部を示す断面図であり、(a)はQFPタイプのICの斜視図、(b)はそのICが搭載される配線基板の斜視図、(c)はICを配線基板に搭載した状態を示す斜視図、(d)は(c)のa−a線方向の断面図、(e)は(c)のb−b線方向の断面図、(f)は(c)のc−c線方向の断面図である。
As an electronic device, for example, as disclosed in JP-A-6-310844, there is one in which an IC, for example, a QFP type IC and other electronic components are mounted on a wiring board.
FIGS. 3A to 3F are cross-sectional views showing the main part of an example of such an electronic device, where FIG. 3A is a perspective view of a QFP type IC, and FIG. 3B is a wiring on which the IC is mounted. The perspective view of a board | substrate, (c) is a perspective view which shows the state which mounted IC in the wiring board, (d) is sectional drawing of the aa line direction of (c), (e) is bb of (c). Sectional drawing of a line direction, (f) is sectional drawing of the cc line direction of (c).

図3において、10は配線基板に搭載されるQFPタイプのIC、11はこのIC10のアウターリード(端子)、20はIC10を搭載する配線基板、22は配線基板20に形成された配線膜の電極パッド部分、23はその電極パッド部分22に形成されたスルーホール、24はIC10の樹脂封止部分を配線基板20に固定する接着剤である。   In FIG. 3, 10 is a QFP type IC mounted on a wiring board, 11 is an outer lead (terminal) of the IC 10, 20 is a wiring board on which the IC 10 is mounted, and 22 is an electrode of a wiring film formed on the wiring board 20. A pad portion 23 is a through hole formed in the electrode pad portion 22, and 24 is an adhesive for fixing the resin sealing portion of the IC 10 to the wiring substrate 20.

この電子装置は、図3に示すように、配線膜(図面にはその電極パッド部分22のみ現れる。)が形成され、IC10の樹脂封止部分の当たる部分に接着剤24が塗布された配線基板20の表面に、IC10を、各アウターリード(端子)11がそれと対応する電極パッド部分22上に位置するように位置合わせしてその樹脂封止部分を接着剤24により配線基板20に接着し、各端子11をそれと対応する電極パッド部分22に半田により接続したものである。
特開平6−310844号公報
In this electronic device, as shown in FIG. 3, a wiring film (only the electrode pad portion 22 appears in the drawing) is formed, and a wiring board in which an adhesive 24 is applied to a portion corresponding to a resin sealing portion of the IC 10 The IC 10 is aligned with the surface of 20 so that each outer lead (terminal) 11 is positioned on the electrode pad portion 22 corresponding thereto, and the resin-sealed portion is adhered to the wiring board 20 with the adhesive 24, Each terminal 11 is connected to the corresponding electrode pad portion 22 by soldering.
JP-A-6-310844

ところで、上述した従来の技術には、ICが多機能化、小型化、高集積化、多端子化、狭端子間隔化が進むと、マイグレーションによる故障が生じるという問題があった。
マイグレーションとは、IC等の電子部品を長時間使用することにより、配線や電極として使用した金属が絶縁物上を移動する現象で、電極間の絶縁抵抗を低下させるので好ましくなく、その低下の進行が進むことにより絶縁不良、短絡不良等の故障を生じる。
By the way, the above-described conventional technique has a problem that a failure due to migration occurs when the IC is multi-functional, downsized, highly integrated, multi-terminal, and narrowed in the terminal interval.
Migration is a phenomenon in which the metal used as wiring or electrodes moves over the insulator by using electronic parts such as ICs for a long time, which is undesirable because it reduces the insulation resistance between the electrodes, and the progress of the decrease As a result of this, failure such as insulation failure or short circuit failure occurs.

ちなみに、マイグレーションには、電界の影響により金属成分が非金属媒体の上や中を横切って移動するエレクトロマイグレーションと、電界の有無と関係なく腐食によって腐食性生成物が生じて絶縁低下が生じるマイグレーションとがあり、両者は発生のメカニズムが基本的に異なるが、いずれも電極間の絶縁抵抗を低下させるので好ましくなく、防止する必要がある点では共通する。
マイグレーション防止に関しては種々の技術が開発されてはいるが、完璧な技術は存在しない。そのため、ICが多機能化、小型化、高集積化、多端子化によって端子間間隔がより狭くなると、現在の技術では、マイグレーションによる故障が生じるという問題を完全に防止することができなくなるおそれがある。
By the way, migration includes electromigration in which the metal component moves over and inside non-metallic media due to the influence of electric fields, and migration in which corrosive products are generated by corrosion regardless of the presence or absence of electric fields, resulting in reduced insulation. Both have basically different generation mechanisms, but both are not preferable because they reduce the insulation resistance between the electrodes, and are common in that they need to be prevented.
Various technologies have been developed for preventing migration, but no perfect technology exists. Therefore, if the inter-terminal spacing becomes narrower due to the multi-function, miniaturization, high integration, and multi-terminal of the IC, the current technology may not be able to completely prevent the problem of failure due to migration. is there.

本発明は、このような問題を解決すべく為されたものであり、IC搭載部及びそのIC搭載部に搭載されるICの端子と接続される配線膜を少なくとも有する配線基板と、それに搭載されたICを少なくとも備え、このICの各端子とそれと対応する配線膜とを接続した電子装置のマイグレーションを防止し、更には、耐湿性、耐水性、耐塵性、防食性を高め、以て、電子装置の信頼性の向上及び長寿命化を図り、更に、電子装置の製造に伴う環境汚染を少なくすることを目的とする。   The present invention has been made to solve such problems, and includes a wiring board having at least a wiring film connected to an IC mounting portion and an IC terminal mounted on the IC mounting portion, and the wiring substrate mounted thereon. In addition, at least one IC is provided, and migration of an electronic device in which each terminal of this IC is connected to a corresponding wiring film is prevented, and further, moisture resistance, water resistance, dust resistance, and corrosion resistance are improved. The purpose of the present invention is to improve the reliability of the device and extend its life, and to reduce the environmental pollution associated with the manufacture of electronic devices.

本発明は、少なくとも配線基板の表面の配線膜及び配線膜間をソルダーレジスト膜とシリカを主成分とするコーティング膜とで二重に保護するというものである。   In the present invention, at least the wiring film on the surface of the wiring board and the space between the wiring films are double protected with a solder resist film and a coating film mainly composed of silica.

本発明によれば、電子装置の配線基板の表面の少なくとも配線膜及び配線膜間をソルダーレジスト膜とシリカを主成分とするコーティング膜で保護するようにしたので、配線基板の表面、特に配線膜間はソルダーレジスト膜のみならず、その無機物質であるコーティング膜により二重に保護される。
従って、各配線間において生じる金属間の移動、腐食生成物の発生を防止することができる。
従って、各配線膜間におけるマイグレーションを有効に防止することができる。
According to the present invention, at least the wiring film on the surface of the wiring board of the electronic device and the space between the wiring films are protected by the solder resist film and the coating film mainly composed of silica. The space is double protected not only by the solder resist film but also by a coating film that is an inorganic substance.
Therefore, it is possible to prevent the movement between metals and the generation of corrosion products between the wirings.
Therefore, migration between the wiring films can be effectively prevented.

更に、無機物質からなるコーティング剤によれば、被コーティング部の耐湿性、耐水性、耐塵性、防食性が高めることができるので、電子装置の耐湿性、耐水性、耐塵性、防食性を高め、以て、電子装置の信頼性の向上及び長寿命化を図ることができる。
そして、コーティング剤は無機物であるシリカを主成分とするので、有機材料を使用した場合に比較して、環境汚染が少なくて済み、電子装置の製造に伴う環境汚染を少なくすることができる。
Furthermore, according to the coating agent made of an inorganic substance, the moisture resistance, water resistance, dust resistance and corrosion resistance of the coated part can be improved, so that the moisture resistance, water resistance, dust resistance and corrosion resistance of the electronic device are improved. Thus, the reliability of the electronic device can be improved and the life can be extended.
Since the coating agent contains silica, which is an inorganic substance, as a main component, there is less environmental pollution than when an organic material is used, and environmental pollution associated with the manufacture of electronic devices can be reduced.

本発明は、基本的には、少なくとも表面にソルダーレジスト膜が形成された配線基板の表面を更にシリカ(SiO)を主成分とするコーティング膜で覆ってソルダーレジスト膜とシリカを主成分とするコーティング膜とで二重に保護するというものであるが、ソルダーレジスト膜の厚さは例えば10〜15μmであり、ソルダーレジストを全面的に塗布し、その後、露光し、現像することによりパターニングされる。 In the present invention, basically, at least the surface of a wiring board having a solder resist film formed on the surface thereof is further covered with a coating film containing silica (SiO 2 ) as a main component, and the solder resist film and silica are used as main components. Although the protective film is double-protected, the thickness of the solder resist film is, for example, 10 to 15 μm, and is patterned by applying the solder resist over the entire surface, then exposing and developing. .

パターニングは、配線膜の半導体集積回路装置やそれ以外の各種電子部品の端子と接続される部分が露出されるようにするために行うものであり、従来はスクリーン印刷により形成されたが、ICの多ピン化、配線の高密度化に伴って露光、現像によるフォトリソグラフィ技術により形成されるに至っている。本発明においてはそのいずれの形態でも実施することができる。
また、そのコーティング膜は粉末状のシリカをイソプロピルアルコールに混ぜて(シリカが例えば80〜95重量%、イソプロピルアルコールが例えば20〜5重量%)液状化したものが最適である。しかし、イソプロピルアルコール以外のアルコールでも良い場合がある。
Patterning is performed so that the portion of the wiring film connected to the terminals of the semiconductor integrated circuit device and other various electronic components is exposed. Conventionally, it is formed by screen printing. Along with the increase in the number of pins and the increase in the density of wiring, it has been formed by a photolithography technique by exposure and development. In this invention, it can implement in any form.
The coating film is optimally mixed with powdered silica in isopropyl alcohol (silica is, for example, 80 to 95% by weight, isopropyl alcohol is, for example, 20 to 5% by weight) and liquefied. However, alcohols other than isopropyl alcohol may be used.

ここで、粉末状シリカが90重量%、イソプロピルアルコールが10重量%のコーティング剤の特性について述べる。塗布膜厚は10μm〜20μm、耐熱温度は700℃、硬度は9H、比重(25℃での比重)は1.05、pHは5.0、屈折率(ベッケライン法)が1.43、体積固有抵抗(25℃での体積固有抵抗)は1014 Ω/cm以上、液中ガラス成分は57%、外観は淡黄色液体、粘度は40cpである。 Here, the characteristics of the coating agent containing 90% by weight of powdered silica and 10% by weight of isopropyl alcohol will be described. Coating film thickness is 10μm ~ 20μm, heat resistance temperature is 700 ° C, hardness is 9H, specific gravity (specific gravity at 25 ° C) is 1.05, pH is 5.0, refractive index (Beckeline method) is 1.43, volume specific The resistance (volume specific resistance at 25 ° C.) is 10 14 Ω / cm or more, the glass component in the liquid is 57%, the appearance is a pale yellow liquid, and the viscosity is 40 cp.

なお、コーティング剤の希釈剤として、イソプロピルアルコールに代えて水を用いるようにしても良い。
コーティング膜の形成は、粉末状シリカを希釈剤により希釈して液状化したものを、例えばスプレーにより、或いは塗布により配線基板の表面上に形成し、それを乾燥することにより行うようにすると良い。
Note that water may be used as a diluent for the coating agent instead of isopropyl alcohol.
The coating film is preferably formed by diluting powdered silica with a diluent to form a liquid, for example, by spraying or coating on the surface of the wiring board and drying it.

本発明は、配線基板に一又は複数のICを搭載した電子装置のみならず、一又は複数のICの他に、IC以外の電子部品、例えば抵抗器、コンデンサ等の電子部品を搭載した電子装置にも適用することができる。
そして、上記コーティング膜は単に配線基板の表面のみならず、それに搭載されたIC、その他の電子部品表面にも形成するようにすると良い。即ち、配線基板の表面に搭載電子部品類の表面をも含め全面的にコーティング膜を形成するのであり、そのようにすると、搭載電子部品をも保護することができるのである。
The present invention is not limited to an electronic device in which one or a plurality of ICs are mounted on a wiring board, but in addition to one or a plurality of ICs, an electronic device in which electronic components other than ICs, for example, electronic components such as resistors and capacitors, are mounted. It can also be applied to.
The coating film is preferably formed not only on the surface of the wiring board but also on the surface of the IC and other electronic components mounted thereon. That is, the coating film is formed on the entire surface of the wiring board including the surface of the mounted electronic components, and in this way, the mounted electronic components can be protected.

以下、本発明の詳細を図示実施例に基いて説明する。
図1、図2(a)〜(c)は本発明の一つの実施例の電子装置1aを示すもので、図1は斜視図、図2(a)は図1のa−a線方向の断面図、(b)は同じくb−b線方向の断面図、(c)は同じくc−c線方向の断面図である。
Hereinafter, the details of the present invention will be described based on illustrated embodiments.
1 and 2 (a) to 2 (c) show an electronic device 1a according to one embodiment of the present invention. FIG. 1 is a perspective view, and FIG. 2 (a) is a view taken along the line aa in FIG. Sectional drawing, (b) is also a sectional view in the bb line direction, and (c) is a sectional view in the same cc line direction.

本実施例1aは、図3に示す従来例とは、配線基板20の表面に、ソルダーレジスト膜(28)及び薄いコーティング剤(30)を形成した点で全く相違するが、それ以外の点では共通し、共通する点については既に説明済みであるので、図1の図3と共通する部分については同じ符号を付して詳細な説明を省略し、相違する部分についてのみ新たな符号を使用して説明をする。また、搭載されるIC10及びそれを搭載する配線基板20の斜視図は、図3の(a)、(b)と同じなので、省略する。   This Example 1a is completely different from the conventional example shown in FIG. 3 in that a solder resist film (28) and a thin coating agent (30) are formed on the surface of the wiring board 20, but in other points. Since common points and common points have already been described, the same reference numerals are given to portions common to FIG. 3 in FIG. 1, and detailed descriptions are omitted, and new portions are used only for different portions. I will explain. Further, the perspective view of the IC 10 to be mounted and the wiring board 20 on which the IC 10 is mounted is the same as (a) and (b) of FIG.

28は配線基板20の表面に形成されたソルダーレジスト膜であり、配線膜22の形成後液状のソルダーレジストを配線基板20の表面に全面的に塗布し、その後、露光、現像によりパターニングすることにより配線膜22のIC10の端子と接続される部分が露出するようにされている。
30は配線基板20の上記ソルダーレジスト膜28の表面に形成されたコーティング膜であり、IC10の端子11を配線膜22にフラックスを用いた半田付けにより接続した後において、配線基板20の表面にIC10の表面を含め全面的に、粉末状のシリカを、例えばイソプロピルアルコール等のアルコール或いは水により希釈して液状化したものを塗布しその後乾燥してなるものである。
Reference numeral 28 denotes a solder resist film formed on the surface of the wiring board 20. After the wiring film 22 is formed, a liquid solder resist is applied to the entire surface of the wiring board 20, and then patterned by exposure and development. A portion of the wiring film 22 connected to the terminal of the IC 10 is exposed.
A coating film 30 is formed on the surface of the solder resist film 28 of the wiring board 20. After the terminals 11 of the IC 10 are connected to the wiring film 22 by soldering using a flux, the IC 10 is formed on the surface of the wiring board 20. In this case, the powdered silica is applied over the entire surface including a surface obtained by diluting with liquefied silica such as isopropyl alcohol or water, and then dried.

具体的には、表面に配線膜22を形成し、その配線膜22のIC10等の端子11と接続される各部分以外をソルダーレジスト膜28で表面が覆われた配線基板20を用意し、IC10の各端子11を配線膜22のソルダーレジスト膜28で覆われていない部分にフラックスを使用しての半田付けにより接続し、その後、その配線基板20の表面に、IC10の表面を含め全面的に、コーティング剤(粉末状シリカを希釈剤、例えばイソプロピルアルコール等のアルコール或いは水で希釈した液状体)を塗布(或いはスプレー)し、乾燥することによりコーティング膜30を形成することができる。
このコーティング膜30はIC10等の電子部品の搭載後、コーティング剤を塗布し、乾燥することにより形成するので、IC等の搭載電子部品の表面にも形成される。従って、コーティング膜30によりIC10等の搭載電子部品をも保護することができる。
Specifically, the wiring film 22 is formed on the surface, and the wiring substrate 20 whose surface is covered with the solder resist film 28 except for each portion connected to the terminal 11 such as the IC 10 of the wiring film 22 is prepared. Each terminal 11 is connected to a portion of the wiring film 22 that is not covered with the solder resist film 28 by soldering using a flux, and then the entire surface of the wiring substrate 20 including the surface of the IC 10 is entirely covered. The coating film 30 can be formed by applying (or spraying) a coating agent (a liquid material obtained by diluting powdered silica with a diluent such as alcohol such as isopropyl alcohol or water) and drying.
Since the coating film 30 is formed by applying a coating agent after the electronic component such as the IC 10 is mounted and drying, the coating film 30 is also formed on the surface of the mounted electronic component such as the IC. Accordingly, the mounted electronic component such as the IC 10 can be protected by the coating film 30.

このような電子装置1aによれば、配線基板20の各配線膜22・22間に、配線基板20を直接覆うソルダーレジスト膜28と、このソルダーレジスト膜28上のシリカを主成分とするコーティング膜30との二重膜を介在せしめたので、そのソルダーレジスト膜28及び無機物質であるコーティング膜30により各配線間において生じる金属間の移動、腐食生成物の発生を防止することができる。
従って、各配線膜間におけるマイグレーションを有効に防止することができる。
According to such an electronic device 1a, the solder resist film 28 that directly covers the wiring board 20 between the wiring films 22 and 22 of the wiring board 20, and the coating film mainly composed of silica on the solder resist film 28. Since the double film 30 is interposed, the solder resist film 28 and the coating film 30 which is an inorganic substance can prevent the movement between metals and the generation of corrosion products between the wirings.
Therefore, migration between the wiring films can be effectively prevented.

更に、無機物質からなるコーティング膜30によれば、被コーティング部の耐湿性、耐水性、耐塵性、防食性が高めることができるので、電子装置の耐湿性、耐水性、耐塵性、防食性を高め、以て、電子装置の信頼性の向上及び長寿命化を図ることができる。
そして、コーティング膜は無機物であるシリカを主成分とするので、有機材料を使用した場合に比較して、環境汚染が少なくて済み、電子装置の製造に伴う環境汚染を少なくすることができる。
Furthermore, according to the coating film 30 made of an inorganic substance, the moisture resistance, water resistance, dust resistance, and corrosion resistance of the coated portion can be improved, so that the moisture resistance, water resistance, dust resistance, and corrosion resistance of the electronic device can be improved. Thus, the reliability of the electronic device can be improved and the life can be extended.
And since a coating film has as a main component silica which is an inorganic substance, compared with the case where an organic material is used, there is little environmental pollution, and environmental pollution accompanying manufacture of an electronic device can be reduced.

本発明は、IC搭載部及びこのIC搭載部に搭載されるICの複数の端子と接続される配線膜を少なくとも有する配線基板とその配線基板の上記IC搭載部に搭載されたICを少なくとも備え、このICの各端子とそれと対応する配線膜とを接続した電子装置と、その製造方法に広く産業上の利用可能性がある。   The present invention includes at least an IC mounting portion and a wiring substrate having at least a wiring film connected to a plurality of terminals of the IC mounted on the IC mounting portion, and an IC mounted on the IC mounting portion of the wiring substrate, There is a wide industrial applicability to an electronic device in which each terminal of this IC and its corresponding wiring film are connected, and a method for manufacturing the electronic device.

本発明の一つの実施例の電子装置の要部を示す斜視図である。It is a perspective view which shows the principal part of the electronic device of one Example of this invention. (a)〜(c)は本発明の一つの実施例の断面図であり、(a)は図1のa−a線方向の断面図、(b)は同じくb−b線方向の断面図、(c)は同じくc−c線方向の断面図である。(A)-(c) is sectional drawing of one Example of this invention, (a) is sectional drawing of the aa line direction of FIG. 1, (b) is sectional drawing of a bb line direction similarly. (C) is also a cross-sectional view in the direction of the line cc. (a)〜(f)は本発明の背景技術を説明するための電子装置の従来例の一例の要部を示す断面図であり、(a)はQFPタイプのICの斜視図、(b)はそのICが搭載される配線基板の斜視図、(c)はICを配線基板に搭載した状態を示す斜視図、(d)は(c)のa−a線方向の断面図、(e)は(c)のb−b線方向の断面図、(f)は(c)のc−c線方向の断面図である。(A)-(f) is sectional drawing which shows the principal part of an example of the prior art example of the electronic device for demonstrating the background art of this invention, (a) is a perspective view of QFP type IC, (b). Is a perspective view of a wiring board on which the IC is mounted, (c) is a perspective view showing a state in which the IC is mounted on the wiring board, (d) is a cross-sectional view in the direction of the aa line of (c), and (e). (C) is a cross-sectional view in the bb line direction, (f) is a cross-sectional view in the cc line direction of (c).

符号の説明Explanation of symbols

1a・・・電子装置(実施例)、10・・・IC、
11・・・端子(アウターリード)、20・・・配線基板、
22・・・配線膜(の電極パッド部分)、
30・・・コーティング膜。
DESCRIPTION OF SYMBOLS 1a ... Electronic device (Example), 10 ... IC,
11 ... Terminal (outer lead), 20 ... Wiring board,
22 ... Wiring film (electrode pad portion thereof),
30: Coating film.

Claims (5)

半導体集積回路装置搭載部及びこの半導体集積回路装置搭載部に搭載される半導体集積回路装置の複数の端子と接続される配線膜を少なくとも有する配線基板とその配線基板の上記半導体集積回路装置搭載部に搭載された半導体集積回路装置を少なくとも備え、この半導体集積回路装置の各端子とそれと対応する配線膜とを接続した電子装置において、
上記配線基板に、上記配線膜の上記半導体集積回路装置の端子と接続された部分を少なくとも除いて表面を覆うソルダーレジスト膜が形成され、
少なくとも上記ソルダーレジスト膜の配線膜を覆う部分上にシリカを主成分とするコーティング膜が形成されている
ことを特徴とする電子装置。
A semiconductor integrated circuit device mounting portion, a wiring substrate having at least a wiring film connected to a plurality of terminals of the semiconductor integrated circuit device mounted in the semiconductor integrated circuit device mounting portion, and the semiconductor integrated circuit device mounting portion of the wiring substrate In an electronic device comprising at least a semiconductor integrated circuit device mounted and connecting each terminal of the semiconductor integrated circuit device and a corresponding wiring film,
A solder resist film is formed on the wiring board to cover the surface except at least a portion of the wiring film connected to the terminal of the semiconductor integrated circuit device,
An electronic device, wherein a coating film mainly composed of silica is formed on at least a portion of the solder resist film covering the wiring film.
前記コーティング膜が、粉末状のシリカをアルコールに混ぜて液状化したものを前記配線基板の表面にコーティングし、その後、乾燥してなるものである
ことを特徴とする請求項1に記載の電子装置。
2. The electronic device according to claim 1, wherein the coating film is formed by coating a surface of the wiring board with a powdered silica mixed with alcohol to be liquefied, and then drying. 3. .
前記アルコールがイソプロピルアルコールである
ことを特徴とする請求項2に記載の電子装置。
The electronic device according to claim 2, wherein the alcohol is isopropyl alcohol.
前記コーティング膜が、粉末状のシリカを水に混ぜて液状化したものを前記配線基板にコーティングし、その後、乾燥してなるものである
ことを特徴とする請求項1に記載の電子装置。
2. The electronic device according to claim 1, wherein the coating film is formed by coating the wiring substrate with a powdered silica mixed with water to be liquefied, and then drying. 3.
半導体集積回路装置搭載部及びこの半導体集積回路装置搭載部に搭載される半導体集積回路装置の複数の端子と接続される配線膜を少なくとも有する配線基板の表面に、上記配線膜の上記半導体集積回路装置の端子と接続される部分を少なくとも除いて覆うソルダーレジスト膜を形成し、
その後、上記配線膜と少なくとも半導体集積回路装置の端子とを接続してこの半導体集積回路装置を搭載し、
しかる後、少なくとも上記ソルダーレジスト膜の配線膜を覆う部分上に、粉末状のシリカをアルコール又は水に混ぜて液状化したものを前記配線基板の表面にコーティングし、乾燥することによりシリカを主成分とするコーティング膜を形成する
ことを特徴とする電子装置の製造方法。
The semiconductor integrated circuit device having the wiring film on the surface of the wiring substrate having at least a wiring film connected to a plurality of terminals of the semiconductor integrated circuit device mounted on the semiconductor integrated circuit device mounting portion. Forming a solder resist film covering at least a portion connected to the terminal of
Thereafter, the wiring film and at least a terminal of the semiconductor integrated circuit device are connected to mount the semiconductor integrated circuit device,
Thereafter, at least a portion of the solder resist film covering the wiring film is coated on the surface of the wiring substrate with a powdered silica mixed with alcohol or water, and dried to dry the main component of silica. A method for manufacturing an electronic device, comprising: forming a coating film.
JP2007189106A 2007-07-20 2007-07-20 Electronic device and manufacturing method therefor Pending JP2009026982A (en)

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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105338734A (en) * 2015-11-03 2016-02-17 畅博电子(上海)有限公司 Ceramic substrate circuit board and manufacturing method thereof
WO2018179853A1 (en) * 2017-03-30 2018-10-04 日立オートモティブシステムズ株式会社 Vehicle-mounted control device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105338734A (en) * 2015-11-03 2016-02-17 畅博电子(上海)有限公司 Ceramic substrate circuit board and manufacturing method thereof
WO2018179853A1 (en) * 2017-03-30 2018-10-04 日立オートモティブシステムズ株式会社 Vehicle-mounted control device
JP2018170401A (en) * 2017-03-30 2018-11-01 日立オートモティブシステムズ株式会社 On-vehicle control device

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