JP2009015906A - Synchronous pattern detecting device and method of frequency error detecting device, and information processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve reliability of a device by making frequency error detection accurate by improving SYNC pattern detection accuracy. <P>SOLUTION: The device is provided with: a sampling clock counter part 202 reset in peak detection timing of the peak hold circuit 201 of a reproduced signal; a circuit 203 for obtaining a wavelength detecting signal when the sampling value of the reproduced signal is within the range of an predicted peak value; an output part 204 for obtaining data for measuring predicted position for measuring SYNC pattern position; a circuit 205 for confirming whether the SYNC pattern appears within the predicted range or not using the data for measuring predicted position; a circuit 206 for obtaining a SYNC candidate detection flag when output results of the circuit 203 and the circuit 205 have fixed relation; a circuit 207 for outputting the next peak value as a failure peak value when a count value from a peal value detection point of time to the next peak value detection point of time is deviated from the SYNC pattern predicted position; and a circuit 208 for adjusting width of a predicted wavelength window in a wide direction when the present peak value of this time is larger than the failure peak value, and performing dynamic processing in which width is not widened more than needed when it is small. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

The present invention relates to a frequency error detection apparatus and method and an information processing apparatus, and is effective when applied to an apparatus for reproducing information recorded at a high density, for example.

  Conventionally, as a method of digitizing a reproduction signal read from an optical disk, a method of simply binarizing the reproduction signal by using a comparator or the like has been adopted. However, in recent years, in order to reproduce information recorded at a high density, the reproduction signal has been digitized using PRML (Partial Response Maximum Likelihood) technology.

  In order to digitize the reproduction signal using the PRML technique, it is necessary to generate a sampling clock that is phase-synchronized with the reproduction signal of the optical disk. The sampling clock is a clock signal having the frequency of the reference clock signal used when information is recorded on the optical disc, and information is decoded in synchronization with the sampling clock. Therefore, the sampling clock frequency is controlled so that the frequency error of the sampling clock is detected and phase-synchronized with the reproduction signal of the optical disk.

Conventionally, the zero cross length of the reproduction signal is measured in order to detect an error between the frequency of the reproduction signal and the frequency of the sampling clock generated by the reproduction circuit. As a technique for detecting a frequency error in this technical field, there is, for example, WO00 / 36602. In this technology, regarding the detection of the synchronization signal, the characteristic pattern is detected from the ratio of the maximum value and the minimum value of the zero cross length, the time interval of the synchronization signal is measured by the counter, and the change information of the counter value is the frequency. It is used as error detection information. However, when such a technique is applied to a high-density recording medium such as HD DVD, it is difficult to correctly measure the zero cross length due to strong intersymbol interference. For this reason, for example, when detecting a SYNC pattern as a sync signal included in the playback signal, the characteristic pattern (13T: 3T in HD DVD, T indicates the length of one channel bit of the reference clock) cannot be detected correctly. , There was a false detection.
WO00 / 36602

  SUMMARY OF THE INVENTION An object of the present invention is to increase the detection accuracy of a SYNC pattern that is an element of frequency error detection, and as a result, the frequency error detection can be made accurate and the reliability of the device can be improved. An object is to provide a detection apparatus and method, and an information processing apparatus.

  In order to solve the above-described problem, in the present invention, in a synchronization pattern detection apparatus for a signal having a synchronization (SYNC) pattern having a predetermined width including the longest wavelength every predetermined period, a wavelength near the peak value of the signal is predicted. A wavelength comparison circuit that determines whether or not the wavelength exists (within the width of the predicted wavelength window), and count data representing a detection interval of the next peak value from the peak value are predicted from the peak value. A SYNC appearance position confirmation circuit for determining whether or not the SYNC pattern appearance interval exists within a range (within the width of the predicted position window) created using predicted position measurement data; and A SYNC candidate detection flag output circuit that outputs a SYNC candidate detection flag when the output signal and the output signal of the SYNC appearance position confirmation circuit are in a fixed relationship; The longest wavelength that holds the next peak value and outputs it as a failed peak value when the count value counted from the detection time of the peak value to the next peak detection time deviates from the predicted appearance position of the SYNC pattern When the current peak value detected this time is larger than the output circuit and the failed peak value, the width of the predicted wavelength window is adjusted to a wider direction, and when it is smaller, the predicted wavelength window is not expanded more than necessary. A wavelength window parameter variable circuit that performs dynamic processing. In this specification, the terms “adjustment in a wide direction” and “dynamic processing” include the meaning of gradually widening or narrowing the window.

  According to the above means, it is particularly effective when the sampling clock is low with respect to the channel rate, the detection accuracy of the synchronization pattern can be improved, and the frequency detection range can be expanded.

  Embodiments of the present invention will be described below with reference to the drawings. An optical disc reproducing apparatus to which the present invention is applied will be described with reference to FIG. This optical disk device is a device for obtaining a read / reproduced signal of information from the optical disk 10. FIG. 2 shows the data format of HD DVD. One data segment includes a VFO field (VFO field), a data field (Data field), a postamble field (Postamble field), a reserved field (Reserved Field), and a buffer field (Buffer field). Among these, the data field includes a 2-byte SYNC code (SYNC pattern) for each frame at regular intervals. The SYNC pattern is recorded based on 13T (T indicates one channel bit length of the reference clock) for identification.

  The pickup head 11 reproduces a signal corresponding to information recorded on the optical disc 10, and includes a laser light source that irradiates the optical disc 10 with laser light, and a light receiver (not shown) that receives the laser light reflected from the optical disc 10. ). The reproduction signal output from the photoreceiver is amplified by the reproduction amplifier 12 to become a reproduction high frequency (RF) signal, and further guided to the analog / digital (A / D) converter 14 via the pre-waveform equalizer 13.

  The A / D converter 14 is a circuit that converts an input reproduction RF signal from analog to digital and outputs a digital RF signal (multilevel RF signal). This digital RF signal is a multivalued digital value output at substantially constant time intervals.

  A / D conversion in the A / D converter 14 is controlled by a clock output from a VCO (voltage controlled oscillator) 16. That is, the A / D conversion cycle (time interval) is determined based on the oscillation frequency of the VCO 16.

  The output of the A / D converter 14 is input to an offset / gain control unit 16 that is a kind of amplifier that adjusts the offset (zero level / slice level) and amplitude of the input reproduction RF signal. The adjusted reproduction RF signal is a signal whose asymmetry is corrected by the next asymmetry correction unit 17.

  The output of the asymmetry correction unit 17 is input to the adaptive equalizer 18. The adaptive equalizer 17 is a filter that equalizes the multilevel RF signal into a PR (Partial Response) waveform. The adaptive equalizer 18 includes a transversal filter and the like, functions as a waveform equalizer, corrects reproduction distortion, and a reproduction RF signal as an output thereof is input to a maximum likelihood decoder 19.

  The maximum likelihood (Maximum Likelihood) decoder 19 includes a Viterbi decoder or the like, and is configured to decode data equalized by the adaptive equalizer 18. The output of the maximum likelihood decoder 18 is used as digital demodulated data. The output of the maximum likelihood decoder 19 is also fed back to the adaptive equalizer 18.

  The phase comparator 21 is a circuit that compares the phases of the multilevel RF signal output from the maximum likelihood decoder 18 and the output signal (not shown) from the VCO 15 and outputs a phase difference.

  The frequency error detector 20 detects (measures) the frequency of the multilevel RF signal that has passed through the A / D converter 14, the offset / gain control unit 16, and the asymmetry correction unit 17, and this frequency and the output signal from the VCO 15. This is a circuit for outputting a frequency error signal representing the difference in frequency between the two. The frequency error detector 20 also outputs a control signal for controlling whether or not the output frequency error signal is used in the loop filter 22. Details of the internal configuration of the frequency detector 21 will be described later.

  The loop filter 22 is a circuit that generates a voltage for controlling the VCO 15 based on the phase error output from the phase comparator 21 and the frequency error output from the frequency error detector 20.

  The VCO 15 is an oscillation circuit that oscillates at a frequency corresponding to the control voltage output from the loop filter 22 and functions as a control signal generator.

  The maximum likelihood decoder 19 performs maximum likelihood decoding of the adaptive equalization signal based on a predetermined PR class, for example, based on the class PR (3443), and obtains binary data. This decoded data is input to the synchronous demodulator. The recorded data sequence is recorded as 1116-bit data called a frame, but a 24-bit binary data sequence (SYNC pattern) representing the start position of each frame is detected, and a synchronization signal for every 12 bits for demodulation processing at the subsequent stage is detected. Is generated. The synchronous demodulator demodulates the 12-bit binary data into 8-bit reproduction data according to a predetermined rule. At this time, an error amount between the ideal level and the adaptive equalization signal is sent as an equalization error signal to each block of the offset control unit, the amplitude control unit, the asymmetry control unit, and the adaptive equalizer 18.

  A basic flow will be described for the following explanation. First, regarding the wavelength measurement, for example, as shown in FIG. 3, the wavelength of the signal 31 can be measured for each mark / space. Since the next-generation DVD has ultra-high density recording, the DC level of the relatively short T-length reproduction RF signal is strongly influenced by the preceding and following mark / space patterns (T-length). For this reason, it is not possible to correctly detect one mark / space section simply by detecting the crossing of signal levels in the vicinity of the average DC level.

  The PRML technology reversely utilizes the fact that a signal is distorted due to the interference of a previous signal, and intentionally adds a correlated interference.

  At this time, the wavelength of the signal waveform that does not exceed the thresholds TH_H and TH_L is not the longest wavelength included in the SYNC pattern, and thus measurement is not performed. By measuring the wavelength in this way, it is possible to reduce a wavelength measurement error due to the reason that a signal that does not zero cross and does not exceed the threshold is erroneously detected. The wavelength measurement may be a technique that can correctly measure the longest wavelength of the SYNC pattern and that does not measure a wavelength longer than the SYNC pattern. Detects SYNC pattern (sync pattern, sync signal waveform), calculates frequency error between input signal frequency and sampling clock frequency, and controls A / D conversion time interval in A / D converter 14 Is done.

<Frequency detector>
Next, an example of the configuration and function of a frequency error detector capable of avoiding the influence of intersymbol interference, which is a premise embodiment of the present invention, will be described with reference to FIGS. The operation after wavelength measurement will be described with reference to FIGS.

  A control unit 47 in the apparatus performs control for controlling the operation of each unit. In the sequence control unit 47, the CPU fetches an execution program corresponding to the flow stored in the ROM, executes the RAM as a work area, and performs sequence control of each unit through the interface.

  In FIG. 4, a value such as a threshold value that is initially set is stored in a rewritable type device (for example, a nonvolatile memory) in the sequence control unit 60 when the apparatus is manufactured. The setting from the user during the operation of the apparatus is given to the frequency error detector via the sequence controller 60.

  A signal as shown in FIG. 3 is input to the peak hold unit 41. Further, a wavelength upper limit value B and a wavelength lower limit value A are given. This is because the wavelength exceeding the upper limit B shown in FIG. 5 and the wavelength not reaching the lower limit A are excluded from the SYNC pattern candidates. That is, by setting the lower limit value A, the probability of erroneously detecting a high frequency component as a SYNC pattern can be lowered. Similarly, by setting the upper limit value B, it is possible to reduce the influence of a wavelength longer than the longest wavelength included in the SYNC pattern erroneously measured due to the influence of intersymbol interference, defect, or the like.

  The peak value held by the peak hold unit 41 is given to the SYNC appearance position prediction circuit 42, and the detection timing signal when the peak value is detected is given to the reset terminal of the sampling clock counter 43. As a result, the sampling clock counter 43 is reset every time a peak value is detected, and is reset every time a SYNC pattern candidate is detected. The SYNC pattern candidate detection pulse is output from an AND element 51 described later. Thereby, the sampling clock counter 43 functions as a counter for measuring the appearance interval of the SYNC pattern. The count output of the sampling clock counter 43 is also input to the SYNC interval holding circuit 44. The appearance interval of the SYNC pattern can be predicted based on the appearance interval defined for each disc (1116 channel bits in HD DVD). The appearance interval of the SYNC pattern can also be predicted by the ratio between the wavelength measured by peak hold and the longest wavelength defined for each disc (13T for HD DVD).

  The SYNC interval holding circuit 44 measures the SYNC pattern interval by latching the count value of the sampling clock counter 43 when the SYNC pattern candidate detection pulse is output from the AND element 51.

  The SYNC appearance position prediction circuit 42 outputs time information from the detected peak value to the next peak value as a count value (or predicted value). The SYNC interval holding circuit 44 also outputs a time interval from the detection of the peak value to the detection of the next peak value as a clock count value.

  The selector 45 selects one of the outputs of the SYNC appearance position prediction circuit 42 and the SYNC interval holding circuit 44 and outputs it as data PDT. This data PDT is input to the SYNC appearance position confirmation unit 46.

  The SYNC appearance position confirmation unit 46 takes in the count value (Count) from the sampling clock counter 43 and calculates (PDT−β) <Count <(PDT + β). β is a value for setting the window width of the SYNC appearance position. Β1 or β2 (<β1) is selected and inputted through the selector 47.

  The selector 45 selects the output of the SYNC appearance position prediction circuit 42 for a certain period of time at regular time intervals when the reproduction apparatus is started, when special reproduction is performed, or during normal reproduction. At this time, β1 that increases the window width is selected and used.

  The SYNC appearance position confirmation unit 46 outputs a predicted position window confirmation signal when (PDT−β) <Count <(PDT + β).

  On the other hand, reference numeral 50 denotes a wavelength comparison unit, which is a block for determining whether a measured wavelength falls within an arbitrary predicted wavelength window width α range is a SYNC pattern. The wavelength comparison unit 50 detects whether the signal (TLEN) is (Peak-α) <TLEN <(Peak + α) with respect to the peak value (Peak) obtained from the peak hold unit 41. If it is within this range, it is determined that the wavelength is the SYNC pattern.

  The AND element 51 outputs a SYNC pattern candidate detection pulse based on the logical product of the determination results of the SYNC appearance position confirmation unit 46 and the wavelength comparison unit 50. The SYNC pattern candidate detection pulse is input to the SYNC candidate detection flag output unit 52 and the SYNC continuous number counter 53 in addition to the sampling clock counter 43 and the SYNC interval holding circuit 44 as described above. The SYNC candidate detection flag output unit 52 controls the previous selectors 45 and 47 when the SYNC candidate is detected, and dynamically changes the window width.

  The SYNC continuous number counter 53 counts SYNC pattern candidate detection pulses, and outputs a frequency error detection instruction signal when the count number exceeds a given value N. In response to this frequency error detection signal, the frequency error calculator 54 determines the interval of the SYNC pattern from the repetition of the counter value of the sampling clock counter 43 and compares it with the interval of the preset reference SYNC pattern. And output frequency error information.

  FIG. 5 shows the above-described wavelength lower limit value A, wavelength upper limit value B, ± α for obtaining a predicted wavelength window, and ± β for obtaining a predicted position window. The frequency error is calculated using the interval when the SYNC pattern candidate detection pulse is continuously detected.

  FIG. 6 shows the transition of the SYNC predicted position, the SYNC predicted wavelength window, and the SYNC predicted position window until the SYNC pattern candidate is detected. First, when a wavelength (6b-1) longer than the wavelength (6a-1) is detected, the predicted SYNC position is updated (updated from (6a-2) to (6b-2)). The developed position of the SYNC predicted position window is also shifted accordingly (updated from (6a-3) to (6b-3)). Thereafter, wavelengths shorter than the wavelength (6b-1) are ignored, and updating is performed in the same manner when a longer wavelength (6c-1) is measured. Repeating such a procedure, when the wavelength (6c-1) is the longest wavelength, when the wavelength (6d-1) is measured within the range of the predicted wavelength window and the predicted position window by the wavelength (6c-1), These are regarded as SYNC pattern candidates.

  Thereafter, the sampling clock measurement counter 43 is reset, and the procedure so far is repeated to detect the next SYNC pattern. However, the predicted position is switched to the interval of the stored SYNC pattern, and the width of the predicted wavelength window is also switched to a period shorter than before detecting the SYNC pattern candidate (β2 in FIG. 5). Accordingly, it is possible to reduce the probability of erroneous detection of the SYNC pattern due to the influence of a wavelength such as a signal (noise) other than the wavelength of the SYNC pattern.

  If the peak hold is always performed after the SYNC pattern candidate is detected, if a wavelength longer than the longest wavelength included in the SYNC pattern is detected due to the influence of intersymbol interference or defect, the wavelength is set. There is an increased possibility of erroneous detection of a SYNC pattern.

  In order to prevent this, a period in which one set of SYNC patterns is included is separately measured, and the peak hold process is stopped after that period. As a result, the probability that the detected SYNC pattern candidate is a true SYNC pattern increases, and the possibility of erroneous detection as described above can be reduced.

  FIG. 7 shows a timing chart of the operation example. If erroneous SYNC pattern candidates (7a-1) and (7b-1) are detected, the detection state of the SYNC pattern may still be displaced, so the peak hold process is continued. Then, since the longest wavelength (7c-1) of the SYNC pattern is detected at the stage of confirming continuity, the detection process of the SYNC pattern candidate is performed again.

  Thereafter, the wavelength (7d-1) is detected, and the SYNC pattern candidate is detected again. If the wavelength measurement is performed for a sufficient period from the wavelength (7c-1) to the detection of the wavelength (7d-1) of the SYNC pattern, the peak hold process is stopped. Thereby, even if the wavelength (7e-1) having a wavelength longer than that of the SYNC pattern is measured, the SYNC detection operation is not affected, and the wavelength (7f-1) of the SYNC pattern can be detected.

  As a means for measuring a period in which one set of SYNC patterns is included, for example, a means for measuring a certain number of measured wavelengths is cited.

  Such a process is repeated, and when the wavelength as a SYNC pattern candidate is detected continuously for an arbitrary number of times or more, these are set as a SYNC pattern, and a frequency error detection signal and a frequency error signal are obtained.

  The frequency error can be calculated by using the difference between the measured SYNC pattern interval and the SYNC pattern interval defined for each disk.

  In addition to the above-described frequency detection method, the present invention further improves the frequency detection performance when the sampling clock is lower than the channel rate.

  First, a problem in SYNC pattern detection when the sampling clock is lower than the channel rate will be described. The relationship between the channel rate and the sampling clock frequency and phase changes greatly when the reproduction speed changes or when a track jump occurs. Therefore, there is a need for an apparatus that can accurately detect the synchronization pattern even if such fluctuations occur.

  FIG. 8 shows an operation example of the frequency detector of FIG. 4 when the sampling clock is lower than the channel rate. When the sampling clock is lower than the channel rate, the wavelength to be measured is a short wavelength as a whole because the number of samples is reduced. Therefore, as shown in FIG. 8, it is difficult to add a difference between the longest wavelengths (8a-1) and (8b-1) of the SYNC pattern and other wavelengths.

  Therefore, assuming that the wavelength (9a-1) and the wavelength (9c-1) in FIG. 9 indicate the longest wavelength of the SYNC pattern, a wavelength similar to the longest wavelength, such as the wavelength (9b-1). May be measured during the predicted position window. In addition, when this wavelength (9b-1) is measured before the longest wavelength, an erroneous detection state occurs, which causes a decrease in the detection rate of the SYNC pattern.

  Therefore, narrowing the predicted window position width as much as possible is an effective means for improving the detection rate so that an unnecessary wavelength such as the wavelength (9b-1) is not measured in the predicted position window. However, it is difficult to improve the accuracy of predicting the appearance position of the SYNC pattern because it is difficult to measure the wavelength with high accuracy in a disc such as HD DVD that has intersymbol interference.

  FIG. 10 shows an example in which the SYNC pattern cannot be detected when the window width of the predicted position window is narrowed. The wavelengths (10a-1) and (10b-1) indicate the longest wavelength of the SYNC pattern, but when measured as a wavelength longer than the original wavelength, such as the wavelength (10a-1), the predicted position is the original Predicted later (delayed time) than the appearance time. This is because the long wavelength (10a-1) affects the time calculation value of the next predicted SYNC pattern detection position.

  If a predicted position window having a narrow window width with respect to the predicted position is developed, the wavelength (10b-1) where the original SYNC pattern exists cannot be detected. The same thing can happen when measuring shorter than the original wavelength. In this case, the predicted position is predicted prior to the original appearance time (advance time).

  Therefore, there is a problem in distinguishing the SYNC pattern from other wavelengths for the predicted wavelength window.

  FIG. 11 shows a state where the window width of the predicted wavelength window is wide. Thus, when the window width of the predicted wavelength window is wide, the longest wavelength of the SYNC pattern (11a-1), (11b-1), (11c-1), (11d-1), (11e-1) and other As a result, it becomes difficult to distinguish wavelengths. In this case as well, narrowing the window width in the same manner as the predicted position window is effective in improving the detection rate, but here, the SYNC pattern may not be detected depending on the wavelength measurement accuracy.

  FIG. 12 shows such an example. Wavelengths (12b-1) and (12d-1) are measured shorter than the longest wavelengths (12a-1), (12c-1), and (12e-1) of the SYNC pattern. Therefore, the SYNC pattern cannot be detected continuously. For this reason, when the sampling clock is lower than the channel rate, it is desirable to make the two window widths as narrow as possible within a range in which a SYNC pattern with variations in measured wavelengths can be detected.

  Here, it is added that the variation in wavelength measured due to channel rate variation and sampling frequency variation is not constant, and that this factor is one of the factors that make it difficult to determine the optimal window width. .

  The feature of the embodiment of the present invention is that it is suitable for the channel rate and sampling frequency at that time by dynamically switching the two window widths based on the detection status of the SYNC pattern and the information of the measured wavelength. By dynamically changing to the window width, the SYNC pattern detection rate is improved.

  FIG. 14 is a flowchart showing an operation example of the apparatus having the features of the embodiment of the present invention. First, a wavelength is measured based on data sampled using a sampling clock with respect to a reproduction signal of an optical disk reproduced at a constant channel rate. The longest wavelength is detected from the measured wavelengths, and the position of the longest wavelength that appears next is predicted based on the longest wavelength (steps 14S1 and 14S2). Regarding the two windows developed at this time (predicted wavelength window and predicted position window), the initial state is that both window widths are narrow.

  Under such conditions, SYNC pattern candidates are detected within two window periods. At this time, when the situations shown in FIGS. 10 and 12 occur and the SYNC pattern candidate cannot be detected within a certain period, the window width is changed. For example, the window width is changed when a predetermined number of SYNC patterns cannot be detected within a time that is an integral multiple of the time expected to detect the SYNC pattern.

  With respect to the predicted position window, the window width is basically enlarged because there is a possibility that the SYNC pattern is not detected within the window period from the situation shown in FIG. As for the predicted wavelength window, the wavelength window is determined based on the longest wavelength at this time. Specifically, for example, there are the following methods.

<Conditions for changing the window width of the predicted wavelength window>
Longest wavelength when detection fails ≤ Widen expected wavelength window width when currently measured longest wavelength> Longest wavelength when detection fails ≥ Do not change predicted wavelength window width when currently measured longest wavelength ( Step 14S3).

  Whether or not it has failed can be determined, for example, by monitoring whether or not the sampling clock counter is reset at the SYNC pattern period. At this time, a detection failure flag is generated.

  As described above, the reason for using the wavelength when the detection fails as described above is that when the window width is unnecessarily widened, the situation shown in FIG. 11 occurs and the SYNC detection rate deteriorates. This is because there is a possibility.

  If the window width is increased in accordance with the wavelength measured as a wavelength shorter than the original wavelength, the probability that wavelengths other than the SYNC pattern near the longest wavelength such as 11T are measured in the window increases. Therefore, the window width is widened at the wavelength of the long SYNC pattern (14S4), and the window width is not changed at the short wavelength, so that the optimum window width is obtained.

  Moreover, in this method, when a wavelength longer than the SYNC pattern is detected due to a defect, deterioration of signal quality, or the like, the detection fails, or the measurement is longer than the longest wavelength of the original SYNC pattern. In this case, the window width does not widen in the required section. On the other hand, if the detection fails when it is measured shorter than the original SYNC pattern, it is updated here if the longest wavelength of the original SYNC pattern is measured. ing.

  Further, after widening the predicted wavelength window, it is determined whether or not a detection failure flag has been generated (step 14S5). If a detection failure flag has been generated, next, the predicted position window is widened (step 14S6). When the detection failure flag has disappeared, the longest wavelength is detected within the detection window (step 14S7).

  If the longest wavelength could not be detected in step 14S7, the longest wavelength value at the time of detection failure is updated, a detection failure flag is generated, and the process returns to step 14S2. If the longest wavelength can be detected in step 14S7, the detection failure flag is cleared (step 14S9), the window width of the predicted position window is narrowed, and the window width of the predicted wavelength window is increased (step 14S10).

  Next, it is determined whether a new wavelength longer than the held detection wavelength has been detected (step 14S11). When a new wavelength longer than the held detection wavelength is detected, the window width is changed. That is, the window width of the predicted position window is returned to the initial state, the width of the predicted wavelength window is returned to the initial state, and the process returns to step 14S2 (step 12S12).

  If a new wavelength longer than the held detection wavelength is not detected in step S11, it is determined whether the longest wavelength has been continuously detected in the detection window. This determination can be made by counting the SYNC pattern candidate detection pulses with the SYNC continuous number counter. If the SYNC pattern candidate detection pulse cannot be counted continuously for a predetermined number of times, the process returns to step S8. If the SYNC pattern candidate detection pulse can be continuously counted a certain number of times, frequency error detection is performed in step S14.

  In the above-described operation, it is the timing to shift to the process of changing the two window widths, but various embodiments are possible. That is, it may be the timing when the SYNC pattern detection fails a plurality of times, and only one of the window widths may be changed stepwise. In addition, the window width may be changed in multiple times. For example, a method may be used in which the window width is gradually increased every time the SYNC pattern detection fails. Further, it is assumed that the condition for changing the window width of the predicted wavelength window can be varied within a range not departing from the above characteristics.

  When the SYNC pattern candidate is detected within the two window widths, the two window widths are changed in the same manner as in the previously proposed invention. As for the predicted position window, since the interval of the SYNC pattern candidates can be obtained in 14-S3, the prediction accuracy of the appearance position is greatly increased, so that the window width is greatly reduced. On the contrary, regarding the predicted wavelength window, the possibility that the wavelength measured in the predicted position window is other than the SYNC pattern has been greatly reduced. Therefore, the predicted wavelength window should be expanded within a predictable range with respect to the wavelength of the SYNC pattern candidate. I can do it.

  As described above, in step 14S11, it is confirmed whether or not the wavelength detected in step 14S7 is the longest wavelength. If the wavelength detected in step 14S7 is not the longest wavelength, the window width is returned to the initial state (step 14S12). ) The SYNC pattern candidates are narrowed down again for the detected longest wavelength.

  Thereafter, the continuity of the SYNC pattern candidates is confirmed in the two window width sections in which the window width is changed (step S13). If a wavelength equivalent to the SYNC pattern candidate cannot be detected a certain number of times, there is a possibility that they are not SYNC patterns, so that it is regarded as a detection failure and the process proceeds to step S8. If the frequency of erroneous detection is high, a method may be used in which detection is restarted from the initial setting without unnecessarily widening the window width.

  If the SYNC pattern can be continuously detected a predetermined number of times, a frequency error is calculated from the measured interval of the SYNC pattern and frequency control is performed (step S14).

  In addition, although it is the setting of the continuous number of a SYNC pattern, it shall have with the function which can be changed automatically according to the wavelength of a SYNC pattern candidate. This is because it is difficult to specify the SYNC pattern when the sampling frequency is lower than the sampling rate as described above, and thus the number of consecutive times is increased in order to reduce the possibility of erroneous detection. With such a method, the reliability of detection increases when the sampling frequency is sufficiently high, so that the frequency control can be performed quickly by lowering the limit due to the number of consecutive signals. Similarly, the window width control should be changed according to the relationship between the sampling frequency and the sampling rate. This is because, when the sampling frequency is sufficiently high as shown in FIG. 13, it is difficult to find the SYNC pattern if the predicted wavelength window is narrow, and extra time is spent to widen the predicted wavelength window. The same can be said for the predicted position window. Specifically, if the measured longest wavelength is equal to or greater than a certain value, the same behavior as that of the previously proposed invention may be used.

  The present invention is not limited to the above embodiment, and may be an embodiment as shown in FIGS.

In the embodiment of FIG. 15, the same steps as those of FIG. The difference from the embodiment of FIG. 14 is between steps 14S3 and 14S7. In this embodiment,
If the longest wavelength when the detection has failed ≦ the longest wavelength currently measured, it is next determined whether or not a detection failure flag has been generated (step 15S1). When the detection failure flag is generated, the window width of the predicted position window is widened and the window width of the predicted wavelength window is also widened (step 15S2), and the process proceeds to step 14S7. If it is determined in step 14S3 that (longest wavelength when detection fails> longest currently measured wavelength), and if no detection failure flag is generated in step 15S1, the process proceeds to step 14S7.

  In the embodiment of FIG. 16, the same steps as those of FIG. A different part from the embodiment of FIG. 14 is a system path from step 14S3, 14S5, 14S6 to step 14S7. In the case of this embodiment, it is determined whether or not the current longest wavelength is larger than an arbitrary threshold value. If the current longest wavelength is large, the window width of the predicted position window is widened and the window width of the predicted wavelength window is also widened (step 15S2), and the process proceeds to step 14S7. This facilitates detection of the SYNC pattern.

  FIG. 17 is a diagram for explaining an example of operation by conceptually showing a state where the predicted position window changes in the apparatus of the present invention.

  First, a position where the next SYNC pattern appears is predicted based on the longest wavelength (17a-1) of the SYNC pattern, and a predicted position window (17a-3) is developed near the predicted position. At this time, the detection of the SYNC pattern candidate fails because the longest wavelength (17b-1) cannot be measured in the predicted point shift and the predicted position window section (± β2). Here, a detection failure flag is generated (step S2 in FIG. 14). Then, when the width of the predicted position window fails, the window (17a-3) having the longest wavelength longer than the longest wavelength when the detection failed is changed to a window (17b-3) widened to ± β1. Then, with respect to the longest wavelength (17c-1) detected again, the position where the next SYNC pattern appears can be predicted, and the longest wavelength (17d-1) can be detected because the window width has widened. Can be a SYNC pattern candidate.

  Then, as described in steps 14S7-14S9-14S10 of FIG. 14, the window width is reduced by (± β3) (17c-3), and the process proceeds to step 14S13 in which the SYNC pattern continuity is confirmed.

  FIG. 18 is a diagram for explaining an example of operation by conceptually showing how the predicted wavelength window changes in the apparatus of the present invention.

  A position where the next SYNC pattern appears is predicted from the longest wavelength (18a-1) of the SYNC pattern, and a predicted position window (18a-2) is developed in the vicinity. Then, the wavelength (18b-1) in the predicted wavelength window section is measured in the predicted position window (18a-2). However, since the longest wavelength (18b-1) is measured shorter than the longest wavelength (18a-1), detection fails because the window width (± α1) of the predicted wavelength window is narrow.

  At this time, the wavelength of the longest wavelength (18a-1) that failed to be detected is held, and measurement is resumed. After that, when the longest wavelength (18c-1) is measured, the predicted wavelength window is widened to (± α2) because it is equal to the longest wavelength (18a-1) that failed. By doing so, it is possible to detect the longest wavelength (18d-1) shorter than the longest wavelength (18c-1), and to proceed to the subsequent processing.

  When the longest wavelength (18c-1) is shorter than the longest wavelength (18a-1), the window width of the predicted wavelength window does not change (± α1). This can be distinguished from normal data such as 11T for HD DVDs by widening the window width to wavelengths measured shorter than the original wavelength, such as the longest wavelength (18b-1) or the longest wavelength (18d-1). This is because it becomes difficult to follow. However, if the longest wavelength (18a-1) was only measured extra long, and the others were shorter than the longest wavelength (18a-1), the detection continued with a narrow window width. Since the same processing is performed for the longest wavelength at that time, the failed wavelength is updated and the optimum state is automatically reached.

  FIG. 19 shows a configuration example for realizing the operation flow and signal processing described in FIG. 14, FIG. 17, and FIG.

  In FIG. 19, a value such as a threshold value that is initially set is stored in a rewritable type device (for example, a nonvolatile memory) in the sequence control unit 160 when the apparatus is manufactured. As a setting from the user during the operation of the apparatus, a setting value is given to the frequency error detector via the sequence control unit 160.

  A signal as shown in FIG. 3 is input to the peak hold unit 141. Further, a wavelength upper limit value B and a wavelength lower limit value A are given. This is because wavelengths exceeding the upper limit B and wavelengths not reaching the lower limit A are excluded from the SYNC pattern candidates. By setting the lower limit value A, the probability of erroneously detecting a high frequency component as a SYNC pattern can be lowered. Similarly, by setting the upper limit value B, it is possible to reduce the influence of a wavelength longer than the longest wavelength included in the SYNC pattern erroneously measured due to the influence of intersymbol interference, defect, or the like.

  The peak value held by the peak hold unit 141 is given to the SYNC appearance position prediction unit 142, and the detection timing signal when the peak value is detected is passed through the OR element 161 to the reset terminal of the sampling clock counter 43. Given. As a result, the sampling clock counter 143 is reset every time a peak value is detected, and is reset every time a SYNC pattern candidate is detected. The SYNC pattern candidate detection pulse is output from an AND circuit 151 described later.

  Thereby, the sampling clock counter 143 functions as a counter for measuring the appearance interval of the SYNC pattern. The count output of the sampling clock counter 143 is also input to the SYNC interval holding unit 144. The appearance interval of the SYNC pattern can be predicted based on the appearance interval defined for each disc (1116 channel bits in HD DVD). Also, the appearance interval of the SYNC pattern can be predicted by the ratio between the wavelength measured by peak hold and the longest wavelength defined for each disk.

  The SYNC interval holding unit 144 measures the SYNC pattern interval by latching the count value of the sampling clock counter 143 when the SYNC pattern candidate detection pulse is output from the AND element 151.

  The SYNC appearance position prediction unit 142 outputs time information from the detected peak value to the next peak value as a count value (or predicted value). The SYNC interval holding unit 144 also outputs a time interval from the detection of the peak value to the detection of the next peak value as a clock count value.

  The selector 145 selects one of the outputs of the SYNC appearance position prediction unit 142 and the SYNC interval holding unit 144 and outputs the selected data as data PDT. The data PDT is input to the SYNC appearance position confirmation unit 146.

  The SYNC appearance position confirmation unit 146 takes the count value (Count) from the sampling clock counter 143 and calculates (PDT−β) <Count <(PDT + β). β is a value for setting the window width of the SYNC appearance position, and is the parameter shown in FIGS. Β1 or β2 (<β1) or β3 (<β2) is selected and input via the selector 147.

  The selector 145 selects the output of the SYNC appearance position prediction unit 142 when no SYNC pattern candidate is detected.

The selector 147 outputs either β1, β2, or β3. While β3 is input to one input terminal of the selector 147, either β1 or β2 is input to the other input terminal. β1 and β2 are selectively fetched by the selector 162. The selector 162 is controlled by an AND element 163. The AND element 163 is given a SYNC detection failure flag (Failure_FLAG) from the SYNC detection failure flag output unit 165 and a determination output from the determination circuit 164. . The determination circuit 164 determines the longest wavelength (Failure_Peak) when the detection described above fails ≤ the longest wavelength currently measured (Peak)
If the currently measured longest wavelength (Peak) is small, for example, “1” is output, and if the currently measured longest wavelength is large, “0” is output. When the currently measured longest wavelength (Peak) is small and the SYNC detection failure flag (Failure_FLAG) is generated, the output of the AND element 163 is “1”, and β1 is selected. When there is no SYNC candidate detection flag from the SYNC candidate detection flag output unit 152, the selector 147 selects the output of the selector 162. At this time, the selector 145 selects the output of the SYNC appearance position prediction unit 142. At this time, as described in FIG. 17, the wavelength detection of the SYNC pattern by β1 is performed.

  When the SYNC candidate detection flag from the SYNC candidate detection flag output unit 152 is present, the selector 147 selects β3, and the selector 145 selects the output of the SYNC interval holding unit 144.

  The SYNC appearance position confirmation unit 146 to which the outputs of the selectors 145 and 147 and the sampling clock counter 143 are input receives the SYNC pattern appearance position confirmation signal when (PDT−β) <Count <(PDT + β). Output.

  On the other hand, reference numeral 150 denotes a wavelength comparison unit, which is a block for determining whether a measured wavelength falls within the range of an arbitrary predicted wavelength window width α is a SYNC pattern. The wavelength comparison unit 50 detects whether or not the signal (TLEN) is (Peak−α) <TLEN <(Peak + α) with respect to the peak value (Peak) obtained from the peak hold unit 141. If it is within this range, it is determined that the wavelength is the SYNC pattern. That is, a SYNC pattern whose wavelength falls within the range of α is used. For this purpose, α that determines the width of the predicted wavelength window is input to the wavelength comparison unit 150. Here, α is selectively input by the selector 171 as α1 or α2 (> α1) (see FIG. 18). As described with reference to FIGS. 14 and 18, the switching between α1 and α2 is switched from α1 to α2 under the condition of expanding the wavelength prediction wavelength window. A circuit for determining this switching condition is an OR element 172.

  The OR element 172 outputs “0” when the currently measured longest wavelength is large and the SYNC candidate detection pulse is not obtained. At this time, the selector 171 selects and outputs α2. As a result, switching from α1 to α2 is performed as described in FIG.

  The wavelength comparison unit 150 performs ± α processing on the peak value (Peak) obtained from the peak hold unit 141, and determines whether the signal (TLEN) is (Peak-α) <TLEN <(Peak + α). Whether it is detected. If it is within this range, it is determined that the wavelength is the SYNC pattern.

  The AND element 151 outputs a SYNC pattern candidate detection pulse based on the logical product of the determination results of the SYNC appearance position confirmation unit 146 and the wavelength comparison unit 150. As described above, the SYNC pattern candidate detection pulse is input to the SYNC candidate detection flag output unit 152 and the SYNC continuous number counter 153 in addition to the sampling clock counter 143 and the SYNC interval holding unit 144.

  The SYNC candidate detection flag output unit 152 controls the previous selectors 145 and 147. For example, the selector selection state is switched from the output selection state of the SYNC appearance position prediction unit 142 to the output selection state of the SYNC interval holding unit 144, and the selection state of the selector 147 is switched to the selection state of β3.

  The SYNC continuous number counter 153 counts SYNC pattern candidate detection pulses, and outputs a frequency error detection instruction signal when the count number exceeds a given value N. In response to this frequency error detection instruction signal, the frequency error calculation unit 154 determines the interval of the SYNC pattern from the repetition of the counter value of the sampling clock counter 43, and sets the interval of the reference SYNC pattern set in advance. Compare and output frequency error information.

  The determination circuit 180 determines whether or not the actual count value (PRD) of the sampling clock counter 143 has reached the value (PDT + β) obtained by adding the count value PDT and β predicted for the SYNC appearance position. If (PRD) = (PDT + β), it means that the SYNC pattern wavelength detection has failed, and the output of the determination circuit 180 is given to the SYNC detection failure flag output unit 165. When the SYNC pattern wavelength detection fails, a detection failure flag (Failure_FLAG) is output from the SYNC detection failure flag output unit 165. The output of the determination circuit 180 is supplied to the enable terminal of the longest wavelength output unit 166 when SYNC detection fails. When the SYNC pattern wavelength detection fails, the longest wavelength output unit 166 outputs the longest wavelength (Failure_Peak) when the SYNC detection fails.

  The embodiment of the present invention is not limited to the above-described embodiment, and various modifications are possible.

  20 and 21 show another embodiment of the frequency detector of the present invention. The same reference numerals as those in FIG. 19 denote the same parts as those in FIG.

  19 differs from FIG. 20 in that the output of the determination circuit 164 is input to the OR circuit 172 in FIG. However, in FIG. 20, the output of the AND circuit 163 is input to the OR circuit 172. FIG. 20 can realize the operations of steps 15S1 and 15S2 shown in FIG.

  The difference between FIG. 20 and FIG. 21 is that in FIG. 20, the output of the determination circuit 164 is directly supplied to the enable terminal of the longest wavelength output unit 166 when SYNC detection fails. However, in the circuit of FIG. 21, the output of the determination circuit 164 and the logical OR output of the frequency error detection instruction signal from the SYNC continuous number counter 153 are input to the enable terminal of the longest wavelength output unit 166 when SYNC detection fails. Is entered through. This is so that not only the failure wavelength but also the success wavelength can be maintained.

  FIG. 22 is a block diagram in which the above-described apparatus is further divided into blocks for easy understanding.

  A block 201 is a peak hold circuit that holds a peak value using a plurality of sampling values of a reproduction signal. A block 202 is a sampling clock counter circuit that is reset at the peak detection timing of the peak hold circuit 201 and counts the clock. The block 203 sets a window width of the predicted wavelength using the peak value and an arbitrary predicted wavelength window width (± α) to be added thereto, and a wavelength detection signal when the sampling value is within the predicted wavelength window. Is a wavelength comparison circuit that outputs. A block 204 is a predicted position measurement data output circuit that outputs predicted position measurement data (PDT) in which the appearance timing of a SYNC pattern having a fixed relationship with the wavelength predicted from the peak value is predicted. A block 205 is a SYNC appearance position confirmation circuit that confirms the appearance timing of the SYNC pattern using the predicted position measurement data (PDT) and the window width (± β) of the predicted position window.

  The block 206 further outputs a SYNC candidate detection flag when the wavelength detection signal of the wavelength comparison circuit 203 and the SYNC appearance position confirmation circuit 205 and the output signal of the SYNC appearance position confirmation circuit are in a certain relationship. It is a flag output circuit. The block 207 holds the peak value when the reset timing of the sampling clock counter unit 202 is shifted and the SYNC detection position set by the count output indicates detection failure, and outputs the failure peak value. It is a wavelength output circuit.

  Further, as described in FIG. 18, the block 208 increases the width (± α) of the predicted wavelength window when the peak value detected this time is larger than the failed peak value, and increases the predicted wavelength when it is smaller. This is a predicted wavelength window parameter variable circuit that performs dynamic processing so as not to increase the window width (± α) more than necessary.

  Further, the block 209 is a predicted position window parameter variable circuit for changing the predicted position window width (± β) as described with reference to FIG. This predicted position window parameter variable circuit 209 is a dynamic operation for setting the predicted position window width narrow in the initial state and switching the predicted position window width to be wider when the SYNC detection position set by the count output indicates a detection failure. Get.

  In the above description, an example is shown in which α and β are changed in binary. However, the present invention is not limited to this, and the window can be controlled to be narrower or wider in smaller steps.

  Although FIG. 22 is a block diagram of the circuit of FIG. 19, the circuits of FIG. 20 and FIG. 21 can be similarly blocked.

  As described above, according to the apparatus of the present invention, for example, by enabling frequency detection at a low rate for a reproduction signal sampled at a half rate, a frequency error capable of detecting a high-precision frequency without upsampling. A detector can be obtained.

  The frequency detection range can be improved when the sampling clock is low with respect to the channel rate. At this time, consideration is also given to the influence when the frequency is high. The wider the frequency detection range, the higher the frequency can be withdrawn because the frequency can be controlled independently using the frequency detector without the presence of firms and other functions. This is particularly effective when track jumps occur frequently and the frequency fluctuates greatly.

  The frequency detectable range is improved when sampling at a low rate such as a half rate. As a result, it is expected to be easy to handle high speed, reduce power consumption, reduce circuit scale, and improve design ease (especially analog circuits such as ADC).

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment.

It is a figure which shows the block structural example of the optical disk reproduction apparatus with which this invention is applied. It is a data format of HD DVD and is an explanatory diagram showing a data segment. It is a figure which shows the example of the signal input into a frequency error detector. It is a figure which shows the structural example of the frequency error detector used as the premise of this invention. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process in order to demonstrate the function of a frequency error detector. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process in order to demonstrate the function of a frequency error detector. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process in order to demonstrate the function of a frequency error detector. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process in order to demonstrate the function of a frequency error detector. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process used as the subject in the function of a frequency error detector. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process used as a problem in the function of a frequency error detector. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process used as a problem in the function of a frequency error detector. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process used as the subject in the function of a frequency error detector. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process used as the subject in the function of a frequency error detector. It is the flowchart shown in order to demonstrate the operation example of the apparatus which concerns on this invention. It is the flowchart shown in order to demonstrate the other operation example of the apparatus which concerns on this invention. It is the flowchart shown in order to demonstrate the further another example of operation | movement of the apparatus based on this invention. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process in order to demonstrate the function of the apparatus which concerns on this invention. It is explanatory drawing which shows the example of a synchronous (SYNC) pattern detection process in order to demonstrate the other function of the apparatus which concerns on this invention. It is a figure which shows the structural example of the apparatus which concerns on this invention. It is a figure which shows the other structural example of the apparatus which concerns on this invention. It is a figure which shows the further another structural example of the apparatus which concerns on this invention. It is a figure which shows the example of a high-order block structure of the apparatus which concerns on this invention.

Explanation of symbols

141: Peak hold unit, 142: SYNC appearance position prediction unit, 143: Sampling clock counter, 144 ... SYNC interval holding unit, 145 ... Selector, 146 ... SYNC appearance position confirmation 147 ... selector 150 ... wavelength comparison unit 151 ... AND circuit 152 ... SYNC candidate detection flag output unit 153 ... SYNC continuous number counter 154 ... frequency error calculation 160, sequence control unit, 165, SYNC detection failure flag output unit, 166, longest wavelength output unit when SYNC detection fails, 201, peak hold circuit, 202, sampling clock Counter circuit 203... Wavelength comparison circuit 204... Predictive position measurement data output circuit 205 205 SYNC appearance position confirmation circuit 206 ... SYNC candidate detection flag output circuit, 207 ... longest wavelength output circuit, 208 ... wavelength window parametrize variable circuit, 209 ... predicted position window parametrize variable circuit.

Claims (13)

In a synchronization pattern detection apparatus for a signal having a synchronization (SYNC) pattern having a predetermined width including a peak value every predetermined period,
A wavelength comparison circuit that determines whether or not a wavelength near the peak value of the signal exists within a predicted wavelength range (within the width of the predicted wavelength window);
Count data representing the detection interval of the next peak value from the peak value is a range (predicted position window of the predicted position window) created using predicted position measurement data that predicts the appearance interval of the SYNC pattern predicted from the peak value. A SYNC appearance position confirmation circuit that determines whether or not it exists within the width;
A SYNC candidate detection flag output circuit that outputs a SYNC candidate detection flag when the output signal of the wavelength comparison circuit and the output signal of the SYNC appearance position confirmation circuit are in a fixed relationship;
When the count value counted from the time point of detection of the peak value to the time point of detection of the next peak value deviates from the predicted appearance position of the SYNC pattern, the longest time to hold the next peak value and output as a failed peak value A wavelength output circuit;
When the current peak value detected this time is larger than the failure peak value, at least the width of the predicted wavelength window is adjusted in a wide direction, and when it is smaller, dynamic processing is performed so as not to widen the predicted wavelength window more than necessary. A predictive wavelength window parameter variable circuit for performing
A synchronization pattern detection device for a frequency error detection device.   2. A synchronization pattern detection of a frequency error detecting apparatus according to claim 1, further comprising a SYNC continuous number counter for counting a SYNC candidate detection flag a predetermined number of times, and outputting a frequency error detection instruction signal in accordance with the counter value. apparatus. A peak hold circuit for holding a peak value at a wavelength calculated from a plurality of sampling values of an input signal;
A sampling clock counter that is reset at the peak value detection timing of the peak hold circuit and counts the clock;
A wavelength comparison circuit that sets an arbitrary predicted wavelength window width to be added to the peak value and outputs a longest wavelength detection signal when the sampling value is within the predicted wavelength window;
A predicted position measurement data output unit that outputs predicted position measurement data that predicts the appearance timing of a synchronous (SYNC) pattern that is in a fixed relationship with the wavelength predicted from the peak value;
A SYNC appearance position confirmation circuit for confirming the appearance of a SYNC pattern in the predicted position window using the predicted position measurement data for predicting the appearance timing of the SYNC pattern and an arbitrary predicted position window width;
A SYNC candidate detection flag output circuit that outputs a SYNC candidate detection flag when the longest wavelength detection signal from the wavelength comparison circuit and the appearance position confirmation signal from the SYNC appearance position confirmation circuit are in a fixed relationship;
In the sampling clock counter unit, when the counter value exceeds the predicted SYNC pattern appearance position and the SYNC pattern detection fails, the longest wavelength output circuit that holds the peak value and outputs it as a failed peak value;
A wavelength window parameter for performing dynamic processing so that the predicted wavelength window is widened when the current peak value detected this time is larger than the failure peak value, and is not expanded more than necessary when the current peak value is small. A variable circuit;
A synchronization pattern detection device for a frequency error detection device.   4. A synchronization pattern detection of a frequency error detecting apparatus according to claim 3, further comprising a SYNC continuous number counter for counting a SYNC candidate detection flag a predetermined number of times, and outputting a frequency error detection instruction signal in accordance with the counter value. apparatus.   Further, when the predicted position window parameter variable circuit for changing the predicted position window width is provided, the initial state sets the predicted position window width narrowly, and the SYNC detection position set by the count output indicates a detection failure 4. The synchronization pattern detection device for a frequency error detection device according to claim 1, wherein the synchronization position detection device is switched in a direction to widen the predicted position window width. Furthermore, when the current peak value detected this time is larger than the failure peak value,
It is determined whether or not a detection failure flag has occurred, and if a detection failure flag has occurred, the window width of the predicted position window is adjusted in a wider direction, and the peak detected this time than the failure peak value is adjusted. 4. The method according to claim 1, further comprising means for detecting the longest wavelength without expanding the predicted position window more than necessary when the value is small or when the detection failure flag is not generated. A synchronization pattern detection device of the frequency error detection device according to claim 1.   Further, when the predicted position window parameter variable circuit for changing the predicted position window width is provided, the initial state sets the predicted position window width narrowly, and the SYNC detection position set by the count output indicates a detection failure 6. The synchronous pattern detection device for a frequency error detection device according to claim 5, wherein the predicted position window width is switched in the direction of widening.   4. The synchronization pattern detecting apparatus according to claim 3, wherein the input signal is a reproduction signal obtained by reproducing a signal read from an optical disk. 7. The synchronization pattern detection apparatus of a frequency error detection apparatus according to claim 6, wherein the reproduction signal is a signal obtained as a result of processing by an offset / gain control unit and an asymmetry correction unit.   An information processing apparatus using the apparatus according to claim 1. A frequency error detecting device having a clock counter and a signal processing circuit and detecting a frequency error for generating a sampling clock synchronized with a frequency component of a signal having a SYNC pattern having a predetermined width including a peak value every predetermined period In the synchronous pattern detection method of
Determine whether the wavelength near the peak value of the signal is within the expected wavelength range (within the width of the predicted wavelength window);
Count data representing the detection interval of the next peak value from the peak value is a range (predicted position window of the predicted position window) created using predicted position measurement data that predicts the appearance interval of the SYNC pattern predicted from the peak value. Within the width)
When the determination output signal that determines whether or not a wavelength near the peak value of the signal exists and the determination output signal that determines whether or not the signal exists within the width of the predicted position window have a certain relationship , Output a SYNC candidate detection flag,
When the count value counted from the detection time of the peak value to the next peak detection time is deviated from the predicted appearance position of the SYNC pattern, the next peak value is retained and output as a failure peak value,
When the current peak value detected this time is larger than the failure peak value, at least the width of the predicted wavelength window is adjusted in a wide direction, and when it is smaller, dynamic processing is performed so as not to widen the predicted wavelength window more than necessary. I do,
A method of detecting a synchronization pattern of a frequency error detecting apparatus, and an optical disc reproducing apparatus.   12. The method for detecting a synchronization pattern of a frequency error detecting apparatus and reproducing an optical disc according to claim 11, wherein the number of consecutive SYNC candidate detection flags is counted for a predetermined time, and a frequency error detection signal is output according to the counter value. apparatus.   The predicted position window width is varied, the initial state is set to narrow the predicted position window width, and when the SYNC detection position set by the count output indicates a detection failure, the predicted position window width is switched to a wider direction. 12. The method for detecting a synchronization pattern of a frequency error detecting apparatus and an optical disk reproducing apparatus according to claim 11.

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