JP2009014883A - Liquid crystal display device and inspection method of inspecting the same - Google Patents

Liquid crystal display device and inspection method of inspecting the same Download PDF

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JP2009014883A
JP2009014883A JP2007174811A JP2007174811A JP2009014883A JP 2009014883 A JP2009014883 A JP 2009014883A JP 2007174811 A JP2007174811 A JP 2007174811A JP 2007174811 A JP2007174811 A JP 2007174811A JP 2009014883 A JP2009014883 A JP 2009014883A
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Shinji Yamashita
真司 山下
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Mitsubishi Electric Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of easily specifying a defective part without laser irradiation. <P>SOLUTION: The liquid crystal display device 30 has a plurality of scanning lines 10 arranged in parallel on a substrate and a plurality of signal lines 11 arranged so as to orthogonally cross the scanning lines 10. Further, the liquid crystal display device 30 includes: a plurality of inspecting scanning line input terminals 1, 2 which collect the scanning lines 10 every first prescribed pitch; a plurality of inspecting signal lines input terminals 3, 4, 5 which collect the signal lines 11 every second prescribed pitch; an address specifying scanning line input terminal 15 which collects the scanning lines 10 every third prescribed pitch of which the interval is wider than that of the first prescribed pitch; and an address specifying scanning line input terminal 16 which collects the scanning lines 11 every fourth prescribed pitch of which the interval is wider than that of the second prescribed pitch. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、アクティブマトリクス型の液晶表示装置、及びこの液晶表示装置を検査する検査方法に関するものである。   The present invention relates to an active matrix liquid crystal display device and an inspection method for inspecting the liquid crystal display device.

一般に、アクティブマトリクス型の液晶表示装置は、液晶パネルのアレイ基板上に個々の独立した画素部がマトリクス状に配置され、これら画素部に画素電極及びスイッチング素子がそれぞれ設けられている。このアレイ基板は、液晶層を介して対向基板に対向して配置されており、画素電極は、対向基板上の対向電極と液晶層を介して対向配置される。このアクティブマトリクス型の液晶表示装置は、スイッチング素子を介して駆動電圧を画素電極に印加し、この画素電極と液晶を介して画素電極に対向して配置されている対向電極との電位差によって液晶を駆動し、投射光もしくは反射光を光変調することで液晶パネルに画像を表示するようになっている。   In general, in an active matrix liquid crystal display device, individual independent pixel portions are arranged in a matrix on an array substrate of a liquid crystal panel, and pixel electrodes and switching elements are provided in these pixel portions, respectively. The array substrate is disposed to face the counter substrate via the liquid crystal layer, and the pixel electrode is disposed to face the counter electrode on the counter substrate via the liquid crystal layer. In this active matrix type liquid crystal display device, a driving voltage is applied to a pixel electrode via a switching element, and a liquid crystal is generated by a potential difference between the pixel electrode and a counter electrode arranged to face the pixel electrode via a liquid crystal. The image is displayed on the liquid crystal panel by driving and optically modulating the projection light or the reflected light.

スイッチング素子が薄膜トランジスタ(以下TFTと記載)である場合には、アレイ基板上に走査用の複数の走査線および画像信号用の複数の信号線が交差するように配線され、これら走査線および信号線の各交差部分にそれぞれ画素が設けられている。TFTのゲート電極はスイッチング素子を制御する走査信号を入力するための走査線に、ソース電極は液晶パネルに表示する画像の信号を入力するための信号線にそれぞれ電気的に接続され、さらにドレイン電極は画素電極に電気的に接続されている。   When the switching element is a thin film transistor (hereinafter referred to as TFT), a plurality of scanning lines for scanning and a plurality of signal lines for image signals are arranged on the array substrate so as to intersect with each other. Pixels are provided at each intersection. The gate electrode of the TFT is electrically connected to a scanning line for inputting a scanning signal for controlling the switching element, the source electrode is electrically connected to a signal line for inputting a signal of an image to be displayed on the liquid crystal panel, and a drain electrode. Are electrically connected to the pixel electrode.

各走査線は、上方から順次に水平走査周期に対応する電圧が印加される。また各信号線には画像信号に対応する電圧が印加される。これによって、TFTは、走査線を通じて電圧が印加されたタイミングでオン状態になり、信号線からの画像信号に対応する電圧をサンプリングして画素電極に与える。液晶層には、画素電極に加わった電圧と、対向電極に加わった電圧との差分が充電され、液晶層が駆動して光学応答によって表示動作が行われる。   A voltage corresponding to the horizontal scanning period is sequentially applied to each scanning line from above. A voltage corresponding to the image signal is applied to each signal line. Accordingly, the TFT is turned on at a timing when a voltage is applied through the scanning line, and a voltage corresponding to the image signal from the signal line is sampled and applied to the pixel electrode. The liquid crystal layer is charged with a difference between the voltage applied to the pixel electrode and the voltage applied to the counter electrode, and the liquid crystal layer is driven to perform a display operation by optical response.

一般にこの液晶表示装置の検査の1つとして、画素表示による点灯検査を行っている。この点灯検査を行う際に、高精細パネルの挟ピッチパネルをセル状態で表示させる方法として、ゲート配線とソース配線を束ねることによって、信号入力端子を減らして検査を行う方法がある。これにより、検査治具のコスト削減、及び信号入力端子数が減ることで信号入力端子のパッドサイズを大きくすることができ、プロービング不良を出さずに容易に表示させることが出来る。   In general, as one of inspections of the liquid crystal display device, a lighting inspection by pixel display is performed. When performing this lighting inspection, there is a method of displaying the sandwiched pitch panel of the high-definition panel in a cell state by reducing the signal input terminals by bundling the gate wiring and the source wiring. As a result, the cost of the inspection jig can be reduced and the number of signal input terminals can be reduced, so that the pad size of the signal input terminals can be increased, and the display can be easily performed without causing a probing defect.

ゲート配線及びソース配線を束ねる方法としては、例えば、ゲート配線を奇数番目のゲート信号入力端子を束ねた奇数配線、偶数番目のゲート信号入力端子を束ねた偶数配線の2本に束ねる。ソース配線をR信号入力端子を束ねたR配線、G信号入力端子を束ねたG配線、B信号入力端子を束ねたB配線の3本で束ねている(下記特許文献1参照)。   As a method of bundling the gate wiring and the source wiring, for example, the gate wiring is bundled into two wirings, an odd wiring in which odd-numbered gate signal input terminals are bundled and an even wiring in which even-numbered gate signal input terminals are bundled. The source wiring is bundled by three wirings: an R wiring bundled with R signal input terminals, a G wiring bundled with G signal input terminals, and a B wiring bundled with B signal input terminals (see Patent Document 1 below).

ここで、上述したようにゲート配線およびソース配線を束ねているため、ベタ表示は可能であるが特殊な表示をさせることは出来ない。このようなパネルで点欠陥もしくは線欠陥が発生し、欠陥箇所の解析を行うときは、欠陥箇所を特定することが困難になる。そこで、従来の欠陥箇所を特定させる方法としては、点灯表示状態を確認し、欠陥箇所にペンでマーキングを行う。ペンでマーキングを行った後、レーザー装置へパネルを持っていき、ペンでマーキングされた周辺にレーザー照射を行う。再度、点灯表示させながら、マーキング箇所から欠陥箇所の画素数をルーペ等で測定し、欠陥部を特定する。   Here, since the gate wiring and the source wiring are bundled as described above, solid display is possible but special display cannot be performed. When a point defect or a line defect occurs in such a panel and the defect location is analyzed, it becomes difficult to specify the defect location. Therefore, as a conventional method for identifying a defective portion, the lighting display state is confirmed, and the defective portion is marked with a pen. After marking with the pen, bring the panel to the laser device and irradiate the area marked with the pen with laser. Again, the number of pixels from the marking portion to the defective portion is measured with a magnifying glass or the like while the display is turned on to identify the defective portion.

特開2002−98992号公報JP 2002-98992 A

しかしながら、従来の欠陥箇所を特定する方法では、レーザー照射を行い、ルーペ等で欠陥部を特定するため、時間と手間がかかるという問題があった。   However, the conventional method for identifying a defective portion has a problem that it takes time and labor since laser irradiation is performed and a defective portion is identified by a loupe or the like.

そこで本発明はかかる問題を解決するためになされたものであり、レーザー照射することなく容易に欠陥箇所を特定する液晶表示装置を得ることを目的とする。   Accordingly, the present invention has been made to solve such a problem, and an object of the present invention is to obtain a liquid crystal display device that can easily identify a defective portion without laser irradiation.

本発明における液晶表示装置は、基板上に平行に配設された複数の走査線と、該走査線と直交するように配設された複数の信号線を有する液晶表示装置において、前記走査線を第1の所定ピッチ毎に集約する複数の検査用走査線入力端子と、前記信号線を第2の所定ピッチ毎に集約する複数の検査用信号線入力端子と、前記走査線を前記第1の所定ピッチよりも間隔が広い第3の所定ピッチ毎に集約するアドレス特定用走査線入力端子と、前記信号線を前記第2の所定ピッチよりも間隔が広い第4の所定ピッチ毎に集約するアドレス特定用信号線入力端子とを備える。   The liquid crystal display device according to the present invention is a liquid crystal display device having a plurality of scanning lines arranged in parallel on a substrate and a plurality of signal lines arranged orthogonal to the scanning lines. A plurality of inspection scanning line input terminals that aggregate every first predetermined pitch, a plurality of inspection signal line input terminals that aggregate the signal lines every second predetermined pitch, and the scanning lines that are the first Address specifying scanning line input terminals that aggregate every third predetermined pitch that is wider than the predetermined pitch, and addresses that aggregate the signal lines every fourth predetermined pitch that is wider than the second predetermined pitch. A signal line input terminal for identification.

本発明の液晶表示装置によれば、走査線及び信号線を所定のピッチで集約したアドレス特定用入力端子を備えることで、格子パターンを表示し、この格子パターンからの距離を確認することでレーザーマーキングを行わず欠陥箇所のアドレスの特定が可能となり、従来の欠陥箇所特定方法に比べ時間と手間を省くことが出来る。また、レーザーマーキングを行わずに欠陥箇所の特定が出来るようになるので、欠陥修復によるパネルの良品化も可能となる。   According to the liquid crystal display device of the present invention, by providing an address specifying input terminal in which scanning lines and signal lines are aggregated at a predetermined pitch, a lattice pattern is displayed, and the distance from the lattice pattern is confirmed to be a laser. The address of the defective part can be specified without performing marking, and time and labor can be saved compared with the conventional defect part specifying method. In addition, since it becomes possible to identify a defective portion without performing laser marking, it is possible to improve the quality of the panel by repairing the defect.

<実施の形態>
図1は、本発明の実施の形態における液晶表示装置30を示した図である。図1を参照して、本発明の液晶表示装置30の構成について説明する。液晶表示装置30は、アレイ基板20上に平行に配設された複数の走査線10と、この走査線10と直交するように複数の信号線11が配線されている。この液晶表示装置30は、表示検査を行うための検査端子を設けており、この検査端子は、走査線10を所定ピッチ毎に集約する複数の検査用走査線入力端子と、信号線11を所定ピッチ毎に集約する複数の検査用信号線入力端子とを備えている。すなわち、簡易にベタ表示の表示検査を行うために、走査線10(走査線入力端子)と信号線11(信号線入力端子)を束ねることによって、信号入力端子を減らしている。
<Embodiment>
FIG. 1 is a diagram showing a liquid crystal display device 30 according to an embodiment of the present invention. With reference to FIG. 1, the structure of the liquid crystal display device 30 of this invention is demonstrated. In the liquid crystal display device 30, a plurality of scanning lines 10 arranged in parallel on the array substrate 20 and a plurality of signal lines 11 are wired so as to be orthogonal to the scanning lines 10. The liquid crystal display device 30 is provided with an inspection terminal for performing a display inspection. The inspection terminal includes a plurality of inspection scanning line input terminals that aggregate the scanning lines 10 at a predetermined pitch, and a predetermined number of signal lines 11. A plurality of inspection signal line input terminals aggregated for each pitch are provided. That is, in order to easily perform a solid display display inspection, the signal input terminals are reduced by bundling the scanning lines 10 (scanning line input terminals) and the signal lines 11 (signal line input terminals).

また、走査線10を検査用走査線入力端子の所定ピッチよりも間隔が広い所定ピッチ毎に集約するアドレス特定用走査線入力端子15と、信号線11を検査用信号線入力端子の所定ピッチよりも間隔が広い所定ピッチ毎に集約するアドレス特定用信号線入力端子16とを備えている。すなわち、このアドレス特定用走査線入力端子15およびアドレス特定用信号線入力端子16に信号を入力することにより、液晶表示装置30に格子状のパターンを表示させることが出来る。   Further, the address specifying scanning line input terminal 15 that aggregates the scanning lines 10 at a predetermined pitch that is wider than the predetermined pitch of the inspection scanning line input terminal, and the signal line 11 from the predetermined pitch of the inspection signal line input terminal. Are also provided with address specifying signal line input terminals 16 that are aggregated at predetermined intervals with a wide interval. That is, by inputting signals to the address specifying scanning line input terminal 15 and the address specifying signal line input terminal 16, a lattice pattern can be displayed on the liquid crystal display device 30.

次に、走査線10および信号線11を集約する方法を説明する。例えば、走査線10を集約する方法として、奇数番目と偶数番目にわけて走査線10を集約する方法がある。すなわち、図1に示すように、1,3,5・・・と奇数番目の走査線入力端子8を集約した奇数配線の検査用走査線入力端子1と、2,4,6・・・と偶数番目の走査線入力端子9を集約した偶数配線の検査用走査線入力端子2を備え、走査線10を集約する。また、例えば、信号線11を集約する方法として、R信号、G信号、B信号にわけて信号線11を集約する方法がある。すなわち、図1に示すように、R信号の信号線入力端子12(3N+1、(N=0,1,2・・・))を集約したR信号の検査用信号線入力端子4、G信号の信号線入力端子13(3N+2)を集約したG信号の検査用信号線入力端子5、B信号の信号線入力端子14(3N+3)を集約したB信号の検査用信号線入力端子6を備え、信号線11を集約する。   Next, a method for integrating the scanning lines 10 and the signal lines 11 will be described. For example, as a method of consolidating the scanning lines 10, there is a method of consolidating the scanning lines 10 in an odd number and an even number. That is, as shown in FIG. 1, odd-numbered scanning scanning line input terminals 1, 1, 3, 5,..., And odd-numbered scanning line input terminals 8, 2, 4, 6,. The even-numbered scanning line input terminal 2 for inspection, which is a collection of even-numbered scanning line input terminals 9, is provided, and the scanning lines 10 are collected. For example, as a method of consolidating the signal lines 11, there is a method of consolidating the signal lines 11 into R signals, G signals, and B signals. That is, as shown in FIG. 1, the R signal inspection signal line input terminal 4 and the G signal input terminal 12 (3N + 1, (N = 0, 1, 2,...)) Are collected. A signal line input terminal 5 for G signal that aggregates signal line input terminals 13 (3N + 2), and a signal line input terminal 6 for B signal that aggregates signal line input terminals 14 (3N + 3) for B signals are provided. Line 11 is aggregated.

次に、アドレス特定用走査線入力端子15およびアドレス特定用信号線入力端子16の集約方法について説明する。アドレス特定用走査線入力端子15が走査線10を集約する方法は、所定数毎の奇数番目の走査線入力端子8および偶数番目の走査線入力端子9を集約する。例えば、図1に示すように、10本置きの走査線10を集約する。また、アドレス特定用信号線入力端子16が信号線11を集約する方法は、所定数毎のR信号の信号線入力端子4,G信号の信号線入力端子5、B信号の信号線入力端子6を集約する。例えば、図1に示すように、3M+1(M=3,6,9・・・)の信号線入力端子4を集約する。   Next, an aggregation method of the address specifying scanning line input terminal 15 and the address specifying signal line input terminal 16 will be described. The address specifying scanning line input terminal 15 aggregates the scanning lines 10 by integrating the odd-numbered scanning line input terminals 8 and the even-numbered scanning line input terminals 9 every predetermined number. For example, as shown in FIG. 1, every ten scanning lines 10 are collected. The address specifying signal line input terminal 16 aggregates the signal lines 11 in a predetermined number of R signal line input terminals 4, G signal line input terminals 5, and B signal line input terminals 6. Aggregate. For example, as shown in FIG. 1, 3M + 1 (M = 3, 6, 9...) Signal line input terminals 4 are collected.

なお、3,7は、集約した端子1,2,15,4,5,6,16と集約しない端子8,9,13,14との間の導通/遮断を制御するスイッチング入力端子である。   Reference numerals 3 and 7 are switching input terminals for controlling conduction / cutoff between the aggregated terminals 1, 2, 15, 4, 5, 6, and 16 and the non-aggregated terminals 8, 9, 13, and 14.

次に、図1を参照して表示検査を行うときの動作について説明する。まず、以下のように通常表示を行い、パネルに点欠陥もしくは線欠陥が発生していないか表示検査を行う。通常表示を行う際、検査用走査線入力端子1,2と検査用信号線入力端子4,5,6に検査用信号を入力する。また、アドレス特定用走査線入力端子15には、検査用走査線入力端子2へ入力する検査用信号を入力し、アドレス特定用信号線入力端子16には、検査用信号線入力端子4へ入力する検査用信号を入力する。このような信号を入力することで、液晶表示装置30をベタ表示することが出来る。   Next, the operation when the display inspection is performed will be described with reference to FIG. First, normal display is performed as follows, and a display inspection is performed to check whether a point defect or a line defect has occurred on the panel. When normal display is performed, inspection signals are input to the inspection scanning line input terminals 1 and 2 and the inspection signal line input terminals 4, 5, and 6. An inspection signal to be input to the inspection scanning line input terminal 2 is input to the address specifying scanning line input terminal 15, and an input to the inspection signal line input terminal 4 is input to the address specifying signal line input terminal 16. The inspection signal to be input is input. By inputting such a signal, the liquid crystal display device 30 can be displayed solid.

次に、前述の表示検査において、表示欠陥があったとき、以下のように液晶表示装置30に格子状のパターンを表示する。格子パターンを表示させる際、アドレス特定用走査線入力端子15およびアドレス特定用信号線入力端子16にアドレス特定用信号を入力する。このアドレス特定用走査線入力端子15へ入力するアドレス特定用信号は、前述した検査用走査線入力端子1,2へ入力する検査用信号とは異なるタイミングの信号を入力する。同様に、アドレス特定用信号線入力端子16へ入力するアドレス特定用信号は、前述した検査用信号線入力端子4,5,6へ入力する検査用信号とは異なるタイミングの信号を入力する。また、アドレス特定用信号線入力端子16へ入力するアドレス特定用信号は、前述した検査用信号線入力端子4,5,6へ入力する検査用信号とは異なる電圧を印加して、ベタ表示したときとは異なる色調整を行い、ベタ表示時の表示と区別する。   Next, in the above-described display inspection, when there is a display defect, a lattice pattern is displayed on the liquid crystal display device 30 as follows. When displaying the lattice pattern, an address specifying signal is input to the address specifying scanning line input terminal 15 and the address specifying signal line input terminal 16. The address specifying signal input to the address specifying scan line input terminal 15 is a signal having a timing different from that of the test signal input to the test scan line input terminals 1 and 2 described above. Similarly, the address specifying signal input to the address specifying signal line input terminal 16 is input with a signal having a timing different from that of the above-described inspection signals input to the inspection signal line input terminals 4, 5, and 6. The address specifying signal input to the address specifying signal line input terminal 16 is solidly displayed by applying a voltage different from the above-described inspection signal input to the inspection signal line input terminals 4, 5 and 6. Color adjustment different from the time is performed to distinguish the display from the solid display.

次に、欠陥した画素部が上述した方法で表示された格子パターンのどこにあるかを確認し、格子パターンからの画素数を確認することで、欠陥した画素部のアドレスを特定することが出来る。   Next, the address of the defective pixel portion can be specified by confirming where the defective pixel portion is in the lattice pattern displayed by the above-described method and confirming the number of pixels from the lattice pattern.

以上より、液晶表示装置30に格子状のパターンを表示させることが可能となり、格子パターンと欠陥箇所の距離を確認することで、レーザー光によるマーキングを行わずに欠陥箇所のアドレスの特定が可能となり、従来の欠陥箇所特定方法に比べ時間と手間を省くことが出来る。また、レーザーマーキングを行わずに欠陥箇所の特定が可能となるため、欠陥修復によるパネルの良品化も可能となる。   As described above, a lattice-like pattern can be displayed on the liquid crystal display device 30. By checking the distance between the lattice pattern and the defective portion, the address of the defective portion can be specified without performing marking with a laser beam. Thus, time and labor can be saved compared with the conventional defect location identification method. In addition, since it is possible to identify a defective portion without performing laser marking, it is possible to improve the quality of the panel by repairing the defect.

本発明の実施の形態における液晶表示装置を示した図である。It is the figure which showed the liquid crystal display device in embodiment of this invention.

符号の説明Explanation of symbols

1,2 検査用走査線入力端子、3,7 スイッチング入力用端子、4,5,6 検査用信号線入力端子、8 奇数番目の走査線入力端子、9 偶数番目の走査線入力端子、10 走査線、11 信号線、12 R信号の信号線入力端子、13 G信号の信号線入力端子、14 B信号の信号線入力端子、15 アドレス特定用走査線入力端子、16 アドレス特定用信号線入力端子、20 アレイ基板、30 液晶表示装置。   1, 2 Inspection scan line input terminal, 3, 7 Switching input terminal, 4, 5, 6 Inspection signal line input terminal, 8 Odd scan line input terminal, 9 Even scan line input terminal, 10 scan Line, 11 signal line, 12 R signal line input terminal, 13 G signal line input terminal, 14 B signal line input terminal, 15 address specifying scanning line input terminal, 16 address specifying signal line input terminal , 20 array substrate, 30 liquid crystal display device.

Claims (5)

基板上に平行に配設された複数の走査線と、該走査線と直交するように配設された複数の信号線を有する液晶表示装置において、
前記走査線を第1の所定ピッチ毎に集約する複数の検査用走査線入力端子と、
前記信号線を第2の所定ピッチ毎に集約する複数の検査用信号線入力端子と、
前記走査線を前記第1の所定ピッチよりも間隔が広い第3の所定ピッチ毎に集約するアドレス特定用走査線入力端子と、
前記信号線を前記第2の所定ピッチよりも間隔が広い第4の所定ピッチ毎に集約するアドレス特定用信号線入力端子と、を備える液晶表示装置。
In a liquid crystal display device having a plurality of scanning lines arranged in parallel on a substrate and a plurality of signal lines arranged to be orthogonal to the scanning lines,
A plurality of inspection scanning line input terminals that aggregate the scanning lines at a first predetermined pitch;
A plurality of inspection signal line input terminals that aggregate the signal lines at every second predetermined pitch;
An address specifying scan line input terminal that aggregates the scan lines at every third predetermined pitch that is wider than the first predetermined pitch;
A liquid crystal display device comprising: an address specifying signal line input terminal that aggregates the signal lines at every fourth predetermined pitch that is wider than the second predetermined pitch.
前記複数の検査用走査線入力端子は、
奇数番目の前記走査線を集約する第1の検査用走査線入力端子と、
偶数番目の前記走査線を集約する第2の検査用走査線入力端子と、を備え、
前記複数の検査用信号線入力端子は、
R信号の前記信号線を集約する第1の検査用信号線入力端子と、
G信号の前記信号線を集約する第2の検査用信号線入力端子と、
B信号の前記信号線を集約する第3の検査用信号線入力端子と、を備え、
前記アドレス特定用走査線入力端子は、所定数毎の前記奇数番目の走査線または前記偶数番目の走査線を集約し、
前記アドレス特定用信号線入力端子は、所定数毎の前記R信号の信号線、前記G信号の信号線または前記B信号の信号線を集約する請求項1に記載の液晶表示装置。
The plurality of inspection scanning line input terminals are:
A first inspection scanning line input terminal for collecting the odd-numbered scanning lines;
A second inspection scanning line input terminal that aggregates the even-numbered scanning lines, and
The plurality of inspection signal line input terminals are:
A first inspection signal line input terminal that aggregates the signal lines of the R signal;
A second inspection signal line input terminal that aggregates the signal lines of the G signal;
A third inspection signal line input terminal that aggregates the signal lines of the B signal,
The address specifying scanning line input terminal aggregates the odd numbered scanning lines or the even numbered scanning lines every predetermined number,
2. The liquid crystal display device according to claim 1, wherein the address specifying signal line input terminal aggregates a predetermined number of signal lines of the R signal, signal lines of the G signal, or signal lines of the B signal.
前記検査用走査線入力端子と前記アドレス特定用走査線入力端子、および前記検査用信号線入力端子と前記アドレス特定用信号線入力端子に異なるタイミングの信号を入力する請求項1または2に記載の液晶表示装置。   The signal at different timings is input to the inspection scanning line input terminal and the address specifying scanning line input terminal, and to the inspection signal line input terminal and the address specifying signal line input terminal. Liquid crystal display device. 前記検査用信号線入力端子と前記アドレス特定用信号線入力端子に異なる電圧を印加する請求項1から3のいずれかに記載の液晶表示装置。   4. The liquid crystal display device according to claim 1, wherein different voltages are applied to the inspection signal line input terminal and the address specifying signal line input terminal. 請求項1から4のいずれかに記載の液晶表示装置を検査する検査方法において、
前記検査用走査線入力端子、前記検査用信号線入力端子、前記アドレス特定用走査線入力端子と前記アドレス特定用信号線入力端子に検査用信号を入力し、前記液晶表示装置を表示させる第1のステップと、
前記アドレス特定用走査線入力端子と前記アドレス特定用信号線入力端子にアドレス特定用信号を入力し、前記液晶表示装置に格子状のパターンを表示させる第2のステップと、を備え、
前記第1のステップにおいて欠陥した画素部があったとき、前記第2のステップにおける前記格子状のパターンとの距離から前記欠陥した画素部のアドレスを特定することが可能な液晶表示装置を検査する検査方法。
In the test | inspection method which test | inspects the liquid crystal display device in any one of Claim 1 to 4,
A test signal is input to the test scanning line input terminal, the test signal line input terminal, the address specifying scan line input terminal, and the address specifying signal line input terminal to display the liquid crystal display device. And the steps
A second step of inputting an address specifying signal to the address specifying scanning line input terminal and the address specifying signal line input terminal and causing the liquid crystal display device to display a grid pattern;
When there is a defective pixel portion in the first step, a liquid crystal display device capable of specifying the address of the defective pixel portion from the distance from the lattice pattern in the second step is inspected Inspection method.
JP2007174811A 2007-07-03 2007-07-03 Liquid crystal display device and inspection method of inspecting the same Pending JP2009014883A (en)

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