JP2008518355A5 - - Google Patents

Download PDF

Info

Publication number
JP2008518355A5
JP2008518355A5 JP2007538925A JP2007538925A JP2008518355A5 JP 2008518355 A5 JP2008518355 A5 JP 2008518355A5 JP 2007538925 A JP2007538925 A JP 2007538925A JP 2007538925 A JP2007538925 A JP 2007538925A JP 2008518355 A5 JP2008518355 A5 JP 2008518355A5
Authority
JP
Japan
Prior art keywords
code
processor
generated
computer program
multiprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007538925A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008518355A (ja
JP5072599B2 (ja
Filing date
Publication date
Priority claimed from US10/976,264 external-priority patent/US20060095898A1/en
Application filed filed Critical
Publication of JP2008518355A publication Critical patent/JP2008518355A/ja
Publication of JP2008518355A5 publication Critical patent/JP2008518355A5/ja
Application granted granted Critical
Publication of JP5072599B2 publication Critical patent/JP5072599B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2007538925A 2004-10-28 2005-09-23 異種混合アーキテクチャからの複数のオブジェクトファイルを一組のファイルに統合する方法 Expired - Fee Related JP5072599B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/976,264 US20060095898A1 (en) 2004-10-28 2004-10-28 Method for integrating multiple object files from heterogeneous architectures into a set of files
US10/976,264 2004-10-28
PCT/US2005/034460 WO2006049740A2 (en) 2004-10-28 2005-09-23 Method for integrating multiple object files from heterogeneous architectures into a set of files

Publications (3)

Publication Number Publication Date
JP2008518355A JP2008518355A (ja) 2008-05-29
JP2008518355A5 true JP2008518355A5 (enExample) 2008-11-20
JP5072599B2 JP5072599B2 (ja) 2012-11-14

Family

ID=36178031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007538925A Expired - Fee Related JP5072599B2 (ja) 2004-10-28 2005-09-23 異種混合アーキテクチャからの複数のオブジェクトファイルを一組のファイルに統合する方法

Country Status (6)

Country Link
US (1) US20060095898A1 (enExample)
EP (1) EP1815329A2 (enExample)
JP (1) JP5072599B2 (enExample)
KR (1) KR100892191B1 (enExample)
CN (1) CN101048734A (enExample)
WO (1) WO2006049740A2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7644402B1 (en) * 2004-03-17 2010-01-05 Sun Microsystems, Inc. Method for sharing runtime representation of software components across component loaders
US8120610B1 (en) * 2006-03-15 2012-02-21 Adobe Systems Incorporated Methods and apparatus for using aliases to display logic
EP2140350B1 (en) * 2007-03-23 2017-04-05 Qualcomm Incorporated Distributed processing method and computer program product
EP2336883B1 (en) * 2008-09-09 2018-03-07 NEC Corporation Programming system in multi-core environment, and method and program of the same
KR100968774B1 (ko) * 2008-09-18 2010-07-09 고려대학교 산학협력단 다수의 이종 프로세서를 구비하는 멀티 프로세싱 시스템 및그 구동 방법
US20110113409A1 (en) * 2009-11-10 2011-05-12 Rodrick Evans Symbol capabilities support within elf
US9235458B2 (en) 2011-01-06 2016-01-12 International Business Machines Corporation Methods and systems for delegating work objects across a mixed computer environment
US9052968B2 (en) * 2011-01-17 2015-06-09 International Business Machines Corporation Methods and systems for linking objects across a mixed computer environment
US9104504B2 (en) 2013-03-13 2015-08-11 Dell Products Lp Systems and methods for embedded shared libraries in an executable image
US9753710B2 (en) * 2013-11-07 2017-09-05 Netronome Systems, Inc. Resource allocation with hierarchical scope

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3051438B2 (ja) * 1989-10-12 2000-06-12 テキサス インスツルメンツ インコーポレイテッド 拡張グラフィック機能を与える方法
US5247678A (en) * 1989-10-12 1993-09-21 Texas Instruments Incorporated Load time linker for software used with a multiprocessor system
GB2272085A (en) * 1992-10-30 1994-05-04 Tao Systems Ltd Data processing system and operating system.
US6029000A (en) * 1997-12-22 2000-02-22 Texas Instruments Incorporated Mobile communication system with cross compiler and cross linker
CA2343437A1 (en) * 2001-04-06 2002-10-06 Ibm Canada Limited-Ibm Canada Limitee Method and system for cross platform, parallel processing
US7162543B2 (en) * 2001-06-06 2007-01-09 Sap Ag Process for synchronizing data between remotely located devices and a central computer system
US7444632B2 (en) * 2003-09-25 2008-10-28 International Business Machines Corporation Balancing computational load across a plurality of processors
US7415703B2 (en) * 2003-09-25 2008-08-19 International Business Machines Corporation Loading software on a plurality of processors
US20060031821A1 (en) * 2004-08-04 2006-02-09 Rutter Budd J Ii Divided compiling program application functionality for software development

Similar Documents

Publication Publication Date Title
JP6020091B2 (ja) 演算処理装置の制御プログラム、演算処理装置の制御方法および演算処理装置
JP2019533854A5 (enExample)
JP2014513373A5 (enExample)
JP2015507310A5 (enExample)
JP2011123917A5 (enExample)
JP2011530768A5 (enExample)
JP2005508043A5 (enExample)
JP2015537298A5 (enExample)
JP6604689B2 (ja) ディペンデンシーを整理し、リビルディングするシステム及び方法
JP2010204979A5 (ja) コンパイル方法
US20150293698A1 (en) Montgomery modular multiplication-based data processing method
JP2008518355A5 (enExample)
CN108139903B (zh) 依dmb操作用加载/存储操作实施加载撷取/存储释放指令
JPWO2021038842A5 (enExample)
JP2005522772A5 (enExample)
JP6251158B2 (ja) プログラム変換システム
KR100892191B1 (ko) 이종 구조로부터 다수의 오브젝트 파일을 한 세트의 파일로통합하는 방법
JP2020502687A5 (enExample)
JP2017509997A5 (enExample)
JP6254352B2 (ja) ループのプロローグまたはエピローグの無効演算を処理する装置及び方法
US20140013312A1 (en) Source level debugging apparatus and method for a reconfigurable processor
JPWO2021009797A5 (ja) 高位合成装置、高位合成方法及びプログラム
JP5292831B2 (ja) プログラマブルコントローラ
KR102025694B1 (ko) 재구성 가능한 프로세서의 검증 방법
JP7324027B2 (ja) プロファイリング方法