JP2008508747A - ローカル・パリティを伴うdcバランス6b/8b送信コード - Google Patents
ローカル・パリティを伴うdcバランス6b/8b送信コード Download PDFInfo
- Publication number
- JP2008508747A JP2008508747A JP2007509443A JP2007509443A JP2008508747A JP 2008508747 A JP2008508747 A JP 2008508747A JP 2007509443 A JP2007509443 A JP 2007509443A JP 2007509443 A JP2007509443 A JP 2007509443A JP 2008508747 A JP2008508747 A JP 2008508747A
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Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
- H03M5/145—Conversion to or from block codes or representations thereof
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
- H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/799,054 US6876315B1 (en) | 2004-03-12 | 2004-03-12 | DC-balanced 6B/8B transmission code with local parity |
| PCT/US2004/018619 WO2005096506A1 (en) | 2004-03-12 | 2004-06-10 | Dc-balanced 6b/8b transmission code with local parity |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008508747A true JP2008508747A (ja) | 2008-03-21 |
| JP2008508747A5 JP2008508747A5 (enExample) | 2009-06-18 |
Family
ID=34377790
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007509443A Pending JP2008508747A (ja) | 2004-03-12 | 2004-06-10 | ローカル・パリティを伴うdcバランス6b/8b送信コード |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6876315B1 (enExample) |
| EP (1) | EP1723724A1 (enExample) |
| JP (1) | JP2008508747A (enExample) |
| KR (1) | KR20060129398A (enExample) |
| CN (1) | CN101076945A (enExample) |
| WO (1) | WO2005096506A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2025511622A (ja) * | 2022-09-27 | 2025-04-16 | イノヴァ セミコンダクトルズ ゲーエムベーハー | 制限されたディスパリティを有する効率的に伝送可能なビット列 |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6459331B1 (en) | 1997-09-02 | 2002-10-01 | Kabushiki Kaisha Toshiba | Noise suppression circuit, ASIC, navigation apparatus communication circuit, and communication apparatus having the same |
| JP4351156B2 (ja) * | 2002-06-20 | 2009-10-28 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Dc制御のためのバランスがとられたディスパリティチャネルコード |
| US7307554B2 (en) * | 2004-12-20 | 2007-12-11 | Kawasaki Microelectronics, Inc. | Parallel data transmission method and parallel data transmission system |
| US7292161B2 (en) * | 2005-05-31 | 2007-11-06 | International Business Machines Corporation | NB/MB coding apparatus and method using both disparity independent and disparity dependent encoded vectors |
| US7327293B2 (en) * | 2006-03-03 | 2008-02-05 | Honeywell International Inc. | Compression and data encoding for transmission over a character-based protocol |
| AU2006204634B2 (en) * | 2006-08-31 | 2009-10-29 | Canon Kabushiki Kaisha | Runlength encoding of leading ones and zeros |
| US7405679B1 (en) | 2007-01-30 | 2008-07-29 | International Business Machines Corporation | Techniques for 9B10B and 7B8B coding and decoding |
| AU2007214319A1 (en) * | 2007-08-30 | 2009-03-19 | Canon Kabushiki Kaisha | Improvements for Spatial Wyner Ziv Coding |
| DE102007053811A1 (de) * | 2007-11-12 | 2009-05-14 | Robert Bosch Gmbh | Verfahren zum Übertragen von Daten |
| WO2009104154A1 (en) * | 2008-02-19 | 2009-08-27 | Nxp B.V. | Modified coding with an additional control symbol |
| US8228911B2 (en) | 2008-09-19 | 2012-07-24 | Honeywell International Inc. | Enhanced data link communication over iridium |
| EP2239852A1 (en) * | 2009-04-09 | 2010-10-13 | Thomson Licensing | Method and device for encoding an input bit sequence and corresponding decoding method and device |
| JP2012525627A (ja) | 2009-04-29 | 2012-10-22 | ヒューレット−パッカード デベロップメント カンパニー エル.ピー. | 光学メモリ拡張 |
| JP5657242B2 (ja) * | 2009-12-09 | 2015-01-21 | 株式会社東芝 | 半導体装置及びメモリシステム |
| US9513907B2 (en) * | 2013-08-06 | 2016-12-06 | Intel Corporation | Methods, apparatus, instructions and logic to provide vector population count functionality |
| US9495155B2 (en) | 2013-08-06 | 2016-11-15 | Intel Corporation | Methods, apparatus, instructions and logic to provide population count functionality for genome sequencing and alignment |
| US9197368B2 (en) * | 2013-09-24 | 2015-11-24 | Broadcom Corporation | Inband management of ethernet links |
| US9270411B2 (en) * | 2014-02-03 | 2016-02-23 | Valens Semiconductor Ltd. | Indicating end of idle sequence by replacing certain code words with alternative code words |
| US9270403B2 (en) * | 2014-02-03 | 2016-02-23 | Valens Semiconductor Ltd. | Indicating end of idle sequence by replacing expected code words while maintaining running disparity |
| US9154156B2 (en) * | 2014-02-25 | 2015-10-06 | Qualcomm Incorporated | Ternary line code design for controlled decision feedback equalizer error propagation |
| CN111178008A (zh) * | 2019-12-19 | 2020-05-19 | 清华大学 | 一种面向数字字符的数据编码方法、解析方法及系统 |
| CN112838868B (zh) * | 2020-12-30 | 2022-09-09 | 天津瑞发科半导体技术有限公司 | 一种9b/10b编解码方法 |
| CN114598579B (zh) * | 2022-03-03 | 2023-07-07 | 天津瑞发科半导体技术有限公司 | 一种适用于低通和带通信道的9b/10b编解码方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4486739A (en) * | 1982-06-30 | 1984-12-04 | International Business Machines Corporation | Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code |
| US5304996A (en) * | 1992-02-21 | 1994-04-19 | Advanced Micro Devices, Inc. | 8B/10B encoder providing one of pair of noncomplementary, opposite disparity codes responsive to running disparity and selected commands |
| US5387911A (en) * | 1992-02-21 | 1995-02-07 | Gleichert; Marc C. | Method and apparatus for transmitting and receiving both 8B/10B code and 10B/12B code in a switchable 8B/10B transmitter and receiver |
| JP3541439B2 (ja) * | 1994-07-08 | 2004-07-14 | ソニー株式会社 | 信号変調方法及び装置、並びに信号復調装置及び方法 |
| US5784387A (en) | 1994-10-31 | 1998-07-21 | International Business Machines Corporation | Method for detecting start-of-frame, end of frame and idle words in a data stream |
| US5606317A (en) * | 1994-12-09 | 1997-02-25 | Lucent Technologies Inc. | Bandwidth efficiency MBNB coding and decoding method and apparatus |
| US5699062A (en) | 1995-02-01 | 1997-12-16 | International Business Machines Corporation | Transmission code having local parity |
| CN1150871A (zh) * | 1995-04-12 | 1997-05-28 | 株式会社东芝 | 代码变换和译码装置及方法以及记录媒体 |
-
2004
- 2004-03-12 US US10/799,054 patent/US6876315B1/en not_active Expired - Fee Related
- 2004-06-10 KR KR1020067016736A patent/KR20060129398A/ko not_active Ceased
- 2004-06-10 JP JP2007509443A patent/JP2008508747A/ja active Pending
- 2004-06-10 CN CNA2004800423744A patent/CN101076945A/zh active Pending
- 2004-06-10 EP EP04755021A patent/EP1723724A1/en not_active Withdrawn
- 2004-06-10 WO PCT/US2004/018619 patent/WO2005096506A1/en not_active Ceased
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2025511622A (ja) * | 2022-09-27 | 2025-04-16 | イノヴァ セミコンダクトルズ ゲーエムベーハー | 制限されたディスパリティを有する効率的に伝送可能なビット列 |
| JP2025513950A (ja) * | 2022-09-27 | 2025-05-01 | イノヴァ セミコンダクトルズ ゲーエムベーハー | 制限されたディスパリティを有する効率的に伝送可能なビット列 |
| JP7758891B2 (ja) | 2022-09-27 | 2025-10-22 | イノヴァ セミコンダクトルズ ゲーエムベーハー | 制限されたディスパリティを有する効率的に伝送可能なビット列 |
| JP7778962B2 (ja) | 2022-09-27 | 2025-12-02 | イノヴァ セミコンダクトルズ ゲーエムベーハー | 制限されたディスパリティを有する効率的に伝送可能なビット列 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20060129398A (ko) | 2006-12-15 |
| CN101076945A (zh) | 2007-11-21 |
| EP1723724A1 (en) | 2006-11-22 |
| US6876315B1 (en) | 2005-04-05 |
| WO2005096506A1 (en) | 2005-10-13 |
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Legal Events
| Date | Code | Title | Description |
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Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090424 |
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| A871 | Explanation of circumstances concerning accelerated examination |
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