JP2008311996A - Signal output device, and communication driver device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a signal output device capable of preventing a communication driver from being carelessly made into an active state when supply voltage of at least one of a plurality of signal input sources fluctuates. <P>SOLUTION: The signal output device is constituted so that, when signals input by two microcomputers are output to a driver 1 for communication by logical OR conditions of negative logic via an AND gate 4, output of the AND gate 4 to the driver 1 for communication maintains an inactive level even if supply of the side of a power source VCC2 is shielded from a state that a power source VCC1 is supplied to one of the two microcomputers and the power source VCC2 is supplied to the other of the two microcomputers. Specifically, a NOT gate 12 to which the power source VCC2 is supplied to operate and a NOT gate 13 to which the power source VCC1 is supplied to operate are connected in series and an input terminal of the NOT gate 13 is pulled down by a resistance element 14. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention includes a signal output device that outputs signals input from a plurality of signal output sources under a logical sum condition to a communication driver that changes the level of a signal line, and the communication driver and the signal output device. The present invention relates to a communication driver device.

  For example, in an in-vehicle LAN that is a communication network for vehicles, a driver for driving the level of a signal line to a level according to a communication standard is used. In that case, in a case where a plurality of microcomputers are mounted in an ECU (Electronic Control Unit) which is one of the communication nodes, a signal output from each microcomputer can be output to the network via one communication driver. It is preferable to configure.

  FIG. 12 shows an example of a network configuration in the case of using CAN which is a kind of in-vehicle LAN. The CAN bus includes two signal lines 101 (CAN_High) and 102 (CAN_Low), and both ends of these signal lines 101 and 102 are terminated by 120Ω termination resistors 103 and 104, respectively. A plurality of ECUs 105 (1,..., N−1, n) are connected to the signal lines 101 and 102.

  The ECU 105 includes a CAN controller 106, a CAN transceiver 107, a protection circuit 108, and the like. The CAN controller 106 is a part that performs communication control, performs serial / parallel conversion of data with a microcomputer (not shown) on the ECU, and transmits / receives serial communication data to / from the CAN transceiver 107. The CAN transceiver 107 is connected to the signal lines 101 and 102, and drives the signal lines 101 and 102 according to transmission data TXD input from the CAN controller 106, or the signal lines 101 and 102 driven by another ECU 105. More data is received, and the received data RXD is output to the CAN controller 106. The protection circuit 108 performs a protection operation of the CAN transceiver IC against application of the 101, 102 overvoltage, external surge (static electricity), and the like.

FIG. 13 shows the configuration of the driver portion of the CAN transceiver 107 when it is assumed that a plurality of microcomputers are mounted on the ECU 105 in the communication network as described above. The communication driver 1 has a low active configuration, and signals output from two signal output sources are given to the input terminal of the communication driver 1 via the buffers 2 and 3 and the AND gate (negative OR) 4. It has been. Here, it is assumed that the power supplied to two signal output sources (for example, microcomputers) is a separate system. On the input signal (1) side, the power supply VCC1 common to the communication driver 1 is supplied, and the power supply for operation of the buffer 2 is also the power supply VCC1. The input terminal of the buffer 2 is pulled up to the power source VCC1 by the resistance element 5.
On the other hand, the input signal (2) side is supplied with a power supply VCC2 different from that of the communication driver 1, and the operation power supply for the buffer 3 is also the power supply VCC2. The input terminal of the buffer 3 is pulled up to the power source VCC2 by the resistance element 6. The above constitutes the communication driver device 7.

Patent Document 1 discloses a technique related to a communication device for an in-vehicle LAN, but it does not assume the above-described configuration and is not related to a technical problem.
JP 2001-515814 A

  However, in the configuration shown in FIG. 13, the power supply VCC2 side is supplied via, for example, an ignition switch of the vehicle. When the ignition switch is turned off and the power supply is cut off, the output level of the buffer 3 goes low. Become. Then, as a result of outputting a low level signal to the input terminal of the communication driver 1 via the AND gate 4, there is a problem that the communication signal lines 101 and 102 are driven.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to inadvertently activate a communication driver when at least one power supply voltage of a plurality of signal input sources fluctuates. It is an object to provide a signal output device capable of preventing the signal and a communication driver device including the signal output device.

  According to the signal output device of claim 1, when signals input by a plurality of signal output sources are output to the communication driver under a logical sum condition, at least one of them is the communication driver. A power supply (specific power supply) of a different system from the supplied power supply is supplied. The output level maintaining means operates so that the output of the logical sum condition for the communication driver maintains the inactive level when the voltage of the specific power supply fluctuates beyond the normal range. Therefore, the signal output source does not intentionally change the signal level, and it is possible to prevent the logical sum condition output from being inadvertently actively changed based on the change in the specific power source.

According to the signal output device of the second aspect, the output level maintaining means operates by being supplied with the specific power, and is supplied with the first NOT gate to which the signal from the specific signal output source is input and the driver power. A second NOT gate that operates and receives an output signal from the first NOT gate, and a resistance element that pulls down the input terminal of the second NOT gate. In this case, the communication driver assumes a low active configuration.
That is, since the two NOT gates are connected in series, the signal signaled from the specific signal output source is applied to the OR input in phase. For example, even if the supply of the specific power supply is cut off, the first NOT gate whose input terminal is pulled down outputs a high level signal to the logical sum input, so that it is possible to prevent the logical sum condition output from changing actively. .

  According to the signal output device of the third aspect, the control means operates when the driver power supply is supplied and monitors the voltage level of the specific power supply. When the voltage level falls below a predetermined threshold value, the control means The normally open switch means inserted between the power source and the specific power source is made conductive. Therefore, for example, even if the supply of the specific power supply is cut off, the driver power supply is supplied to the buffer to which the signal from the specific signal output source is input via the switch means. Can be maintained at a level.

  According to the signal output device of the fourth aspect, the output level maintaining means operates by being supplied with the specific power, and receives the signal output from the specific signal output source, the driver power supply, and the specific power supply. And a rectifying element inserted between them. Therefore, for example, even if the supply of the specific power supply is cut off, the driver power supply is supplied to the buffer to which the signal from the specific signal output source is input via the rectifier element. Can be maintained at a level.

  According to a fifth aspect of the present invention, the signal output device according to any one of the first to fourth aspects includes the signal output device according to any one of the first to fourth aspects and a communication driver, which are formed on an SOI substrate and insulated by a trench isolation structure. . With this configuration, it is possible to prevent the occurrence of latch-up due to the action of the parasitic element as in the case where PN junction isolation is used.

  According to the signal output device according to claim 6, since a plurality of signal output devices are provided and a plurality of communication drivers are provided corresponding to the signal output devices, the same substrate can be obtained by adopting the trench isolation structure on the SOI substrate. Even when a plurality of communication drivers are mounted on top, it is possible to satisfactorily ensure an insulation state between them.

(First embodiment)
A first embodiment of the present invention will be described below with reference to FIG. Note that the same parts as those in FIG. The communication driver device 11 according to the present embodiment replaces the buffer 3 having the configuration shown in FIG. 13 with a NOT gate 12 (first NOT gate, output level maintaining means), and between the NOT gate 12 and the AND gate 4. One NOT gate 13 (second NOT gate, output level maintaining means) is inserted. The arrangement of the inputs (1) and (2) is upside down from FIG.

  A power supply VCC1 (driver power supply) is supplied to the NOT gate 13, and an input terminal of the NOT gate 13 is pulled down by a resistance element 14 (output level maintaining means). In the above configuration, the communication driver device 11 excluding the communication driver 1 corresponds to the signal output device 15.

  Next, the operation of this embodiment will be described. In the communication driver device 11, even when the power supply VCC2 (specific power supply) is cut off, the input terminal of the NOT gate 13 is set to the ground level by the pull-down resistor 14, so that a high level is output to the AND gate 4. Accordingly, the output of the low level signal to the communication driver 1 via the AND gate 4 is prevented.

  As described above, according to this embodiment, when the signals input from the two microcomputers are output to the communication driver 1 through the AND gate 4 under the negative logical OR condition, One is supplied with the power supply VCC1, and the other is supplied with the power supply VCC2, and even if the supply on the power supply VCC2 side is cut off, the output of the AND gate 4 with respect to the communication driver 1 becomes inactive level. I tried to keep it. Specifically, a NOT gate 12 that operates with power supply VCC2 and a NOT gate 13 that operates with power supply VCC1 are connected in series, and the input terminal of the NOT gate 13 is pulled down by the resistor element 14. I made it. Therefore, the signal level is not intentionally changed by the microcomputer that is the specific signal output source, and it is possible to prevent the logical sum condition output from being inadvertently changed actively based on the fluctuation of the power supply VCC2.

(Second embodiment)
2 and 3 show a second embodiment of the present invention. The same parts as those in the first embodiment are denoted by the same reference numerals and the description thereof will be omitted. Hereinafter, different parts will be described. In the second embodiment, the communication driver is specifically shown as a configuration conforming to CAN, which is a kind of in-vehicle LAN, and the configuration of the signal output device 15 is the same as that of the first embodiment.

  The output terminal of the AND gate 4 is connected to the gates of a P-channel MOSFET 19 and an N-channel MOSFET 20 via a buffer 17 and a NOT gate 18 constituting the communication driver 16, respectively. The source of the FET 19 is connected to the power supply VCC1, the source of the FET 20 is connected to the ground, and the drain of the FET 19 is connected to the drain of the FET 20 through a series circuit of the resistance elements 21 to 24.

  A reference voltage Vref is supplied from a reference power supply 25 to a common connection point between the resistance elements 22 and 23. The common connection point of the resistance elements 21 and 22 and the common connection point of the resistance elements 23 and 24 are output terminals of the communication driver 16 and are connected to CAN_High and CAN_Low, which are CAN communication signal lines, respectively.

  Next, the operation of the second embodiment will be described. When the output terminal of the AND gate 4 is at a high level, the communication driver 16 is in an inactive state. At this time, since the FETs 19 and 20 are both OFF, the potentials of the output terminals are both the reference voltage Vref, and no potential difference is generated between them (0 V). Therefore, the communication signal line becomes “recessive level”.

On the other hand, when any one of the input terminals of the signal output device 15 becomes low level, and the output terminal of the AND gate 4 becomes low level, the communication driver 16 becomes active. At this time, since the FETs 19 and 20 are both ON, a current flows through the series circuit of the resistance elements 21 to 24, and a potential difference corresponding to the resistance value of the resistance elements 22 and 23 is generated between the two output terminals. . Therefore, the communication signal line becomes “dominant level”. The dominant voltage in the CAN high speed standard (ISO11898) is in the range of 1.5V to 3.5V. FIG. 3 shows a voltage change when the potential difference between the signal lines changes between the recessive level and the dominant level as described above.
As described above, according to the second embodiment, the present invention can be applied to the communication driver 16 configured in conformity with CAN.

(Third embodiment)
FIG. 4 shows a third embodiment of the present invention, and only parts different from the first embodiment will be described. The configuration of the third embodiment is an extension of the configuration of the first embodiment so as to correspond to the case where the signal output source is “3” or more. That is, the input (2) on the power supply VCC2 side is n inputs (2_1),..., (2_n), and the AND gate 4 is replaced with the (n + 1) input AND gate 26 accordingly. . The signal input / output device 27 is configured as described above.
According to the third embodiment configured as described above, it is possible to cope with a case where the signal output source is “3” or more.

(Fourth embodiment)
FIG. 5 shows a fourth embodiment of the present invention. In the fourth embodiment, the NOT gate 13 is constituted by a series circuit of a P-channel MOSFET 27 and a resistance element 28 connected between the power source VCC1 and the ground, and a common connection point between them (source of the FET 27). Is connected to the input terminal of the AND gate 4.
With such a configuration, when the level of the input (2) is high, the FET 27 is turned on to turn the input terminal of the AND gate 4 to the high level, and when the level of the input (2) is low, the FET 27 is turned off. As a result, the input terminal of the AND gate 4 becomes low level.

(5th Example)
FIG. 6 shows a fifth embodiment of the present invention. In the fifth embodiment, the NOT gate 13 is constituted by a series circuit of a resistance element 29 and an NPN transistor 30 connected between the power source VCC1 and the ground, and a common connection point between them (the collector of the transistor 30). ) Is connected to the input terminal of the AND gate 4.
With such a configuration, when the level of the input (2) is high, the transistor 30 is turned off, so that the input terminal of the AND gate 4 becomes high level. When the level of the input (2) becomes low, the transistor 30 When turned ON, the input terminal of the AND gate 4 becomes low level.

(Sixth embodiment)
FIG. 7 shows a sixth embodiment of the present invention. In the sixth embodiment, the configuration excluding the communication driver 1 in the first embodiment is configured by a bipolar transistor. The buffer 2 is composed of a comparator 31 and a reference power source 32, and the NOT gate 12 is composed of a comparator 33 and a reference power source 34. The NOT gate 13 has the same configuration as that of the fifth embodiment, and the AND gate 4 includes a series circuit of a differential pair 37 including a current source 35, a resistance element 36 and an NPN transistor, and a series circuit of a resistance element 38 and an NPN transistor 39. It consists of and.

One of the bases of the transistors constituting the differential pair 37 is connected to the output terminal of the comparator 31, and the other is connected to the collector of the transistor 30. The series circuit of the resistor element 38 and the transistor 39 is connected between the power supply VCC1 and the ground, and the base of the transistor 39 is connected to the collector of the transistor of the differential pair 37. The collector of the transistor 39 is connected to the input terminal of the communication driver 1.
As described above, according to the sixth embodiment, the signal output device 15 can be constituted by a bipolar element.

(Seventh embodiment)
FIG. 8 shows a seventh embodiment of the present invention, and only parts different from the configuration of FIG. 13 will be described. In the configuration of the seventh embodiment, the input (2) side is connected to the input terminal of the AND gate 4 through the same buffer 3 as in the conventional configuration. A diode (rectifier element) 40 is connected between the power supply VCC1 and the power supply VCC2. The signal output device 41 is configured as described above.
According to the seventh embodiment configured as described above, even when the supply of the power supply VCC2 is cut off, the power supply VCC1 is supplied to the input (2) side via the diode 40. While operating, its input terminal also maintains the pull-up state. Therefore, a low level signal is not output to the input terminal of the AND gate 4, and the signal output to the communication driver 1 can be maintained at the inactive level.

(Eighth embodiment)
FIG. 9 shows an eighth embodiment of the present invention, and only differences from the seventh embodiment will be described. In the eighth embodiment, a normally open type switch circuit (switch means) 42 is arranged in place of the diode 40. The CPU (control means) 43 operates by being supplied with the power supply VCC1, and monitors the voltage level of the power supply VCC2 and controls the opening and closing of the switch circuit 42. The above constitutes the signal output device 44. Note that the switch circuit 42 is constituted by an analog switch, for example. The CPU 43 may be a CPU of a microcomputer that transmits communication data via the buffer 3.

  Next, the operation of the eighth embodiment will be described. During operation, the CPU 43 monitors the voltage level of the power supply VCC2 through, for example, a comparator. Then, when the CPU 43 detects that the supply of the power source VCC2 is cut off and the voltage level drops and falls below a predetermined threshold value, the switch circuit 42 is controlled to close. Then, since the power supply VCC1 is supplied to the buffer 2 via the switch circuit 42, the pull-up state of the input terminal is maintained. Therefore, a low level signal is not output to the input terminal of the AND gate 4, and the signal output to the communication driver 1 can be maintained at the inactive level.

(Ninth embodiment)
10 and 11 show a ninth embodiment of the present invention. FIG. 10A is a schematic cross-sectional view of a semiconductor structure showing a case where the communication driver device 11 in the first embodiment is configured on a semiconductor substrate, for example. Each circuit element constituting the communication driver device 11 is formed on an SOI (Silicon On Insulator) substrate 52 having a buried oxide film (SiO ₂ ) 51. Then, for example, a CMOSFET is formed in the trench-isolated region by burying an oxide film material (insulating film material) 54 inside the trench 53 reaching the buried oxide film 51.

For example, when the PN junction isolation structure is employed as shown in FIG. 10B, a latch-up in which a current flows from the PMOS side to the NMOS side via the parasitic element may occur, and a through current may flow. On the other hand, if the configuration shown in FIG. 10A is employed, the occurrence of latch-up is avoided because there are no parasitic elements between the elements.
As described above, according to the ninth embodiment, the communication driver device 11 is formed on the SOI substrate 52 and insulated and isolated by the trench isolation structure. Therefore, the operation of the parasitic element is performed as in the case of using PN junction isolation. It is possible to prevent latch-up from occurring.

(Tenth embodiment)
FIG. 11 shows a tenth embodiment of the present invention. The tenth embodiment shows a case where two communication drivers 16 (CAN drivers) are formed on one semiconductor chip 55 by adopting the structure shown in FIG. 10A of the ninth embodiment. Two sets of signal output devices 15 are also mounted corresponding to the communication driver 1. That is, since a good isolation state is ensured by adopting a trench isolation structure on the SOI substrate, even if two communication drivers 16 that handle relatively large power are formed, mutual interference of signals is avoided. Is done.

The present invention is not limited to the embodiments described above and shown in the drawings, and the following modifications or expansions are possible.
The communication driver is not limited to the low active configuration, but may be a high active configuration.
In the seventh embodiment, instead of the diode 40, a diode-connected transistor may be used as a rectifying element.
In the ninth embodiment, three or more communication drivers may be formed on one semiconductor chip.
The communication need not be limited to in-vehicle LAN.

The figure which is 1st Example of this invention and shows the structure of a communication driver apparatus. FIG. 1 equivalent view showing a second embodiment of the present invention. The figure explaining the drive level of the bus in CAN FIG. 1 equivalent view showing a third embodiment of the present invention. FIG. 1 equivalent view showing a fourth embodiment of the present invention. FIG. 1 equivalent view showing a fifth embodiment of the present invention. FIG. 1 equivalent view showing a sixth embodiment of the present invention. FIG. 1 equivalent view showing a seventh embodiment of the present invention FIG. 1 equivalent view showing an eighth embodiment of the present invention. FIG. 10 is a ninth embodiment of the present invention, in which (a) is a schematic sectional view of a semiconductor structure showing a case where a communication driver device is configured on a semiconductor substrate, and (b) is a schematic showing a case where a PN junction isolation structure is adopted. Sectional view Schematic plan view of a semiconductor chip according to a tenth embodiment of the present invention and showing a state in which two communication driver devices are configured on one semiconductor chip CAN network configuration diagram showing conventional technology 1 equivalent diagram

Explanation of symbols

  In the drawings, 1 is a communication driver, 11 is a communication driver device, 12 is a NOT gate (first NOT gate, output level maintaining means), 13 is a NOT gate (second NOT gate, output level maintaining means), and 14 is a resistance element (output) Level maintaining means), 15 is a signal output device, 16 is a communication driver, 27 is a signal input / output device, 40 is a diode (rectifier element), 41 is a signal output device, 42 is a switch circuit (switch means), and 43 is a CPU ( Control means), 44 is a signal output device, 52 is an SOI substrate, and 55 is a semiconductor chip.

Claims (6)

When the input signal becomes an active level, for a communication driver that changes the drive level of the signal line, in a signal output device that outputs signals input by a plurality of signal output sources under a logical sum condition,
At least one of the plurality of signal output sources is supplied with a power source (specific power source) different from the power source (driver power source) supplied to the communication driver (specific signal output source),
When the voltage of the specific power supply fluctuates beyond a normal range, output level maintaining means configured to maintain an inactive level for an output of the OR condition to the communication driver is provided. A signal output device. The output level maintaining means includes
A first NOT gate which is operated by being supplied with the specific power and to which a signal output from the specific signal output source is input;
A second NOT gate which is operated by being supplied with the power supply for the driver and to which a signal output from the first NOT gate is input;
2. The signal output device according to claim 1, wherein the signal output device is composed of a resistance element that pulls down an input terminal of the second NOT gate, and an output signal of the second NOT gate is one of OR inputs. The output level maintaining means includes
A buffer to which a signal output from the specific signal output source is input;
A normally-open switch means inserted between the driver power supply and the specific power supply;
Control means for monitoring the voltage level of the specific power supply and controlling the switch means to conduct when the voltage level falls below a predetermined threshold while operating with the power supply for the driver being supplied. The signal output device according to claim 1. The output level maintaining means includes
A buffer to which a signal output from the specific signal output source is input;
2. The signal output device according to claim 1, wherein the signal output device includes a power source for the driver and a rectifier element inserted between the specific power source. A signal output device according to any one of claims 1 to 4,
The communication driver,
These are formed on an SOI (Silicon On Insulator) substrate and insulated and separated by a trench isolation structure. A plurality of the signal output devices,
The communication driver device according to claim 5, comprising a plurality of the communication drivers corresponding to the signal output device.

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