JP2008311347A5 - - Google Patents

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Publication number
JP2008311347A5
JP2008311347A5 JP2007156303A JP2007156303A JP2008311347A5 JP 2008311347 A5 JP2008311347 A5 JP 2008311347A5 JP 2007156303 A JP2007156303 A JP 2007156303A JP 2007156303 A JP2007156303 A JP 2007156303A JP 2008311347 A5 JP2008311347 A5 JP 2008311347A5
Authority
JP
Japan
Prior art keywords
semiconductor chip
interposer
wiring pattern
tape substrate
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2007156303A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008311347A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2007156303A priority Critical patent/JP2008311347A/ja
Priority claimed from JP2007156303A external-priority patent/JP2008311347A/ja
Publication of JP2008311347A publication Critical patent/JP2008311347A/ja
Publication of JP2008311347A5 publication Critical patent/JP2008311347A5/ja
Withdrawn legal-status Critical Current

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JP2007156303A 2007-06-13 2007-06-13 半導体モジュール及びその製造方法 Withdrawn JP2008311347A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007156303A JP2008311347A (ja) 2007-06-13 2007-06-13 半導体モジュール及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007156303A JP2008311347A (ja) 2007-06-13 2007-06-13 半導体モジュール及びその製造方法

Publications (2)

Publication Number Publication Date
JP2008311347A JP2008311347A (ja) 2008-12-25
JP2008311347A5 true JP2008311347A5 (de) 2010-07-22

Family

ID=40238719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007156303A Withdrawn JP2008311347A (ja) 2007-06-13 2007-06-13 半導体モジュール及びその製造方法

Country Status (1)

Country Link
JP (1) JP2008311347A (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7989942B2 (en) * 2009-01-20 2011-08-02 Altera Corporation IC package with capacitors disposed on an interposal layer
JP6015144B2 (ja) 2012-06-04 2016-10-26 富士通株式会社 電子機器及び半導体装置

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