JP2008276371A - Memory controller, flash memory system with memory controller and control method for flash memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a flash memory controller, a flash memory system with the memory controller and a control method for a flash memory, allowing efficient discrimination of corresponding relationship between a logical page and a physical page, or corresponding relationship between a logical sector area and a physical sector area. <P>SOLUTION: Information for distinguishing the logical sector area corresponding to head data of a series of data and information for distinguishing the number of sectors of the data included in the series of the data are written in a redundant area corresponding to the physical sector area written with the series of the data, and the corresponding relationship between the logical sector area and the physical sector area is distinguished based on the information. Information for distinguishing the logical page corresponding to the head data of the series of the data and information for distinguishing the number of the pages from the logical page corresponding to the head data included in the series of the data to the logical page corresponding to the final data are written in the redundant area of the physical page written with the series of the data, and the corresponding relationship between the logical page and the physical page is distinguished based on the information. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a memory controller, a flash memory system including the memory controller, and a flash memory control method.

  Conventionally, the data given from the host system is flushed without fixing the correspondence between the logical page contained in the logical block and the physical page contained in the physical block between the logical block and the physical block in the correspondence relationship. A method of storing in a memory is known (for example, see Patent Document 1). In this storage method, if there is a physical page (empty page) in which data is not written in the physical block to be accessed, data given from the host system can be stored in the empty page in the physical block. Therefore, data corresponding to the same logical page can be written a plurality of times in the same physical block, so that data can be easily rewritten.

In the data storage method described above, a physical page (or physical sector area) that is a unit for writing and reading data, and a logical page (or a data corresponding to data stored in the physical page (or physical sector area)) The logical sector area) must be managed. In order to manage the correspondence between the physical page (or physical sector area) and the logical page (or logical sector area), in Patent Document 1, there is a correspondence relation to the redundant area of the physical page (or physical sector area). The logical page number (or logical sector number) assigned to the logical page (or logical sector area) is written.
When determining the correspondence between the logical page and the physical page (or the correspondence between the logical sector area and the physical sector area), it is based on the logical page number (or logical sector number) written in the redundant area. Thus, an address conversion table describing the correspondence between logical pages and physical pages (relation between logical sector areas and physical sector areas) is created. This address conversion table is created each time, for example, for a logical block to be accessed. It is also possible to create an address conversion table for all logical blocks at startup.
When this address conversion table is created each time, the access speed decreases depending on the creation time. Also, when creating an address translation table for all logical blocks at startup, not only the startup time is lengthened, but also a RAM (Random Access Memory) for holding the created address translation table is required. Cost increases.

  Further, the address conversion table may be stored in a rewritable non-volatile memory such as a ferroelectric memory instead of being created at the time of access or activation, but such a non-volatile memory is expensive. The cost is greatly increased.

In view of such circumstances, the present invention provides a flash memory controller and a flash memory system including the memory controller that can efficiently determine the correspondence between a logical page and a physical page or the correspondence between a logical sector area and a physical sector area. And a method for controlling a flash memory.
JP-A-2005-19736

  In order to achieve the above object, a first memory controller according to the present invention performs access to a flash memory that is erased in units of physical blocks including a plurality of physical sector areas based on an access instruction given from a host system. A memory controller for controlling, a block management means for managing a correspondence relationship between a logical block composed of a plurality of logical sector areas and the physical block; and a logical access designated as an access target area by the access instruction Logical access area determination means for determining the logical block to which the area belongs, the logical sector area corresponding to the head area of the logical access area belonging to the logical block, and the number of sectors of the logical access area belonging to the logical block; , The logical block to which the logical access area belongs Empty sector area search means for searching for the beginning of a physical sector area in which data in the physical block corresponding to the disk is not written, and a series of data instructed to be written to the logical access area by the access instruction Are sequentially written from the first physical sector area where the data detected by the empty sector area searching means is not written to the last physical sector area, and the series of data is written by the data writing means. In the redundant area corresponding to the physical sector area in which data is written, the logical sector area corresponding to the head area of the logical access area belonging to the logical block and the number of sectors in the logical access area belonging to the logical block are determined. Logical sector information writing means for writing information for It is characterized in.

In the first memory controller, in order to determine the logical sector area corresponding to the head area of the logical access area corresponding to the series of data in the redundant area corresponding to the physical sector area in which the series of data is written. Information and information for determining the number of sectors in the logical access area corresponding to this series of data are written. Therefore, based on this information, the logical sector area and the physical block included in the logical block are written. The correspondence with the included physical sector area can be easily grasped.
The first memory controller includes a physical sector area in the physical block in which one or a plurality of the series of data is written, and a logical sector area in the logical block corresponding to the physical block. Sector area management means for determining the correspondence relationship, the sector area management means is written by the logical sector information writing means from the redundant area corresponding to each physical sector area in which the head data of the series of data is written The information is read, and based on the read information, the correspondence between the physical sector area in the physical block and the logical sector area in the logical block corresponding to the physical block is determined. Preferably it is.

  By providing such a sector area management means, a logical sector area included in a logical block and a physical sector area included in a physical block in a series of data units based on information set for each series of data. The correspondence can be grasped.

  Further, the sector area management means includes a redundant area corresponding to a physical sector area in which head data of the series of data is written and a redundant area corresponding to a physical sector area in which tail data of the series of data is written. From the above, the information written by the logical sector information writing means is read, and when the information read from both redundant areas matches, it is determined that the series of data has been written normally. It is preferable to be configured.

  In this way, the sector area management means has a redundant area corresponding to the physical sector area where the head data of the series of data is written, and a redundant area corresponding to the physical sector area where the end data of the series of data is written. By comparing the information written in and determining that a series of data is written normally based on the comparison result, it is possible to easily detect a series of data not written normally. it can.

  A second memory controller according to the present invention is a memory controller that controls access to a flash memory that is erased in units of physical blocks including a plurality of physical pages, based on an access instruction given from a host system. A block management means for managing a correspondence relationship between a logical block composed of a plurality of logical pages and the physical block, and the logical block to which a logical access area designated as an access target area by the access instruction belongs, A logical page corresponding to the top area of the logical access area belonging to the logical block, and a number of pages from the logical page corresponding to the top area of the logical access area belonging to the logical block to the logical page corresponding to the end area. A logical access area discriminating means for discriminating; Free page search means for searching for the beginning of a physical page in which data in the physical block to which the access area belongs is not written, and a series of data instructed to be written to the logical access area by the access instruction, The data detected by the empty page search means is written sequentially from the first physical page to which the data is not written to the last physical page, and the series of data is written by the data writing means. In the redundant area corresponding to the physical page, the logical page corresponding to the top area of the logical access area belonging to the logical block, and the logical page corresponding to the top area of the logical access area included in the logical block from the logical area to the end area. To determine the number of pages to the corresponding logical page Characterized in that a logical page information writing means for writing the multi-address.

In the second memory controller, information for discriminating a logical page corresponding to the first area of the logical access area corresponding to the series of data in the redundant area corresponding to the physical page in which the series of data is written. And the information for determining the number of pages from the logical page corresponding to the top area of the logical access area corresponding to this series of data to the logical page corresponding to the end area. Based on the above, it is possible to easily grasp the correspondence between the logical page included in the logical block and the physical page included in the physical block.
The second memory controller also has a correspondence relationship between a physical page in the physical block in which one or a plurality of the series of data is written and a logical page in the logical block corresponding to the physical block. Page management means for determining the information written by the logical page information writing means from a redundant area corresponding to each physical page in which the first data of the series of data is written. It is preferable that the correspondence between the physical page in the physical block and the logical page in the logical block corresponding to the physical block is determined based on the read and read information.

  By providing such a page area management means, the correspondence between the logical page included in the logical block and the physical page included in the physical block in a series of data units based on information set for each series of data Can be grasped.

  Further, the page management means includes the redundant area corresponding to the physical page in which the first data of the series of data is written and the redundant area corresponding to the physical page in which the end data of the series of data is written. It is configured to read the information written by the logical page information writing means, and to determine that the series of data is normally written when the information read from both redundant areas match. Preferably it is.

  As described above, the page management unit writes data in the redundant area corresponding to the physical page in which the first data of the series of data is written and the redundant area corresponding to the physical page in which the last data of the series of data is written. If it is determined that a series of data is normally written based on the comparison result, a series of data that is not normally written can be easily detected.

  A flash memory system according to the present invention includes any one of the memory controllers and a flash memory accessed by the memory controller.

  The first flash memory control method according to the present invention is a flash that controls access to a flash memory that is erased in units of physical blocks including a plurality of physical sector areas based on an access instruction given from a host system. A method of controlling a memory, wherein a logical block composed of a plurality of logical sector areas is formed, the logical block to which a logical access area designated as an access target area by the access instruction belongs, and the logical block A logical access area determining step for determining a logical sector area corresponding to a head area of the logical access area to which the logical access area belongs, and a number of sectors of the logical access area belonging to the logical block; and corresponding to the logical block to which the logical access area belongs Physical block to determine the physical block to be A determination step, a free sector area search step for searching for the beginning of a physical sector area in which data in the physical block determined in the physical block determination step is not written, and the logical access area by the access instruction A data writing step of sequentially writing a series of data instructed to be written from the first physical sector area where the data detected in the empty sector area searching step is not written toward the last physical sector area; A redundant area corresponding to the physical sector area in which the series of data is written in the data writing step, a logical sector area corresponding to a head area of the logical access area belonging to the logical block, and the logical block belonging to the logical block. To determine the number of sectors in the logical access area And having a logical sector information writing step of writing information.

  In this first flash memory control method, a logical sector area corresponding to the head area of the logical access area corresponding to the series of data is provided in the redundant area corresponding to the physical sector area in which the series of data is written. Since the information for determining and the information for determining the number of sectors in the logical access area corresponding to this series of data are written, the logical sector area included in the logical block based on these information and The correspondence relationship with the physical sector area included in the physical block can be easily grasped.

  Further, the first flash memory control method reads the information written in the logical sector information writing step from a redundant area corresponding to a physical sector area in which head data of the series of data is written. 1 logical sector information reading step, a physical sector area in the physical block based on the information read in the first logical sector information reading step, and a logical sector area in the logical block corresponding to the physical block It is preferable to include a logical sector region determination step for determining the correspondence relationship between

  By having such a first logical sector information reading step and a logical sector region determination step, information set for each series of data in a series of data units is read out, and a series of series based on the read information It is possible to grasp the correspondence between the logical sector area included in the logical block and the physical sector area included in the physical block in data units.

  Further, the first flash memory control method reads the information written in the logical sector information writing step from a redundant area corresponding to a physical sector area in which end data of the series of data is written. 2 logical sector information reading step, a redundant area corresponding to the physical sector area where the head data of the series of data is written, and a redundant area corresponding to the physical sector area where the end data of the series of data is written When the information for determining the number of sectors in the logical access area belonging to the logical block matches the logical sector area corresponding to the head area of the logical access area belonging to the read logical block, the series of data is normal It is preferable to have a determination step for determining that the data has been written to.

  By having such a second logical sector information reading step and a determining step, the redundant area corresponding to the physical sector area where the head data of the series of data is written, and the end data of this series of data are written. A series of data that is not normally written can be easily detected based on the comparison result with the information written in the redundant area corresponding to the physical sector area.

  The second flash memory control method according to the present invention controls the access to a flash memory that is erased in units of physical blocks including a plurality of physical pages, based on an access instruction given from a host system. A logical block composed of a plurality of logical pages, the logical block to which a logical access area designated as an access target area by the access instruction belongs, and the logical block belonging to the logical block Logical access area determination that determines the logical page corresponding to the top area of the logical access area and the number of pages from the logical page corresponding to the top area of the logical access area belonging to the logical block to the logical page corresponding to the end area Step and the logical to which the logical access area belongs A physical block determination step for determining the physical block corresponding to the lock; a free page search step for searching for the beginning of a physical page in which data in the physical block determined in the physical block determination step is not written; A series of data instructed to be written to the logical access area by the access instruction is sequentially performed from the first physical page in which the data detected in the empty page search step is not written toward the last physical page. A data writing step for writing, a redundant area corresponding to a physical page in which the series of data is written in the data writing step, a logical page corresponding to a head area of the logical access area belonging to the logical block, and The logical access area belonging to the logical block A logical page information writing step for writing information for determining the number of pages from the logical page corresponding to the head area of the area to the logical page corresponding to the end area.

  In the second flash memory control method, a logical page corresponding to the first area of the logical access area having a correspondence relationship with the series of data is determined in the redundant area corresponding to the physical page in which the series of data is written. Information and information for determining the number of sectors in the logical access area corresponding to the series of data are written to the logical page and physical block included in the logical block based on the information. The correspondence relationship with the included physical page can be easily grasped.

  In the second flash memory control method, the information written in the logical page information writing step is read from the redundant area corresponding to the physical page in which the first data of the series of data is written. Correspondence between a physical page in the physical block and a logical page in the logical block corresponding to the physical block based on the information read in the logical page information read step and the first logical page information read step It is preferable to have a logical page determination step for determining the relationship.

  By having such a first logical page information reading step and a logical page determining step, information set for each series of data is read in a series of data units, and a series of data is based on the read information. The correspondence between the logical page included in the logical block and the physical page included in the physical block can be grasped in units.

  In the second flash memory control method, the information written in the logical page information writing step is read from a redundant area corresponding to a physical page in which tail data of the series of data is written. The logical page information reading step, the redundant area corresponding to the physical page where the first data of the series of data is written and the redundant area corresponding to the physical page where the end data of the series of data is written When the logical page corresponding to the head area of the logical access area belonging to the logical block matches the information for determining the number of sectors in the logical access area belonging to the logical block, the series of data is normally written. It is preferable to have a determination step of determining that

  By including the second logical page information reading step and the determination step, the redundant area corresponding to the physical page in which the first data of the series of data is written and the end data of the series of data are written. A series of data that is not normally written can be easily detected based on the comparison result with the information written in the redundant area corresponding to the physical page.

  According to the flash memory, the flash memory system, and the flash memory control method of the present invention, the logical sector area corresponding to the head data of the series of data is added to the redundant area corresponding to the physical sector area where the series of data is written. Information and the information for determining the number of sectors of data included in this series of data are written, so the correspondence between the logical sector area and the physical sector area is determined based on these information. It can be determined efficiently. In addition, information for determining the logical page corresponding to the first data of the series of data and the logical page corresponding to the first data included in the series of data in the redundant area of the physical page in which the series of data is written When the information for determining the number of pages from the first to the logical page corresponding to the end data is written, it is possible to efficiently determine the correspondence between the logical page and the physical page based on the information. it can.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram schematically showing a flash memory system 1 according to the present invention. As shown in FIG. 1, the flash memory system 1 includes a flash memory 2 and a memory controller 3 that controls the flash memory 2.

  The flash memory system 1 is connected to the host system 4 via the external bus 13. The host system 4 is composed of a CPU (Central Processing Unit) for controlling the entire operation of the host system 4, a companion chip for transferring information to and from the flash memory system 1, and the like. The host system 4 may be various information processing apparatuses such as a personal computer and a digital still camera that process various types of information such as characters, sounds, and image information.

  As shown in FIG. 1, the memory controller 3 includes a microprocessor 6, a host interface block 7, a work area 8, a buffer 9, a flash memory interface block 10, an ECC (Error Correcting Code) block 11, and a ROM. (Read Only Memory) 12. The memory controller 3 is connected to the flash memory 2 via the internal bus 14. The memory controller 3 constituted by these functional blocks is integrated on one semiconductor chip. Hereinafter, each functional block will be described.

  The host interface block 7 exchanges data, address information, status information, external commands and the like with the host system 4. The external command is a command for the host system 4 to instruct the flash memory system 1 to execute processing. Data or the like supplied from the host system 4 to the flash memory system 1 is taken into the flash memory system 1 (for example, the buffer 9) using the host interface block 7 as an entrance. Data supplied from the flash memory system 1 to the host system 4 is supplied to the host system 4 through the host interface block 7 as an exit.

  The host interface block 7 includes a command register R1, a sector number register R2, and an LBA register R3. Information given from the host system 4 is written in the command register R1, the sector number register R2, and the LBA register R3. External commands such as a write command and a read command are written in the command register R1. The number of sectors in the access target area is written in the sector number register R2. In the LBA register R3, the first LBA (Logical Block Address) of the access target area is written.

  The work area 8 is a work area for temporarily storing data necessary for controlling the flash memory 2, and is composed of a plurality of SRAM (Static Random Access Memory) cells. In the work area 8, for example, an address conversion table (described later) showing the correspondence between logical blocks and physical blocks, the correspondence between logical pages and physical pages, or an empty block search table for searching for empty blocks. Etc. are memorized.

  The buffer 9 holds the data read from the flash memory 2 until the host system 4 can receive the data. Further, the data to be written to the flash memory 2 is held until the flash memory 2 is in a writable state.

  The flash memory interface block 10 exchanges data, address information, status information, internal commands, and the like with the flash memory 2 via the internal bus 14. Here, the internal command is a command for the memory controller 3 to instruct the flash memory 2 to execute processing, and the flash memory 2 operates in accordance with the internal command given from the memory controller 3.

  The ECC block 11 generates an error correcting code (ECC) added to data to be written to the flash memory 2 and is included in the read data based on the error correcting code added to the read data. Detect and correct errors.

  The ROM 12 is a non-volatile storage element that stores a program that defines a processing procedure performed by the microprocessor 6. For example, a program that defines a processing procedure such as creation of an address conversion table is stored.

  The microprocessor 6 controls the overall operation of the memory controller 3 in accordance with a program stored in the ROM 12. For example, the microprocessor 6 causes the flash memory interface block 10 to execute processes based on a command set that defines various processes read from the ROM 12.

  The flash memory 2 is a NAND flash memory. The NAND flash memory is a non-volatile memory and includes a register and a memory cell array in which a plurality of memory cells are two-dimensionally arranged. The memory cell array includes a plurality of memory cell groups and word lines. Here, the memory cell group is a group in which a plurality of memory cells are connected in series. Each word line is for selecting a specific memory cell in the memory cell group. Data is written from the register to the selected memory cell or data is read from the selected memory cell to the register between the selected memory cell and the register via the word line.

  In the NAND flash memory, a data read operation and a data write operation are performed in units of pages, and a data erase operation is performed in units of blocks (physical blocks). A physical block is composed of a plurality of pages (physical pages). In this embodiment, one physical page is composed of a 4-sector (2048-byte) user area and a 64-byte redundant area, and one physical block is composed of 64 physical pages. Use memory.

  FIG. 2 shows a storage area included in one physical page of the NAND flash memory used in the present embodiment. The user area 25 is an area for storing data given from the host system 4. The redundant area 26 is an area for storing additional data such as an error correcting code (ECC), logical address information, and a block status (flag).

  As shown in FIG. 2, the user area 25 is divided into physical sector areas 60 (60a-60d) of one sector (512 bytes). The redundant area 26 is divided into an 8-byte common redundant area 50 and a 14-byte divided redundant area 70 (70a-70d). Information managed for each physical block such as logical address information and block status (flag) is written in the common redundant area 50 of the first physical page of each physical block. Furthermore, in a second embodiment to be described later, information for managing the correspondence between logical pages and physical pages is written in the common redundant area 50 of each physical page.

  The four physical sector areas 60a-60d and the four divided redundant areas 70a-70d have a one-to-one correspondence set in advance. In the present embodiment, the physical sector area 60a is the divided redundant area 70a, the physical sector area 60b is the divided redundant area 70b, the physical sector area 60c is the divided redundant area 70c, and the physical sector area 60d is the divided redundant area 70d. Each corresponds. In the divided redundant areas 70a to 70d, information managed for each physical sector area 60 (60a to 60d) such as an error correction code added to data stored in the corresponding physical sector areas 60a to 60d is written. It is. In the first embodiment to be described later, information for managing the correspondence between the logical sector area and the physical sector area is written in the divided redundant area 70.

  As described above, in a NAND flash memory in which one physical page is configured by a user area of m sectors and one physical block is configured by n physical pages, one physical block is m × It can also be handled as a NAND flash memory composed of n physical sector areas (areas per sector). In other words, the NAND flash memory used in the present embodiment can be handled as a NAND flash memory composed of 256 physical sector areas (areas of one sector unit). In the following description, a serial number assigned to a physical sector area in a physical block is referred to as a physical sector number (PSN). For example, when one physical block is composed of 256 physical sector areas, # 0 to # 255 are assigned as PSNs to 256 physical sector areas in each physical block.

  The logical address information is information for determining the correspondence between physical blocks and logical blocks. Therefore, for a physical block having no corresponding logical block, such as a physical block from which stored data has been erased, logical address information is not stored in the redundant area 25 (in the common redundant area 50 of the first physical page).

  The block status (flag) is a flag indicating pass / fail of the physical block. For the initial defective physical block, a block status (flag) indicating a defective block (physical block in which data cannot be normally written) is written by the manufacturer.

The address space on the host system 4 side is managed by an LBA (Logical Block Address) which is a serial number assigned to an area (hereinafter referred to as a logical sector area) divided in units of sectors (512 bytes). Further, a logical block composed of a plurality of logical sector areas is formed, and one or a plurality of physical blocks are allocated to the logical block. The correspondence between logical blocks and physical blocks is often managed on a zone basis. FIG. 3 shows an example in which eight logical zones and eight physical zones are formed, and the correspondence relationship between logical blocks and physical blocks is managed for each pair of logical zones and physical zones in correspondence relationship. Yes. In this example, 2048000 logical sector areas composed of LBA # 0 to # 20479999 are allocated to a storage area on the flash memory 2 side composed of 8192 physical blocks.
A group of 256 logical sector areas with consecutive addresses is defined as a logical block, and a serial number is assigned to this logical block. Hereinafter, a serial number assigned to a logical block is referred to as a logical block number (LBN). For example, the 256 logical sector areas of LBA # 0- # 255 belong to the logical block of LBN # 0, and the 256 logical sector areas of LBA # 256- # 511 belong to the logical block of LBN # 1. . As described above, the 2048,000 logical sector areas of LBA # 0 to # 20479999 belong to one of 8000 logical blocks of LBN # 0 to # 7999.

  Further, a logical zone is formed by collecting a plurality of logical blocks, and serial numbers are assigned to the logical zones. Hereinafter, the serial number assigned to the logical zone is referred to as a logical zone number (LZN). In this example, eight logical zones (LZN # 0- # 7) are formed, and each logical zone is composed of 1000 logical blocks with continuous LBN. Note that logical zones may be formed by sequentially assigning logical blocks having consecutive LBNs to different logical zones. For example, the logical block of LBN # 0 is in the logical zone of LZN # 0, the logical block of LBN # 1 is in the logical zone of LZN # 1, and the logical block of LBN # 2 is in the logical zone of LZN # 2. Sort to logical zone # 7. Similarly, the logical block of LBN # 8 is assigned to the logical zone of LZN # 0, the logical block of LBN # 9 is assigned to the logical zone of LZN # 1, and the logical block of LBN # 10 is assigned to the logical zone of LZN # 2. Go.

  On the other hand, on the flash memory 2 side, 8 physical zones are formed by 8192 physical blocks. A unique physical block address (PBA) is assigned to 8192 physical blocks. Also, serial numbers are assigned to the eight physical zones. Hereinafter, the serial number assigned to the physical zone is referred to as a physical zone number (PZN). Each physical zone is composed of 1024 physical blocks with continuous PBA. Note that the physical zone may be formed by physical blocks in which PBAs are not continuous.

  Regarding the correspondence relationship between the logical zone and the physical zone, the PZN of the physical zone is associated with the logical zone having the same LZN value as the PZN. That is, the logical zone of LZN # 0 corresponds to the physical zone of PZN # 0, and the logical zone of LZN # 1 corresponds to the physical zone of PZN # 1.

  The correspondence relationship between the logical block and the physical block is usually managed by an address conversion table. This address conversion table is a table describing the correspondence between logical blocks and physical blocks, and is created based on logical address information stored in the redundant area 25 of each physical block. When creating this address conversion table, the logical address information is sequentially read from the redundant area 25 of the physical block included in the physical zone to be created, and the logical block and the physical block are read based on the read logical address information. Are sequentially described. Further, in order to manage the areas in the logical block and the physical block in the correspondence relationship, the sector information table (first embodiment) or the logical information indicating the correspondence relation between the logical sector area and the physical sector area 60 is used. A page information table (second embodiment) indicating the correspondence between pages (described later) and physical pages is also created.

Note that the physical blocks in the flash memory include innate defective blocks that are defective from the time of shipment. Furthermore, even if a physical block is a non-defective product at the time of shipment, there is a physical block (acquired defective block) that deteriorates after use and becomes a defective block. Therefore, in this embodiment, the number of logical blocks included in the logical zone is 1000, whereas the number of physical blocks included in the physical zone is 1024.
<First Embodiment>

  In the first embodiment, the correspondence between 256 logical sector areas included in a logical block and 256 physical sector areas 60 included in a physical block is managed in units of sectors. It should be noted that when a plurality of physical sector areas 60 are included in one physical page, a NAND flash memory in which data writing to the plurality of physical sector areas 60 cannot be performed in a plurality of times. In this case, 256 logical sector areas included in the logical block and 256 physical sector areas included in the physical block in page units (units of the number of sectors of the user area 25 included in one physical page) described later. The correspondence relationship with 60 is managed. That is, the first embodiment can be applied to a NAND flash memory that can execute data writing to each physical page separately for each physical sector area 60. For example, as shown in FIG. 2, when four physical sector areas 60 are included in one physical page, NAND that can execute data writing to the physical page in four steps The first embodiment can be applied to a type flash memory.

  In the write processing of the present embodiment, the host system 4 writes a command code indicating a write command to the command register R1, writes the number of sectors of data to be written to the sector number register R2, and starts writing to the LBA register R3. LBA corresponding to the head data to be written is written. The data in the physical block corresponding to the logical block including the logical access area which is the access target area determined based on the data given from the host system 4 and the information written in the sector number register R2 and the LBA register R3 It is written from the top of the physical sector area 60 that has not been written.

  When the logical access area determined based on the information written in the sector number register R2 and the LBA register R3 extends over a plurality of logical blocks, there are a plurality of physical blocks to which data is written. Therefore, when the logical access area extends over a plurality of logical blocks, the area is divided for each logical block to which the logical access area belongs, and data write processing is performed. For example, when the logical access area extends over two logical blocks (the first logical block and the second logical block), the write processing for the physical block corresponding to the first logical block and the second logical block Write processing is performed on the physical block corresponding to the block. Data instructed to be written to the logical access area belonging to the first logical block is written to the physical sector area 60 in which data in the physical block corresponding to the first logical block is not written. The data instructed to be written to the logical access area belonging to the second logical block is written to the physical sector area 60 where data in the physical block corresponding to the second logical block is not written.

  In the following description, in the write process of data of one sector or a plurality of sectors executed based on information given from the host system 4, that is, information written in the command register R1, the sector number register R2, and the LBA register R3. This data is called a series of data. For example, when the value written in the sector number register R2 is n, data in which logical addresses for n sectors are continuous corresponds to a series of data. When the logical access area extends over a plurality of logical blocks, a series of data is divided for each logical block. For example, when the logical access area extends over two logical blocks (the first logical block and the second logical block), the number of sectors in the logical access area belonging to the first logical block is p sectors, If the number of sectors in the logical access area belonging to the logical block 2 is q sectors, even if the value written in the sector number register R2 is n (n = p + q), the series of data is a series of data in the p sector. And q series of data.

  The host system 4 indicates the address of the data to be written or the address of the data to be read by LBA. That is, the LBA discriminated based on the information written in the sector number register R2 and the LBA register R3 (when the value written in the sector number register R2 is 1) or the range in which the LBA is continuous (written in the sector number register R2) (When the value is 2 or more) becomes an address indicating a writing destination of data to be written or an address indicating a reading source of data to be read.

Here, when the number of logical sector areas included in one logical block is 2 ⁱ (for example, 256 when i = 8), the lower i bits of the LBA (for example, lower when i = 8) 8 bits) corresponds to the serial number assigned to the logical sector area in the logical block. Hereinafter, the serial number assigned to the logical sector area in the logical block is referred to as a logical sector number (LSN). Further, the upper bits of the LBA, excluding the lower i bits of the LBA (for example, the lower 8 bits when i = 8) correspond to the LBN. Therefore, if the value indicated by the bit of the portion corresponding to the LBN of the LBA is the same in the range where the LBA determined based on the information written in the sector number register R2 and the LBA register R3 is continuous, the logical access area is It does not straddle multiple logical blocks.

  Next, in order to manage the correspondence between the 256 logical sector areas included in the logical block and the 256 physical sector areas 60 included in the physical block in units of sectors, the division redundancy corresponding to each physical sector area 60 is performed. Information written in the area 70 will be described with reference to FIG. FIG. 4 shows the LSN of data written in the physical sector area 60 of PSN # 0- # 255, the start pointer (SP), the start logical sector number (SLSN) and the sector count written in the divided redundant area 70. The correspondence relationship with (SCNT) is shown. A start pointer (SP), a start logical sector number (SLSN), and a sector count (SCNT) are set for each series of data, and are written in the divided redundant area 70 corresponding to the physical sector area 60 in which the series of data is written. It is.

  The SP is information indicating the physical sector number (PSN) of the physical sector area 60 where writing of the next series of data is started. That is, SP corresponds to the number next to the physical sector number (PSN) of the physical sector area 60 in which the end data of a series of data is written. When a series of data is written up to the last physical sector area 60 in the physical block, # 0 is written as SP. SLSN is information representing a logical sector number (LSN) corresponding to the top data of a series of data. SCNT is information representing the number of sectors in a series of data. The start pointer (SP), the start logical sector number (SLSN), and the sector count (SCNT) are used when creating a sector information table showing the correspondence between the logical sector area and the physical sector area 60.

  A series of data is written in order from the physical sector area 60 having the smaller PSN in the physical block. For example, as shown in FIG. 4, the first series of data has 10 sectors, the second series of data has 3 sectors, and the third series of data has 5 sectors. When the number of sectors of the fourth series of data is 8, the first series of data is written in the physical sector area 60 of PSN # 0- # 9, and the second series of data is PSN # 10- # 12. The third series of data is written to the physical sector area 60 of PSN # 13- # 17, and the fourth series of data is written to the physical sector area 60 of PSN # 18- # 25. Written.

  It should be noted that SP and SCNT given to the first series of data starting to be written from the top physical sector area 60 of each physical block have the same value. The SP given to the second and subsequent series of data corresponds to the sum of SCNT given to each series of data up to the series of data. For example, the SP given to the third series of data is the SCNT given to the first series of data, the SCNT given to the second series of data, and the SCNT given to the third series of data. Corresponds to the sum.

  The SCNT given to the second and subsequent series of data corresponds to the difference between the SP given to the series of data and the SP given to the series of data immediately before the series of data. . For example, the SCNT assigned to the third series of data corresponds to the difference between the SP assigned to the third series of data and the SP assigned to the second series of data.

  Thus, regarding SP and SCNT, the other information can be obtained based on either one of the information. Therefore, a combination of SP and SLSN or a combination of SCNT and SLSN may be written in the divided redundant area 70.

  When there is no physical block corresponding to the logical block to which the logical access area belongs in the series of data write processing, or when a series of data cannot be written to the physical block corresponding to the logical block to which the logical access area belongs. A search for empty blocks (physical blocks in which no data is written) is performed, and a series of data is written in the detected empty blocks. As a case where a series of data cannot be written to the physical block corresponding to the logical block to which the logical access area belongs, there is no empty area (physical sector area 60 to which no data is written) or the number of sectors in the empty area is For example, the number of sectors is less than the number of sectors in a series of data.

In the example shown in FIG. 4, four series of data are stored in the physical block of PBA # 7. The four series of data write processing will be specifically described. In the example shown in FIG. 4, D # n indicates data corresponding to the logical sector area of LSN # n. For example, D # 3 indicates data corresponding to the logical sector area of LSN # 3.
(First data write process)

  First, the host system 4 writes the command code of the write command in the command register R1, 3 in the LBA register R3, and 10 in the sector number register R2. From the LBA # 3 written in the LBA register R3 and the value 10 written in the sector number register R2, the memory controller 3 determines that the LBA of the logical access area designated as the write destination of this series of data is # 3- #. 12, it is determined that this logical access area is included in the logical block of LBN # 0 and does not straddle a plurality of logical blocks. That is, it is determined that this series of data is written in a single physical block.

  The logical block of LBN # 0 belongs to the logical zone of LZN # 0, and the logical zone of LZN # 0 is assigned to the physical zone of PZN # 0. Since there is no physical block corresponding to the logical block of LBN # 0, the memory controller 3 searches for an empty block from the physical zone of PZN # 0 and, for example, detects a physical block of PBA # 7 as an empty block. If the data of the logical block of LBN # 0 is already stored in the physical block and there is an area in which data for 10 sectors is written in the physical block, the empty block search is not performed and the physical block This series of data is written in the physical sector area 60 where no data is written.

Next, a start pointer (SP), a start logical sector number (SLSN), and a sector count (SCNT) that are written in the divided redundant area 70 when writing this series of data in the physical sector area 60 will be described. First, the value # 3 corresponding to SLSN is obtained from the lower 8 bits of the LBA written to the LBA register R3, and the value 10 corresponding to SCNT is obtained from the value written to the sector number register R2. Furthermore, the PSN # 0 corresponding to the SPN of the physical sector area 60 where the series of data starts to be written (that is, the physical sector area 60 to which the first data of the series of data is written) corresponds to the SP #. 10 is required.
The memory controller 3 starts writing a series of data from the physical sector area 60 of PSN # 0 in the physical block of PBA # 7. A series of data instructed to be written in the logical access areas of LBA # 3- # 12 is written in the physical sector area 60 of PSN # 0- # 9. At this time, SP # 10, SLSN # 3, and SCNT10 are written in all the divided redundant areas 70 corresponding to the physical sector areas 60 of PSN # 0 to # 9.
(Second series of data write processing)

  The host system 4 writes the command code of the write command in the command register R1, 0 in the LBA register R3, and 3 in the sector number register R2. From the LBA # 0 written to the LBA register R3 and the value 3 written to the sector number register R2, the memory controller 3 determines that the LBA of the logical access area designated as the write destination of this series of data is # 0- #. 2. It is determined that this logical access area is included in the logical block of LBN # 0 and does not straddle a plurality of logical blocks. Further, based on the address conversion table describing the correspondence between the logical block and the physical block, it is determined that the logical block of LBN # 0 corresponds to the physical block of PBA # 7.

  Subsequently, a free sector area search is performed to search the top of the physical sector area 60 in which data in the physical block of PBA # 7 is not written. After this free sector area search is completed, the memory controller 3 starts writing a series of data from the physical sector area 60 of PSN # 10 that is the head of the physical sector area 60 in which data in the physical block is not written. Therefore, a series of data instructed to be written to the logical access areas of LBA # 0 to # 2 is written to the physical sector area 60 of PSN # 10 to # 12 of the physical block of PBA # 7.

When writing this series of data to the physical sector area 60, the value # 0 corresponding to SLSN is obtained from the lower 8 bits of the LBA written to the LBA register R3 for the information to be written to the divided redundant area 70, A value 3 corresponding to SCNT is obtained from the value written in the number register R2. Further, # 10 corresponding to the SP from the PSN # 10 and the SCNT value 3 of the physical sector area 60 where the series of data starts to be written (that is, the physical sector area 60 to which the first data of the series of data is written) is # 13 is required. These pieces of information are all divided corresponding to the physical sector area 60 of PSN # 10- # 12 when a series of data is written to the physical sector area 60 of PSN # 10- # 12 in the physical block of PBA # 7. It is written in the redundant area 70. That is, SP # 13, SLSN # 0, and SCNT3 are written in all the divided redundant areas 70 corresponding to the physical sector areas 60 of PSN # 10- # 12.
(3rd data write process)

  The host system 4 writes the command code of the write command in the command register R1, 5 in the LBA register R3, and 5 in the sector number register R2. In the memory controller 3, the LBA of the logical access area designated as the write destination of this series of data is # 5- # 9, and this logical access area is included in the logical block of LBN # 0, and the logical access area of LBN # 0 It is determined that the block corresponds to the physical block of PBA # 7.

  Subsequently, a free sector area search is performed to search the top of the physical sector area 60 in which data in the physical block of PBA # 7 is not written. After this free sector area search is completed, the memory controller 3 stores a series of data instructed to be written in the logical access area of the LBA # 5- # 9 in the PSN # 13- # 17 of the physical block of the PBA # 7. Write to the physical sector area 60.

When this series of data is written to the physical sector area 60 of PSN # 13- # 17 in the physical block of PBA # 7, all the redundant redundancy areas 70 corresponding to the physical sector area 60 of PSN # 13- # 17 are written. SP # 18, SLSN # 5, and SCNT5 are written. Note that SP, SLSN, and SCNT are obtained based on the information written in the LBA register R3 and the sector number register R2 and the PSN of the physical sector area 60 where the leading data of a series of data is written.
(4th data write process)

  The host system 4 writes the command code of the write command in the command register R1, 10 in the LBA register R3, and 8 in the sector number register R2. In the memory controller 3, the LBA of the logical access area designated as the write destination of the series of data is # 10- # 17, and this logical access area is included in the logical block of LBN # 0, and the logical access area of LBN # 0 It is determined that the block corresponds to the physical block of PBA # 7.

  Subsequently, a free sector area search is performed to search the top of the physical sector area 60 in which data in the physical block of PBA # 7 is not written. After this free sector area search is completed, the memory controller 3 stores a series of data instructed to be written in the logical access area of the LBA # 10- # 17 in the PSN # 18- # 25 of the physical block of the PBA # 7. Write to the physical sector area 60.

  When this series of data is written to the physical sector area 60 of PSN # 18- # 25 in the physical block of PBA # 7, all the redundant redundancy areas 70 corresponding to the physical sector area 60 of PSN # 18- # 25 are written. SP # 26, SLSN # 10, and SCNT8 are written. Note that SP, SLSN, and SCNT are obtained based on the information written in the LBA register R3 and the sector number register R2 and the PSN of the physical sector area 60 where the leading data of a series of data is written.

  Next, a free sector area search for searching for the head of the physical sector area 60 in which data in the physical block is not written will be described. This empty sector area search can be performed based on the SP or SCNT written in the divided redundant area 70. For example, the writing of the second series of data is started based on the SP written in the divided redundant area 70 corresponding to the first physical sector area 60 (PSN # 0 physical sector area 60) in the physical block. The physical sector area 60 (the physical sector area 60 next to the physical sector area 60 in which the tail data of the first series of data is written) is known. When the second series of data is not written, SP is not written in the divided redundant area 70 corresponding to the physical sector area 60 where the writing of the second series of data is started. When a series of data is written, SP is written in the divided redundant area 70 corresponding to the physical sector area 60 where the writing of the second series of data is started.

Further, based on the SP written in the divided redundant area 70 corresponding to the physical sector area 60 where the writing of the second series of data is started, the physical sector where the writing of the third series of data is started. Region 60 can be seen. In this way, the SP written in the redundant redundant area 70 corresponding to the physical sector area 60 where the next series of data starts to be written is sequentially read, and when the SP is not written, the physical sector is read. It is determined that the area 60 is the head of the physical sector area 60 in which no data is written.
<Sector information table creation processing>

  When reading the data stored in each physical block, the host system 4 writes the command code of the read command in the command register R1, and sets the logical access area corresponding to the read data in the LBA register R3 and the sector number register R2. Instruction information is written. That is, also in the case of read processing, the host system 4 instructs the logical access area to be accessed.

When the command code of the read command is written in the command register R1, the memory controller 3 determines the logical access area based on the information written in the LBA register R3 and the sector number register R2. That is, the logical block and logical sector area to be accessed are determined. Furthermore, the memory controller 3 must discriminate a physical block corresponding to the logical block to be accessed and a physical sector area 60 corresponding to the logical sector area to be accessed.
The correspondence between the logical block and the physical block can be determined based on the above-described address conversion table. Regarding the correspondence relationship between the logical sector region and the physical sector region 60, a sector information table describing the correspondence relationship between the logical sector region and the physical sector region 60 is created based on the SLSN and SCNT written in the divided redundant region 70. The correspondence relationship between the logical sector area and the physical sector area 60 is determined based on the sector information table.

  Next, the sector information table creation process will be described. In the creation process of the sector information table, the memory controller 3 reads SLSN and SCNT from the divided redundant area 70 corresponding to the physical sector area 60 in which the first data of a series of data is stored, and logical sector areas in a series of data units. And the physical sector area 60 are determined, and the determined correspondence relation between the logical sector area and the physical sector area 60 is written on the sector information table.

  In this sector information table creation process, the SP is read together with the SLSN and SCNT, and the physical sector area 60 in which the first data of the next series of data is stored is determined based on the read SP. The Note that the physical sector area 60 in which the head data of the next series of data is stored may be determined based on the value of SCNT without using SP.

  Further, in order to check whether a series of data is normally written up to the end data, the SP stored in the divided redundant area 70 corresponding to the physical sector area 60 in which the top data of the series of data is stored, It is confirmed whether the SLSN and SCNT match the SP, SLSN, and SCNT stored in the divided redundant area 70 corresponding to the physical sector area 60 in which the tail data is stored. When a series of data is not normally written up to the end data, for example, when the power is cut off before the end data is written, in the divided redundant area 70 corresponding to the physical sector area 60 where the end data is to be written. Since SP, SLSN, and SCNT are not written, SP, SLSN, and SCNT read from both divided redundant areas 70 do not match. In such a case, it is determined that the series of data is not normally written. Accordingly, the SP, SLSN, and SCNT stored in the divided redundant area 70 corresponding to the physical sector area 60 in which the first data of a series of data is stored, and the physical sector area 60 in which the end data is stored are stored. If the SP, SLSN, and SCNT stored in the divided redundant area 70 do not match, the correspondence relationship between the logical sector area and the physical sector area corresponding to the series of data is not reflected in the sector information table. The sector information table creation process ends.

  Next, as shown in FIG. 4, a process of creating a sector information table when four series of data are stored in the physical block of PBA # 7 will be described with reference to FIG. When this sector information table is created, an area for writing PSNs corresponding to LSN # 0 to # 255 (hereinafter referred to as sector information table creation area) is secured in the work area 8.

In the creation process of the sector information table, first, SP, SLSN, and SCNT are read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 0 of the physical block of PBA # 7. From the SP read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 0, the storage destination of the tail data of the first series of data is determined. Subsequently, in order to confirm whether or not the first series of data has been normally stored up to the end data, the SP and SLSN are changed from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 9 which is the storage destination of the end data. And SCNT are read. The SP, SLSN and SCNT values read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 0, and the SP read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 9. , SLSN and SCNT are equal. When both values are equal, it is determined that the writing of the first series of data has been normally completed, and information regarding the first series of data is reflected in the sector information table.
In this reflection process, it is determined from the values of SLSN and SCNT (SLSN # 3, SCNT10) that the logical sector area of LSN # 3- # 12 corresponds to the physical sector area 60 of PSN # 0- # 9, As shown in FIG. 5A, PSN values # 0- # 9 are written in the area corresponding to LSN # 3- # 12 in the sector information table creation area. That is, # 0 is written as the PSN value in the area corresponding to LSN # 3, # 1 is written as the PSN value in the area corresponding to LSN # 4, and the PSN value is written in the area corresponding to LSN # 5. # 2 is written, PSN is written in the same manner, and # 9 is written as the PSN value in the area corresponding to LSN # 12. Note that the storage destination of the top data of the second series of data is determined to be the physical sector area 60 of PSN # 10 from the SP value.

  Next, SP, SLSN, and SCNT are read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 10 that is the storage destination of the first data of the second series of data. Since the read SP value is # 13, the storage destination of the last data of the second series of data is determined to be the physical sector area 60 of PSN # 12, and the physical sector of PSN # 12 is determined. The values of SP, SLSN and SCNT written in the divided redundant area 70 corresponding to the area 60 are read out. SP, SLSN and SCNT read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 10, and SP, SLSN read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 12 When the values of SCNT and SCNT are equal, it is determined that the writing of the second series of data has been completed normally, and information relating to the second series of data is reflected in the sector information table.

  In this reflection process, it is determined from the values of SLSN and SCNT (SLSN # 0, SCNT3) that the logical sector area of LSN # 0- # 2 corresponds to the physical sector area 60 of PSN # 10- # 12, As shown in FIG. 5B, PSN values # 10 to # 12 are written in an area corresponding to LSN # 0 to # 2 in the sector information table creation area. That is, # 10 is written as the PSN value in the area corresponding to LSN # 0, # 11 is written as the PSN value in the area corresponding to LSN # 1, and the PSN value is written in the area corresponding to LSN # 2. # 12 is written. Note that the storage destination of the top data of the third series of data is determined to be the physical sector area 60 of PSN # 13 from the SP value.

  Next, SP, SLSN, and SCNT are read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 13 that is the storage destination of the top data of the third series of data. Since the read SP value is # 18, it is determined that the storage destination of the last data of the third series of data is the physical sector area 60 of PSN # 17, and the physical sector of PSN # 17 The values of SP, SLSN and SCNT written in the divided redundant area 70 corresponding to the area 60 are read out. SP, SLSN and SCNT read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 13, and SP, SLSN read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 17 When the values of SCNT and SCNT are equal, it is determined that the writing of the third series of data has been completed normally, and information regarding the third series of data is reflected in the sector information table.

  In this reflection process, it is determined from the values of SLSN and SCNT (SLSN # 5, SCNT5) that the logical sector area of LSN # 5- # 9 corresponds to the physical sector area 60 of PSN # 13- # 17, As shown in FIG. 5C, the PSN value # 13- # 17 is written in the area corresponding to LSN # 5- # 9 in the sector information table creation area. At this time, # 2- # 6 written in the area corresponding to LSN # 5- # 9 in the sector information table creation area is rewritten to # 13- # 17. Thus, in the sector information table creation process, information regarding a series of data written later is prioritized. Note that the storage destination of the head data of the fourth series of data is determined to be the physical sector area 60 of PSN # 18 from the SP value.

  Next, SP, SLSN, and SCNT are read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 18 that is the storage destination of the top data of the fourth series of data. Since the read SP value is # 26, the storage destination of the last data of the fourth series of data is determined to be the physical sector area 60 of PSN # 25, and the physical sector of PSN # 25 is determined. The values of SP, SLSN and SCNT written in the divided redundant area 70 corresponding to the area 60 are read out. SP, SLSN and SCNT read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 18, and SP, SLSN read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 25 When the values of SCNT and SCNT are the same, it is determined that the writing of the fourth series of data has been normally completed, and information regarding the fourth series of data is reflected in the sector information table.

  In this reflection process, it is determined from the SLSN and SCNT values (SLSN # 10, SCNT8) that the logical sector area of LSN # 10- # 17 corresponds to the physical sector area 60 of PSN # 18- # 25, As shown in FIG. 5D, PS18 values # 18- # 25 are written in an area corresponding to LSN # 10- # 17 in the sector information table creation area. At this time, # 7- # 9 written in the area corresponding to LSN # 10- # 12 in the sector information table creation area is rewritten to # 18- # 20. Note that the storage destination of the top data of the fifth series of data is determined to be the physical sector area 60 of PSN # 26 from the SP value.

Next, SP, SLSN, and SCNT are read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 26 that is the storage destination of the first data of the fifth series of data. Since the SCNT is not written, the sector information table creation process is terminated.
<Processing related to abnormal termination>

  FIG. 6 shows a case where the writing of the fourth series of data does not end normally in the writing of the four series of data shown in FIG. As a cause of such abnormal termination, for example, power supply to the flash memory system 1 is interrupted. The writing of the fourth series of data ends when the data is written in the physical sector area 60 of PSN # 18- # 22, and the data is stored in the physical sector area 60 of PSN # 23- # 25. Not. Hereinafter, a process for creating a sector information table in a physical block in which such abnormal termination has occurred will be described.

  Since the writing of the first series of data, the second series of data, and the third series of data has been normally completed, information regarding these series of data is reflected in the sector information table. However, in the reflection process regarding the fourth series of data, it corresponds to the SP, SLSN and SCNT read from the divided redundant area 70 corresponding to the physical sector area 60 of PSN # 18 and the physical sector area 60 of PSN # 25. Since the values of SP, SLSN, and SCNT read from the divided redundant area 70 are not equal, it is determined that the writing of the fourth series of data has not ended normally, and information on the fourth series of data is Not reflected in the sector information table. Therefore, a sector information table (sector information table shown in FIG. 5C) reflecting information on the first series of data, the second series of data, and the third series of data is stored in this physical block. Used as a sector information table.

  When a physical block in which such a partial series of data is not normally written is found, valid data stored in the physical block is transferred to another physical block. In other words, data that has not been rewritten by a subsequent series of data among a series of data that has been normally written is transferred to another physical block.

  Next, this transfer process will be described. This transfer process is performed based on a sector information table in which a series of data information written normally is reflected. That is, data stored in the physical sector area 60 corresponding to the PSN written in the sector information table creation area is transferred to another physical block. As shown in FIG. 6, when the writing of the fourth series of data is not normally completed, the first series of data, the second series of data, and the third series shown in FIG. Transfer processing is performed based on a sector information table in which information relating to a series of data is reflected.

  A transfer process based on the sector information table shown in FIG. 5C will be described with reference to FIG. In the example shown in FIG. 7, D # n indicates data corresponding to the logical sector of LSN # n. In this transfer process, a search is made for a transfer destination physical block (empty block). Here, it is assumed that an empty block in the physical zone of PZN # 1 is searched and a physical block of PBA # 15 is detected as an empty block. When data stored in the physical block of PBA # 7 is transferred to the physical block of PBA # 15, the data is transferred in order from the smallest LSN based on the sector information table in FIG. Is done. That is, the data stored in the physical sector area 60 corresponding to the PSN written in the sector information table creation area is transferred in order from the one having the smallest LSN value corresponding to the PSN.

  In the case of the sector information table in FIG. 5C, only PSNs corresponding to LSN # 0 to # 12 are written in the sector information table creation area. Therefore, among the data stored in the physical block of PBA # 7, the data is stored in the physical sector area 60 corresponding to the PSN written in the area corresponding to LSN # 0- # 12 of the sector information table creation area. Only the existing data is transferred to the physical block of PBA # 15.

  First, in the sector information table shown in FIG. 5C, since PSN # 10 corresponds to LSN # 0, data stored in the physical sector area 60 of PSN # 10 of the physical block of PBA # 7. Are transferred to the physical sector area 60 of PSN # 0 of the physical block of PBA # 15. Next, since PSN # 11 corresponds to LSN # 1, the data stored in the physical sector area 60 of PSN # 11 of the physical block of PBA # 7 is the physical sector of PSN # 1 of PBA # 15. Transferred to area 60. The same processing is performed in the order of LSN, and the data stored in the physical sector area 60 of PSN # 9 of the physical block of PBA # 7 is the physical sector area of PSN # 12 of the physical block of PBA # 15. 60, and this transfer process ends.

  Next, SP, SLSN, and SCNT that are written in the divided redundant area 70 during this transfer process will be described. In this transfer process, since the LSNs of all data transferred from the physical block of PBA # 7 to the physical block of PBA # 15 are continuous, all the data is regarded as “a series of data” and the physical block of PBA # 15. SP, SLSN, and SCNT that are considered to have been written to are set. In other words, when this transfer process is completed, the PS value # 13 corresponding to the head of the physical sector area 60 in which data in the physical block block of PBA # 15 is not written becomes the SP value. # 0, which is the LSN corresponding to the head data of this series of data, becomes the SLSN value. The SCNT value is 13 which is the number of sectors of data included in this series of data.

  As described above, when data of a physical block that has ended abnormally is transferred, data corresponding to logical sector areas in which LSNs are continuous is regarded as a series of data, and transfer processing is performed. Therefore, SP, SLSN, and SCNT are set by regarding data corresponding to logical sector areas in which LSNs are continuous as a series of data. That is, the LSN of the first logical sector area of the logical sector area where the LSN is continuous becomes SLSN, and the number of logical sector areas where the LSN is continuous becomes SCNT. The SP value is a value obtained by adding the SCNT value to the PSN value of the physical sector area 60 to which data corresponding to the first logical sector area of the logical sector area where the LSN continues is written.

  According to the flash memory system 1 of the first embodiment, the SP, SLSN, and SCNT related to this series of data are written in the divided redundant area 70 corresponding to the physical sector area 60 where the series of data is stored. . Further, the correspondence between the logical sector area and the physical sector area 60 relating to this series of data can be grasped based on the SLSN and SCNT concerning this series of data. Therefore, the SLSN and SCNT written in the divided redundant area 70 corresponding to the physical sector area 60 in which the first data of a series of data is stored are read, and the logical sector area grasped based on the read SLSN and SCNT By reflecting the correspondence relationship with the physical sector area 60 in the sector information table, the sector information table can be completed.

  The correspondence between the logical sector area and the physical sector area 60 related to each series of data is given priority over the series of data written later, so the logical sector area and the physical sector area 60 related to each series of data. Is reflected in the sector information table in the order in which a series of data is written.

  Further, the PSN of the physical sector area 60 in which the head data of each series of data is stored can be grasped based on the SP related to the previous series of data. When the SP is not written in the divided redundant area 70, the PSN of the physical sector area 60 in which the head data of each series of data is stored can be grasped based on the SCNT.

Also, the SP, SLSN and SCNT written in the divided redundant area 70 corresponding to the physical sector area 60 in which the head data of the series of data is stored, and the physical sector in which the end data of the series of data is stored. Whether SP, SLSN, and SCNT written in the divided redundant area 70 corresponding to the area 60 coincide with each other can determine whether the series of data is normally written. Accordingly, only the correspondence between the logical sector area and the physical sector area 60 relating to a series of data written normally is reflected in the sector information table.
<Second Embodiment>

  In the second embodiment, the correspondence between the logical sector area included in the logical block and the physical sector area included in the physical block in page units (in units of the number of sectors of the user area 25 included in one physical page) is represented. to manage. Therefore, the present invention can also be implemented when using a NAND flash memory in which data can be written to each physical page only once. Since the configuration of the flash memory system 1 is the same as that of the first embodiment, description thereof is omitted.

  FIG. 8 shows a series of data stored in the physical block of PBA # 24 corresponding to the logical block of LBN # 0, and a start pointer (SP), a start logical page number (SLPN) and a page related to this series of data. A counter (PCNT) is shown. In the following description, a serial number assigned to a physical page in each physical block is referred to as a physical page number (PPN). In addition, a logical page is obtained by combining logical sector areas in each logical block in units of the number of sectors of the user area 25 included in one physical page, and a serial number assigned to the logical page is a logical page number (LPN). To tell.

  In the present embodiment, one physical page is configured by the user area 25 of 4 sectors (2048 bytes) (4 physical sector areas 60 are included in one physical page), and one physical block is 64 A NAND flash memory composed of a single physical page is used. As shown in FIG. 2, with respect to the four physical sector areas 60 included in each physical page, the first physical sector area 60a, the second physical sector area 60a, and the second physical sector area 60a are arranged in order from the top (in order from the smallest column address). They are referred to as a physical sector area 60b, a third physical sector area 60c, and a fourth physical sector area 60d. In this embodiment, the start pointer (SP), the start logical page number (SLPN), and the page counter (PCNT) are written in the common redundant area 50. Therefore, the common redundant area 50 is changed from 8 bytes to 16 bytes. The divided redundant area 70 is changed from 14 bytes to 12 bytes.

The start pointer (SP) written in the common redundant area 50 in the second embodiment is information indicating the physical page number (PPN) of the physical page where writing of the next series of data is started. That is, the start pointer (SP) corresponds to the number next to the physical page number (PPN) of the physical page to which the end data of the series of data is written. If a series of data is written up to the last physical page in the physical block, # 0 is written as SP. The start logical page number (SLPN) is information representing the logical page number (LPN) of the logical page to which the logical sector area corresponding to the head data of a series of data belongs. The page counter (PCNT) is information indicating the number of pages from the logical page to which the logical sector area corresponding to the head data of a series of data belongs to the logical page to which the logical sector area corresponding to the end data of the series of data belongs. is there. The start pointer (SP), the start logical sector number (SLSN), and the page count (PCNT) are used when creating a page information table indicating the correspondence between logical pages and physical pages.
In the second embodiment, the correspondence between the logical page and the physical page changes, but the relative relationship between the four physical sector areas 60 in the physical page and the four logical sector areas in the logical page is It does not change. Therefore, in the second embodiment, the correspondence between 256 logical sector areas included in the logical block and 256 physical sector areas 60 included in the physical block is managed in page units. That is, as in the present embodiment, when four physical sector areas 60 are included in one physical page, the physical sector is set so that the lower 2 bits of the PSN and the lower 2 bits of the LSN always match. Correspondence between the area 60 and the logical sector area is determined. That is, the data corresponding to the LSN whose lower 2 bits are 00 is stored in the first physical sector 60a, the data corresponding to the LSN whose lower 2 bits are 01 is stored in the second physical sector 60b, and the lower 2 bits are 10 The data corresponding to the LSN is stored in the third physical sector, and the data corresponding to the LSN having the lower 2 bits of 11 is stored in the fourth physical sector. The logical page number (LPN) corresponds to the upper 6 bits of the 8-bit LSN, and the physical page number corresponds to the upper 6 bits of the 8-bit PSN.

  Next, how to obtain the start pointer (SP), the start logical sector number (SLSN), and the page count (PCNT) will be described. In the NAND flash memory used in the present embodiment, the lower 8 bits of the LBA written in the LBA register R3 correspond to the LSN of the logical sector area corresponding to the head data of a series of data. Further, the value of the upper 6 bits of this LSN corresponds to the value of SLPN which is the LPN of the logical page to which the logical sector area corresponding to the head data of the series of data belongs. That is, the LPN of the logical page to which the logical sector area corresponding to the head data of a series of data corresponds to SLPN.

  The LSN of the logical sector area corresponding to the end data of a series of data corresponds to a value obtained by adding the value of the number of sectors written in the sector number register R2 to the LSN corresponding to the lower 8 bits of the LBA and subtracting one. To do. If this value is 255 or less, a series of data belongs to one physical block. Further, the upper 6 bits of the 8-bit value correspond to the end logical page number (ELPN) which is the LPN of the logical page to which the logical sector area corresponding to the end data of the series of data belongs. That is, the LPN of the logical page to which the logical sector area corresponding to the end data of a series of data corresponds to ELPN. By subtracting SLPN from this ELPN and adding one, PCNT is obtained.

  If the value of the number of sectors written in the sector number register R2 is added to the LSN and the value obtained by subtracting 1 is 256 or more, the logical access area spans a plurality of logical blocks. The end logical page number (ELPN) of the first series of data corresponds to # 63 which is the LPN of the last logical page in the logical block.

  The SP corresponds to a value obtained by adding the PPN value of the physical page in which the data corresponding to the logical page to which the logical sector area corresponding to the first data of the series of data belongs is added to the PCNT value related to the series of data. . Or it is good also considering SP as the sum total of the value of PCNT regarding a series of data already preserve | saved.

  Also in the second embodiment, SP, SLPN, and PCNT are stored in the common redundant area 50, but only SP and SLPN may be written. In this case, PCNT may be determined as appropriate from the difference in SP regarding two consecutive series of data. Alternatively, only the SLPN and PCNT may be written in the common redundant area 50, and the SP may be obtained as appropriate by cumulatively adding PCNT relating to a series of data that has already been stored.

  The LBN of the logical block to which the logical access area belongs corresponds to the value of the upper bit excluding the bit indicating the LSN (the lower 8 bits in this embodiment) from the LBA written in the LBA register R3. When the logical access area extends over two logical blocks, the value obtained by adding 1 to the value given by the higher-order bits excluding the bit indicating LSN from LBA is the second value. Corresponds to the LBN of the logical block.

  The PBA corresponding to the LBN obtained based on the LBA written in the LBA register R3 is obtained using the address conversion table. A series of data writing is started from the first physical page in which data in the physical block corresponding to the obtained PBA is not written.

If either of the following two cases is satisfied, a free block search is performed, and a series of data is written in the physical block obtained by the free block search.
(1) When there is no physical block corresponding to the obtained logical block of LBN.
(2) A physical block corresponding to the obtained logical block of LBN exists, but there is not enough free space (physical page in which no data is written) to write data in the logical block.

  A series of data is sequentially written from the first physical page to the last physical page in the physical block. That is, the memory controller 3 writes a series of data in order from the physical page having the smallest PPN value.

  In addition, SP, SLPN, and PCNT values relating to the series of data are written in the common redundant area 50 of the physical page in which the series of data is written.

In the example shown in FIG. 8, four series of data are stored in the physical block of PBA # 24. The four series of data write processing will be specifically described. In the example shown in FIG. 8, D # n indicates data corresponding to the logical sector area of LSN # n. For example, D # 4 indicates data corresponding to the logical sector area of LSN # 4.
(First data write process)

  First, the host system 4 writes the command code of the write command in the command register R1, 4 in the LBA register R3, and 24 in the sector number register R2. From the LBA # 4 written in the LBA register R3 and the value 24 written in the sector number register R2, the memory controller 3 determines that the LBA of the logical access area designated as the write destination of this series of data is # 4- #. 27, it is determined that this logical access area is included in the logical block of LBN # 0 and does not straddle a plurality of logical blocks. That is, it is determined that a series of data is stored in a single physical block.

  The logical block of LBN # 0 belongs to the logical zone of LZN # 0, and the logical zone of LZN # 0 is assigned to the physical zone of PZN # 0. Since there is no physical block corresponding to the logical block of LBN # 0, the memory controller 3 searches for an empty block from the physical zone of PZN # 0 and detects, for example, a physical block of PBA # 24 as an empty block. If there is already a physical block in which data corresponding to the logical block of LBN # 0 is stored, and this series of data can be written to this physical block, the free block search is not performed and this physical block is not searched. This series of data is written to a physical page to which no block data is written.

Next, SP, SLPN, and PCNT written to the common redundant area 50 of the physical page to which this series of data is written will be described. From the value of the lower 8 bits of the LBA written to the LBA register R3 and the value written to the sector number register R2 added to the lower 8 bits of this LBA and subtracting 1, this series of data is converted to LSN # It can be seen that this corresponds to the 4- # 27 logical sector area. Here, since the upper 6 bits of this 8-bit LSN correspond to LPN, the LPN of the logical page to which the logical sector area of LSN # 4 belongs is # 1, and the logical page of the logical page to which the logical sector area of LSN # 27 belongs. It can be seen that the LPN is # 6. Accordingly, # 1 is obtained as a value corresponding to SLPN regarding this series of data, and 6 is obtained as a value corresponding to PCNT. # 6 is obtained as a value corresponding to SP from # 0 and PCNT value 6 which are PPN of the physical page where writing of a series of data starts.
The memory controller 3 starts writing a series of data from the physical page of PPN # 0 of the physical block of PBA # 24, and the series of data instructed to write to the logical access area of LBA # 4- # 27 is: It is written in the physical pages of PPN # 0- # 5. At this time, SP # 6, SLSN # 1, and SCNT6 are written in all the common redundant areas 50 corresponding to the physical pages of PPN # 0- # 5.
(Second series of data write processing)

  First, the host system 4 writes the command code of the write command in the command register R1, 0 in the LBA register R3, and 12 in the sector number register R2. From the LBA # 0 written to the LBA register R3 and the value 12 written to the sector number register R2, the memory controller 3 determines that the LBA of the logical access area designated as the write destination of this series of data is # 0- #. 11. It is determined that this logical access area is included in the logical block of LBN # 0 and does not straddle a plurality of logical blocks. That is, it is determined that a series of data is stored in a single physical block.

  Further, the memory controller 3 determines that the logical block of LBN # 0 corresponds to the physical block of PBA # 24 based on the address conversion table describing the correspondence between the logical block and the physical block. Subsequently, a free page search is performed to search the top of a physical page in which data in the physical block of PBA # 24 is not written. After completion of the empty page search, writing of this series of data is started from the physical page of PPN # 6 that is the head of the physical page in which data in the physical block is not written.

  Next, SP, SLPN, and PCNT written in the common redundant area 50 corresponding to the physical page in which this series of data is written will be described. From the value of the lower 8 bits of the LBA written to the LBA register R3 and the value written to the sector number register R2 added to the lower 8 bits of this LBA and subtracting 1, this series of data is converted to LSN # It can be seen that this corresponds to the logical sector area 0- # 11. Here, since the upper 6 bits of the 8-bit LSN correspond to LPN, the LPN of the logical page to which the logical sector area of LSN # 0 belongs is # 0, and the logical page of the logical page to which the logical sector area of LSN # 11 belongs. It can be seen that LPN is # 2. Accordingly, # 0 is obtained as a value corresponding to SLPN relating to this series of data, and 3 is obtained as a value corresponding to PCNT. # 9 is obtained as a value corresponding to SP from # 6, which is the PPN of the physical page where writing of a series of data starts, and the value 3 of PCNT.

Therefore, a series of data instructed to be written to the logical access areas of LBA # 0 to # 11 is written to the physical page of PPN # 6- # 8. At this time, SP # 9, SLSN # 0, and SCNT3 are written in all the common redundant areas 50 corresponding to the physical pages of PPN # 6- # 8.
(3rd data write process)

  First, the host system 4 writes the command code of the write command in the command register R1, 14 in the LBA register R3, and 14 in the sector number register R2. From the LBA # 14 written in the LBA register R3 and the value 14 written in the sector number register R2, the memory controller 3 determines that the LBA of the logical access area designated as the write destination of this series of data is # 14- #. 27, it is determined that this logical access area is included in the logical block of LBN # 0 and does not straddle a plurality of logical blocks. That is, it is determined that a series of data is stored in a single physical block.

  Further, the memory controller 3 determines that the logical block of LBN # 0 corresponds to the physical block of PBA # 24 based on the address conversion table describing the correspondence between the logical block and the physical block. Subsequently, a free page search is performed to search the top of a physical page in which data in the physical block of PBA # 24 is not written. After completion of the empty page search, writing of a series of data is started from the physical page of PPN # 9 that is the head of the physical page in which data in the physical block is not written.

  Next, SP, SLPN, and PCNT written in the common redundant area 50 corresponding to the physical page in which this series of data is written will be described. From the value of the lower 8 bits of the LBA written to the LBA register R3 and the value written to the sector number register R2 added to the lower 8 bits of this LBA and subtracting 1, this series of data is converted to LSN # It can be seen that this corresponds to the logical sector area 14- # 27. Here, since the upper 6 bits of the 8-bit LSN correspond to the LPN, the LPN of the logical page to which the logical sector area of LSN # 14 belongs is # 3, and the logical page of the logical page to which the logical sector area of LSN # 27 belongs. It can be seen that the LPN is # 6. Accordingly, # 3 is obtained as a value corresponding to SLPN relating to this series of data, and 4 is obtained as a value corresponding to PCNT. # 13 is obtained as a value corresponding to SP from # 9, which is the PPN of the physical page where writing of this series of data starts, and the value 4 of PCNT.

  Therefore, a series of data instructed to be written to the logical access areas of LBA # 14 to # 27 is written to the physical pages of PPN # 9 to # 12. At this time, SP # 13, SLSN # 3, and SCNT4 are written in all the common redundant areas 50 corresponding to the physical pages of PPN # 9- # 12.

Since the LSN of the logical sector area corresponding to the head data of this series of data is # 14, it corresponds to the logical sector area of LSN # 12- # 13 of the logical page of LPN # 3 to which the logical sector area of LSN # 14 belongs. The data to be included is not included in this series of data. In such a case, the data corresponding to the logical sector area of LSN # 12- # 13 included in the series of data written before this series of data is the first of the physical page of PPN # 9. The data is copied to the physical sector area 60a and the second physical sector area 60b. In the example shown in FIG. 8, since the data corresponding to the logical page of LPN # 3 is written in the physical page of PPN # 2, the first physical sector area 60a and the second physical sector of the physical page of PPN # 2 are written. The data written in the sector area 60b is respectively copied to the first physical sector area 60a and the second physical sector area 60b of the physical page of PPN # 9.
In addition, when data included in a series of data written before this series of data is copied to a physical page in which the beginning data or end data of the series of data is written, the data to be copied is written. The PPN of the physical page being obtained is obtained by referring to a page information table described later.
(4th data write process)

  First, the host system 4 writes the command code of the write command in the command register R1, 0 in the LBA register R3, and 14 in the sector number register R2. From the LBA # 0 written to the LBA register R3 and the value 14 written to the sector number register R2, the memory controller 3 determines that the LBA of the logical access area designated as the write destination of this series of data is # 0- #. 13. It is determined that this logical access area is included in the logical block of LBN # 0 and does not straddle a plurality of logical blocks. That is, it is determined that a series of data is stored in a single physical block.

  Further, the memory controller 3 determines that the logical block of LBN # 0 corresponds to the physical block of PBA # 24 based on the address conversion table describing the correspondence between the logical block and the physical block. Subsequently, a free page search is performed to search the top of a physical page in which data in the physical block of PBA # 24 is not written. After the empty page search is finished, the writing of this series of data is started from the physical page of PPN # 13 which is the head of the physical page in which data in the physical block is not written.

  Next, SP, SLPN, and SCNT written in the common redundant area 50 corresponding to the physical page in which this series of data is written will be described. From the value of the lower 8 bits of the LBA written to the LBA register R3 and the value written to the sector number register R2 added to the lower 8 bits of this LBA and subtracting 1, this series of data is converted to LSN # It can be seen that this corresponds to the logical sector area 0- # 13. Here, since the upper 6 bits of the 8-bit LSN correspond to LPN, the LPN of the logical page to which the logical sector area of LSN # 0 belongs is # 0, and the logical page of the logical page to which the logical sector area of LSN # 13 belongs. It can be seen that LPN is # 3. Accordingly, # 0 is obtained as a value corresponding to SLPN regarding this series of data, and 4 is obtained as a value corresponding to PCNT. # 17 is obtained as a value corresponding to SP from # 13 which is the PPN of the physical page where writing of a series of data starts and the value 4 of PCNT.

  Therefore, a series of data instructed to be written to the logical access areas of LBA # 0 to # 13 is written to the physical pages of PPN # 13 to # 16. At this time, SP # 17, SLSN # 0, and SCNT4 are written in all the common redundant areas 50 corresponding to the physical pages of PPN # 13- # 16.

  Since the LSN of the logical sector area corresponding to the end data of this series of data is # 13, it corresponds to the logical sector area of LSN # 14- # 15 of the logical page of LPN # 3 to which the logical sector area of LSN # 13 belongs. The data to be included is not included in this series of data. In such a case, the data corresponding to the logical sector area of LSN # 14- # 15 included in the series of data written before this series of data is the third page of the physical page of PPN # 16. The data is copied to the physical sector area 60c and the fourth physical sector area 60d. In the example shown in FIG. 8, since the newer data corresponding to the logical page of LPN # 3 is written in the physical page of PPN # 9, the third physical sector area 60c of the physical page of PPN # 9 and The data written in the fourth physical sector area 60d is copied to the third physical sector area 60c and the fourth physical sector area 60d of the physical page of PPN # 16, respectively.

  The data corresponding to the logical page of LPN # 3 is written in the physical page of PPN # 2 and the physical page of PPN # 9. If the PPN of the physical page in which the corresponding data is written is obtained, the PPN of the physical page in which the newer data corresponding to the logical page of LPN # 3 is written is obtained.

  Next, a free page search for searching for the top of a physical page in which data in a physical block is not written will be described. This empty page search can be performed based on SP or PCNT written in the common redundant area 50. In the second embodiment, a page information table (to be described later) must be created even when writing (for example, when already written data is copied). It is preferable to perform page information table creation processing described later in parallel.

  For example, based on the SP written in the common redundant area 50 of the first physical page (physical page of PPN # 0) in the physical block, the physical page (first The physical page next to the page in which the end data of the series of data is written can be found. When the second series of data is not written, SP is not written in the common redundant area 50 of the physical page where writing of the second series of data is started, but the second series of data is If written, SP is written in the common redundant area 50 of the physical page where writing of the second series of data is started.

Further, based on the SP written in the common redundant area 50 of the physical page where writing of the second series of data is started, the physical page where writing of the third series of data is started is known. In this way, the SPs written in the common redundant area 50 of the physical page where the next series of data starts to be written are sequentially read. When the SP is not written, the physical page is written with data. It is determined that it is the top of a physical page that has not been printed.
<Page information table creation process>

  When accessing each physical block, a page information table indicating the correspondence between the physical page included in the physical block and the logical page included in the logical block corresponding to the physical block is created. For example, when the command code of the read command is written in the command register R1, the memory controller 3 determines the logical access area based on the information written in the LBA register R3 and the sector number register R2. That is, the logical block and logical page to be accessed are determined. Further, the memory controller 3 determines a physical block corresponding to the logical block to be accessed based on the address conversion table, and further determines a physical page corresponding to the logical page to be accessed based on the page information table.

  Next, the page information table creation process will be described. In the process of creating the page information table, the memory controller 3 reads SLPN and PCNT from the common redundant area 50 of the physical page in which the first data of a series of data is stored, and sets the logical page and physical page in a series of data units. The correspondence relationship is determined, and the correspondence relationship between the determined logical page and physical page is written on the page information table.

  In this page information table creation process, the SP is read together with SLPN and PCNT, and the physical page in which the first data of the next series of data is stored is determined based on the read SP. Note that the physical page in which the first data of the next series of data is stored may be determined based on the value of PCNT without using SP.

  Further, in order to confirm whether a series of data is normally written up to the end data, SP, SLPN, and PCNT stored in the common redundant area 50 of the physical page in which the top data of the series is stored Whether the SP, SLPN, and PCNT stored in the common redundant area 50 of the physical page in which the end data is stored matches is confirmed. When a series of data has not been normally written up to the end data, for example, when the power is cut off before the end data is written, the common redundant area 50 of the physical page in which the end data is to be written has SP, Since SLPN and PCNT are not written, SP, SLPN and PCNT read from both common redundant areas 50 do not match. In such a case, it is determined that the series of data is not normally written. Therefore, SP, SLPN, and PCNT stored in the common redundant area 50 of the physical page in which the first data of a series of data is stored, and the common redundant area 50 of the physical page in which the end data is stored are stored. If the SP, SLPN, and PCNT that are present do not match, the page information table creation process ends without reflecting the correspondence between the logical page and the physical page corresponding to the series of data in the page information table.

  Next, with reference to FIG. 9, an example of creating a page information table will be described with respect to the case where four series of data is stored in the physical block of PBA # 24 as shown in FIG. When this page information table is created, an area for writing PPN corresponding to LPN # 0 to # 63 (hereinafter referred to as a page information table creation area) is secured in the work area 8.

  First, SP, SLPN, and PCNT are read from the common redundant area 50 of the physical page of PPN # 0 of the physical block of PBA # 24. From the SP read from the common redundant area 50 of the physical page of PPN # 0, the storage destination of the tail data of the first series of data is determined. Subsequently, SP, SLPN, and PCNT are read from the common redundant area 50 of the physical page of PPN # 5, which is the storage destination of the tail data, in order to check whether the first series of data is normally stored up to the tail data. It is.

The values of SP, SLPN, and PCNT read from the common redundant area 50 of the physical page of PPN # 0 are equal to the values of SP, SLPN, and PCNT read from the common redundant area 50 of the physical page of PPN # 5. It is judged whether or not. When the two values are equal, it is determined that the writing of the first series of data has been completed normally, and information relating to the first series of data is reflected in the page information table.
In this reflection process, it is determined from the SLPN and PCNT values (SLPN # 1, PCNT6) that the logical pages of LPN # 1- # 6 correspond to the physical pages of PPN # 0- # 5. As shown in (A), PPN values # 0- # 5 are written in the area corresponding to LPN # 1- # 6 in the page information table creation area. That is, # 0 is written as the PPN value in the area corresponding to LPN # 1, # 1 is written as the PPN value in the area corresponding to LPN # 2, and the PPN value is written in the area corresponding to LPN # 3. # 2 is written, PPN is written in the same manner, and # 5 is written as the value of PPN in the area corresponding to LPN # 6. Note that the storage destination of the top data of the second series of data is determined to be a physical page of PPN # 6 from the SP value.

  Next, SP, SLPN, and PCNT are read from the common redundant area 50 of the physical page of PPN # 6, which is the storage destination of the top data of the second series of data. Since the read SP value is # 9, the storage destination of the tail data of the second series of data is determined to be the physical page of PPN # 8, and is common to the physical pages of PPN # 8. The values of SP, SLPN, and PCNT written in the redundant area 50 are read out. When SP, SLPN, and PCNT read from the common redundant area 50 of the physical page of PPN # 6 are equal to the values of SP, SLPN, and PCNT read from the common redundant area 50 of the physical page of PPN # 8, It is determined that the writing of the second series of data has been normally completed, and information regarding the second series of data is reflected in the page information table.

  In this reflection process, it is determined from the SLPN and PCNT values (SLPN # 0, SCNT3) that the logical pages of LPN # 0- # 2 correspond to the physical pages of PPN # 6- # 8. As shown in (B), # 6- # 8, which is the value of PPN, is written in the area corresponding to LPN # 0- # 2 in the sector information table creation area. That is, # 6 is written as the PPN value in the area corresponding to LPN # 0, # 7 is written as the PPN value in the area corresponding to LPN # 1, and the PPN value is written in the area corresponding to LPN # 2. # 8 is written. Note that the storage destination of the top data of the third series of data is determined to be a physical page of PPN # 9 from the SP value.

  Next, SP, SLPN, and PCNT are read from the common redundant area 50 of the physical page of PPN # 9 that is the storage destination of the top data of the third series of data. Since the read SP value is # 13, the storage destination of the tail data of the third series of data is determined to be the physical page of PPN # 12, and is common to the physical pages of PPN # 12. The values of SP, SLPN, and PCNT written in the redundant area 50 are read out. When SP, SLSN, and SCNT read from the common redundant area 50 of the physical page of PPN # 9 are equal to the values of SP, SLPN, and PCNT read from the common redundant area 50 of the physical page of PPN # 12, It is determined that the writing of the third series of data has been normally completed, and information regarding the third series of data is reflected in the page information table.

  In this reflection processing, it is determined from the values of SLPN and PCNT (SLPN # 3, PCNT4) that the logical pages of LPN # 3- # 6 correspond to the physical pages of PPN # 9- # 12, and FIG. As shown in (C), # 9- # 12 which is the value of PPN is written in the area corresponding to LPN # 3- # 6 in the page information table creation area. At this time, # 2- # 5 written in the area corresponding to LPN # 3- # 6 in the page information table creation area is rewritten to # 9- # 12. In this way, in the page information table creation process, information regarding a series of data written later is prioritized. Note that the storage destination of the head data of the fourth series of data is determined to be a physical page of PSN # 13 from the SP value.

  Next, SP, SLPN, and PCNT are read from the common redundant area 50 of the physical page of PPN # 13 that is the storage destination of the top data of the fourth series of data. Since the read SP value is # 17, the storage destination of the tail data of the fourth series of data is determined to be the physical page of PPN # 16, and is common to the physical pages of PSN # 16. The values of SP, SLPN, and PCNT written in the redundant area 50 are read out. When SP, SLPN, and PCNT read from the common redundant area 50 of the physical page of PPN # 13 are equal to the values of SP, SLPN, and PCNT read from the common redundant area 50 of the physical page of PSN # 16, It is determined that the writing of the fourth series of data has been normally completed, and information regarding the fourth series of data is reflected in the page information table.

  In this reflection process, it is determined from the SLPN and PCNT values (SLSN # 0, SCNT4) that the logical pages of LPN # 0- # 3 correspond to the physical pages of PSN # 13- # 16. As shown in (D), # 13- # 16, which is the value of PPN, is written in the area corresponding to LPN # 0- # 3 in the page information table creation area. At this time, # 6- # 9 written in the area corresponding to LSN # 0- # 3 in the sector information table creation area is rewritten to # 13- # 16. Note that the storage destination of the top data of the fifth series of data is determined to be the physical page of PPN # 17 from the SP value.

Next, the SP, SLPN, and PCNT are read from the common redundant area 50 of the physical page of PSN # 17 that is the storage destination of the first data of the fifth series of data, but the SP, SLPN, and PCNT are written. The page information table creation process is terminated because there is not.
<Processing related to abnormal termination>

  FIG. 10 shows a case where the writing of the fourth series of data does not end normally in the writing of the four series of data shown in FIG. The writing of the fourth series of data ends in a state where the data is written in the physical pages of PPN # 13- # 14, and no data is stored in the physical pages of PPN # 15- # 16. In the following, a process for creating a page information table in a physical block in which such abnormal termination has occurred will be described.

  Since the writing of the first series of data, the second series of data, and the third series of data has been normally completed, information regarding these series of data is reflected in the sector information table. However, in the reflection process for the fourth series of data, the SP, SLPN, and PCNT read from the common redundant area 50 of the physical page of PPN # 13, and the common redundant area 50 of the physical page of PSN # 16 are read. Since the values of SP, SLPN, and PCNT are not equal, it is determined that the writing of the fourth series of data has not been completed normally, and information regarding the fourth series of data is not reflected in the sector information table. Therefore, a page information table (page information table shown in FIG. 9C) reflecting information on the first series of data, the second series of data, and the third series of data is stored in this physical block. Used as a page information table.

  When a physical block in which such a partial series of data is not normally written is found, valid data stored in the physical block is transferred to another physical block. In other words, data that has not been rewritten by a subsequent series of data among a series of data that has been normally written is transferred to another physical block.

  Next, this transfer process will be described. This transfer process is performed based on a page information table in which information about a series of data written normally is reflected. That is, data stored in the physical page corresponding to the PPN written in the page information table creation area is transferred to another physical block. As shown in FIG. 10, when the writing of the fourth series of data is not normally completed, the first series of data, the second series of data, and the third series shown in FIG. Transfer processing is performed based on a page information table reflecting information related to a series of data.

  A transfer process based on the page information table shown in FIG. 9C will be described. In this transfer process, a search is made for a transfer destination physical block (empty block). Here, it is assumed that an empty block in the physical zone of PZN # 1 is searched and a physical block of PBA # 10 is detected as an empty block. When data stored in the physical block of PBA # 24 is transferred to the physical block of PBA # 10, the data is ordered in ascending order of the LPN value based on the page information table in (C) of FIG. Is transferred. That is, data stored in the physical page corresponding to the PPN written in the page information table creation area is transferred in order from the one having the smallest LPN value corresponding to the PPN.

  In the case of the page information table of FIG. 9C, only the PPN corresponding to LPN # 0- # 6 is written in the page information table creation area. Therefore, among the data stored in the physical block of PBA # 24, the data stored in the physical page corresponding to the PPN written in the area corresponding to LSN # 0 to # 6 in the page information table creation area Only the physical block of PBA # 10 is transferred.

  Next, transfer processing with reference to the page information table shown in FIG. 9C will be described with reference to FIG. In the example illustrated in FIG. 11, D # n indicates data corresponding to LPN # n. First, in the page information table of FIG. 9C, since PPN # 6 corresponds to LPN # 0, the data stored in the physical page of PPN # 6 in the physical block of PBA # 24 is PBA # 24. It is transferred to the physical page of PPN # 0 of the physical block of # 10. Next, since PPN # 7 corresponds to LPN # 1, the data stored in the physical page of PPN # 7 of the physical block of PBA # 24 is transferred to the physical page of PPN # 1 of PBA # 10 Is done. The same processing is performed in the order of LPN, and the data stored in the physical page of PPN # 12 of the physical block of PBA # 24 is transferred to the physical page of PPN # 6 of the physical block of PBA # 10. Thus, this transfer process ends.

  Next, SP, SLPN, and PCNT written in the common redundant area 50 during this transfer process will be described. In this transfer processing, since the LPNs of all data transferred from the physical block of PBA # 24 to the physical block of PBA # 10 are continuous, all the data is regarded as “a series of data” and the physical block of PBA # 10. SP, SLPN, and PCNT that are considered to have been written to are set. That is, when this transfer process is completed, # 7, which is the PPN corresponding to the top of the physical page in which data in the physical block block of PBA # 10 is not written, becomes the SP value. # 0, which is the LPN corresponding to the head data of this series of data, becomes the SLPN value. The value of PCNT is 7 which is the number of pages of data included in this series of data.

  In this way, when transferring data of a physical block that has ended abnormally, transfer processing is performed by regarding data corresponding to logical pages with continuous LPNs as a series of data. Therefore, SP, SLPN, and PCNT are set by regarding data corresponding to logical sector areas in which LPNs are continuous as a series of data. That is, the LPN of the first logical page of the logical pages with continuous LPN becomes SLPN, and the number of logical pages with continuous LPN becomes PCNT. The value of SP is a value obtained by adding the value of PCNT to the value of PPN of the physical page to which data corresponding to the first logical page of the logical pages with continuous LPNs is written.

  According to the flash memory system 1 of the second embodiment, the SP, SLPN, and PCNT related to this series of data are written in the common redundant area 50 corresponding to the physical page where the series of data is stored. Further, the correspondence between the logical page and the physical page related to this series of data can be grasped based on the SLPN and PCNT related to this series of data. Therefore, the SLPN and PCNT written in the common redundant area 50 of the physical page in which the first data of a series of data is stored is read, and the correspondence between the logical page and the physical page grasped based on the read SLPN and PCNT By reflecting the relationship in the page information table, the page information table can be completed.

  The correspondence between the logical page and the physical page related to each series of data is given priority over the series of data written later, so the correspondence between the logical page and the physical page related to each series of data is It is reflected in the page information table in the order in which a series of data is written.

  Further, the PPN of the physical page in which the head data of each series of data is stored can be grasped based on the SP related to the previous series of data. When the SP is not written in the common redundant area 50, the PPN of the physical page in which the head data of each series of data is stored can be grasped based on the PCNT.

  Further, the SP, SLPN, and PCNT written in the common redundant area 50 of the physical page in which the first data of the series of data is stored, and the common corresponding to the physical page in which the end data of the series of data is stored. Whether SP, SLPN, and PCNT written in the redundant area 50 match can determine whether the series of data is normally written. Accordingly, only the correspondence between the logical page and the physical page regarding a series of data written normally is reflected in the page information table.

  It should be noted that the flash memory system of the present invention is not limited to the above-described embodiment, and it is needless to say that various modifications can be made without departing from the gist of the present invention.

  For example, in the above embodiment, the number of physical sector areas included in the logical block area and the physical block included in the logical block are the same. However, the number of logical sector areas included in the logical block may be smaller than the number of physical sector areas included in the physical block. In this way, even after data corresponding to all logical sector areas included in the logical block is stored in the physical block, the rewrite data of the data is changed to the empty area (data is written in the physical block). The data can be stored in a physical sector area or physical page that is not present. This makes it possible to efficiently rewrite data. For example, when the number of logical sector areas included in the logical block and the number of physical sector areas included in the physical block are both given by powers of 2, the number of logical sector areas included in the logical block Is 128, and the number of physical sector areas included in the physical block is 256.

1 is a block diagram showing a schematic configuration of a flash memory system according to an embodiment of the present invention. It is a figure which shows the structure of the physical page of flash memory. It is a figure which shows the correspondence of a logical block and a physical block. It is the figure which showed the structure of a series of data preserve | saved at a physical block. It is the figure which showed the structure of the sector information table. It is the figure which showed the physical block which ended abnormally. It is a figure explaining the transfer of the data between physical blocks. It is the figure which showed the structure of a series of data preserve | saved at the physical block in the data writing method of 2nd Embodiment. It is the figure which showed the structure of the page information table. It is the figure which showed the physical block which ended abnormally. It is a figure explaining the transfer of the data between physical blocks.

Explanation of symbols

1 Flash memory system 2 Flash memory 3 Memory controller 6 Microprocessor

Claims (13)

A memory controller that controls access to a flash memory that is erased in units of physical blocks including a plurality of physical sector areas, based on an access instruction given from a host system,
A block management means for managing a correspondence relationship between a logical block composed of a plurality of logical sector areas and the physical block;
The logical block to which the logical access area designated as the access target area by the access instruction belongs, the logical sector area corresponding to the head area of the logical access area belonging to the logical block, and the logical access belonging to the logical block Logical access area determining means for determining the number of sectors in the area;
Empty sector area search means for searching for the beginning of a physical sector area in which data in the physical block corresponding to the logical block to which the logical access area belongs is not written;
A series of data instructed to be written to the logical access area by the access instruction is changed from the first physical sector area to which the data detected by the free sector area search means is not written to the last physical sector area. Data writing means for sequentially writing toward the
The redundant area corresponding to the physical sector area in which the series of data is written by the data writing means, the logical sector area corresponding to the head area of the logical access area belonging to the logical block, and the logical area belonging to the logical block A memory controller comprising logical sector information writing means for writing information for determining the number of sectors in an access area. Sector area management means for determining a correspondence relationship between a physical sector area in the physical block in which one or a plurality of the series of data is written and a logical sector area in the logical block corresponding to the physical block; Prepared,
The sector area management means reads the information written by the logical sector information writing means from the redundant area corresponding to each physical sector area in which the first data of the series of data is written, and reads the information into the read information. 2. The memory controller according to claim 1, wherein a correspondence relationship between a physical sector area in the physical block and a logical sector area in the logical block corresponding to the physical block is determined based on the basis.   The sector area management means includes a redundant area corresponding to a physical sector area where head data of the series of data is written and a redundant area corresponding to a physical sector area where tail data of the series of data is written, The information written by the logical sector information writing means is read, and when the information read from both redundant areas coincides, it is determined that the series of data is normally written. The memory controller according to claim 2. A memory controller that controls access to a flash memory that is erased in units of physical blocks including a plurality of physical pages, based on an access instruction given from a host system,
Block management means for managing a correspondence relationship between a logical block composed of a plurality of logical pages and the physical block;
The logical block to which the logical access area specified as the access target area by the access instruction belongs, the logical page corresponding to the head area of the logical access area belonging to the logical block, and the logical access area belonging to the logical block Logical access area determination means for determining the number of pages from the logical page corresponding to the head area to the logical page corresponding to the end area;
Empty page search means for searching for the beginning of a physical page in which data in the physical block to which the logical access area belongs is not written;
A series of data instructed to be written to the logical access area by the access instruction is directed from the first physical page to which the data detected by the empty page search means is not written to the last physical page. Data writing means for sequentially writing;
A logical area corresponding to a head area of the logical access area belonging to the logical block, a logical page included in the logical block A memory controller, comprising: logical page information writing means for writing information for determining the number of pages from a logical page corresponding to the top area to a logical page corresponding to the end area. Page management means for determining a correspondence relationship between a physical page in the physical block in which one or a plurality of the series of data is written and a logical page in the logical block corresponding to the physical block;
The page management means reads the information written by the logical page information writing means from the redundant area corresponding to each physical page in which the first data of the series of data is written, and based on the read information The memory controller according to claim 4, wherein a correspondence relationship between a physical page in the physical block and a logical page in the logical block corresponding to the physical block is determined.   The page management means includes the logical page from a redundant area corresponding to a physical page in which head data of the series of data is written and a redundant area corresponding to a physical page in which tail data of the series of data is written. The information written by the information writing means is read, and when the information read from both redundant areas matches, it is determined that the series of data has been written normally. 5. The memory controller according to 5. A memory controller according to claim 1;
And a flash memory system accessed by the memory controller. A flash memory control method for controlling access to a flash memory to be erased in units of physical blocks including a plurality of physical sector areas based on an access instruction given from a host system,
Forming a logical block composed of a plurality of logical sector areas, the logical block to which the logical access area designated as the access target area by the access instruction belongs, and the leading area of the logical access area belonging to the logical block A logical access area determination step for determining a logical sector area corresponding to the number of sectors of the logical access area belonging to the logical block;
A physical block determining step for determining the physical block corresponding to the logical block to which the logical access area belongs;
A free sector area search step for searching for the beginning of a physical sector area in which data in the physical block determined in the physical block determination step is not written;
A series of data instructed to be written to the logical access area by the access instruction is changed from the first physical sector area to which the data detected in the empty sector area search step is not written to the last physical sector area. A data writing step of sequentially writing toward the
In a redundant area corresponding to the physical sector area in which the series of data is written in the data writing step, a logical sector area corresponding to a head area of the logical access area belonging to the logical block, and the logical area belonging to the logical block And a logical sector information writing step for writing information for determining the number of sectors in the access area. A first logical sector information reading step for reading out the information written in the logical sector information writing step from a redundant area corresponding to a physical sector area in which head data of the series of data is written;
Logic that determines the correspondence between the physical sector area in the physical block and the logical sector area in the logical block corresponding to the physical block based on the information read in the first logical sector information reading step The flash memory control method according to claim 8, further comprising a sector area determination step. A second logical sector information reading step for reading the information written in the logical sector information writing step from a redundant area corresponding to a physical sector area in which tail data of the series of data is written;
The redundant area corresponding to the physical sector area where the first data of the series of data is written and the logical block read from the redundant area corresponding to the physical sector area where the end data of the series of data is written When the information for determining the number of sectors in the logical access area belonging to the logical block coincides with the logical sector area corresponding to the head area of the logical access area, it is determined that the series of data is normally written. 10. The flash memory control method according to claim 9, further comprising a determination step. A flash memory control method for controlling access to a flash memory to be erased in units of physical blocks including a plurality of physical pages, based on an access instruction given from a host system,
A logical block composed of a plurality of logical pages is formed, and the logical block to which the logical access area designated as the access target area by the access instruction belongs, and the top area of the logical access area belonging to the logical block A logical access area determination step for determining a corresponding logical page and the number of pages from the logical page corresponding to the top area of the logical access area belonging to the logical block to the logical page corresponding to the end area;
A physical block determining step for determining the physical block corresponding to the logical block to which the logical access area belongs;
A free page search step for searching for the beginning of a physical page in which data in the physical block determined in the physical block determination step is not written;
A series of data instructed to be written to the logical access area by the access instruction is directed from the first physical page to which the data detected in the empty page search step is not written to the last physical page. A data writing step of sequentially writing;
In the redundant area corresponding to the physical page in which the series of data is written in the data writing step, the logical page corresponding to the head area of the logical access area belonging to the logical block, and the logical access area belonging to the logical block And a logical page information writing step for writing information for determining the number of pages from the logical page corresponding to the first area to the logical page corresponding to the end area. A first logical page information reading step for reading the information written in the logical page information writing step from a redundant area corresponding to a physical page in which the first data of the series of data is written;
Logical page determination for determining the correspondence between the physical page in the physical block and the logical page in the logical block corresponding to the physical block based on the information read in the first logical page information reading step 12. The flash memory control method according to claim 11, further comprising: a step. A second logical page information reading step for reading the information written in the logical page information writing step from a redundant area corresponding to a physical page in which tail data of the series of data is written;
The logical access belonging to the logical block read from the redundant area corresponding to the physical page to which the first data of the series of data is written and the redundant area corresponding to the physical page to which the end data of the series of data is written A determination step of determining that the series of data is normally written when the information for determining the number of sectors in the logical access area belonging to the logical block matches the logical page corresponding to the first area of the area; The flash memory control method according to claim 12, comprising:

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