JP2008262197A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To minimize the protrusion length of a protrusion part in a display device provided with substrates opposite to each other, one side substrate being protruded in one direction to form the protrusion part on which two driving semiconductor chips are mounted in series. <P>SOLUTION: The semiconductor chip 11 for driving a scanning line 6 and semiconductor chip 12 for driving a data line 7 are mounted in series on the one protrusion part 1a protruded from the counter substrate 2 of a substrate 1. The substantially upper half of the scanning line 6 disposed on a display region 3 so as to be extended in the row direction is connected to a first output terminal of one side semiconductor chip 11 via a lead line 13. The substantially lower half of the scanning line 6 is connected to a second output terminal disposed on the lower surface of the one side semiconductor chip 11 via a lead line 14 and a lead line 15 disposed under the other side semiconductor chip 12 on the protrusion part 1a. An arrangement region on the protrusion part 1a of the lead line 13 disposed on the left side of the display region 3 can be relatively reduced. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a display device such as a liquid crystal display device.

  For example, as shown in FIG. 7, a conventional liquid crystal display device includes a pair of substrates 101 and 102 arranged to face each other, and a liquid crystal is filled in a region surrounded by a sealing material 103 between the substrates. An area is formed, and in the display area, a plurality of signal lines 104 and a plurality of scanning lines 105 are formed orthogonal to each other on one substrate 101, and a display pixel is near each intersection of the plurality of signal lines 104 and the plurality of scanning lines 105. Is formed. The substrate 101 on which the signal lines 104 and the scanning lines 105 are formed has protrusions 106 on the right side and the lower side of the display area, for example, with respect to the other substrate 102, and a semiconductor for driving signal lines is provided on the protrusions 106. A chip 108 and a semiconductor chip 107 for driving a scanning line are disposed, and are configured to be connected to the signal line 104 and the scanning line 105, respectively. That is, since one substrate 101 is configured to protrude in two directions with respect to the display area and to be provided with a semiconductor chip, there is a problem that a frame area around the display area becomes large. Further, since the outer shape of the substrate 101 is not subject to the left and right with respect to the display area, for example, when this display device is to be mounted on a mobile phone, the position of the display screen should be provided at the left and right positions of the device. There was a problem that it was difficult to make.

  For such a problem, only one side of the display device in the column direction protrudes from the other substrate, and a scanning line and a signal line are routed around the protruding portion, and a signal is output on the protruding portion. One semiconductor chip for driving a line and one semiconductor chip for driving a scanning line are mounted so that at least the frame areas on the left and right sides of the display area are reduced (for example, , See Patent Document 1).

JP 2001-91967 A

However, only one side of the one substrate in the column direction protrudes from the other substrate, and one semiconductor chip for driving the signal line and one semiconductor chip for driving the scanning line on the protruding portion. In the liquid crystal display device in which a scanning line arranged in the row direction and one semiconductor chip for driving the scanning line are connected, a lead-out line is connected only to one side in the row direction of the display area. Since many scanning line routing lines are concentrated in a relatively narrow region on the protruding portion of one substrate, each line is connected to one semiconductor chip for driving the scanning line. Necessary wiring arrangement regions are required to some extent in the column direction. For this reason, there has been a problem that the protruding length of the protruding portion of one of the substrates becomes relatively large.
Accordingly, an object of the present invention is to provide a display device that can reduce the protruding length of the protruding portion of one substrate.

The invention according to claim 1 includes a pair of first and second substrates disposed to face each other, and includes the first substrate and the second substrate disposed to face each other. A display area is formed, and in the display area, a plurality of first lines and a plurality of second lines are provided extending in a row direction and a column direction on a surface of the first substrate facing the second substrate. A first semiconductor chip for driving the first line on the surface of the first substrate facing the second substrate; and for driving the second line. In the display device on which one second semiconductor chip is mounted, the first substrate has a protruding portion with one side protruding in the column direction with respect to the second substrate, and the protruding A first semiconductor chip for driving the first line in the portion, and the second line. One second semiconductor chip for driving the display area is mounted in series in the row direction, and the first substrate is connected to the first line provided on both sides of the display region in the row direction. A first lead line and a second lead line, and a third lead line provided under the second semiconductor chip, wherein at least the first semiconductor chip includes a plurality of lead lines. The first lead line provided on one side in the row direction of the display area has an output terminal, and the first output terminal of the plurality of output terminals of the first semiconductor chip The second lead line provided on the other side in the row direction of the display area is connected to the third lead line, and the first lead line is connected to the first lead line via the third lead line. Second output terminal of the semiconductor chip excluding the first output terminal of the plurality of output terminals And it is characterized in that it is connected to.
According to a second aspect of the present invention, in the first aspect of the present invention, the first output terminal of the first semiconductor chip is the display region of two sides parallel to the row direction of the display region. The second output terminal is formed on one side in the row direction of the display region along one side adjacent to the display region, and the second output terminal is separated from the display region among two sides parallel to the row direction of the display region. It is formed on the other side in the row direction of the display area along the other side of the display side.
According to a third aspect of the present invention, in the second aspect of the present invention, an input terminal is provided on one side in the row direction of the display region of the other side of the first semiconductor chip. It is what.
According to a fourth aspect of the present invention, in the first aspect of the invention, the first output terminal of the first semiconductor chip is the display region of two sides parallel to the row direction of the display region. The second output terminal is formed along one side in the row direction of the display region along one side on the side close to the display region, and the row of the display region along the one side on the side close to the display region. It is formed on the other side in the direction.
According to a fifth aspect of the invention, in the fourth aspect of the invention, an input terminal is provided on one side in the row direction of the display area of the other side of the first semiconductor chip. It is what.
According to a sixth aspect of the invention, in the fourth aspect of the invention, an input terminal is provided on the other side in the row direction of the display region of the other side of the first semiconductor chip. It is what.
According to a seventh aspect of the present invention, in the first aspect of the invention, the first output terminal of the first semiconductor chip is the display area of two sides parallel to the row direction of the display area. The second output terminal is formed on one side in the row direction of the display area along the other side away from the display area, and the second output terminal is close to the display area among two sides parallel to the row direction of the display area It is characterized in that it is formed on the other side in the row direction of the display area along one side of the display side.
The invention according to claim 8 is the invention according to claim 7, wherein an input terminal is provided on the other side in the row direction of the display region of the other side of the first semiconductor chip. It is what.
According to a ninth aspect of the invention, in the first aspect of the invention, the second semiconductor chip has a plurality of output terminals, and the output terminals of the second semiconductor chip are arranged in rows of the display area. Of the two sides parallel to the direction, the input terminal is formed along the side closer to the display region, connected to the second line, and along the other side away from the display region. It is characterized by being provided.
According to a tenth aspect of the present invention, in the first aspect of the present invention, the third lead line is provided below the central portion in the column direction of the second semiconductor chip on the protrusion. It is a feature.
According to an eleventh aspect of the present invention, in the first aspect, the first line is a scanning line, and the second line is a data line.
According to a twelfth aspect of the present invention, in the first aspect of the invention, the first lead line is connected to a half of the plurality of first lines, and the second lead line is the plurality. Are connected to the remaining half of the first line.
According to a thirteenth aspect of the present invention, in the first aspect of the present invention, the first lead line is connected to either the even number line or the odd number line of the plurality of first lines, The second lead line is connected to the other of the even lines or odd lines of the plurality of first lines.
According to the invention, the first lead line connected to the first line provided in the display area and provided on one side in the row direction of the display area is connected to the first output terminal of the first semiconductor chip. The first lead line provided on the other side in the row direction of the display area is connected to the first semiconductor via the third lead line provided below the second semiconductor chip on the protrusion. Since it is connected to the second output terminal of the chip, in particular, the arrangement area of the first lead line provided on one side in the row direction of the display area on the protruding portion can be made relatively small, In addition, since the third lead line is provided below the second semiconductor chip on the projecting portion, it is not necessary to provide the third lead line in the column direction exclusively. Thereby, the protrusion length of the protrusion part of one board | substrate can be made small.

  As described above, according to the present invention, the first lead line connected to the first line provided in the display region and provided on one side in the row direction of the display region is connected to the first semiconductor chip. The second lead line provided on the other side in the row direction of the display area is connected to the first output terminal via the third lead line provided below the second semiconductor chip on the protrusion. In particular, since the first output line is connected to the second output terminal of the first semiconductor chip, in particular, the arrangement area on the protruding portion of the first lead line provided on one side in the row direction of the display area is made relatively small. In addition, since the third lead line is provided below the second semiconductor chip on the projecting portion, it is not necessary to provide a dedicated arrangement region for the third lead line in the column direction. Thereby, the protrusion length of the protrusion part of one board | substrate can be made small.

  FIG. 1 is a plan view of the main part of an example of a liquid crystal display device as a first embodiment of the present invention. In this liquid crystal display device, a substrate 1 and a counter substrate 2 positioned above the substrate 1 are bonded to each other via a substantially rectangular frame-shaped sealing material (not shown), and both substrates 1 and 2 inside the sealing material. A liquid crystal (not shown) is enclosed between them.

  In this case, the lower side portion of the substrate 1 protrudes from the counter substrate 2. Hereinafter, this protrusion part is called protrusion part 1a. Moreover, the sealing material is arrange | positioned along the side edge part of 4 sides of the opposing board | substrate 2 outside the display area 3 shown with a dashed-two dotted line. A central portion in the row direction of the substrate 1 is a display region 3, and both sides in the row direction are lead line arrangement regions 4 and 5.

  In the display area 3 on the substrate 1, only two of each are shown in the figure, but as is well known, a plurality of scanning lines 6 and a plurality of data lines 7 extend in the row and column directions. Is provided. Near the intersections of the two lines 6 and 7, although not shown, thin film transistors connected to the two lines 6 and 7 and pixel electrodes driven by the thin film transistors are arranged in a matrix.

  A first semiconductor chip 11 for driving the scanning line 6 is mounted at a predetermined position on the left side of the upper surface of the protruding portion 1a of the substrate 1 (the surface facing the counter substrate 2). A second semiconductor chip 12 for driving the data line 7 is mounted on the central portion of the upper surface of the protruding portion 1a of the substrate 1 and a predetermined portion on the right side thereof. That is, two semiconductor chips 11 and 12 are mounted in series in the row direction on the protruding portion 1a.

  As will be described later, the left end of the upper half of the scanning line 6 is connected to the first end via a lead line 13 (first lead line) provided in the lead line arrangement region 4 on the left side as described below. The semiconductor chip 11 is connected to a part of the output terminal (first output terminal) (not shown here). The right end portion of the substantially lower half of the scanning line 6 has a lead line 14 (second lead line) provided in the lead line arrangement region 5 on the right side thereof and a second end on the protruding portion 1 a of the substrate 1. As will be described later, the remaining output terminals of the first semiconductor chip 11 (the third routing line) are provided via a routing line 15 (third routing line) provided at a predetermined position below the central portion of the semiconductor chip 12 in the column direction. (Second output terminal) (not shown here).

  In FIG. 1, as described above, the upper half of the scanning line 6 is connected to the output terminal of the first semiconductor chip 11 via the lead line 13, and the lower half of the scanning line 6 is pulled. Although it is assumed that it is connected to the output terminal of the first semiconductor chip 11 via the turning line 14 and the drawing line 15, the present invention is not limited to this, and the lower half of the scanning line 6 connects the drawing line 13. The upper half of the scanning line 6 is connected to the output terminal of the first semiconductor chip 11 via the lead line 14 and the lead line 15. Further, either the even-numbered row or the odd-numbered row of the scanning line 6 is connected to the output terminal of the first semiconductor chip 11 via the lead line 13, and The other of the even or odd rows , Via the pull turning line 14 and pull turning line 15, it may be connected to the output terminal of the first semiconductor chip 11.

  The lower end of the data line 7 is connected to an output terminal (not shown here) of the second semiconductor chip 12 through a lead wire 16 provided below the data line 7 as will be described later. Here, each of the lead wire 13, the lead wire 14, the lead wire 15 and the lead wire 16 is shown only at both ends thereof, and the illustrations of all the inner parts thereof are omitted.

  An external connection terminal 17 is provided below the left half of the first semiconductor chip 11 mounting region on the protruding portion 1 a of the substrate 1. External connection terminals 18 are provided below the second semiconductor chip 12 mounting region on the protruding portion 1 a of the substrate 1. Here, each of the external connection terminals 17 and 18 is shown only at both ends thereof, and the illustrations of all the internal connection terminals are omitted.

  The upper end portion of the external connection terminal 17 is connected to an input terminal (not shown here) of the first semiconductor chip 11 as will be described later. The upper end portion of the external connection terminal 18 is connected to an input terminal (not shown here) of the second semiconductor chip 12 as will be described later. One end of a flexible wiring board 19 is connected to the lower ends of the external connection terminals 17 and 18.

  Next, FIG. 2A shows an enlarged plan view of an example of a portion of the substrate 1 where the first semiconductor chip 11 is mounted. A region 21 surrounded by an alternate long and short dash line on the upper surface of the protruding portion 1 a of the substrate 1 is a first semiconductor chip mounting region on which the first semiconductor chip 11 is mounted. An input connection terminal 22 composed of one end portions of a plurality of external connection terminals 17 is provided on substantially the left half of the lower side portion in the first semiconductor chip mounting region 21.

  An output connection terminal 23 (first output terminal) composed of one end portions of a plurality of lead wires 13 is provided on substantially the left half of the upper side portion in the first semiconductor chip mounting region 21. One end of an anodizing line 24 for anodizing the upper half of the scanning line 6 in FIG. 1 is connected to the output connection terminal 23. The other end of the anodic oxidation line 24 is routed through the first semiconductor chip mounting region 21, and then is extended to the left side of the first semiconductor chip mounting region 21 to the left end surface of the substrate 1. ing.

  An output connection terminal 25 (second output terminal) consisting of one end of a plurality of lead wires 15 is provided on the almost right half of the lower side in the first semiconductor chip mounting region 21. In this case, the other end side of the lead wire 15 is routed in the first semiconductor chip mounting region 21 and then extended to the right side of the first semiconductor chip mounting region 21 (this extension). The part will be explained later.) One end of an anodizing line 26 for anodizing the lower half of the scanning line 6 in FIG. 1 is connected to the output connection terminal 25. The other end portion of the anodizing line 26 extends to the protruding end surface of the protruding portion 1a.

  Next, FIG. 2B shows a transparent enlarged plan view for showing the terminal positions of the first semiconductor chip 11. A plurality of input terminals 27 are provided in substantially the left half of the lower side portion of the lower surface of the first semiconductor chip 11, and a plurality of output terminals 28 are provided in substantially the left half of the upper side portion of the lower surface of the first semiconductor chip 11. A plurality of output terminals 29 are provided in almost the right half of the section. In a state where the first semiconductor chip 11 is mounted on the first semiconductor chip mounting region 21, the terminals 27, 28, and 29 are connected to the corresponding connection terminals 22, 23, and 25, respectively.

  Next, FIG. 3A shows an enlarged plan view of a portion of the substrate 1 where the second semiconductor chip 12 is mounted. A region 31 surrounded by an alternate long and short dash line on the upper surface of the protruding portion 1 a of the substrate 1 is a second semiconductor chip mounting region on which the second semiconductor chip 12 is mounted. An input connection terminal 32 including one end portions of the plurality of external connection terminals 18 is provided on the lower side portion in the second semiconductor chip mounting region 31. On the upper side of the second semiconductor chip mounting region 31, an output connection terminal 33 composed of one end of a plurality of lead wires 16 is provided.

  At the center in the width direction (column direction) in the second semiconductor chip mounting region 31, as shown in FIG. 2A, the lead line 15 extending to the right side of the first semiconductor chip mounting region 21 is provided. Is arranged. The other end of the lead wire 15 is connected to the lead wire 14 on the right side of the second semiconductor chip mounting region 31.

  Next, FIG. 3B is a transparent enlarged plan view for showing the terminal positions of the second semiconductor chip 12. A plurality of input terminals 34 are provided on the lower side portion of the lower surface of the second semiconductor chip 12, and a plurality of output terminals 35 are provided on the upper side portion of the lower surface. In the state where the second semiconductor chip 12 is mounted on the second semiconductor chip mounting region 31, the terminals 34 and 35 are connected to the corresponding connection terminals 32 and 33, respectively.

  As described above, in this liquid crystal display device, as shown in FIG. 1, the lower surface of the first semiconductor chip 11 is provided on the substantially upper half of the scanning line 6 via the lead line 13 provided on the left side of the display region 3. 2 is connected to the output terminal 28 (FIG. 2B), and the lower half of the scanning line 6 is connected to the lead line 14 provided on the right side of the display area 3 and the second semiconductor chip on the protruding portion 1a. 12 is connected to an output terminal 29 (FIG. 2 (B)) provided on the lower surface of the first semiconductor chip 11 through a lead wire 15 provided below.

  With such a structure, in particular, the arrangement area on the protruding portion 1a of the lead line 13 provided on the left side of the display area 3 can be made relatively small. Further, since the lead line 15 on the projecting portion 1a is provided under the second semiconductor chip 12, it is not necessary to provide a dedicated region for the lead line 15 in the column direction. Thereby, the protrusion length of the protrusion part 1a of the board | substrate 1 can be made small.

  In the above embodiment, as shown in FIG. 2A, the input connection terminal 22 is provided in the substantially left half of the lower side portion in the first semiconductor chip mounting area 21, and the substantially left half and the lower side of the upper side portion are provided. Although the output connection terminals 23 and 25 are provided in almost the right half of the section, the present invention is not limited to this.

  For example, as in the second embodiment of the present invention shown in FIG. 4A, the input connection terminal 22 is provided in the substantially left half of the lower side portion in the first semiconductor chip mounting region 21, and the upper left side is substantially left. The output connection terminals 23 and 25 may be provided on the half and almost the right half of the upper side. In this case, as shown in FIG. 4B, an input terminal 27 is provided in the substantially left half of the lower side portion of the lower surface of the first semiconductor chip 11, and is provided in the substantially left half of the upper side portion and the substantially right half of the upper side portion. The output terminals 28 and 29 may be provided.

  Further, as in the third embodiment of the present invention shown in FIG. 5A, the input connection terminal 22 is provided in the substantially right half of the lower side portion in the first semiconductor chip mounting region 21, and the left side of the upper side portion is substantially left. The output connection terminals 23 and 25 may be provided on the half and almost the right half of the upper side. In this case, as shown in FIG. 5B, an input terminal 27 is provided on the substantially right half of the lower side of the lower surface of the first semiconductor chip 11 so that the upper half is substantially the left half and the upper side is substantially the right half. The output terminals 28 and 29 may be provided.

  Furthermore, for example, a configuration in which the left and right are reversed with respect to the state illustrated in FIG. That is, the first semiconductor chip 11 is mounted on the right side on the protruding portion 1a of the substrate 1 and the second semiconductor chip 12 is mounted on the central portion and the left side, so that the present invention shown in FIG. As in the fourth embodiment, the input connection terminal 22 is provided in the substantially right half of the lower side portion in the first semiconductor chip mounting area 21, and the output connection terminal is provided in the substantially left half of the lower side portion and the substantially right half of the upper side portion. Connection terminals 23 and 25 may be provided. In this case, as shown in FIG. 6B, an input terminal 27 is provided in the substantially right half of the lower side of the lower surface of the first semiconductor chip 11, and is provided in the substantially left half of the lower side and the right half of the upper side. The output terminals 28 and 29 may be provided.

The top view of the principal part of the liquid crystal display device as 1st Embodiment of this invention. (A) is an enlarged plan view of a portion of the first semiconductor chip mounting region, and (B) is a transparent enlarged plan view for showing terminal positions of the first semiconductor chip. (A) is an enlarged plan view of a portion of the second semiconductor chip mounting region, and (B) is a transparent enlarged plan view for showing terminal positions of the second semiconductor chip. FIGS. 2A and 2B are respectively an enlarged plan view and a transmission enlarged plan view similar to FIGS. 2A and 2B for explaining a second embodiment of the present invention. FIGS. 2A and 2B are respectively an enlarged plan view and a transmission enlarged plan view similar to FIGS. 2A and 2B for explaining a third embodiment of the present invention. FIGS. 2A and 2B are respectively an enlarged plan view and a transmission enlarged plan view similar to FIGS. 2A and 2B for explaining a fourth embodiment of the present invention. The top view which shows the principal part of an example of a structure of the conventional liquid crystal display device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Board | substrate 1a Protrusion part 2 Opposite board | substrate 3 Display area 4, 5 Leading line arrangement | positioning area | region 6 Scan line 7 Data line 11 1st semiconductor chip 12 2nd semiconductor chips 13-16 Leading line 17, 18 External connection terminal 19 Flexible wiring board

Claims (13)

A pair of first and second substrates disposed opposite to each other;
A display region is formed by the first substrate and the second substrate arranged to face each other, and a plurality of the first substrate on the surface of the first substrate facing the second substrate in the display region. A first line and a plurality of second lines are provided extending in a row direction and a column direction;
One first semiconductor chip for driving the first line and one for driving the second line on a surface of the first substrate facing the second substrate. In the display device on which the second semiconductor chips are mounted,
The first substrate has a protruding portion with one side protruding in the column direction with respect to the second substrate,
One first semiconductor chip for driving the first line and one second semiconductor chip for driving the second line are mounted in series in the row direction on the protrusion. And
The first substrate includes a first lead line and a second lead line connected to the first line provided on both sides in the row direction of the display region, and a bottom of the second semiconductor chip. And a third lead line provided in the
At least the first semiconductor chip has a plurality of output terminals,
The first lead line provided on one side in the row direction of the display region is connected to some first output terminals of the plurality of output terminals of the first semiconductor chip,
The second lead line provided on the other side in the row direction of the display area is connected to the third lead line, and the first semiconductor chip is connected to the third lead line via the third lead line. A display device, wherein the plurality of output terminals are connected to a second output terminal excluding the first output terminal. In the invention of claim 1,
The first output terminal of the first semiconductor chip has one of the two sides parallel to the row direction of the display region along one side closer to the display region and one of the display regions in the row direction. Formed on the side,
The second output terminal is formed on the other side in the row direction of the display region along the other side of the two sides parallel to the row direction of the display region on the side farther from the display region. A display device. In the invention of claim 2,
An input terminal is provided on one side in the row direction of the display area of the other side of the first semiconductor chip. In the invention of claim 1,
The first output terminal of the first semiconductor chip has one of the two sides parallel to the row direction of the display region along one side closer to the display region and one of the display regions in the row direction. Formed on the side,
The display device according to claim 1, wherein the second output terminal is formed on the other side in the row direction of the display region along one side on the side close to the display region. In the invention of claim 4,
An input terminal is provided on one side in the row direction of the display area of the other side of the first semiconductor chip. In the invention of claim 4,
An input terminal is provided on the other side in the row direction of the display area of the other side of the first semiconductor chip. In the invention of claim 1,
The first output terminal of the first semiconductor chip has one side in the row direction of the display region along the other side of the two sides parallel to the row direction of the display region, which is separated from the display region. Formed on the side,
The second output terminal is formed on the other side in the row direction of the display region along one side closer to the display region, out of two sides parallel to the row direction of the display region. A display device. In the invention of claim 7,
An input terminal is provided on the other side in the row direction of the display area of the other side of the first semiconductor chip. In the invention of claim 1,
The second semiconductor chip has a plurality of output terminals,
An output terminal of the second semiconductor chip is formed along a side closer to the display region among two sides parallel to the row direction of the display region, and is connected to the second line. An input terminal is provided along the other side on the side away from the display area. In the invention of claim 1,
3. The display device according to claim 1, wherein the third lead line is provided below a central portion in the column direction of the second semiconductor chip on the projecting portion. In the invention of claim 1,
The first line is a scan line;
The display device according to claim 1, wherein the second line is a data line. In the invention of claim 1,
The first lead line is connected to half of the plurality of first lines, and the second lead line is connected to the remaining half of the plurality of first lines. Display device. In the invention of claim 1,
The first lead line is connected to either an even line or an odd line of the plurality of first lines, and the second lead line is an even line of the plurality of first lines. Or a display device, wherein the display device is connected to the other of the odd lines.

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