JP3786180B2 - Liquid crystal display - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display device.
[0002]
[Prior art]
FIG. 6 shows an equivalent circuit transmission plan view of a part of a conventional liquid crystal display device. In this liquid crystal display device, an active substrate 1 and a counter substrate 2 positioned above the active substrate 1 are bonded to each other via a substantially rectangular frame-shaped sealing material 3, and between the substrates 1 and 2 inside the sealing material 3. In which liquid crystal (not shown) is sealed. In this case, the lower side portion of the active substrate 1 protrudes from the counter substrate 2. Hereinafter, this protruding portion is referred to as a lower side protruding portion 1a. Moreover, the sealing material 3 is arrange | positioned on the outer side of the display area 4 shown with a dashed-dotted line in FIG.
[0003]
The display area 4 on the active substrate 1 is provided with a plurality of scanning signal lines 5 and a plurality of data signal lines 6 extending in the row direction and the column direction. In the vicinity of the intersections of both lines 5 and 6, although not shown, thin film transistors connected to both lines 5 and 6 and pixel electrodes driven by the thin film transistors are arranged in a matrix.
[0004]
A right end portion of the scanning signal line 5 is provided in a semiconductor chip mounting region 8 for driving a scanning line indicated by a dotted line on the right side on the lower side protruding portion 1a of the active substrate 1 via a lead line 7 provided on the right side thereof. Connected to the output-side connection terminal 9. A lower end portion of the data signal line 6 is provided in a semiconductor chip mounting region 11 for driving a data line indicated by a dotted line on the left side on the lower side protruding portion 1a of the active substrate 1 through a routing line 10 provided below the data signal line 6. It is connected to the provided output side connection terminal 12. In the above description, only two lead wires 7 and 10 are shown on both ends.
[0005]
An input side connection terminal 13 and an external connection terminal 14 connected to the input side connection terminal 13 are provided in and outside the semiconductor chip mounting region 8. On the semiconductor chip mounting region 8, although not shown, a scanning line driving semiconductor chip that supplies a scanning signal to the scanning signal line 5 is connected to and mounted on the output side connection terminal 9 and the input side connection terminal 13. ing. An input side connection terminal 15 and an external connection terminal 16 connected to the input side connection terminal 15 are provided in and outside the semiconductor chip mounting region 11. Although not shown, a semiconductor chip for driving a data line for supplying a data signal to the data signal line 6 is mounted on the semiconductor chip mounting area 11 while being connected to the output side connection terminal 12 and the input side connection terminal 15. ing.
[0006]
On the lower surface of the counter substrate 2, a black matrix 17, a color filter (not shown), and a counter electrode (not shown) made of a transparent metal such as ITO are provided. The color filter is provided in the display area 4, the counter electrode is formed in a solid shape from the display area 4 to the periphery of the display area 4, and the black matrix 17 is only in the boundary of each color filter in the display area 4. It is formed in a lattice shape, and outside of the display area, all four sides have a rectangular frame shape with a width of several millimeters having an outer edge 17a slightly larger than the sealing material 3, and a part thereof is superposed on the counter electrode to form the counter It has the same potential as the electrode.
[0007]
Next, a part of the lead line 7 that connects the right end of the scanning signal line 5 and the output side connection terminal 9 will be described with reference to FIG. The lead-out line 7 has an extension part 7a located on the extension line of the scanning signal line 5 and an orthogonal part 7b orthogonal to the extension part 7a. In this case, the pitch of the extended portion 7 a is the same as the pitch of the scanning signal line 5, and the pitch of the orthogonal portion 7 b is smaller than the pitch of the scanning signal line 5. Further, the intersections 7c between the extended portions 7a and the orthogonal portions 7b are all formed outside the display area 4 of the black matrix 17 and inside the outer edge 17a, and in particular, on the display area 4 side in the intersection 7c. The one located at is formed in a region where the black matrix 17 overlaps the sealing material 3.
[0008]
That is, this liquid crystal display device is provided with the semiconductor chip mounting area 11 for driving the data line and the semiconductor chip mounting area 8 for driving the scanning line on the lower side protruding portion 1 a of the active substrate 1, and the output side in the semiconductor chip mounting area 11. A data signal line 6 extending in parallel in the display region 4 is connected to the connection terminal 12 via a lead-out portion 10 whose pitch increases in a fan shape toward the display region 4 side, and a semiconductor chip for scanning line driving is mounted. A scanning signal line 5 extending in parallel to a direction orthogonal to the data signal line 6 in the display area 4 is connected to the output side connection terminal 9 in the area 8, and the scanning signal line 5 is outside the display area 4. The liquid crystal display device is connected via a routing portion 7 having an orthogonal portion 7b extending in an orthogonal direction. This liquid crystal display device includes a semiconductor chip for driving a data line and a semiconductor chip for driving a scanning line. However, since it is mounted only on one side of the active substrate 1, the size of the liquid crystal display device in the direction orthogonal to the one side can be reduced. Suitable for equipment.
[0009]
[Problems to be solved by the invention]
By the way, in the conventional liquid crystal display device, a part of the intersection 7c where the extended portion 7a and the orthogonal portion 7b of the lead line 7 are bent at a right angle is formed in a region where the black matrix 17 overlaps the sealing material 3. Therefore, the ionic impurities eluted from the sealing material 3 are caused by the relatively large potential difference generated between the intersection 7a of the routing line 7 serving as the scanning signal potential and the black matrix 17 having the same potential as the counter electrode. 7 is concentrated at the intersection 7a, and there is a problem that corrosion may occur at the intersection 7a of the lead line 7.
An object of the present invention is to prevent corrosion at the intersection of lead lines due to ionic impurities eluted from the sealing material.
[0010]
[Means for Solving the Problems]
According to the first aspect of the present invention, the first substrate having a plurality of signal lines and the second substrate having a counter electrode and a black matrix having the same potential as the counter electrode are interposed through a substantially frame-shaped sealing material. In the liquid crystal display device in which the signal line is connected to the lead line, the lead line has an extension portion located on the extension line of the signal line connected thereto and an orthogonal portion orthogonal to the extension portion. , At least a part of the intersection of the extension portion and the orthogonal portion of the lead line is disposed in a region overlapping the seal material, and the black matrix overlaps the intersection point of the lead line disposed in the region overlapping the seal material. It is characterized by being arranged in a region that should not be.
The invention according to claim 2 is characterized in that, in the invention according to claim 1, one side edge portion of the black matrix in the vicinity of the intersection of the lead lines is disposed inside the sealing material. To do.
According to a third aspect of the present invention, in the second aspect of the present invention, at least a part of the intersection of the lead lines is arranged in a region overlapping with the sealing material.
According to a fourth aspect of the present invention, in the third aspect of the present invention, the intersection of the lead lines is arranged in a region overlapping with the sealing material and outside thereof.
The invention according to claim 5 is the invention according to claim 3, characterized in that the intersections of the lead lines are arranged in a region overlapping with the sealing material and inside and outside thereof.
The invention according to claim 6 is the invention according to any one of claims 1 to 5, wherein the first substrate has a protrusion protruding from the second substrate, and a scanning signal is provided on the protrusion. A semiconductor chip for supply and a semiconductor chip for data signal supply are mounted.
A seventh aspect of the invention is characterized in that, in the invention of any one of the first to sixth aspects, the routing line is disposed on both sides of the signal line connected thereto.
According to the first aspect of the present invention, at least a part of the intersection of the lead lines is disposed in the region overlapping the seal material, and the black matrix is disposed in the region not overlapping the intersection of the lead lines disposed in the region overlapping the seal material. Since it is arranged, it is possible to prevent the intersection of the drawing lines arranged in the region overlapping with the sealing material from facing the black matrix, so that the ionic impurities eluted from the sealing material do not concentrate at the intersection of the drawing lines. Therefore, it is possible to prevent corrosion at the intersection of the lead lines due to ionic impurities eluted from the sealing material .
[0011]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is an equivalent circuit transmission plan view of the main part of the liquid crystal display device according to the first embodiment of the present invention. In this figure, for convenience of explanation, the same reference numerals are given to the same name portions as those of the conventional example shown in FIG.
[0012]
In this liquid crystal display device, an active substrate 1 and a counter substrate 2 positioned above the active substrate 1 are bonded to each other via a substantially rectangular frame-shaped sealing material 3, and between the substrates 1 and 2 inside the sealing material 3. In which liquid crystal (not shown) is sealed. In this case, the lower side portion of the active substrate 1 protrudes from the counter substrate 2. Hereinafter, this protruding portion is referred to as a lower side protruding portion 1a. Moreover, the sealing material 3 is arrange | positioned on the outer side of the display area 4 shown with a dashed-dotted line in FIG.
[0013]
In the display region 4 on the active substrate 1, a plurality of scanning signal lines 5 and a plurality of data signal lines 6 are provided extending in the row direction and the column direction, that is, orthogonal to each other. In the vicinity of the intersections of both lines 5 and 6, although not shown, thin film transistors connected to both lines 5 and 6 and pixel electrodes driven by the thin film transistors are arranged in a matrix.
[0014]
A right end portion of the scanning signal line 5 is provided in a semiconductor chip mounting region 8 for driving a scanning line indicated by a dotted line on the right side on the lower side protruding portion 1a of the active substrate 1 via a lead line 7 provided on the right side thereof. The output side connection terminal (scanning signal terminal) 9 is connected. A lower end portion of the data signal line 6 is provided in a semiconductor chip mounting region 11 for driving a data line indicated by a dotted line on the left side on the lower side protruding portion 1a of the active substrate 1 through a routing line 10 provided below the data signal line 6. It is connected to the provided output side connection terminal (data signal terminal) 12. In the above description, only two lead wires 7 and 10 are shown on both ends.
[0015]
An input side connection terminal 13 and an external connection terminal 14 connected to the input side connection terminal 13 are provided in and outside the semiconductor chip mounting region 8. On the semiconductor chip mounting region 8, although not shown, a scanning line driving semiconductor chip that supplies a scanning signal to the scanning signal line 5 is connected to and mounted on the output side connection terminal 9 and the input side connection terminal 13. ing. An input side connection terminal 15 and an external connection terminal 16 connected to the input side connection terminal 15 are provided in and outside the semiconductor chip mounting region 11. Although not shown, a semiconductor chip for driving a data line for supplying a data signal to the data signal line 6 is mounted on the semiconductor chip mounting area 11 while being connected to the output side connection terminal 12 and the input side connection terminal 15. ing.
[0016]
On the lower surface of the counter substrate 2, a black matrix 17, a color filter (not shown), and a counter electrode (not shown) made of a transparent metal such as ITO are provided. The color filter is provided in the display area 4, the counter electrode is formed in a solid shape from the display area 4 to the periphery of the display area 4, and the black matrix 17 is only in the boundary of each color filter in the display area 4. It is formed in a lattice shape and has a rectangular frame shape with a width of several mm outside the display area, and a part thereof is superposed on the counter electrode so as to have the same potential as the counter electrode. In this case, the outer edges of the upper side, the lower side, and the left side of the black matrix 17 are disposed outside the upper side, the lower side, and the left side of the substantially rectangular frame-shaped portion of the sealing material 3 excluding the liquid crystal injection port forming portion 3a. The outer edge 17 a on the right side of the black matrix 17 is disposed inside the right side of the sealing material 3 outside the display area 4.
[0017]
Next, a part of the lead line 7 that connects the right end portion of the scanning signal line 5 and the output side connection terminal 9 will be described with reference to FIG. The lead-out line 7 has an extension part 7a located on the extension line of the scanning signal line 5 and an orthogonal part 7b orthogonal to the extension part 7a. In this case, the pitch of the extended portion 7 a is the same as the pitch of the scanning signal line 5, and the pitch of the orthogonal portion 7 b is smaller than the pitch of the scanning signal line 5. Further, each intersection 7c between each extended portion 7a and each orthogonal portion 7b is disposed outside and on the outer side (right side) of the outer edge 17a on the right side of the black matrix 17 and on the outside thereof. Here, the interval W1 between the outer edge 17a on the right side of the black matrix 17 and the sealing material 3 is smaller than the width W2 of the sealing material 3, but this interval W1 should be as small as possible so as not to cause light leakage. preferable.
[0018]
As described above, in this liquid crystal display device, the outer edge 17a on the right side of the black matrix 17 is arranged inside the sealing material 3, and the intersection 7c of the lead line 7 is arranged outside the outer edge 17a on the right side of the black matrix 17. Therefore, the intersection 7c of the lead line 7 arranged in the region overlapping with the sealing material 3 can be prevented from facing the black matrix 17. As a result, a relatively large potential difference does not occur between the intersection 7a of the routing line 7 serving as the scanning signal potential and the black matrix 17 having the same potential as the counter electrode, and ionic impurities eluted from the sealing material 3 are routed. It is possible not to concentrate on the intersection 7 c of the line 7, and therefore it is possible to prevent the corrosion of the intersection 7 c of the lead line 7 due to the ionic impurities eluted from the sealing material 3.
[0019]
In the first embodiment, as shown in FIG. 2, the intersection 7c of the lead-out line 7 is arranged on the outer side (right side) of the outer edge 17a on the right side of the black matrix 17 and on the outer side thereof. Although the case has been described, the present invention is not limited to this. For example, as in the second embodiment of the present invention shown in FIG. 3, the interval W1 (see FIG. 2) between the outer edge 17a on the right side of the black matrix 17 and the sealing material 3 is preferably as small as possible, but this interval W1. You may make it arrange | position the orthogonal part 7b of the routing line 7 in the inside. That is, the intersection 7c of the lead-out line 7 may be arranged on the outer side (right side) of the right side of the black matrix 17 on the outer side (right side) of the seal material 3 and on the inner side and outer side thereof.
[0020]
Further, as in the third embodiment of the present invention shown in FIG. 4, the orthogonal portion 7 b of the lead-out line 7 may be arranged on the inner side (left side) of the outer edge 17 a on the right side of the black matrix 17. Even if it does in this way, since the intersection 7c of the routing line 7 arrange | positioned in the area | region which overlaps with the sealing material 3 does not oppose the black matrix 17, there is no problem separately. 2, 3, and 4, the number of the lead lines 7 is different, but this is for the convenience of illustration.
[0021]
In the first embodiment, as shown in FIG. 1, the case where the lead line 7 is arranged only on the right side portion of the active 1 has been described. However, the present invention is not limited to this. For example, you may make it like 4th Embodiment of this invention shown in FIG. That is, in this embodiment, a semiconductor chip mounting region 11 for driving data lines is formed at the center on the lower side protruding portion 1a of the active substrate 1, and semiconductor chip mounting regions 8A and 8B for driving scanning line are formed on the left and right sides thereof. Is formed. Then, the right end portion of the upper half of the scanning signal line 5 is a scanning line indicated by a dotted line on the right side on the lower side protruding portion 1a of the active substrate 1 via a lead line 7A provided on the right side thereof. It is connected to the output side connection terminal 9A provided in the semiconductor chip mounting area 8A for driving. The left end of about one half of the scanning signal line 5 is the scanning line drive indicated by the dotted line on the left side on the lower side protruding portion 1a of the active substrate 1 through the lead line 7B provided on the left side thereof. Is connected to an output-side connection terminal 9B provided in the semiconductor chip mounting area 8B. In the above description, only the two lead wires 7A and 7B are shown at both ends.
[0022]
In this case, the outer edge 17 a on the right side and the outer edge 17 b on the left side of the black matrix 17 are arranged inside the sealing material 3. The intersection 7c of the right lead line 7A is disposed outside the outer edge 17a on the right side of the black matrix 17, and the intersection 7c of the left lead line 7B is disposed outside the outer edge 17b on the left side of the black matrix 17. Yes.
[0023]
In the fourth embodiment of the present invention shown in FIG. 5, a semiconductor chip mounting region 11 for driving a data line is formed in the center on the lower side protruding portion 1a of the active substrate 1, and a semiconductor chip for driving a scanning line is formed on both left and right sides thereof. The mounting regions 8A and 8B are formed, and approximately half of the scanning signal lines 5 are formed so as to overlap at least a part of the side edge of the active substrate 1 where the sealing material 3 is formed. Further, since it is connected to the left and right scanning line drive circuits via the lead lines 7A and 7B, it becomes possible to make the portion outside the seal material 3 of the active substrate 1 smaller, and consequently the left and right sides of the active substrate 1 in FIG. The width in the direction can be reduced. In this case, when the black matrix 17 is formed of a resin, the outer edges 17a and 17b of the black matrix 17 can be formed so as to overlap the intersection 7c of the lead lines 7A and 7B.
[0024]
In each of the above-described embodiments, the case where the outer edge 17a on the right side of the black matrix 17 (and the outer edge 17b on the left side) is disposed inside the sealing material 3 has been described. The black matrix 17 is arranged so that at least a part of the outer edge 17a on the right side (and the outer edge 17b on the left side) of the black matrix 17 is disposed outside the sealing material 3, but the routing line 7 ( 7A, 7B) may be arranged in a region that does not overlap at least the intersection 7c.
[0025]
Further, in each of the above embodiments, the case where the lower side portion of the active substrate 1 is protruded from the counter substrate 2 and the semiconductor chip is mounted on the lower side protruding portion 1a has been described. The right side portion of the active substrate 1 may be protruded from the counter substrate 2, and a semiconductor chip may be mounted on the right side protruding portion. In this case, since an intersection is formed in the lead line 10 connected to the data signal line 6, the target lead line is the lead line 10. Further, according to the present invention, the integrated circuit for driving the scanning line and driving the data line is not limited to the case where the semiconductor chip is mounted, but may be formed directly on the active substrate 1 with a thin film transistor or a passive type liquid crystal. It is also possible to apply to a display device.
[0026]
【The invention's effect】
As described above, according to the present invention, the intersections of the drawing lines arranged in the region overlapping with the sealing material are made not to face the black matrix, so that the ionic impurities eluted from the sealing material are the intersections of the drawing lines. Therefore, it is possible to prevent corrosion at the intersections of the lead lines due to ionic impurities eluted from the sealing material.
[Brief description of the drawings]
FIG. 1 is an equivalent circuit transmission plan view of a main part of a liquid crystal display device according to a first embodiment of the invention.
FIG. 2 is an enlarged plan view of a part of the liquid crystal display device shown in FIG.
FIG. 3 is a transmission plan view similar to FIG. 2 of a liquid crystal display device according to a second embodiment of the present invention.
4 is a transmission plan view similar to FIG. 2 of a liquid crystal display device according to a third embodiment of the present invention. FIG.
FIG. 5 is an equivalent circuit transmission plan view similar to FIG. 1 of a liquid crystal display device according to a fourth embodiment of the present invention;
FIG. 6 is an equivalent circuit transmission plan view of a part of a conventional liquid crystal display device.
7 is an enlarged plan view of a part of the liquid crystal display device shown in FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Active board | substrate 1a Lower side protrusion part 2 Opposite board | substrate 3 Sealing material 4 Display area 5 Scan signal line 6 Data signal line 7 Leading line 7a Extension part 7b Orthogonal part 7c Intersection 8 Semiconductor chip mounting area 10 Leading line 11 Semiconductor chip mounting area 17 Black Matrix

Claims (7)

  A first substrate having a plurality of signal lines, a counter electrode, and a second substrate having a black matrix having the same potential as the counter electrode are bonded to each other through a substantially frame-shaped sealing material, and the signal lines are routed. In the liquid crystal display device connected to the line, the lead-out line has an extension portion located on the extension line of the signal line connected thereto and an orthogonal portion orthogonal to the extension portion, and orthogonal to the extension portion of the lead-out line At least a part of the intersection with the portion is arranged in a region overlapping with the sealing material, and the black matrix is arranged in a region not overlapping with the intersection of the lead lines arranged in the region overlapping with the sealing material. A characteristic liquid crystal display device.   2. The liquid crystal display device according to claim 1, wherein one side edge portion of the black matrix in the vicinity of the intersection of the lead lines is disposed inside the sealing material.   3. The liquid crystal display device according to claim 2, wherein at least a part of the intersection of the lead lines is disposed in a region overlapping with the sealing material.   4. The liquid crystal display device according to claim 3, wherein the intersection of the lead lines is arranged in a region overlapping with the sealing material and outside thereof.   4. The liquid crystal display device according to claim 3, wherein the intersections of the lead lines are arranged in a region overlapping with the sealing material and inside and outside thereof.   6. The invention according to claim 1, wherein the first substrate has a protruding portion protruding from the second substrate, and a semiconductor chip for supplying a scanning signal and a data signal supply are provided on the protruding portion. A liquid crystal display device having a semiconductor chip mounted thereon.   7. The liquid crystal display device according to claim 1, wherein the lead line is disposed on both sides of the signal line connected thereto.

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