JP2008254413A - Duplicating stamper and its manufacturing method - Google Patents

Duplicating stamper and its manufacturing method Download PDF

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JP2008254413A
JP2008254413A JP2007143589A JP2007143589A JP2008254413A JP 2008254413 A JP2008254413 A JP 2008254413A JP 2007143589 A JP2007143589 A JP 2007143589A JP 2007143589 A JP2007143589 A JP 2007143589A JP 2008254413 A JP2008254413 A JP 2008254413A
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stamper
layer
father
forming
electroforming
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JP4745289B2 (en
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Shinobu Sugimura
村 忍 杉
Yoshiyuki Kamata
田 芳 幸 鎌
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Toshiba Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a duplicating stamper with a high degree of accuracy of transfer of a fine pattern, and its manufacturing method. <P>SOLUTION: The manufacturing method of the duplicating stamper comprises: a step of making a first conductive film on an irregular surface of a master having a surface with an irregular shape; a step of making a father stamper, to which the irregular shape of the master is transferred by Ni electroforming, on the basis of the first conductive film; a step of forming a first mold release layer on the irregular surface of the father stamper; a step of forming a first pre-plated layer on the first mold release layer of the father stamper; a step of forming a first electroformed layer on the first pre-plated layer of the father stamper by Ni electroforming; and a step of duplicating a mother stamper with a reversed irregular shape by releasing the first electroformed layer and the first pre-plated layer from the father stamper. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、情報記録媒体の製造に関わる射出成形やインプリント技術等のパターンを大量の媒体に転写させる技術に使用される金型となる複製スタンパおよびその製造方法に関する。   The present invention relates to a replica stamper used as a mold used in a technique for transferring a pattern such as injection molding or imprint technique related to the manufacture of an information recording medium to a large amount of medium, and a manufacturing method thereof.

近年、情報記録媒体の記録密度の向上に伴い、媒体に記録されるパターンがより微細化している。多くの場合、情報記録媒体を大量生産する方法として、微細パターンを記録した原盤から金属製のスタンパを転写させ、このスタンパを使用して媒体となる基板にパターンを転写させる手法がとられている。この微細パターンの作製工程においては、約100nm以下の凹凸形状を形成する微細加工技術が求められており、これらの微細加工技術として、電子線リソグラフィー(以後、EB)、集束イオンビームリソグラフィー、ナノインプリントリソグラフィー(以後、NIL)等が挙げられる。   In recent years, with the improvement of the recording density of information recording media, the patterns recorded on the media have become finer. In many cases, as a method for mass-producing information recording media, a method is adopted in which a metal stamper is transferred from a master disk on which a fine pattern is recorded, and a pattern is transferred to a substrate serving as a medium using this stamper. . In this fine pattern manufacturing process, a microfabrication technique for forming a concavo-convex shape of about 100 nm or less is required. As these microfabrication techniques, electron beam lithography (hereinafter referred to as EB), focused ion beam lithography, nanoimprint lithography. (Hereinafter referred to as NIL).

EBを用いたスタンパの作製方法としては、まず、EBを用いて、EBレジストが塗布されたSiウェハーに所望のパターンを描画する。次に、現像処理を施し、表面に凹凸形状を有する原盤を作製する。その後、スパッタリングを用いて、原盤の凹凸形成面に電鋳材と同じNi導電膜を形成した後、電鋳法を用いて、Ni電鋳層を作製する。   As a method of manufacturing a stamper using EB, first, a desired pattern is drawn on a Si wafer coated with an EB resist using EB. Next, a development process is performed to produce a master having an uneven shape on the surface. Thereafter, the same Ni conductive film as the electroformed material is formed on the uneven surface of the master by using sputtering, and then a Ni electroformed layer is produced by using an electroforming method.

次に、電鋳層及び導電膜から成るファザースタンパと原盤とを剥離した後、洗浄し、レジスト残渣等の有機物の除去工程を行う。更にファザースタンパからマザースタンパの複製を行う際の離型層を付与する。続いて、Ni電鋳層を形成し剥離することによってマザースタンパを得る。同様の工程を経てマザースタンパからサンスタンパを複製することができる。ファザースタンパ及びサンスタンパは裏面研磨、打ち抜き等の工程を経て、その後の媒体大量転写のためのスタンパと成る。   Next, the father stamper made of the electroformed layer and the conductive film is peeled off from the master, and then washed to remove organic substances such as resist residues. Furthermore, a release layer is provided when the mother stamper is copied from the father stamper. Subsequently, a mother stamper is obtained by forming and peeling a Ni electroformed layer. The sun stamper can be duplicated from the mother stamper through the same process. The father stamper and sun stamper go through processes such as back surface polishing and punching, and become stampers for subsequent mass transfer of the medium.

ところで、前述したようなガラス原盤やSiウェハー上のレジストにパターンニングされた原盤または、そのレジストパターンをマスクとしてエッチング加工された原盤からファザースタンパを作製する際は、原盤自体に導電性が無いために、金属の導電膜をスパッタリングや蒸着、又は無電解メッキ法等により成膜することによりパターン面を覆い、その導電膜を種に電鋳法により金属金型のスタンパを作製するため、事実上は原盤の微細パターンを転写するのは電鋳では無く、導電膜の作製時に行われていることになる。このため、導電膜の成膜時に微細パターンに沿って綺麗に成膜すれば、ファザースタンパでは原盤の形状を忠実に転写することができる。   By the way, when making a father stamper from a master disc patterned on a glass master disc or a resist on a Si wafer as described above or a master disc etched using the resist pattern as a mask, the master disc itself has no conductivity. In addition, a metal conductive film is formed by sputtering, vapor deposition, or electroless plating to cover the pattern surface, and a metal mold stamper is produced by electroforming using the conductive film as a seed. The transfer of the fine pattern of the master disk is not performed by electroforming, but is performed when the conductive film is formed. For this reason, if the fine film is formed along the fine pattern when forming the conductive film, the father stamper can faithfully transfer the shape of the master.

しかし、ファザースタンパを元にマザースタンパ、更にはサンスタンパ、というようにスタンパを複製する場合には、原盤の代わりとして電鋳された金属製のファザースタンパやマザースタンパを使用することになる。この場合、母体に導電性があるため導電膜を必要とせず、パターンの転写を電鋳工程で行うことになる。このように母体自体が導電体の上に電鋳する場合と、非導電性の母体上に数十nmの厚さの薄い導電膜を種に電鋳する場合では、電鋳初期における電流密度のかけ方に、図6に示すような違いがある。   However, when replicating a stamper such as a mother stamper and further a sun stamper based on the father stamper, an electroformed metal father stamper or mother stamper is used instead of the master disk. In this case, since the base is conductive, no conductive film is required, and pattern transfer is performed in the electroforming process. Thus, in the case where the base itself is electroformed on the conductor and in the case where the thin conductive film having a thickness of several tens of nanometers is electrocast on the non-conductive base, the current density in the initial stage of electroforming is reduced. There is a difference as shown in FIG.

図7(a)に示すように導電膜を用いた原盤からの電鋳の場合、電鋳時の応力により薄い導電膜が破損(歪み・破け)しないように急激な電流の上昇を抑えるために、電鋳初期は低電流でプリメッキし導電膜がある程度の厚みまで成長してから所望の高電流値に上げて電鋳する(図6(a)参照)、または、数分間かけて0アンペアから所望の高電流値まで徐々に上げる(図6(b)参照)、更にはそれらの融合(図6(c)参照)、という手段を用いる。   In the case of electroforming from a master using a conductive film as shown in FIG. 7 (a), in order to suppress a rapid increase in current so that the thin conductive film is not damaged (distorted or broken) by stress during electroforming. In the initial stage of electroforming, pre-plating is performed at a low current, and the conductive film grows to a certain thickness, and then the electroforming is carried out by increasing to a desired high current value (see FIG. 6A), or from 0 amperes over several minutes. A method of gradually increasing the current to a desired high current value (see FIG. 6B) and further merging them (see FIG. 6C) is used.

図7(b)に示すように電鋳スタンパからの複製電鋳の場合、導電膜の破損等の心配が無いためプリメッキ等の必要は無く、急激に所望の高電流値まで上昇させることにより、高スループットでの電鋳が可能である(図6(d)、6(e)参照)。   In the case of replica electroforming from an electroforming stamper as shown in FIG. 7 (b), there is no need for pre-plating or the like because there is no fear of damage to the conductive film, and by rapidly increasing to a desired high current value, Electroforming with high throughput is possible (see FIGS. 6 (d) and 6 (e)).

ところが、前述した様にEBによる微細加工のようにパターンがナノメートルオーダーのサイズになると電鋳法によるスタンパの複製では微細パターンを忠実に複製出来ない。これは以下に記す理由からである。複製電鋳後のスタンパ同士の剥離を可能にするために、母体表面を酸化膜処理等によりパッシベーションされている。よって母体の表面は不導体に近い状態になっており、電気抵抗が高く導電性が悪くなっている。しかし、完全な不導体ではなく電流が流れるため、電鋳自体は可能であるが、ファザースタンパの電鋳のように導電膜を種として、膜厚を成長させるのでは無く、導電性の悪いパッシベーション膜上に電着されることになるため、微細パターンの隅には電着することが困難になる(図7(b)参照)。   However, as described above, when the pattern becomes a nanometer order size as in the case of fine processing by EB, the fine pattern cannot be faithfully reproduced by duplicating the stamper by electroforming. This is for the reason described below. In order to allow the stampers to be separated from each other after replica electroforming, the surface of the base is passivated by an oxide film treatment or the like. Therefore, the surface of the base is in a state close to a nonconductor, and the electrical resistance is high and the conductivity is poor. However, electroforming itself is possible because current flows rather than perfect non-conductor, but passivation with poor conductivity is not used to grow the film thickness by using conductive film as a seed like electroforming of father stamper. Since it is electrodeposited on the film, it becomes difficult to electrodeposit the corners of the fine pattern (see FIG. 7B).

この問題を解決するために、ファザースタンパの作製と同様に、導電膜を離型層上に成膜して電鋳する手法も、一般的に行われている。しかし、原盤と比較すると応力状態やエッジ形状が不定形な電鋳物であるスタンパを用いての成膜工程が増えるため、ダスト発生の可能性が非常に高くなる。複製を繰り返す度にダスト発生の危険性が増すため、非常に問題があった。   In order to solve this problem, a method of forming a conductive film on a release layer and performing electroforming is generally performed in the same manner as the production of a father stamper. However, since the number of film forming steps using a stamper that is an electroformed product having an indefinite stress state or edge shape is increased as compared with the master, the possibility of dust generation becomes very high. There was a serious problem because the risk of dust generation increased with each duplication.

一方、マザースタンパからサンスタンパを複製する時のめっき工程の初期電流密度をマスタースタンパ(またはファザースタンパ)からマザースタンパを複製する時の初期電流密度(0.08A/dm)の5倍以上10倍以下とする複製用スタンパの製造方法が提案されている(例えば、特許文献1参照)。この製造方法では凸形状のファザースタンパから凹形状のマザースタンパを複製する場合は転写性が良好だが、凹形状のマザースタンパから凸形状のサンスタンパを複製する場合は、Niを凹溝の先端にまで忠実に析出させるために上記手法を用いている。
特開平03−39238号公報
On the other hand, the initial current density in the plating process when replicating the sun stamper from the mother stamper is 5 to 10 times the initial current density (0.08 A / dm 2 ) when replicating the mother stamper from the master stamper (or father stamper). A method for manufacturing a replication stamper as described below has been proposed (see, for example, Patent Document 1). In this manufacturing method, when the concave mother stamper is copied from the convex father stamper, the transferability is good, but when replicating the convex sun stamper from the concave mother stamper, Ni is applied to the tip of the concave groove. The above method is used in order to deposit it faithfully.
Japanese Patent Laid-Open No. 03-39238

本発明は上記事情を考慮してなされたものであって、微細パターン転写の精度が良い複製スタンパおよびその製造方法を提供することを目的とする。   The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a replication stamper having a fine pattern transfer accuracy and a manufacturing method thereof.

本発明の第1の態様による複製スタンパの製造方法は、表面に凹凸形状を有する原盤の凹凸面に第1導電膜を作製する工程と、前記第1導電膜を元にNi電鋳法により前記原盤の凹凸形状を転写させたファザースタンパを作成する工程と、前記ファザースタンパの凹凸形状の表面に第1離型層を形成する工程と、前記ファザースタンパの前記第1離型層上に第1プリメッキ層を形成する工程と、Ni電鋳法により前記ファザースタンパの前記第1プリメッキ層上に第1電鋳層を形成する工程と、前記ファザースタンパから前記第1電鋳層および前記第1プリメッキ層を剥離することにより、凹凸形状が反転したマザースタンパを複製する工程と、を備えたことを特徴とする。   The method for manufacturing a replication stamper according to the first aspect of the present invention includes a step of producing a first conductive film on a concavo-convex surface of a master having a concavo-convex shape on the surface, and a Ni electroforming method based on the first conductive film. A step of creating a father stamper to which the uneven shape of the master is transferred, a step of forming a first release layer on the surface of the uneven shape of the father stamper, and a first on the first release layer of the father stamper A step of forming a pre-plated layer, a step of forming a first electroformed layer on the first pre-plated layer of the father stamper by Ni electroforming, and the first electroformed layer and the first pre-plated from the father stamper. And a step of replicating a mother stamper having an inverted concavo-convex shape by peeling the layer.

本発明の第2の態様による複製スタンパは、上記製造方法によって製造された複製スタンパであって、前記サンスタンパの表面から深さ1μm迄の範囲の最大粒径が700nm以下であり、かつ平均粒径が75nm以下であることを特徴とする。   The replication stamper according to the second aspect of the present invention is a replication stamper manufactured by the above manufacturing method, wherein the maximum particle size in the range from the surface of the sun stamper to a depth of 1 μm is 700 nm or less, and the average particle size Is 75 nm or less.

本発明によれば、微細パターン転写の精度が良い複製スタンパおよびその製造方法を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the replication stamper with the sufficient precision of fine pattern transfer and its manufacturing method can be provided.

以下に、本発明の実施形態について図面を参照しながら説明する。また、各図は発明の説明とその理解を促すための模式図であり、その形状や寸法、比などは実際と異なる個所があるが、これらは以下の説明と公知の技術を参酌して適宜、設計変更することができる。   Embodiments of the present invention will be described below with reference to the drawings. Each figure is a schematic diagram for promoting explanation and understanding of the invention, and its shape, dimensions, ratio, etc. are different from actual ones, but these are appropriately determined in consideration of the following explanation and known techniques. The design can be changed.

本発明の一実施形態によるスタンパの製造方法について図1(a)乃至図3を参照して説明する。図1(a)乃至図3は、本実施形態によるスタンパの製造方法を説明するための断面模式図である。   A stamper manufacturing method according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1A to FIG. 3 are schematic cross-sectional views for explaining the stamper manufacturing method according to the present embodiment.

まず、図1(a)に示すように、スピンコート法等を用いて、原盤用基板2上にレジスト層4を塗布し、図1(b)に示すように、EB描画装置100を用いて、レジスト層4に所望のパターンを描画する。続いて、図1(c)に示すように、レジスト層4に現像処理を施し、EB照射箇所が凹部となる凹凸形状のレジストパターン4aを形成し、原盤2、4aを作製する。   First, as shown in FIG. 1A, a resist layer 4 is applied on the master disk substrate 2 using a spin coat method or the like, and an EB drawing apparatus 100 is used as shown in FIG. Then, a desired pattern is drawn on the resist layer 4. Subsequently, as shown in FIG. 1C, the resist layer 4 is subjected to development processing to form a concavo-convex resist pattern 4a in which the EB irradiation site is a concave portion, and the masters 2 and 4a are manufactured.

次に、図1(d)に示すように、スパッタリング法や蒸着法等の真空成膜法又は、無電解メッキ法等を用いて、原盤2、4aの凹凸形成面をNiの導電膜6で被覆する。続いて、図1(e)に示すように、電鋳法等を用いて、原盤2、4aの凹凸形状を転写して、電鋳層8を作製する。   Next, as shown in FIG. 1 (d), the unevenness-formed surfaces of the masters 2 and 4a are covered with a Ni conductive film 6 by using a vacuum film formation method such as a sputtering method or an evaporation method, or an electroless plating method. Cover. Subsequently, as shown in FIG. 1E, the uneven shape of the masters 2 and 4a is transferred by using an electroforming method or the like, and the electroformed layer 8 is produced.

次に、図1(f)に示すように、端から真空破壊を行い、原盤2、4aと、電鋳層8および導電膜6からなるファザースタンパ10と、を剥離する。続いて、図1(g)に示すように、酸素によるエッチング法を用いて、ファザースタンパ10に付着しているレジスト残渣を除去し、ファザースタンパ10の凹凸形成面を露出させると共に、酸素エッチングによりファザースタンパ10の凹凸形成面に離型層としての酸化膜11が形成されたファザースタンパ10を得る。   Next, as shown in FIG. 1 (f), vacuum breaking is performed from the end, and the masters 2, 4 a and the father stamper 10 made of the electroformed layer 8 and the conductive film 6 are peeled off. Subsequently, as shown in FIG. 1G, the resist residue adhering to the father stamper 10 is removed by using an etching method using oxygen to expose the uneven surface of the father stamper 10, and by oxygen etching. A father stamper 10 is obtained in which an oxide film 11 as a release layer is formed on the uneven surface of the father stamper 10.

次に、図2(a)に示すように、ファザースタンパ10を母体として、2A/dm以下の低電流密度およびその時のメッキ液の温度が45℃以上でプリメッキを行い、ファザースタンパ10上に、膜厚が1μm以上のプリメッキ層12を形成する。続いて、図2(b)に示すように、電流密度を上昇させて電鋳層14を成長させて所望の厚さにする。 Next, as shown in FIG. 2A, with the father stamper 10 as a base, pre-plating is performed at a low current density of 2 A / dm 2 or less and the temperature of the plating solution at 45 ° C. or more. A pre-plated layer 12 having a film thickness of 1 μm or more is formed. Subsequently, as shown in FIG. 2B, the current density is increased to grow the electroformed layer 14 to a desired thickness.

次に、図2(c)に示すように、図1(f)に示した場合と同様に、端から真空破壊を行い、ファザースタンパ10と電鋳層14とを剥離した後に、離型層15の形成処理を行い、マザースタンパ16を得る。その後、図2(d)に示すように、マザースタンパ16を母体として、図2(a)に示した場合と同様に、膜厚が1μm以上のプリメッキ層17を形成する。   Next, as shown in FIG. 2 (c), similarly to the case shown in FIG. 1 (f), vacuum break is performed from the end, and the father stamper 10 and the electroformed layer 14 are peeled off, and then the release layer Then, the mother stamper 16 is obtained. Thereafter, as shown in FIG. 2D, the pre-plated layer 17 having a film thickness of 1 μm or more is formed using the mother stamper 16 as a base, as in the case shown in FIG.

次に、図2(e)に示すように、電流密度を上昇させて電鋳層18を成長させて所望の厚さにする。続いて、図2(f)に示すように、図1(f)に示した場合と同様に、端から真空破壊を行い、マザースタンパ16と、プリメッキ層17および電鋳層18からなるサンスタンパ20を剥離する。その後、図2(g)に示すように、凹凸面に保護膜22をスピンコートした後、乾燥させる。その後、図3に示すように、必要に応じて裏面研磨、打ち抜き加工を行うことにより、最終形態のサンスタンパ20となる。   Next, as shown in FIG. 2E, the current density is increased to grow the electroformed layer 18 to a desired thickness. Subsequently, as shown in FIG. 2 (f), as in the case shown in FIG. 1 (f), a vacuum break is performed from the end, and a mother stamper 16, and a sun stamper 20 comprising the pre-plated layer 17 and the electroformed layer 18 are obtained. To peel off. Thereafter, as shown in FIG. 2G, the protective film 22 is spin-coated on the uneven surface and then dried. Thereafter, as shown in FIG. 3, the final form of the sun stamper 20 is obtained by performing back surface polishing and punching as necessary.

なお、本実施形態では原盤は、レジスト層4aと原盤用基板2とを具備していたが、表面に凹凸形状を有する原盤基板のみからなるものであってもよい。原盤基板としては、Siウェハー等の半導体基板を用いる。レジスト層としては、EBレジスト等を用いる。ファザースタンパ10の最表面となる導電膜6としては、物理的、機械的強度が強く、腐食や磨耗に対して強く、しかも、電鋳材のNiとの融合性を考慮して、Niを主成分とするものが一般的に使用されている。また、電鋳材は、Ni或いはこれらの中にCo、S、BもしくはPを含む金属を用いる。   In the present embodiment, the master includes the resist layer 4a and the master substrate 2. However, the master may include only the master substrate having an uneven shape on the surface. A semiconductor substrate such as a Si wafer is used as the master substrate. As the resist layer, EB resist or the like is used. The conductive film 6 that is the outermost surface of the father stamper 10 has a high physical and mechanical strength, is strong against corrosion and wear, and is mainly made of Ni in consideration of the compatibility with Ni of the electroformed material. What is used as a component is generally used. The electroformed material is Ni or a metal containing Co, S, B, or P in these.

なお、本実施形態では、電鋳層剥離後のファザースタンパ10のレジスト残渣除去には酸素プラズマアッシングを行う。この処理により、ファザースタンパ10上のレジスト残渣が除去されるばかりでは無く、その後の複製に必要な離型層となる酸化膜11が形成されるため、別途離型層形成工程を必要とせず、工程増加に伴うスタンパの表面汚染の危険が減少し、高品質なスタンパを提供できる。   In this embodiment, oxygen plasma ashing is performed to remove the resist residue of the father stamper 10 after the electroformed layer is peeled off. By this treatment, not only the resist residue on the father stamper 10 is removed, but also the oxide film 11 to be a release layer necessary for the subsequent replication is formed, so that a separate release layer forming step is not required. The risk of stamper surface contamination accompanying an increase in the process is reduced, and a high-quality stamper can be provided.

プリメッキ時の電流密度は、0.8A/dm以上かつ2A/dm以下であり、この範囲内の電流密度でプリメッキを行うと、パターン転写製および電鋳ニッケルの内部応力の観点から良好な膜が得られる。しかし、0.8A/dmよりも低い電流密度で行うと電鋳ニッケルの内部応力が強くなることにより膜に皺がよってしまいパターンの転写製が悪化する。逆に、2A/dm以下よりも高い電流密度で行うと結晶粒径が粗くなるためにパターンの転写製が悪化し、プリメッキとしての意味を成さなくなる。 Current density during Purimekki is, 0.8 A / dm 2 or more and 2A / dm 2 or less, when the Purimekki at a current density in this range, good in terms of internal stress pattern transfer made and electroformed nickel A membrane is obtained. However, when the current density is lower than 0.8 A / dm 2, the internal stress of the electroformed nickel is increased, so that the film is wrinkled and the pattern transfer is deteriorated. On the other hand, if the current density is higher than 2 A / dm 2 or less, the crystal grain size becomes coarse, so that the pattern transfer is deteriorated and the meaning as pre-plating is not made.

以下、本発明の実施例1を参照して一実施形態によるスタンパの製造方法をより具体的に説明する。   Hereinafter, a method for manufacturing a stamper according to an embodiment will be described in more detail with reference to Example 1 of the present invention.

まず、原盤用基板2として6インチ径のSiウェハーを用意し、適宜、レジストとの密着性向上のために、Siウェハー表面をヘキサメチルジシラザン(HMDS)で処理する。一方、日本ゼオン社製のレジストZEP−520をアニソールで2倍に希釈し、0.2μm孔径のメンブランフィルタでろ過し、レジスト溶液を得る。スピンコート法を用いて、Siウェハー2上に上記レジスト溶液を塗布した後、200℃で3分間プリベークし、厚さ約80nmのレジスト層4を形成する(図1(a))。   First, a Si wafer having a diameter of 6 inches is prepared as the master substrate 2, and the surface of the Si wafer is appropriately treated with hexamethyldisilazane (HMDS) in order to improve adhesion with the resist. On the other hand, resist ZEP-520 manufactured by Nippon Zeon Co., Ltd. is diluted twice with anisole and filtered through a membrane filter having a pore size of 0.2 μm to obtain a resist solution. After applying the resist solution on the Si wafer 2 by using a spin coating method, the resist layer 4 having a thickness of about 80 nm is formed by pre-baking at 200 ° C. for 3 minutes (FIG. 1A).

次に、熱電界放射型のZrO/Wからなる電子銃エミッターを有する電子ビーム描画装置100のステージにSiウェハー2を載置し、Siウェハー2上のレジスト層4に所望のパターンを描画する(図1(b))。描画は、加速電圧50kVの条件とし、ステージは線速度1.7m/sのCLV(Constant Linear Velocity)で回転させ、適宜、径方向にも移動させる。また、同心円をなすトラック領域を描画する場合は、1回転毎に電子ビームに適宜偏向をかける。なお、描画の際には、所望の信号を、描画装置のステージ駆動系へ送る信号、電子ビームの偏向制御信号等の描画装置を制御するための信号と、同期させて信号源から描画装置に送る。   Next, the Si wafer 2 is placed on the stage of the electron beam drawing apparatus 100 having an electron gun emitter made of thermal field emission type ZrO / W, and a desired pattern is drawn on the resist layer 4 on the Si wafer 2 ( FIG. 1 (b)). Drawing is performed under the condition of an acceleration voltage of 50 kV, and the stage is rotated at a linear velocity of 1.7 m / s at CLV (Constant Linear Velocity) and appropriately moved in the radial direction. Further, when drawing a concentric track area, the electron beam is appropriately deflected for each rotation. When drawing, a desired signal is sent from the signal source to the drawing apparatus in synchronization with a signal for controlling the drawing apparatus such as a signal to be sent to the stage drive system of the drawing apparatus or an electron beam deflection control signal. send.

次に、スピンコータを用いて、Siウェハー2を500rpmで回転させ、現像剤ZED−N50(日本ゼオン社製)を60秒間滴下させレジスト層4を現像する。その後、有機溶媒ZMD−B(日本ゼオン社製)を90秒間滴下させリンスを行い、3000rpmの高速回転にてスピン乾燥させる。こうして、同心円をなすトラック領域を有し、隣り合うトラック間の距離が200nm以下で溝幅が80nm以下の凹凸パターン4aを有する原盤2、4aを得ることができる(図1(c))。   Next, using a spin coater, the Si wafer 2 is rotated at 500 rpm, and a developer ZED-N50 (manufactured by Nippon Zeon Co., Ltd.) is dropped for 60 seconds to develop the resist layer 4. Thereafter, an organic solvent ZMD-B (manufactured by Nippon Zeon Co., Ltd.) is dropped for 90 seconds, rinsed, and spin-dried at a high speed of 3000 rpm. In this way, masters 2 and 4a having concavity and convexity patterns 4a each having a concentric track area, a distance between adjacent tracks of 200 nm or less, and a groove width of 80 nm or less can be obtained (FIG. 1C).

次に、スパッタリングにより導電膜6を付与するため、原盤2、4aをチャンバー内に格納し、チャンバー内を8×10−3Paの真空状態とした後、Arガス雰囲気下、1Paに調整する。ターゲットとしてNiを用い、100WのDC(Direct Current)パワーを印加して2.5分間スパッタリングを行い、原盤2、4aの凹凸形成面に厚さ約20nmのNi導電膜6を形成する(図1(d))。 Next, in order to apply the conductive film 6 by sputtering, the masters 2 and 4a are housed in a chamber, the inside of the chamber is brought into a vacuum state of 8 × 10 −3 Pa, and then adjusted to 1 Pa in an Ar gas atmosphere. Ni is used as a target, 100 W of DC (Direct Current) power is applied, and sputtering is performed for 2.5 minutes to form a Ni conductive film 6 having a thickness of about 20 nm on the uneven surface of the masters 2 and 4a (FIG. 1). (D)).

次に、スルファミン酸ニッケルメッキ液に浸漬し、80分間電鋳を行い、厚さ約300μmの電鋳層8を形成する(図1(e))。なお、電流プログラムは図6(b)に示すようなもので、電流密度20A/dmまで5分で立ち上げるようにする。電鋳浴条件の一例は、スルファミン酸ニッケル:600g/L、ホウ酸:40g/L、界面活性剤(ラウリル硫酸ナトリウム):0.15g/L、液の温度:50℃、pH:4.0、電流密度
:20A/dmである。
Next, it is immersed in a nickel sulfamate plating solution and electroformed for 80 minutes to form an electroformed layer 8 having a thickness of about 300 μm (FIG. 1 (e)). The current program is as shown in FIG. 6B, and the current program is started up in 5 minutes up to a current density of 20 A / dm 2 . Examples of electroforming bath conditions are: nickel sulfamate: 600 g / L, boric acid: 40 g / L, surfactant (sodium lauryl sulfate): 0.15 g / L, liquid temperature: 50 ° C., pH: 4.0 Current density: 20 A / dm 2 .

次に、端部から真空破壊を行い、原盤2、4aから電鋳層8および導電膜6を剥離する(図1(f))。その後、水洗、乾燥した後、酸素プラズマアッシングを用いて、スタンパ10の表面の導電膜6上に付着したレジスト残渣を除去する。チャンバー内は、酸素ガスを100sccmで導入し、圧力を4Paに調整する。酸素プラズマアッシングは、100Wのパワーにて15分間行なう。酸素プラズマアッシングを行うことによりレジストの残渣を除去できるばかりではなく、パターンの表面を酸化皮膜11で覆うことが出来るため、その後の複製工程の離型層として利用できる。このようにして、原盤2と凹凸形状が反転したファザースタンパ10ができ上がる(図1(g))。   Next, vacuum break is performed from the end, and the electroformed layer 8 and the conductive film 6 are peeled off from the masters 2 and 4a (FIG. 1 (f)). Then, after washing and drying, the resist residue adhering to the conductive film 6 on the surface of the stamper 10 is removed using oxygen plasma ashing. In the chamber, oxygen gas is introduced at 100 sccm, and the pressure is adjusted to 4 Pa. Oxygen plasma ashing is performed at a power of 100 W for 15 minutes. By performing oxygen plasma ashing, not only the resist residue can be removed, but also the surface of the pattern can be covered with the oxide film 11, so that it can be used as a release layer in the subsequent replication process. In this way, the father stamper 10 having the concavo-convex shape inverted from the master 2 is completed (FIG. 1 (g)).

出来上がったファザースタンパ10を母体として、上記レジスト原盤と同様に扱い、電鋳による複製を行う。使用する電鋳浴条件は上記同様とし、この時の電流プログラムは図6(c)に示すようなもので、初期電流密度1.0A/dmまで、1分で立ち上げ10分間維持することによって2μmのプリメッキ層12を形成する(図2(a))。その後、続けて5分で20A/dmまで電流密度を上昇させて、厚さ300μmになるまで電鋳を行い、電鋳層14を形成する(図2(b))。 The completed father stamper 10 is used as a base material and is handled in the same manner as the resist master, and duplication is performed by electroforming. The electroforming bath conditions to be used are the same as described above, and the current program at this time is as shown in FIG. 6 (c). The initial current density is 1.0 A / dm 2 and it is started in 1 minute and maintained for 10 minutes. To form a 2 μm pre-plated layer 12 (FIG. 2A). Thereafter, the current density is continuously increased to 20 A / dm 2 in 5 minutes, and electroforming is performed until the thickness reaches 300 μm, thereby forming the electroformed layer 14 (FIG. 2B).

次に、原盤2からファザースタンパ10を剥離する場合と同様に、端部から真空破壊を行い、ファザースタンパ10と、電鋳層14およびプリメッキ層12とを剥離する。その後、水洗、乾燥した後、酸素プラズマアッシングを用いて、プリメッキ層12の表面に離型層となる酸化皮膜15を形成する(図2(c))。チャンバー内は、酸素ガスを100sccmで導入し、圧力を4Paに調整する。酸素プラズマアッシングは、100Wのパワーにて3分間行なう。このようにして、ファザースタンパ10と凹凸形状が反転したマザースタンパ16が出来上がる。   Next, as in the case of peeling the father stamper 10 from the master 2, a vacuum break is performed from the end, and the father stamper 10, the electroformed layer 14, and the pre-plated layer 12 are peeled off. Then, after washing with water and drying, an oxide film 15 serving as a release layer is formed on the surface of the pre-plated layer 12 using oxygen plasma ashing (FIG. 2C). In the chamber, oxygen gas is introduced at 100 sccm, and the pressure is adjusted to 4 Pa. Oxygen plasma ashing is performed at a power of 100 W for 3 minutes. In this way, the mother stamper 16 with the uneven shape reversed with the father stamper 10 is completed.

出来上がったマザースタンパ16を母体として、ファザースタンパ10からマザースタンパ16を複製するときと同様の電鋳浴組成及び電流プログラムで、マザースタンパ16の凹凸面にプリメッキ層17および電鋳層18を形成する(図2(d)、2(e))。   The pre-plated layer 17 and the electroformed layer 18 are formed on the concavo-convex surface of the mother stamper 16 with the same electroforming bath composition and current program as when the mother stamper 16 is duplicated from the father stamper 10 using the mother stamper 16 thus obtained as a base. (Fig. 2 (d), 2 (e)).

次に、ファザースタンパからマザースタンパを剥離する場合と同様に、マザースタンパ16と、電鋳層18およびプリメッキ層17とを剥離する。その後、水洗、乾燥することにより、マザースタンパ16と凹凸形状が反転したサンスタンパ20が出来上がる(図2(f))。   Next, in the same manner as when the mother stamper is peeled from the father stamper, the mother stamper 16, the electroformed layer 18 and the pre-plated layer 17 are peeled off. Thereafter, by washing and drying, the mother stamper 16 and the sun stamper 20 with the concavo-convex shape inverted are completed (FIG. 2 (f)).

この方法を繰り返すことによって、1枚のファザースタンパから複数枚のマザースタンパ、更に複数枚のサンスタンパを得ることが出来る。サンスタンパの形状はファザーの形状を再現しているので、ファザースタンパと同様に、射出成形やインプリント等、基板にパターンを転写させるための金型スタンパとして使用することができる。   By repeating this method, a plurality of mother stampers and a plurality of sun stampers can be obtained from one father stamper. Since the shape of the sun stamper reproduces the shape of the father, it can be used as a mold stamper for transferring a pattern to a substrate, such as injection molding or imprinting, in the same manner as the father stamper.

出来上がったファザースタンパ及びサンスタンパは、スピンコータを用いて保護膜溶液であるSILITECT−II(トライレーナーインターナショナル社製)を100rpmで回転させながら塗布し、その後500rpmで2秒間回転させて一様な膜とする。保護膜22を塗布されたサンスタンパ20は60℃のホットプレートで15分間乾燥させる。保護膜22が乾燥したら必要に応じて裏面研磨を行うことで電鋳面を平坦化した後、所望のサイズにトリミングすれば、金型スタンパとして使用することが出来る(図3)。   The finished father stamper and sun stamper were coated with SILITECT-II (manufactured by Trirainer International), which is a protective film solution, using a spin coater while rotating at 100 rpm, and then rotated at 500 rpm for 2 seconds to form a uniform film. . The sun stamper 20 coated with the protective film 22 is dried on a hot plate at 60 ° C. for 15 minutes. When the protective film 22 is dried, the back surface is polished as necessary to flatten the electroformed surface, and then trimmed to a desired size, it can be used as a mold stamper (FIG. 3).

マザースタンパ及びサンスタンパの複製電鋳の際の初期電流密度が2.0A/dmであること以外は実施例1と同様にしてサンスタンパを作製した。 A sun stamper was produced in the same manner as in Example 1 except that the initial current density at the time of replica electroforming of the mother stamper and the sun stamper was 2.0 A / dm 2 .

比較例Comparative example

マザースタンパ及びサンスタンパの複製電鋳の際の電流プログラムが、図6(e)に示すような電流プログラムでプリメッキを行わずに5分で20A/dmまで電流密度を上昇させて作成したこと以外は、実施例1と同様にしてサンスタンパを作製した。 The current program for replica electroforming of the mother stamper and sun stamper was created by increasing the current density to 20 A / dm 2 in 5 minutes without pre-plating with the current program as shown in FIG. Produced a sun stamper in the same manner as in Example 1.

上記実施例1、2及び比較例により作製したサンスタンパのそれぞれのパターンを原子間力顕微鏡(Atomic Force Microscope:AFM)にてパターンの形状測定を行ったところ、実施例1、2で作製したサンプルはファザースタンパの凹凸形状を忠実に再現していたが、比較例で作製したサンプルはパターンの荒れが見られ転写性が悪かった。   When the pattern shape measurement of each pattern of the sun stamper produced by the said Example 1, 2 and the comparative example was performed with the atomic force microscope (AFM), the sample produced in Example 1, 2 was as follows. Although the uneven shape of the father stamper was faithfully reproduced, the sample produced in the comparative example showed pattern roughness and poor transferability.

また、これらのサンプルについて集束イオンビーム加工観察法(Focused Ion Beam-Scanning Ion Microscope:FIB−SIM)により、構成しているNiの粒径解析を行い比較した。観察した部位は、それぞれの表層近傍と、表面から深さ1μmの部分のパターン表面に平行な断面を出し、SIM像を得て粒径解析を行った結果を図4(a)乃至図5(c)に示す。解析結果から最小粒径に関してはSIM像の分解能の制限を受け各サンプル間で有意差は見られなかった(図4(a))。しかし、最大粒径と平均粒径には有意差が認められた(図4(b)、4(c))。表層近傍では粒径は各サンプルとも比較的細かく形成されており、平均粒径としては60nm程度であったが(図4(c))、最大粒径は実施例1で273nm、実施例2で371nm、比較例で438nmであった(図4(b))。また、深さ1μmにおいては、図5(b)、5(c)に示すように、実施例1では最大粒径が476nm、平均粒径66nmであり、実施例2では最大粒径が608nm、平均粒径75nmであった。ところが、比較例で作製されたサンプルは最大粒径が832nm、平均粒径78nmとなり、粗相が多く見られた。   In addition, these samples were subjected to particle size analysis of the constituent Ni by a focused ion beam-scanning ion microscope (FIB-SIM) and compared. The observed sites are the vicinity of each surface layer and a cross section parallel to the surface of the pattern having a depth of 1 μm from the surface, and the results of obtaining a SIM image and conducting the particle size analysis are shown in FIGS. c). From the analysis results, there was no significant difference between the samples with respect to the minimum particle size due to the limitation of the resolution of the SIM image (FIG. 4 (a)). However, a significant difference was observed between the maximum particle size and the average particle size (FIGS. 4 (b) and 4 (c)). In the vicinity of the surface layer, each sample had a relatively fine particle size, and the average particle size was about 60 nm (FIG. 4C), but the maximum particle size was 273 nm in Example 1 and in Example 2. It was 371 nm and 438 nm in the comparative example (FIG. 4B). At a depth of 1 μm, as shown in FIGS. 5 (b) and 5 (c), the maximum particle size is 476 nm and the average particle size is 66 nm in Example 1, and the maximum particle size is 608 nm in Example 2. The average particle size was 75 nm. However, the sample produced in the comparative example had a maximum particle size of 832 nm and an average particle size of 78 nm, and many coarse phases were observed.

以上説明したように、本実施例によれば、ファザースタンパからマザースタンパを複製電鋳する時の初期電流密度と、マザースタンパからサンスタンパを複製電鋳する時の初期電流密度の間に違いを設ける必要は無く、双方とも0.8A/dm以上かつ2A/dm以下の低電流密度、およびその時のメッキ液の温度が45℃以上でプリメッキする。これにより、パターンを転写させる部分の電鋳Niの最大粒径が700nm以下であり、かつ平均粒径が75nm以下になり、きめ細かい電鋳層を形成することが可能になり、その結果、微細パターンの隅まで精密に形状を転写させることができる。100nm程度の深さの微細パターンの場合にはプリメッキ層の厚みがパターンの10倍の1μm以上あれば完全に転写してパターンを埋めることができる。 As described above, according to this embodiment, there is a difference between the initial current density when replica electroforming the mother stamper from the father stamper and the initial current density when replicating electrocasting the sun stamper from the mother stamper. need not, both 0.8 a / dm 2 or more and 2A / dm 2 or lower current densities, and temperatures of the plating solution at that time is Purimekki at 45 ° C. or higher. As a result, the maximum particle size of the electroformed Ni in the portion to which the pattern is transferred is 700 nm or less and the average particle size is 75 nm or less, so that a fine electroformed layer can be formed. The shape can be precisely transferred to the corner of the. In the case of a fine pattern having a depth of about 100 nm, if the thickness of the pre-plated layer is 1 μm or more, which is 10 times the pattern, the pattern can be completely transferred and filled.

以上説明したように、本実施形態によれば、ファザースタンパの微細形状を精密に転写することが出来るため、ファザーの形状を忠実に再現した高品質なサンスタンパを大量に複製することができる。   As described above, according to the present embodiment, since the fine shape of the father stamper can be accurately transferred, a high-quality sun stamper that faithfully reproduces the shape of the father can be duplicated in large quantities.

また、スタンパの複製工程に於いて導電膜を成膜する必要が無く1工程省略できるため、ダスト等によるスタンパ汚染の危険性が激減し、高品質なスタンパを提供できる。   Further, since it is not necessary to form a conductive film in the stamper duplication process and one process can be omitted, the risk of stamper contamination due to dust or the like is drastically reduced, and a high-quality stamper can be provided.

また、導電膜を使用した場合は、導電膜層と電鋳層の2層構造になるが、本実施形態でのプリメッキ層は電鋳によって行われるため、スタンパは電鋳層のみの1層構造となり層間剥離等のような事が起こり得ず、射出成形やインプリント等により記録媒体にパターンを大量複製するために使用しても、媒体に高品質な形状を転写し続けることができ、スタンパの高寿命化が図れる。   Further, when a conductive film is used, a two-layer structure of a conductive film layer and an electroformed layer is formed. However, since the pre-plated layer in this embodiment is formed by electroforming, the stamper has a one-layer structure including only the electroformed layer. Therefore, even if it is used to reproduce a large number of patterns on a recording medium by injection molding or imprinting, a high quality shape can be continuously transferred to the medium. Can extend the service life.

また、パターン面が細かい結晶粒径の素材で構成されることにより、高硬度で引っ張り強度が高く、記録媒体にパターンを転写させる際のスタンパの高寿命化が可能になる。
以上、本発明の実施形態を説明したが、本発明はこれらに限られず、特許請求の範囲に記載の発明の要旨の範疇において様々に変更可能である。また、本発明は、実施段階ではその要旨を逸脱しない範囲で種々に変形することが可能である。さらに、上記実施形態に開示されている複数の構成要素を適宜組み合わせることにより種々の発明を形成できる。
Further, since the pattern surface is made of a material having a fine crystal grain size, it has high hardness and high tensile strength, and it is possible to extend the life of the stamper when the pattern is transferred to the recording medium.
As mentioned above, although embodiment of this invention was described, this invention is not limited to these, In the category of the summary of the invention as described in a claim, it can change variously. In addition, the present invention can be variously modified without departing from the scope of the invention in the implementation stage. Furthermore, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment.

本発明の一実施形態によるスタンパの製造方法を示す断面図。Sectional drawing which shows the manufacturing method of the stamper by one Embodiment of this invention. 本発明の一実施形態によるスタンパの製造方法を示す断面図。Sectional drawing which shows the manufacturing method of the stamper by one Embodiment of this invention. 本発明の一実施形態によるスタンパの製造方法を示す図。The figure which shows the manufacturing method of the stamper by one Embodiment of this invention. 表面近傍の粒径解析結果を示す図。The figure which shows the particle size analysis result of the surface vicinity. 表面から1μmでの粒径解析結果を示す図。The figure which shows the particle size analysis result in 1 micrometer from the surface. 電鋳工程の電流プログラムを示す図。The figure which shows the electric current program of an electroforming process. ファザー電鋳と複製電鋳の違いを説明する図。The figure explaining the difference between father electroforming and replica electroforming.

符号の説明Explanation of symbols

2 原盤用基板
4 レジスト層
4a 凹凸パターン
6 導電膜
8 電鋳層
10 ファザースタンパ
11 離型層(酸化層)
12 プリメッキ
14 電鋳層
15 離型層(酸化膜)
16 マザースタンパ
17 プリメッキ
18 電鋳層
20 サンスタンパ
22 保護膜
2 Substrate substrate 4 Resist layer 4a Uneven pattern 6 Conductive film 8 Electroformed layer 10 Father stamper 11 Release layer (oxide layer)
12 Pre-plating 14 Electroformed layer 15 Release layer (oxide film)
16 Mother stamper 17 Pre-plating 18 Electroformed layer 20 Sun stamper 22 Protective film

Claims (6)

表面に凹凸形状を有する原盤の凹凸面に第1導電膜を作製する工程と、
前記第1導電膜を元にNi電鋳法により前記原盤の凹凸形状を転写させたファザースタンパを作成する工程と、
前記ファザースタンパの凹凸形状の表面に第1離型層を形成する工程と、
前記ファザースタンパの前記第1離型層上に第1プリメッキ層を形成する工程と、
Ni電鋳法により前記ファザースタンパの前記第1プリメッキ層上に第1電鋳層を形成する工程と、
前記ファザースタンパから前記第1電鋳層および前記第1プリメッキ層を剥離することにより、凹凸形状が反転したマザースタンパを複製する工程と、
を備えたことを特徴とする複製スタンパの製造方法。
Producing a first conductive film on the uneven surface of the master having an uneven shape on the surface;
Creating a father stamper in which the uneven shape of the master is transferred by Ni electroforming based on the first conductive film;
Forming a first release layer on the uneven surface of the father stamper;
Forming a first pre-plated layer on the first release layer of the father stamper;
Forming a first electroformed layer on the first pre-plated layer of the father stamper by Ni electroforming;
Duplicating the mother stamper having an inverted concavo-convex shape by peeling the first electroformed layer and the first pre-plated layer from the father stamper;
A method of manufacturing a replication stamper, comprising:
前記マザースタンパの凹凸形状の表面に第2離型層を形成する工程と、
前記マザースタンパの前記第2離型層上に第2プリメッキ層を形成する工程と、
Ni電鋳法により前記マザースタンパの前記第2プリメッキ層上に第2電鋳層を形成する工程と、
前記マザースタンパから前記第2電鋳層および前記第2プリメッキ層を剥離することにより、凹凸形状が反転したサンスタンパを複製する工程と、
を更に備えたことを特徴とする請求項1記載の複製スタンパの製造方法。
Forming a second release layer on the uneven surface of the mother stamper;
Forming a second pre-plated layer on the second release layer of the mother stamper;
Forming a second electroformed layer on the second pre-plated layer of the mother stamper by Ni electroforming;
A step of replicating a sun stamper having an inverted concavo-convex shape by peeling the second electroformed layer and the second pre-plated layer from the mother stamper;
The method of manufacturing a replication stamper according to claim 1, further comprising:
前記第1および第2プリメッキ層の形成時の電流密度が0.8A/dm以上かつ2A/dm以下であることを特徴とする請求項1または2記載の複製スタンパの製造方法。 Method for producing a replication stamper according to claim 1 or 2, wherein said current density at the time of forming the first and second Purimekki layer is 0.8 A / dm 2 or more and 2A / dm 2 or less. 前記第1および第2プリメッキ層の形成時のメッキ液温度が45℃以上であることを特徴とする請求項1乃至3のいずれかに記載の複製スタンパの製造方法。   The method for manufacturing a replication stamper according to any one of claims 1 to 3, wherein a plating solution temperature at the time of forming the first and second pre-plated layers is 45 ° C or higher. 前記第1および第2プリメッキ層の厚みが1μm以上であることを特徴とする請求項1乃至4のいずれかに記載の複製スタンパの製造方法。   The method for manufacturing a replication stamper according to any one of claims 1 to 4, wherein the first and second pre-plated layers have a thickness of 1 µm or more. 請求項1乃至5のいずれかに記載の方法によって製造された複製スタンパであって、前記サンスタンパの表面から深さ1μm迄の範囲の最大粒径が700nm以下であり、かつ平均粒径が75nm以下であることを特徴とする複製スタンパ。   A replication stamper manufactured by the method according to any one of claims 1 to 5, wherein a maximum particle size in a range from the surface of the sun stamper to a depth of 1 µm is 700 nm or less, and an average particle size is 75 nm or less. A replication stamper characterized by
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JP2010170625A (en) * 2009-01-23 2010-08-05 Toshiba Corp Method of manufacturing stamper
JP2010264756A (en) * 2010-05-26 2010-11-25 Toshiba Corp Method for manufacturing stamper
KR20120067170A (en) * 2010-12-15 2012-06-25 삼성전자주식회사 Method of manufacturing stamp for nanoimprint
US8343362B2 (en) 2008-12-22 2013-01-01 Kabushiki Kaisha Toshiba Stamper manufacturing method

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JP2003066613A (en) * 2001-08-22 2003-03-05 Columbia Music Entertainment Inc Method for producing stamper

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Publication number Priority date Publication date Assignee Title
US8343362B2 (en) 2008-12-22 2013-01-01 Kabushiki Kaisha Toshiba Stamper manufacturing method
JP2010170625A (en) * 2009-01-23 2010-08-05 Toshiba Corp Method of manufacturing stamper
JP4575497B2 (en) * 2009-01-23 2010-11-04 株式会社東芝 Stamper manufacturing method
US7938978B2 (en) 2009-01-23 2011-05-10 Kabushiki Kaisha Toshiba Method of manufacturing stamper
JP2010264756A (en) * 2010-05-26 2010-11-25 Toshiba Corp Method for manufacturing stamper
KR20120067170A (en) * 2010-12-15 2012-06-25 삼성전자주식회사 Method of manufacturing stamp for nanoimprint
US8603349B2 (en) 2010-12-15 2013-12-10 Samsung Electronics Co., Ltd. Method of manufacturing nanoimprint stamp
US8741162B2 (en) 2010-12-15 2014-06-03 Samsung Electronics Co., Ltd. Method of manufacturing nanoimprint stamp
KR101691157B1 (en) 2010-12-15 2017-01-02 삼성전자주식회사 Method of manufacturing stamp for nanoimprint

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