JP2008244258A - Photoelectric conversion device and photovoltaic generator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin film type amorphous silicon-based photoelectric conversion device substantially reducing or dissolving the problems of weather resistance (light degradation and heat deterioration). <P>SOLUTION: The photoelectric conversion device comprises: a translucent substrate 2; a translucent conductive layer 3 formed on one main surface of the translucent substrate 2; a first conductivity type amorphous silicon semiconductor layer 4, formed on the translucent conductive layer 3; an intrinsic amorphous silicon semiconductor layer 5, formed on the first conductivity type amorphous silicon semiconductor layer 4; a second conductivity type amorphous silicon semiconductor layer 6, formed on the intrinsic amorphous silicon semiconductor layer 5; a plurality of catalyst layers 7, formed in an island shape on the second conductivity type amorphous silicon semiconductor layer 6 and silane coupling layers 8, formed between the catalyst layers 7; a counter electrode side structure 20, disposed so as to face the catalyst layers 7 and the silane coupling layers 8 at an interval; and a charge transport layer 9, provided in between the catalyst layers 7 and the silane coupling layers 8 and the counter electrode side structure 20. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a photoelectric conversion device that can obtain high photoelectric conversion efficiency, is excellent in weather resistance, and can be manufactured at low cost.

  A normal bulk crystal silicon solar cell using a silicon crystal plate has a problem of finite resources and material cost because the thickness of the silicon crystal plate is as thick as about 300 μm. Therefore, there is a problem of process cost that high temperature treatment at 1000 ° C. or higher is necessary. In addition, since there is a limit to the size (about 15 cm square) of the silicon crystal plate that constitutes one power generation cell, the assembly cost required for producing a large (meter-order size) module using a large number of power generation cells is reduced. Take it.

  On the other hand, thin-film amorphous silicon solar cells using amorphous silicon thin film have a very thin amorphous silicon thin film with a thickness of about 0.3 μm, a low temperature process (about 300 ° C.), and freedom. By using a large-sized substrate, the above problems can be almost solved.

Conventionally, a thin-film amorphous silicon solar cell has a transparent electrode made of an ITO layer and a metal electrode made of aluminum or the like laminated as a back electrode. However, in a thin film type amorphous silicon solar cell, pinholes are easily formed in an amorphous silicon thin film due to film forming conditions, substrate pretreatment, damage during formation of a back electrode, and the like. Through the pinhole, the metal electrode as the back electrode comes into contact with the transparent electrode of the transparent conductive substrate that becomes the substrate of the amorphous silicon thin film at the time of stacking, causing a leakage current by reducing the shunt resistance, resulting in a decrease in output cause. In particular, in a large-area module, the occurrence of leakage current becomes significant, causing a decrease in photoelectric conversion efficiency and a decrease in module output.
Chemical Letter 35th Edition (2006) Page 956 (Chem. Lett. 35 (2006) p956)

  The deterioration of semiconductor characteristics in wet solar cells using a semiconductor such as silicon and a liquid electrolyte has been referred to in the past, and improvement in durability and reliability is a major issue for the development of new energy such as solar cells.

  Studies on improving durability and reliability of a photoelectric conversion element in which Pt catalyst particles are electrolytically deposited on a single crystal silicon solar cell have already been reported (for example, see Non-Patent Document 1). Since this photoelectric conversion element is severely deteriorated and its durability and reliability are low, attempts have been made to prevent deterioration by introducing a vinyl group or an alkyl group into the gaps between the Pt catalyst particles. However, according to Non-Patent Document 1, only durability and reliability up to 24 hours (photoelectric conversion efficiency retention rate 22%) are shown.

  Accordingly, the present invention has been completed in view of the above-mentioned conventional problems, and the object thereof is a thin-film amorphous that can greatly reduce or eliminate the problem of weather resistance (light degradation and thermal degradation). The object is to provide a silicon-based photoelectric conversion device.

  The photoelectric conversion device of the present invention includes a translucent substrate, a translucent conductive layer formed on one main surface of the translucent substrate, and a first conductive type non-conductive layer formed on the translucent conductive layer. A crystalline silicon semiconductor layer, an intrinsic type amorphous silicon semiconductor layer formed on the first conductive type amorphous silicon semiconductor layer, and a second conductive type formed on the intrinsic type amorphous silicon semiconductor layer Type amorphous silicon semiconductor layer, a plurality of island-shaped catalyst layers on the second conductivity type amorphous silicon semiconductor layer, a silane coupling layer formed between the catalyst layers, the catalyst layer, A counter electrode structure disposed so as to face the silane coupling layer with a gap, and a charge transport layer provided between the catalyst layer and the silane coupling layer and the counter electrode structure. It is characterized by that.

  The photoelectric conversion device of the present invention is preferably characterized in that the silane coupling layer has a diamino group, an acryloxypropyl group, or a vinyl group.

  The photoelectric conversion device of the present invention is preferably characterized in that the charge transport layer is a liquid electrolyte.

  The photoelectric conversion device of the present invention is preferably characterized in that the counter electrode side structure has a metal substrate or a transparent conductive substrate and another catalyst layer formed thereon. It is.

  The photoelectric conversion device of the present invention is preferably characterized in that the counter electrode side structure has a photoelectric conversion body having a dye-sensitized porous semiconductor layer.

The photoelectric conversion device of the present invention is preferably characterized in that the counter electrode side structure has a photoelectric conversion body having a Cu (In, Ga) Se ₂ layer.

  The photoelectric conversion device of the present invention is preferably characterized in that the counter electrode side structure has a photoelectric conversion body having a crystalline silicon layer.

  The photoelectric conversion device of the present invention is preferably characterized in that the catalyst layer is made of at least one of platinum, palladium, rhodium, carbon and polythiophene.

  The photovoltaic device of the present invention is characterized in that the photoelectric conversion device of the present invention is used as a power generation means, and the generated power of the power generation means is supplied to a load.

  The photoelectric conversion device of the present invention includes a translucent substrate, a translucent conductive layer formed on one main surface of the translucent substrate, and a first conductivity type amorphous formed on the translucent conductive layer. A silicon semiconductor layer, an intrinsic type amorphous silicon semiconductor layer formed on the first conductivity type amorphous silicon semiconductor layer, and a second conductivity type amorphous material formed on the intrinsic type amorphous silicon semiconductor layer The silicon semiconductor layer, the catalyst layer formed in a plurality of islands on the second conductivity type amorphous silicon semiconductor layer, the silane coupling layer formed between the catalyst layers, and the gap between the catalyst layer and the silane coupling layer The silane coupling layer includes a counter electrode side structure disposed so as to be opposed to each other and a charge transport layer provided between the catalyst layer and the silane coupling layer and the counter electrode side structure. Adsorbed on the surface of two-conductivity type amorphous silicon semiconductor layer, catalyst There prevented from being chemically etched by the electrolyte and to increase the adhesive strength serves to mechanically stabilize. As a result, the durability and reliability of the catalyst layer against light irradiation and high-temperature heating can be maintained. In addition, the catalyst layer may be formed in an island shape, and has an effect of avoiding a short circuit failure due to a pinhole, which is a disadvantage of the thin film amorphous silicon photoelectric conversion body.

  In the photoelectric conversion device of the present invention, preferably, since the silane coupling layer has a diamino group, an acryloxypropyl group, or a vinyl group, durability and reliability of the catalyst layer against light irradiation and high-temperature heating. Can be held more effectively.

  In the photoelectric conversion device of the present invention, preferably, since the charge transport layer is a liquid electrolyte, a liquid electrolyte that easily deteriorates the catalyst layer but has excellent charge transport characteristics is used while suppressing deterioration of the catalyst layer. Can do. That is, since the catalyst layer is chemically and mechanically stabilized by the silane coupling layer, the catalyst layer is hardly deteriorated by the liquid electrolyte, and the photoelectric conversion efficiency is improved by using the liquid electrolyte having excellent charge transport characteristics. Will improve.

  In the photoelectric conversion device of the present invention, preferably, the counter electrode side structure has a metal substrate or a transparent conductive substrate and another catalyst layer formed thereon, and therefore the counter electrode side structure. Can be efficiently taken out by a metal substrate or a transparent conductive substrate.

  In the photoelectric conversion device of the present invention, preferably, the counter electrode side structure has a photoelectric conversion body having a dye-sensitized porous semiconductor layer. Thin-film amorphous silicon-based photoelectric converter including a layer, an intrinsic type amorphous silicon semiconductor layer, and a second conductive type amorphous silicon semiconductor layer has excellent sensitivity at a short wavelength (about 300 to 600 nm) and dye sensitization The photoelectric conversion body which has the porous semiconductor layer made is excellent in a long wavelength (about 600-900 nm) sensitivity. As a result, a photoelectric conversion device capable of photoelectric conversion over a wide wavelength range (about 300 to 900 nm) is obtained.

  Further, when the counter electrode side structure includes another catalyst layer such as a Pt layer, the other catalyst layer functions as an ohmic contact layer that makes ohmic contact between the charge transport layer and the dye-sensitized photoelectric converter, It is possible to avoid an electrical short circuit between the thin film amorphous silicon-based photoelectric converter and the dye-sensitized photoelectric converter. As a result, a stacked (tandem) photoelectric conversion device having high quality can be manufactured with high productivity.

In the photoelectric conversion device of the present invention, preferably, the counter electrode side structure has a photoelectric conversion body having a Cu (In, Ga) Se ₂ layer, and therefore the first conductivity type amorphous silicon semiconductor layer. And a thin-film amorphous silicon-based photoelectric converter including an intrinsic type amorphous silicon semiconductor layer and a second conductive type amorphous silicon semiconductor layer have excellent short wavelength (about 300 to 700 nm) sensitivity and Cu (In, A photoelectric conversion body having a Ga) Se ₂ layer is excellent in long wavelength (about 700 to 1100 nm) sensitivity. As a result, a photoelectric conversion device capable of performing photoelectric conversion over a wide wavelength range (about 300 to 1100 nm) is obtained.

Further, when the counter electrode side structure includes another catalyst layer such as a Pt layer, the other catalyst layer performs ohmic contact between the charge transport layer and the photoelectric conversion body having a Cu (In, Ga) Se ₂ layer. It functions as a contact layer, and an electrical short circuit between the thin film amorphous silicon photoelectric converter and the photoelectric converter having a Cu (In, Ga) Se ₂ layer can be avoided. As a result, a stacked (tandem) photoelectric conversion device having high quality can be manufactured with high productivity.

  In the photoelectric conversion device of the present invention, preferably, since the counter electrode side structure has a photoelectric conversion body having a crystalline silicon layer, the first conductive amorphous silicon semiconductor layer and the intrinsic amorphous A thin-film amorphous silicon-based photoelectric converter including a silicon semiconductor layer and a second conductive amorphous silicon semiconductor layer has excellent sensitivity at a short wavelength (about 300 to 700 nm), and a photoelectric converter having a crystalline silicon layer is long. It is excellent in wavelength (about 400 to 1000 nm) sensitivity. As a result, a photoelectric conversion device capable of photoelectric conversion over a wide wavelength range (about 300 to 1000 nm) is obtained.

  Further, when the counter electrode side structure includes another catalyst layer such as a Pt layer, the other catalyst layer functions as an ohmic contact layer that makes ohmic contact between the charge transport layer and the photoelectric conversion body having the crystalline silicon layer, It is possible to avoid an electrical short circuit between the thin film amorphous silicon-based photoelectric conversion body and the photoelectric conversion body having a crystalline silicon layer. As a result, a stacked (tandem) photoelectric conversion device having high quality can be manufactured with high productivity.

  In the photoelectric conversion device of the present invention, preferably, the catalyst layer is made of at least one of platinum, palladium, rhodium, carbon, and polythiophene. Therefore, the charge transport layer (electrolyte layer) and the second conductivity type amorphous material are used. This has the effect of facilitating the transfer of charges between the porous silicon semiconductor layers, that is, the effect of reducing the overvoltage.

  Further, the photovoltaic power generation apparatus of the present invention uses the photoelectric conversion apparatus of the present invention as a power generation means and supplies the generated power of the power generation means to a load, so that durability and reliability are improved. Become.

  Hereinafter, the photoelectric conversion device of the present invention will be described in detail with reference to the drawings.

  1 and 2 are cross-sectional views showing examples of embodiments of the photoelectric conversion device of the present invention. In FIG. 1, 1 is incident light, 2 is a translucent substrate made of glass or plastic, 3 is a translucent conductive layer made of ITO layer, etc., 4 is a first conductive type (p-type) amorphous silicon semiconductor layer. 5 is an intrinsic (i-type) amorphous silicon layer, 6 is a second conductivity type (n-type) amorphous silicon semiconductor layer, 7 is a catalyst layer, 8 is a silane coupling layer, and 9 is a charge transport layer. is there.

  Further, 10 is a porous semiconductor layer, 11 is a sensitizing dye, 12 is another translucent substrate on the counter electrode side structure 20 side, and 13 is another translucent conductive layer on the counter electrode side structure 20 side. . The counter electrode side structure 20 includes a translucent substrate 12, a translucent conductive layer 13, a porous semiconductor layer 10, and a sensitizing dye 10.

  The photoelectric conversion device of the present invention includes a translucent substrate 2, a translucent conductive layer 3 formed on one main surface of the translucent substrate 2, and a first conductive formed on the translucent conductive layer 3. Type amorphous silicon semiconductor layer 4, intrinsic type amorphous silicon semiconductor layer 5 formed on first conductivity type amorphous silicon semiconductor layer 4, and formed on intrinsic type amorphous silicon semiconductor layer 5. The second conductive type amorphous silicon semiconductor layer 6, the catalyst layer 7 formed in a plurality of islands on the second conductive type amorphous silicon semiconductor layer 6, and the silane coupling formed between the catalyst layers 7 The layer 8 is provided between the catalyst layer 7 and the silane coupling layer 8 so as to face each other with a space therebetween, and between the catalyst layer 7, the silane coupling layer, and the counter electrode side structure 20. The charge transport layer 8 is provided.

  The translucent substrate 2 is made of glass or plastic and has a thickness of about 0.1 to 5 mm.

  The translucent conductive layer 3 is made of ITO, tin oxide or the like, and the thickness is preferably about 0.3 to 2 μm. When the thickness is less than 0.3 μm, the sheet resistance increases, and the series resistance of the photoelectric conversion device increases, so that the FF characteristics deteriorate. When the thickness exceeds 2 μm, the unevenness of the surface becomes larger than the thickness of the first conductive type amorphous silicon semiconductor layer 4, and the entire surface of the translucent conductive layer 3 is stably stabilized by the first conductive type amorphous silicon semiconductor layer 4. It becomes difficult to cover. The translucent conductive layer 3 is formed by a CVD method or the like.

  The thickness of the first conductive type amorphous silicon semiconductor layer 4 is preferably about 5 to 30 nm. If it is less than 5 nm, the open-circuit voltage decreases. When it exceeds 30 nm, a short circuit current will be reduced. The first conductivity type amorphous silicon semiconductor layer 4 is formed by a plasma CVD method or the like.

  The intrinsic type amorphous silicon semiconductor layer 5 is preferably about 50 to 800 nm in thickness. If it is less than 50 nm, the amount of light that is transmitted is converted into electricity, and the short-circuit current is reduced. If it exceeds 800 nm, the generated internal electric field becomes small, and the collection efficiency of the generated carriers decreases. The intrinsic type amorphous silicon semiconductor layer 5 is formed by a plasma CVD method or the like.

  The thickness of the second conductivity type amorphous silicon semiconductor layer 6 is preferably about 5 to 50 nm. If it is less than 5 nm, the open-circuit voltage decreases. If it exceeds 50 nm, the series resistance of the photoelectric conversion device increases. The second conductivity type amorphous silicon semiconductor layer 6 is formed by a plasma CVD method or the like.

  The catalyst layer 7 is formed in a plurality of island shapes on the second conductivity type amorphous silicon semiconductor layer 6, and the thickness is preferably about 0.5 to 20 nm. If the thickness is less than 0.5 nm, the distance between the island-shaped catalyst layers 7 is too large, and it becomes difficult to obtain a catalytic effect. If it exceeds 20 nm, the amount of transmitted light is reduced and the entire surface of the second conductive type amorphous silicon semiconductor layer 6 is covered with the catalyst layer (metal layer) 7, so that the charge transport layer 9 and the second conductive type amorphous material are covered. The effect which avoids a short circuit with the quality silicon semiconductor layer 6 will be reduced. The catalyst layer 7 is formed by a sputtering method or the like. However, in order to form a plurality of islands, it can be realized by performing an operation of forming an extremely thin thickness as described above.

  The silane coupling layer 8 has a thickness of about one molecular layer of about 0.1 to 3 nm. If the thickness is less than 0.1 nm, it is difficult to suppress deterioration due to oxidation of the amorphous silicon semiconductor layer. If it exceeds 3 nm, the catalyst layer 7 is inactivated by completely covering the catalyst layer 7.

  The silane coupling layer 8 includes a translucent conductive layer 3, a first conductive type amorphous silicon semiconductor layer 4, an intrinsic type amorphous silicon semiconductor layer 5, a second conductive type amorphous silicon semiconductor layer 6, and a catalyst. The translucent substrate 2 on which the layer 7 is formed can be formed by a method of immersing in a solution of a silane coupling agent. In this case, it is preferable to immerse the transparent substrate 2 in a state where a portion other than the portion where the silane coupling layer 8 is formed is covered with a mask.

  In the photoelectric conversion device of the present invention, the silane coupling layer 8 preferably has a diamino group, an acryloxypropyl group, or a vinyl group. With this configuration, the durability and reliability of the catalyst layer 7 against light irradiation and high-temperature heating can be more effectively maintained. That is, it is possible to effectively suppress the catalyst layer 7 from being separated from the second conductive type amorphous silicon semiconductor layer 6 by light irradiation and high-temperature heating.

The diamino group (R—NH—CH ₂ —CH ₂ —NH ₂ ) is a functional substituent that binds to Pt or the like constituting the catalyst layer 7 so that the catalyst layer 7 is stabilized more chemically and mechanically. work. As a result, separation of the catalyst layer 7 from the second conductive type amorphous silicon semiconductor layer 6 by light irradiation and high temperature heating can be more effectively suppressed.

  When the silane coupling layer 8 contains a diamino group, the content is preferably 2% by weight or more. If it is less than 2% by weight, it becomes difficult to stabilize the catalyst layer 7.

In addition, the acryloxypropyl group (R—C ₃ H ₆ —O—CO—CH═CH ₂ ) and the vinyl group (R—CH═CH ₂ ) have a functionality that works so as to polymerize with each other. It is a substituent and functions to make the silane coupling layer 8 more chemically and mechanically stable. As a result, separation of the catalyst layer 7 from the second conductive type amorphous silicon semiconductor layer 6 by light irradiation and high temperature heating can be more effectively suppressed.

  When the silane coupling layer 8 contains an acryloxypropyl group, the content is preferably 10% by weight or more. If it is less than 10% by weight, the silane coupling layer 8 becomes difficult to polymerize on the surface of the second conductivity type amorphous silicon semiconductor layer 6.

  When the silane coupling layer 8 contains a vinyl group, the content is preferably 10% by weight or more. If it is less than 10% by weight, the silane coupling layer 8 becomes difficult to polymerize on the surface of the second conductivity type amorphous silicon semiconductor layer 6.

  In the photoelectric conversion device of the present invention, the charge transport layer 9 is preferably a liquid electrolyte. With this configuration, a liquid electrolyte that easily deteriorates the catalyst layer 7 but has excellent charge transport characteristics can be used while suppressing deterioration of the catalyst layer 7. That is, since the catalyst layer 7 is chemically and mechanically stabilized by the silane coupling layer 8, the catalyst layer 7 is hardly deteriorated by the liquid electrolyte, and the liquid electrolyte having excellent charge transport characteristics is used. Photoelectric conversion efficiency is improved.

  When the charge transport layer 9 is composed of a liquid electrolyte, the charge transport layer 9 is composed of iodine / iodide salt, bromine / bromide salt, cobalt complex, potassium ferrocyanide and the like.

  The charge transport layer 9 is a solid electrolyte such as a gel electrolyte or a polymer electrolyte, a conductive polymer such as polythiophene / polypyrrole or polyphenylene vinylene, or an organic molecular electron transport such as a fullerene derivative, a pentacene derivative, a perylene derivative, or a triphenyldiamine derivative. It may consist of an agent.

  The thickness of the charge transport layer 9 is preferably about 0.01 to 500 μm. If the thickness is less than 0.1 μm, the positive electrode side and the counter electrode side may come into contact with each other to cause a short circuit. If it exceeds 500 μm, the photoelectric conversion efficiency is likely to decrease due to an increase in the charge transport layer 9 which is a resistance component, and if the charge transport layer 9 is a liquid electrolyte, a sealing failure due to an increase in the liquid portion is likely to occur. .

  Moreover, as for the photoelectric conversion apparatus of this invention, it is good for the counter electrode side structure 20 to have a metal substrate or a transparent conductive substrate, and the other catalyst layer formed on it. In this case, a metal substrate made of titanium, molybdenum, tungsten, nickel or the like can be used. As the transparent conductive substrate, a glass or plastic substrate on which an ITO layer, a tin oxide layer or the like is formed can be used.

  FIG. 2 shows a case where the counter electrode side structure 20 has a configuration including a transparent conductive substrate and another catalyst layer formed thereon. The transparent conductive substrate is composed of a translucent substrate 12 and a translucent conductive layer 13 made of an ITO layer or the like formed thereon. On the translucent conductive layer 13, a catalyst layer 17 made of Pt (platinum) or the like formed in a plurality of islands is formed.

  In the photoelectric conversion device of the present invention, the counter electrode-side structure 20 preferably includes a photoelectric conversion body having a dye-sensitized porous semiconductor layer 10. A configuration in this case (tandem photoelectric conversion device) is shown in FIG.

  As shown in FIG. 1, a photoelectric conversion body (dye sensitized photoelectric conversion body) having a dye-sensitized porous semiconductor layer 10 is provided on the counter electrode side structure 20 side. The dye-sensitized photoelectric conversion body is formed on another translucent substrate 12, another translucent conductive layer 13 formed on the other translucent substrate 12, or another translucent conductive layer 13. The porous semiconductor layer 10 is dye-sensitized.

The material and composition of the porous semiconductor layer 10 is optimally titanium oxide (TiO ₂ ), and other materials include titanium (Ti), zinc (Zn), tin (Sn), niobium (Nb), Indium (In), yttrium (Y), lanthanum (La), zirconium (Zr), tantalum (Ta), hafnium (Hf), strontium (Sr), barium (Ba), calcium (Ca), vanadium (V), A metal oxide semiconductor of at least one metal element such as tungsten (W) is preferable, and nitrogen (N), carbon (C), fluorine (F), sulfur (S), chlorine (Cl), phosphorus (P 1) or more of non-metallic elements such as Titanium oxide or the like is preferable because it has an electron energy band gap in the range of 2 to 5 eV, which is larger than the energy of visible light. The porous semiconductor layer 5 is preferably an n-type semiconductor whose conduction band is lower than that of the sensitizing dye 4 in the electron energy level.

  The porous semiconductor layer 10 is made of titanium dioxide or the like, and has a large number of fine pores (having a pore diameter of preferably about 10 to 40 nm, with a peak conversion efficiency at 22 nm). It may be a porous n-type oxide semiconductor layer or the like. When the pore size of the porous semiconductor layer 10 is less than 10 nm, the penetration and adsorption of the sensitizing dye 11 are hindered, so that a sufficient amount of adsorption of the sensitizing dye 11 cannot be obtained, and the diffusion of the electrolyte is hindered. In addition, since the diffusion resistance increases, the photoelectric conversion efficiency decreases. If it exceeds 40 nm, the specific surface area of the porous semiconductor layer 10 decreases, so that it is necessary to increase the thickness in order to secure the amount of adsorption of the sensitizing dye 11, and if the thickness is increased too much, light is transmitted. The sensitizing dye 11 cannot absorb light, and the movement distance of the charge injected into the porous semiconductor layer 10 is increased, resulting in a large loss due to charge recombination. Since the diffusion distance also increases and the diffusion resistance increases, the photoelectric conversion efficiency also decreases.

  The porous semiconductor layer 10 is a porous body that is a granular body, or a linear body such as a needle-shaped body, a tubular body, or a columnar body, or a collection of these various linear bodies. Thereby, the surface area which adsorb | sucks the sensitizing dye 11 increases, and photoelectric conversion efficiency can be improved. The porous semiconductor layer 10 is preferably a porous body having a porosity of 20 to 80%, more preferably 40 to 60%. The surface area as the light working electrode layer can be increased 1000 times or more by making it porous, and light absorption, photoelectric conversion, and electronic conduction can be performed efficiently.

  The porosity of the porous semiconductor layer 10 is determined by obtaining an isothermal adsorption curve of the sample by a nitrogen gas adsorption method using a gas adsorption measuring device, and using a BJH (Barrett-Joyner-Halenda) method or a CI (Chemical Ionization) method. , DH (Dollimore-Heal) method or the like can be used to determine the pore volume and obtain it from the particle density of the sample.

  The shape of the porous semiconductor layer 10 is preferably a shape having a large surface area and a small electric resistance, and is preferably composed of fine particles or fine linear bodies, for example. The average particle diameter or average wire diameter is preferably 5 to 500 nm, and more preferably 10 to 200 nm. Here, if the lower limit of the average particle diameter or the average wire diameter of 5 to 500 nm is less than this, the material cannot be miniaturized, and if the upper limit exceeds this, the junction area is reduced and the photocurrent is significantly reduced. It depends.

  Moreover, by making the porous semiconductor layer 10 into a porous body, the surface as a dye-sensitized photoelectric conversion body formed by adsorbing the sensitizing dye 11 to the porous semiconductor layer 10 becomes uneven, resulting in a light confinement effect, The conversion efficiency can be further increased.

  The thickness of the porous semiconductor layer 10 is preferably 0.1 to 50 μm, more preferably 1 to 20 μm. Here, the lower limit value at 0.1 to 50 μm is not suitable for practical use when the thickness is smaller than this, and the upper limit value is not suitable for practical use. This is because light is not incident.

When the porous semiconductor layer 10 is made of titanium oxide, it is formed as follows. First, acetylacetone is added to TiO ₂ anatase powder, and then kneaded with deionized water to prepare a titanium oxide paste stabilized with a surfactant. The prepared paste is applied at a constant speed onto the light-transmitting conductive layer 13 on the light-transmitting substrate 12 by a doctor blade method, a bar coating method, or the like, and is 300 to 600 ° C., preferably 400 to 500 ° C. in the atmosphere. The porous semiconductor layer 10 is formed by heat treatment for 10 to 60 minutes, preferably 20 to 40 minutes. This method is simple and preferable.

As a low-temperature growth method for the porous semiconductor layer 10, an electrodeposition method, an electrophoretic electrodeposition method, a hydrothermal synthesis method, etc. are preferable. As a post-treatment for improving electron transport properties, a microwave treatment or a CVD method is used. A UV treatment such as plasma treatment or thermal catalyst treatment is preferable. The porous semiconductor layer 10 formed by the low temperature growth method is preferably composed of a porous ZnO layer formed by the electrodeposition method, a porous TiO ₂ layer formed by the electrophoretic electrodeposition method, and the like.

Further, the surface of the porous body of the porous semiconductor layer 10 may be treated with TiCl ₄ treatment, that is, immersed in a TiCl ₄ solution for 10 hours, washed with water, and fired at 450 ° C. for 30 minutes. The conversion efficiency is improved.

  In addition, an extremely thin dense layer of an n-type oxide semiconductor may be inserted between the porous semiconductor layer 10 and the light-transmitting substrate 12, and the reverse current can be suppressed, so that the conversion efficiency is increased.

  The porous semiconductor layer 10 is preferably composed of a sintered body of oxide semiconductor fine particles, and the average particle diameter of the oxide semiconductor fine particles is gradually increased in the thickness direction from the translucent substrate 12 side. For example, the porous semiconductor layer 10 is preferably composed of a two-layer laminate in which the average particle diameters of the oxide semiconductor particles are different. Specifically, by using oxide semiconductor fine particles having a small average particle diameter on the translucent substrate 12 side and oxide semiconductor fine particles (scattering particles) having a large average particle diameter on the catalyst layer 7 side, the average particle diameter is obtained. The porous semiconductor layer 10 having a large thickness produces a light confinement effect due to light scattering and light reflection, thereby improving the conversion efficiency.

  More specifically, as oxide semiconductor fine particles having a small average particle diameter, 100 wt% (wt%) having an average particle diameter of about 20 nm is used, and as the oxide semiconductor fine particles having a large average particle diameter, the average particle diameter is What is necessary is just to use 70 wt% of about 20 nm and 30 wt% of those having an average particle diameter of about 180 nm. By changing these weight ratios, average particle diameters, and respective film thicknesses, an optimum light confinement effect can be obtained. In addition, by increasing the number of layers from two layers to a plurality of layers, or by coating and forming so that these boundaries do not occur, the average particle size is formed so as to gradually increase in the thickness direction from the translucent substrate 12 side. can do.

  Examples of the sensitizing dye 11 include ruthenium-tris, ruthenium-bis, osmium-tris, osmium-bis transition metal complexes, polynuclear complexes, ruthenium-cis-diaqua-bipyridyl complexes, phthalocyanines, porphyrins, and polycycles. Xanthene dyes such as aromatic compounds and rhodamine B are preferred.

  In order to adsorb the sensitizing dye 11 to the porous semiconductor layer 10, at least one carboxyl group, sulfonyl group, hydroxamic acid group, alkoxy group, aryl group, phosphoryl group, etc. are substituted on the sensitizing dye 11. It is effective to have as. Here, the substituent is capable of firmly chemisorbing the sensitizing dye 11 itself to the porous semiconductor layer 10 and easily transferring charge from the excited sensitizing dye 11 to the porous semiconductor layer 10. I just need it.

  As a method of adsorbing the sensitizing dye 11 to the porous semiconductor layer 10, for example, there is a method of immersing the porous semiconductor layer 10 formed on the translucent substrate 12 in a solution in which the sensitizing dye 11 is dissolved. Can be mentioned.

Solvents for dissolving the sensitizing dye 11 when adsorbing the sensitizing dye 11 to the porous semiconductor layer 10 include alcohols such as ethanol, ketones such as acetone, ethers such as diethyl ether, acetonitrile, and the like. Or a mixture of two or more of these nitrogen compounds. The concentration of the sensitizing dye 11 in the solution is preferably about 5 × 10 ⁻⁵ to 2 × 10 ⁻³ mol / l (l (liter): 1000 cm ³ ).

  When adsorbing the sensitizing dye 11 to the porous semiconductor layer 10, the temperature conditions of the solution and the atmosphere are not particularly limited, and examples include conditions under atmospheric pressure or in vacuum, room temperature, or heating of the substrate 2. . The time required for adsorption of the sensitizing dye 11 can be appropriately adjusted depending on the kind of the sensitizing dye 11 and the solution, the concentration of the solution, the circulation amount of the solution of the sensitizing dye 11 and the like. Thereby, the sensitizing dye 11 can be adsorbed to the porous semiconductor layer 10.

In the photoelectric conversion device of the present invention, it is preferable that the counter electrode side structure has a photoelectric conversion body (CIS type photoelectric conversion body) having a Cu (In, Ga) Se ₂ layer (CIS layer). In this case, a tandem photoelectric conversion device is configured. The CIS type photoelectric conversion body has an n-type window layer made of ZnO and a Cu (In, Ga) Se ₂ layer (light absorption layer).

  In the photoelectric conversion device of the present invention, the counter electrode side structure preferably includes a photoelectric conversion body (crystalline silicon photoelectric conversion body) having a crystalline silicon layer. In this case, a tandem photoelectric conversion device is configured. The crystalline silicon type photoelectric conversion body uses a single crystal silicon semiconductor, a polycrystalline silicon semiconductor, and a microcrystalline silicon semiconductor, and specifically includes a p-type microcrystalline silicon semiconductor, an i-type polycrystalline silicon semiconductor, and an n-type. It has a pin stack structure in which microcrystalline silicon semiconductors are stacked.

  In the photoelectric conversion device of the present invention, the catalyst layer 7 is preferably made of at least one of platinum, palladium, rhodium, carbon, and polythiophene. These materials are catalysts having a low overvoltage with respect to the charge transport layer 8. The catalyst layer 7 for lowering the overvoltage is a layer for facilitating transfer of charges between the charge transport layer 8 and the second conductivity type amorphous silicon semiconductor layer 6, and the charge transport layer 8 and the second conductivity type amorphous material. This is a layer for securing an ohmic junction with the high-quality silicon semiconductor layer 6. Note that the overvoltage refers to a large voltage that is first applied to operate the photoelectric conversion device.

  The photovoltaic device of the present invention has a configuration in which the photoelectric conversion device of the present invention is used as a power generation means, and the generated power of the power generation means is supplied to a load. Specifically, a photovoltaic device is a structure having a load such as a photoelectric conversion device, an inverter device that converts a direct current output from the photoelectric conversion device into an alternating current, an electric motor, a lighting device, and the like. Used as a solar cell or the like installed on the roof or wall.

  Examples of the photoelectric conversion device of the present invention will be described below. A photoelectric conversion device having the configuration of FIG. 1 was produced as follows.

As the translucent substrate 2, a glass substrate in which a translucent conductive layer 3 composed of a SnO ₂ : F layer (fluorine-doped SnO ₂ layer) having a sheet resistance of 10 Ω / □ (square) and a thickness of 1 μm is formed on one main surface ( Size 2 cm × 2 cm, thickness 2 mm).

  Next, a p-type a-Si: H layer as the first conductive type amorphous silicon semiconductor layer 4 and the intrinsic type amorphous silicon semiconductor layer 5 are formed on the transparent conductive layer 3 using a plasma CVD apparatus. The i-type a-Si: H layer as n and the n-type a-Si: H layer as the second conductivity type amorphous silicon semiconductor layer 6 were successively formed in a vacuum.

  The p-type a-Si: H layer means an amorphous silicon (a-Si) layer in which the semiconductor conductivity type is p-type and H (hydrogen) is doped.

As source gases for forming the p-type a-Si: H layer, SiH ₄ gas, H ₂ gas, and B ₂ H ₆ gas (diluted to 500 ppm with H ₂ ) are used, and the flow rates of these gases are respectively set. Deposition was performed at 3 sccm, 10 sccm, 2 sccm, and a thickness of 90 mm (9 nm).

As source gases for forming the i-type a-Si: H layer, SiH ₄ gas and H ₂ gas were used, and the flow rates of these gases were 30 sccm and 80 sccm, respectively, and they were deposited to a thickness of 1700 mm (170 nm).

As source gases for forming the n-type a-Si: H layer, SiH ₄ gas, H ₂ gas, and PH ₃ gas (diluted to 1000 ppm with H ₂ ) are used, and the flow rates of these gases are 3 sccm, 30 sccm and 6 sccm were deposited with a thickness of 100 mm (10 nm).

  The temperature of the translucent substrate 2 is 220 ° C. in any of the pin structure layers (p-type a-Si: H layer, i-type a-Si: H layer, n-type a-Si: H layer). did.

  Next, a Pt (platinum) layer as the catalyst layer 7 was formed by a sputtering method so as to have a thickness of 5 nm. At this time, since the Pt layer was very thin, it was formed into an island shape.

  Next, the translucent substrate 2 on which the translucent conductive layer 3, the pin structure layer, and the Pt layer are formed is immersed in a solution of a silane coupling agent for 12 hours to form a surface of the n-type a-Si: H layer. A silane coupling agent was adsorbed. Then, the excess silane coupling agent was rinsed with ethanol, and the 1-nm-thick silane coupling layer 8 was formed between Pt layers.

On the other hand, as a translucent substrate 12 on the counter electrode side structure 20 side, a glass substrate on which a translucent conductive layer 13 made of SnO ₂ : F layer having a sheet resistance of 10Ω / □ and a thickness of 1.2 μm is formed on one main surface. (Size 2 cm × 2 cm, thickness 3 mm) was prepared.

  Next, a Pt layer as the counter electrode structure 20 (another catalyst layer) was formed on the translucent conductive layer 13 by a sputtering method so as to have a thickness of 5 nm. At this time, since the Pt layer was very thin, it was formed in an island shape.

  Next, an outer peripheral portion of one main surface where the pin structure layer or the like of the translucent substrate 2 is formed, and an outer peripheral portion of one main surface where the counter electrode side structure 20 or the like of the translucent substrate 12 is formed, The films were bonded together and hermetically sealed through a film-like thermoplastic adhesive (trade name “Bynel 4164” manufactured by DuPont). The distance between the translucent substrate 2 and the translucent substrate 12 (corresponding to the thickness of the charge transport layer 9) was 20 μm.

Thereafter, a liquid electrolyte containing iodine (I ₂ ), calcium iodide (CaI), and tetrabutylpyridine is injected as a charge transport layer 8 from a through-hole formed in the light-transmitting substrate 12 in advance. A conversion device was produced.

  In addition, the following 6 types were produced as a photoelectric conversion apparatus. That is, the photoelectric conversion device A includes N-2- (aminoethyl) -3-aminopropyltrimethoxysilane in the silane coupling layer 8, and the photoelectric conversion includes 3-aminopropyltriethoxysilane in the silane coupling layer. Converter B, photoelectric conversion device C containing 3-methacryloxypropyltrimethoxysilane in the silane coupling layer, and photoelectric conversion device D containing 3-glycidoxypropyltrimethoxysilane in the silane coupling layer A device containing vinyltrimethoxysilane in the coupling layer was designated as photoelectric conversion device E, and a material containing 3-acryloxypropyltrimethoxysilane in the silane coupling layer was designated as photoelectric conversion device F.

  Further, as a comparative example, a photoelectric conversion device having the same configuration as that of the above example was manufactured except that the silane coupling layer 8 was not provided.

The photoelectric conversion devices having an area of 1 cm ^{2 in} the examples and comparative examples were irradiated with light from an AM1.5 solar simulator and tested for durability and reliability at a temperature of 47 degrees.

  The rate of change from the initial value of the photoelectric conversion efficiency after 16 hours in each photoelectric conversion device of the example is −52% for the photoelectric conversion device A (minus indicates improvement in photoelectric conversion efficiency from the initial value), photoelectric conversion device B was 17%, photoelectric conversion device C was 36%, photoelectric conversion device D was 25%, photoelectric conversion device E was 11%, and photoelectric conversion device F was 1%.

  On the other hand, in the photoelectric conversion device of the comparative example, the decrease rate from the initial value of the photoelectric conversion efficiency after 16 hours was 45%.

  Regarding the photoelectric conversion device F including 3-acryloxypropyltrimethoxysilane having the most stable reliability in the silane coupling layer 8 among the photoelectric conversion devices of the examples, the surface of the second conductive type amorphous silicon semiconductor layer It is considered that the surface of the second conductivity type amorphous silicon semiconductor layer is protected by polymerizing the terminal acryloxy group after the silane coupling agent is adsorbed on the surface.

  Among the photoelectric conversion devices of the examples, the photoelectric conversion device A including N-2- (aminoethyl) -3-aminopropyltrimethoxysilane in the silane coupling layer 8 has a photoelectric conversion efficiency of 16 hours after the initial value. The 52% improvement is that the diamino group contained in the silane coupling layer covers the surface of the Pt layer, and the surface of the Pt layer is exposed after the test, improving the photoelectric conversion efficiency compared to the initial value. it is conceivable that.

It is sectional drawing which shows an example of embodiment about the photoelectric conversion apparatus of this invention. It is sectional drawing which shows the other example of embodiment about the photoelectric conversion apparatus of this invention.

Explanation of symbols

2: translucent substrate 3: translucent conductive layer 4: first conductive type (p-type) amorphous silicon semiconductor layer 5: intrinsic (i-type) amorphous silicon layer 6: second conductive type (n Type) Amorphous silicon semiconductor layer 7: catalyst layer 8: silane coupling layer 9: charge transport layer 10: porous semiconductor layer 11: sensitizing dye 12: translucent substrate 13 on the counter electrode side structure side: counter electrode side Translucent conductive layer 20 on structure side: counter electrode side structure

Claims (9)

  A translucent substrate, a translucent conductive layer formed on one main surface of the translucent substrate, a first conductive amorphous silicon semiconductor layer formed on the translucent conductive layer, An intrinsic amorphous silicon semiconductor layer formed on the first conductive amorphous silicon semiconductor layer; a second conductive amorphous silicon semiconductor layer formed on the intrinsic amorphous silicon semiconductor layer; A plurality of island-shaped catalyst layers on the second conductivity type amorphous silicon semiconductor layer, a silane coupling layer formed between the catalyst layers, and a gap between the catalyst layer and the silane coupling layer. And a charge transport layer provided between the counter electrode-side structure disposed so as to be opposed to each other and the catalyst layer, the silane coupling layer, and the counter electrode-side structure. Conversion device.   The photoelectric conversion device according to claim 1, wherein the silane coupling layer has a diamino group, an acryloxypropyl group, or a vinyl group.   The photoelectric conversion device according to claim 1, wherein the charge transport layer is a liquid electrolyte.   4. The photoelectric conversion device according to claim 1, wherein the counter electrode side structure includes a metal substrate or a transparent conductive substrate and another catalyst layer formed thereon. 5. .   4. The photoelectric conversion device according to claim 1, wherein the counter electrode side structure includes a photoelectric conversion body having a dye-sensitized porous semiconductor layer. 5. 4. The photoelectric conversion device according to claim 1, wherein the counter electrode side structure includes a photoelectric conversion body having a Cu (In, Ga) Se ₂ layer. 5.   The photoelectric conversion device according to claim 1, wherein the counter electrode side structure includes a photoelectric conversion body having a crystalline silicon layer.   The photoelectric conversion device according to claim 1, wherein the catalyst layer is made of at least one of platinum, palladium, rhodium, carbon, and polythiophene.   9. A photovoltaic power generation apparatus characterized by using the photoelectric conversion device according to claim 1 as a power generation means and supplying the generated power of the power generation means to a load.

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