JP2008244019A5 - - Google Patents
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- Publication number
- JP2008244019A5 JP2008244019A5 JP2007080313A JP2007080313A JP2008244019A5 JP 2008244019 A5 JP2008244019 A5 JP 2008244019A5 JP 2007080313 A JP2007080313 A JP 2007080313A JP 2007080313 A JP2007080313 A JP 2007080313A JP 2008244019 A5 JP2008244019 A5 JP 2008244019A5
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- film
- soi
- manufacturing
- silicon oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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- 238000009792 diffusion process Methods 0.000 claims 7
- 238000004519 manufacturing process Methods 0.000 claims 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 7
- 229910052814 silicon oxide Inorganic materials 0.000 claims 7
- 239000002019 doping agent Substances 0.000 claims 5
- 150000002500 ions Chemical class 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 2
- 229910052710 silicon Inorganic materials 0.000 claims 2
- 239000010703 silicon Substances 0.000 claims 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N Silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 125000004429 atoms Chemical group 0.000 claims 1
- 239000007789 gas Substances 0.000 claims 1
- 239000001257 hydrogen Substances 0.000 claims 1
- 229910052739 hydrogen Inorganic materials 0.000 claims 1
- -1 hydrogen ions Chemical class 0.000 claims 1
- XCCANNJCMHMXBZ-UHFFFAOYSA-N hydroxyiminosilicon Chemical compound ON=[Si] XCCANNJCMHMXBZ-UHFFFAOYSA-N 0.000 claims 1
- 238000005468 ion implantation Methods 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 238000002360 preparation method Methods 0.000 claims 1
- 230000002265 prevention Effects 0.000 claims 1
Claims (6)
ウエーハ全体にｐ型ドーパントを高濃度に含有するｐ＋シリコン単結晶ウエーハからなるベースウエーハと、前記ベースウエーハのｐ型ドーパントよりも低濃度のドーパントを含有するシリコン単結晶ウエーハからなるボンドウエーハとを準備する工程と、
前記ベースウエーハの表面にシリコン酸化膜を熱酸化によって形成する工程と、
前記ボンドウエーハと前記ベースウエーハとを、前記ベースウエーハ上のシリコン酸化膜を介して貼り合わせる貼り合わせ工程と、
前記ボンドウエーハを薄膜化してＳＯＩ層を形成する工程と
を含むＳＯＩウエーハの製造方法において、
前記貼り合わせ工程より前に、前記ベースウエーハ上のシリコン酸化膜中に取り込まれた前記ｐ型ドーパントが前記貼り合わせ工程後に前記ボンドウエーハに拡散することを防止する拡散防止膜を５０ｎｍ以上１０００ｎｍ以下（４００ｎｍ以上１０００ｎｍ以下を除く）の膜厚で前記ボンドウエーハの表面に形成する工程を有し、前記拡散防止膜の膜厚を、前記ベースウエーハ上のシリコン酸化膜の膜厚よりも薄くすることを特徴とするＳＯＩウエーハの製造方法。 at least,
A base wafer comprising a p + silicon single crystal wafer containing a high concentration of p-type dopant in the entire wafer, and a bond wafer comprising a silicon single crystal wafer containing a dopant at a lower concentration than the p-type dopant of the base wafer. A preparation process;
Forming a silicon oxide film on the surface of the base wafer by thermal oxidation;
A bonding step of bonding the bond wafer and the base wafer through a silicon oxide film on the base wafer;
Forming an SOI layer by thinning the bond wafer; and a method of manufacturing an SOI wafer, comprising:
Before the bonding step, a diffusion preventing film that prevents the p-type dopant taken into the silicon oxide film on the base wafer from diffusing into the bond wafer after the bonding step is 50 nm or more and 1000 nm or less ( Forming a film thickness on the surface of the bond wafer with a film thickness of 400 nm or more and 1000 nm or less), and making the diffusion prevention film thinner than the silicon oxide film on the base wafer. A method for manufacturing an SOI wafer.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007080313A JP5194508B2 (en) | 2007-03-26 | 2007-03-26 | Manufacturing method of SOI wafer |
| PCT/JP2008/000339 WO2008117509A1 (en) | 2007-03-26 | 2008-02-26 | Soi wafer manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007080313A JP5194508B2 (en) | 2007-03-26 | 2007-03-26 | Manufacturing method of SOI wafer |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008244019A JP2008244019A (en) | 2008-10-09 |
| JP2008244019A5 true JP2008244019A5 (en) | 2009-10-22 |
| JP5194508B2 JP5194508B2 (en) | 2013-05-08 |
Family
ID=39788251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007080313A Active JP5194508B2 (en) | 2007-03-26 | 2007-03-26 | Manufacturing method of SOI wafer |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP5194508B2 (en) |
| WO (1) | WO2008117509A1 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5643488B2 (en) * | 2009-04-28 | 2014-12-17 | 信越化学工業株式会社 | Manufacturing method of SOI wafer having low stress film |
| JP2011071193A (en) * | 2009-09-24 | 2011-04-07 | Sumco Corp | Lamination soi wafer and manufacturing method of the same |
| GB2484506A (en) * | 2010-10-13 | 2012-04-18 | Univ Warwick | Heterogrowth |
| JP5978764B2 (en) * | 2012-05-24 | 2016-08-24 | 信越半導体株式会社 | Manufacturing method of SOI wafer |
| JP6186984B2 (en) | 2013-07-25 | 2017-08-30 | 三菱電機株式会社 | Manufacturing method of semiconductor device |
| JP7334698B2 (en) * | 2020-09-11 | 2023-08-29 | 信越半導体株式会社 | SOI WAFER MANUFACTURING METHOD AND SOI WAFER |
| JP7380517B2 (en) * | 2020-10-21 | 2023-11-15 | 信越半導体株式会社 | SOI wafer manufacturing method and SOI wafer |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01186612A (en) * | 1988-01-14 | 1989-07-26 | Fujitsu Ltd | Manufacture of semiconductor substrate |
| JP3237888B2 (en) * | 1992-01-31 | 2001-12-10 | キヤノン株式会社 | Semiconductor substrate and method of manufacturing the same |
| JPH0837286A (en) * | 1994-07-21 | 1996-02-06 | Toshiba Microelectron Corp | Semiconductor substrate and manufacture thereof |
| JPH098124A (en) * | 1995-06-15 | 1997-01-10 | Nippondenso Co Ltd | Insulation separation substrate and its manufacture |
| KR970052024A (en) * | 1995-12-30 | 1997-07-29 | 김주용 | SOH eye substrate manufacturing method |
| JPH10116897A (en) * | 1996-10-09 | 1998-05-06 | Mitsubishi Materials Shilicon Corp | Laminated board and its manufacture |
| JP3395661B2 (en) * | 1998-07-07 | 2003-04-14 | 信越半導体株式会社 | Method for manufacturing SOI wafer |
| JPWO2005022610A1 (en) * | 2003-09-01 | 2007-11-01 | 株式会社Sumco | Manufacturing method of bonded wafer |
| JP2007059704A (en) * | 2005-08-25 | 2007-03-08 | Sumco Corp | Method for manufacturing laminated board and laminated board |
-
2007
- 2007-03-26 JP JP2007080313A patent/JP5194508B2/en active Active
-
2008
- 2008-02-26 WO PCT/JP2008/000339 patent/WO2008117509A1/en active Application Filing
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