JP2008243848A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a resistance value and a leakage current during high-voltage operation in a semiconductor device, which comprises a field plate electrode via an insulation film on a nitride-based compound semiconductor layer and an electrode that is connected to the field plate electrode electrically and in Schottky-contact with the nitride-based compound semiconductor layer. <P>SOLUTION: The semiconductor device has: the insulation film 8 having, on an nitride-based compound semiconductor layer 4, an inclination section becoming thicker gradually, and the electrode 9 that is provided so that it is extended on the inclination section of the insulation film 8 from an area on the nitride-based compound semiconductor layer and is in Schottky-contact with the nitride-based compound semiconductor layer 4. An angle α1 is not smaller than 1 degree and not larger than 40 degrees between a virtual line, which connects an end point A at a side having the electrode 9 on the bottom surface of the insulation film 8 to an end point B on the bottom surface of the electrode 9 formed on the inclination section of the insulation film 8, and the front surface of the nitride-based compound semiconductor layer 4. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a structure in which a part of a gate field plate is inclined.

  In recent years, semiconductor elements using nitride-based compound semiconductors have attracted attention because of their high frequency and high breakdown voltage characteristics. However, a semiconductor device using a nitride-based compound semiconductor has not been put into practical use as a power device such as a switching device because of a problem of a decrease in drain current (so-called current collapse phenomenon) during high voltage operation and a gate leakage current.

  One solution is a nitride compound in which a field plate electrode portion (hereinafter referred to as field plate electrode) extending from a main portion of the gate electrode (hereinafter referred to as gate electrode) is provided between the drain electrode and the gate electrode. A semiconductor element made of a semiconductor is disclosed. (For example, refer to Patent Document 1 and Patent Document 2.)

  Patent Document 1 discloses a structure in which a gate field plate structure is newly provided below the source field plate electrode so as to extend toward the drain electrode between the drain electrode and the gate electrode.

  In Patent Document 2, the gate electrode has a field plate electrode formed on the SiON film, and the thickness of the SiON film between the field plate electrode and the semiconductor layer is increased from the gate electrode toward the drain electrode side, A structure is disclosed in which the electrostatic potential line between the drain electrode and the gate electrode can be further smoothed to improve the breakdown voltage and reduce the gate leakage current.

  In addition, a structure in which a field plate electrode and a gate electrode are formed in a semiconductor element made of silicon and a slope is provided in a part thereof is also disclosed (for example, see Patent Document 3).

In Patent Document 3, an oxide layer is selectively formed between a drain electrode and a gate electrode on the surface of a semiconductor element by a local oxidation of silicon (LOCOS) technique, and the inclined oxide layer (side of the oxide layer) is formed. A field plate electrode electrically connected to the gate electrode. Then, as shown in FIG. 2 of Patent Document 3, the isoelectric potential line between the drain electrode and the gate electrode can be further smoothed, and the electric field concentration near the end of the gate electrode on the drain electrode side can be reduced. As a result, the breakdown voltage between the drain electrode and the gate electrode of the semiconductor element and the output of the semiconductor element can be improved.
Japanese Patent Laying-Open No. 2005-93864 (page 8, FIG. 2) International Publication No. WO2005 / 081304 Pamphlet (Pages 6-9, FIGS. 4-6) JP-A-5-259456 (page 3, FIG. 2)

  An object of the present invention is to provide a semiconductor having a field plate electrode on an nitride compound semiconductor layer with an insulating film interposed therebetween, and an electrode electrically connected to the field plate electrode and being in Schottky contact with the nitride compound semiconductor layer. An object of the present invention is to provide a semiconductor device capable of further reducing the resistance value and leakage current during high voltage operation.

  In order to achieve the above object, a semiconductor device according to claim 1 of the present invention includes an insulating film having an inclined portion that gradually increases on a nitride-based compound semiconductor layer, and from above the nitride-based compound semiconductor layer. An electrode provided so as to extend on the inclined portion of the insulating film, the end point on the side where the electrode is provided on the bottom surface of the insulating film, and the formed on the inclined portion of the insulating film An angle between a virtual line connecting the end points on the bottom surface of the electrode and the top surface of the nitride-based compound semiconductor layer is 1 degree or more and 40 degrees or less.

  According to a second aspect of the present invention, there is provided an insulating film having an inclined portion that gradually increases on the nitride-based compound semiconductor layer, and on the inclined portion of the insulating film from the nitride-based compound semiconductor layer. And an electrode provided so as to extend on a flat portion parallel to the nitride-based compound semiconductor layer, an end point on the side where the electrode is provided on the bottom surface of the insulating film, and a flat portion of the insulating film The angle between the imaginary line connecting the intersection of the inclined portion and the flat portion of the bottom surface of the electrode formed by extending to the top and the top surface of the nitride-based compound semiconductor layer is 1 degree or more and 40 degrees or less It is characterized by being.

  According to a third aspect of the present invention, there is provided a drain electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer, and a nitride compound semiconductor layer on the nitride compound semiconductor layer. A source electrode that is in low resistance contact with the insulating film, and a nitride-based compound semiconductor layer that is provided in a region sandwiched between the drain electrode and the source electrode and has an inclined portion that gradually increases in thickness toward the drain electrode side And extending over the nitride-based compound semiconductor layer in a region between the insulating film and the source electrode so as to extend from the nitride-based compound semiconductor layer to the inclined portion of the insulating film. A gate electrode formed on the bottom surface of the insulating film on the side where the electrode is provided and an end point on the bottom surface of the electrode formed on the inclined portion of the insulating film. Wherein the angle between the virtual line and the upper surface of the nitride compound semiconductor layer is not more than 40 degrees 1 degree.

  According to a fourth aspect of the present invention, there is provided a semiconductor device having a drain electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer, and a nitride compound semiconductor layer on the nitride compound semiconductor layer. A source electrode that is in low resistance contact with the insulating film, and a nitride-based compound semiconductor layer that is provided in a region sandwiched between the drain electrode and the source electrode and has an inclined portion that gradually increases in thickness toward the drain electrode side And extending over the nitride-based compound semiconductor layer in a region between the insulating film and the source electrode so as to extend from the nitride-based compound semiconductor layer to the inclined portion of the insulating film. A gate electrode formed on the bottom surface of the insulating film on the side where the electrode is provided, and the slope of the bottom surface of the electrode formed by extending to the flat portion of the insulating film. Part Wherein the angle between the upper surface of the imaginary line and the nitride compound semiconductor layer connecting the intersection between the flat portion is less than 40 degrees 1 degree.

  The semiconductor device according to a fifth aspect of the present invention is the semiconductor device according to the third or fourth aspect, wherein the gate electrode is provided between the gate electrode and the insulating film in the inclined portion, or the nitriding. A gate oxide film is provided between the physical compound semiconductor layer and the insulating film and between the gate electrode and the nitride compound semiconductor layer.

  According to a sixth aspect of the present invention, in the semiconductor device according to the third or fourth aspect, the gate electrode is in Schottky contact with the nitride-based compound semiconductor layer.

  According to a seventh aspect of the present invention, there is provided a semiconductor device comprising: a cathode electrode that is in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer; and the cathode electrode on the nitride compound semiconductor layer. And an insulating film having an inclined portion that gradually increases in thickness on the cathode electrode side, and the nitride compound on the nitride compound semiconductor layer and adjacent to the insulating film A semiconductor device having an anode electrode provided so as to extend from the semiconductor layer to the inclined portion of the insulating film, the end point on the side where the electrode is provided on the bottom surface of the insulating film; and the insulating film An angle between an imaginary line connecting the end point on the bottom surface of the electrode formed on the inclined portion and the upper surface of the nitride-based compound semiconductor layer is 1 degree or more and 40 degrees or less.

  According to an eighth aspect of the present invention, there is provided a semiconductor device comprising: a cathode electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer; and the cathode electrode on the nitride compound semiconductor layer. And an insulating film having an inclined portion that gradually increases in thickness on the cathode electrode side, and the nitride compound on the nitride compound semiconductor layer and adjacent to the insulating film A semiconductor device having an anode electrode provided so as to extend from the semiconductor layer to the inclined portion of the insulating film, the end point on the side where the electrode is provided on the bottom surface of the insulating film; The angle between the imaginary line connecting the inclined portion of the bottom surface of the electrode formed by extending to the flat portion and the intersection of the flat portion and the upper surface of the nitride-based compound semiconductor layer is 1 degree or more 40 Less than .

  A semiconductor device according to a ninth aspect of the present invention is the semiconductor element device according to any one of the first to ninth aspects, wherein the nitride-based compound semiconductor layer has a heterojunction, and 2 near the heterointerface. It has a two-dimensional electron gas layer.

  According to a tenth aspect of the present invention, in the semiconductor device according to any one of the first to ninth aspects, the insulating film is a silicon oxide film.

  According to the semiconductor device of the present invention, the resistance value and leakage current during high voltage operation can be reduced.

Next, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic and different from the actual ones. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

Further, the embodiment described below exemplifies an apparatus and a method for embodying the technical idea of the present invention. The technical idea of the present invention is the arrangement of each component as described below. It is not something specific. The technical idea of the present invention can be variously modified within the scope of the claims.

[First embodiment]
FIG. 1 is a schematic sectional view of a semiconductor device according to the first embodiment of the present invention. 7A to 7C show a structure in which the gate field plate electrode 9 is formed partway through the inclined portion of the insulating film 8 in the semiconductor device according to the first embodiment of the present invention. FIG. 8 is a schematic enlarged cross-sectional structure diagram of an example, and FIG. 8 is a schematic enlarged cross-sectional structure diagram of a structural example in which the gate field plate electrode 9 is formed up to the flat portion of the insulating film 8.

  As shown in FIG. 1, the semiconductor device according to the first embodiment of the present invention is gradually formed laterally from the gate electrode 7 toward the drain electrode 6 on the nitride-based compound semiconductor layer (3,4). The nitride-based compound semiconductor layer (3, 4) is provided to extend from the insulating film 8 having the thickened slope portion and the slope of the insulating film 8 from the nitride-based compound semiconductor layer (3,4). And a gate electrode 7 in Schottky contact.

  As shown in FIGS. 1 and 7, the semiconductor device according to the first embodiment of the present invention includes an end point A on the drain electrode 6 side where the gate electrode 7 is provided on the bottom surface of the insulating film 8, and the insulating film 8. The angle between the imaginary line connecting the end point B on the bottom surface of the gate field plate electrode 9 formed on the inclined portion and the top surface of the nitride-based compound semiconductor layer (3,4) is 1 degree or more and 40 degrees or less. It is characterized by being.

  Alternatively, as shown in FIGS. 1 and 8, the semiconductor device according to the first embodiment of the present invention includes an end point A on the drain electrode 6 side where the gate electrode 7 is provided on the bottom surface of the insulating film 8, and An inclined portion of the insulating film 8 provided thicker from the gate electrode 7 toward the drain electrode 6, and an inclined portion on the bottom surface of the gate field plate electrode 9 formed by extending to the flat portion of the insulating film 8 ahead of the inclined portion An angle between an imaginary line connecting the intersection point C with the flat portion and the upper surface of the nitride-based compound semiconductor layer (3, 4) is 1 to 40 degrees.

  Further, in the semiconductor device according to the first embodiment of the present invention, as shown in FIG. 1, the nitride-based compound semiconductor layers (3,4) have a heterojunction, and a two-dimensional electron gas layer in the vicinity of the heterointerface. 11 may be provided.

  In the semiconductor device according to the first embodiment of the present invention, the insulating film 8 may be a silicon oxide film.

  As shown in FIG. 1, the semiconductor device according to the first embodiment of the present invention includes an electron transit layer described later on a substrate 1 made of single crystal silicon (Si), silicon carbide (SiC), ceramic, or the like. 3 has a known buffer layer (buffer layer) 2 for relaxing the lattice constant difference between the substrate 3 and the substrate 1 and improving the crystallinity of the electron transit layer 3.

  On the buffer layer 2, an electron transit layer 3 made of a first nitride compound semiconductor and an electron supply layer 4 made of a second nitride compound semiconductor are sequentially laminated. A two-dimensional electron gas layer 11 is formed on the electron transit layer 3 side of the interface between the electron transit layer 3 and the electron supply layer 4. A source electrode 5, a drain electrode 6, and a gate electrode 7 are provided on the electron supply layer 4.

  An insulating film 8 as a protective film is provided between the drain electrode 6 and the gate electrode 7. The insulating film 8 has a portion (inclined portion) that becomes thicker from the gate electrode 7 side toward the drain electrode 6 side. A gate field plate electrode 9 extending from the gate electrode 7 is provided on a portion where the insulating film 8 is gradually thickened.

  The gate field plate electrode 9 has, for example, an angle α1 with respect to the upper surface of the electron supply layer 4 as shown in FIG. Here, the angle α1 is an inclination start point A and an inclination end point B (the end point B of the gate field plate electrode 9 that is in contact with the insulating film 8 when the gate field plate electrode 9 is formed only halfway through the inclination). ) And an upper surface of the electron supply layer 4 (taper angle).

  FIG. 7B is an explanatory diagram of the semiconductor device when the structure of FIG. 7A is formed on the insulating film 100 disposed on the electron supply layer 4. The gate field plate electrode 9 has, for example, an angle α1 with respect to the upper surface of the insulating film 100 on the electron supply layer 4 as shown in FIG. Here, the angle α1 is an inclination start point A and an inclination end point B (the end point B of the gate field plate electrode 9 that is in contact with the insulating film 8 when the gate field plate electrode 9 is formed only halfway through the inclination). ) And an upper surface of the electron supply layer 4 (taper angle).

  FIG. 7C is an explanatory diagram of the semiconductor device when the insulating film 100 is disposed on the electron supply layer 4 and the insulating film 8 in the structure of FIG. As shown in FIG. 7C, the gate field plate electrode 9 has, for example, an angle α1 with respect to the upper surface of the electron supply layer 4. Here, the angle α1 is an inclination start point A and an inclination end point B (the gate field plate in contact with the insulating film 100 on the insulating film 8 when the gate field plate electrode 9 is formed only partway through the inclination. This is an angle (taper angle) formed between a virtual straight line connecting the end point B) of the electrode 9 and the upper surface of the electron supply layer 4.

  Further, when the gate field plate electrode 9 further extends to the drain electrode 6 side and is in contact with the flat portion of the insulating film 8 substantially parallel to the upper surface of the electron supply layer 4, as shown in FIG. For example, an angle α2 is formed with respect to the upper surface of the supply layer 4. Here, the angle α2 is an inclination start point A and an inclination end point C (the inclined portion of the bottom surface of the gate field plate electrode 9 when the gate field plate electrode 9 extends and is in contact with the flat portion of the insulating film 8). Is an angle (taper angle) formed between a virtual straight line connecting the intersection C) and the flat portion with the upper surface of the electron supply layer 4.

  The current collapse phenomenon is caused when a high voltage is applied between the gate and the source of the semiconductor device, electrons are injected from the gate electrode 7 to the surface between the gate and the drain, and the nitride compound semiconductor layer (electron supply layer) has crystal defects. 4) The electron concentration of the two-dimensional electron gas layer 11 is reduced by being trapped and accumulated in the surface level, and even if the voltage higher than the threshold voltage is applied to the gate electrode and turned on, the electron emission from the surface level is not caused. This is considered to be a phenomenon in which the steady drain current decreases due to the slowness.

  In the semiconductor device according to the first embodiment of the present invention, the angle α is reduced so that the inclined portion of the gate field plate electrode 9 is further laid, thereby being trapped at the surface level near the end of the gate electrode 7. Electrons are easily extracted by the electric field generated by the gate field plate electrode 9, and as a result, the current collapse phenomenon can be suppressed.

  Further, in the semiconductor device according to the first embodiment of the present invention, the electric field concentration near the end of the gate electrode 7 is alleviated by laying down the inclined portion of the gate field plate electrode 9, and the injected electrons are reduced. it can. As a result, electrons themselves captured by the surface state can be reduced. As a result, the current collapse phenomenon can be suppressed.

  Similarly, in the semiconductor device according to the first embodiment of the present invention, the electric field concentration in the vicinity of the end of the gate electrode 7 is relaxed and the effective gate length is increased, so that the gate leakage current can be reduced.

  That is, in the semiconductor device according to the first embodiment of the present invention, the current collapse phenomenon can be reduced and the gate leakage current can be reduced by further laying the inclined portion of the gate field plate electrode 9. .

  In the semiconductor device according to the first embodiment of the present invention, the breakdown voltage of the semiconductor device does not depend on the length of the gate field plate electrode 9 but depends on the distance between the gate field plate electrode 9 and the drain electrode 6. On the other hand, when the distance between the gate field plate electrode 9 and the drain electrode 6 is constant, the gate field plate electrode 9 is preferably shorter in order to suppress the current collapse phenomenon.

  Furthermore, in the semiconductor device according to the first embodiment of the present invention, the insulating film 8 is preferably a silicon oxide film compared to a silicon nitride film. Since the silicon nitride film applies tensile stress to the electron supply layer 4 in the same manner as the electron transit layer 3, the piezoelectric polarization between the electron transit layer 3 and the electron supply layer 4 is weakened, and the electron concentration is lowered to reduce the semiconductor device. This is because the on-resistance increases.

  Furthermore, in the semiconductor device according to the first embodiment of the present invention, the buffer layer 2 can be omitted.

  Furthermore, in the semiconductor device according to the first embodiment of the present invention, the drain electrode 6 and the source electrode 5 are also provided with a drain field plate structure and a source field plate structure to alleviate electric field concentration and reduce the current collapse phenomenon. A structure that reduces the gate leakage current may be used.

  Furthermore, in the semiconductor device according to the first embodiment of the present invention, when the substrate 1 is a conductive substrate, a back electrode is provided on the back side of the substrate 1 and the source electrode 5 and the back electrode are electrically connected by wiring. By doing so, the electric field concentration in the vicinity of the drain electrode 6 can be relaxed.

  Furthermore, in the semiconductor device according to the first embodiment of the present invention, a barrier layer such as an AlN barrier layer may be provided between the electron supply layer 4 and the electron transit layer 3.

  According to the semiconductor device of the first embodiment of the present invention, the nitride compound compound has the field plate electrode on the nitride compound semiconductor layer through the insulating film, and is electrically connected to the field plate electrode. In a semiconductor device having an electrode in Schottky contact with a semiconductor layer, the resistance value and leakage current during high-voltage operation can be further reduced.

[Second Embodiment]
FIG. 2 is a schematic cross-sectional structure diagram of a semiconductor device according to a second embodiment of the present invention. FIG. 2A is a basic configuration diagram, and FIG. 7 and a configuration diagram extending to the gate field plate electrode 9 side are shown.

  As shown in FIG. 2A, the semiconductor device according to the second embodiment of the present invention is in low resistance contact with the nitride compound semiconductor layer 4 on the nitride compound semiconductor layer (3,4). A drain electrode 6, a source electrode 5 in low resistance contact with the nitride compound semiconductor layer 4 on the nitride compound semiconductor layer (3,4), and a nitride compound semiconductor layer (3,4); An insulating film 8 provided in a region sandwiched between the drain electrode 6 and the source electrode 5 and having an inclined portion that gradually increases in thickness on the drain electrode 6 side, and the nitride-based compound semiconductor layer (3, 4), A Schottky junction with the nitride-based compound semiconductor layer 4 is formed in the region between the insulating film 8 and the source electrode 5, and extends from the nitride-based compound semiconductor layer (3, 4) to the inclined portion on the side of the insulating film 8. The gate electrode 7 is provided.

  Furthermore, in the semiconductor device according to the second embodiment of the present invention, as shown in FIG. 2A, after forming the insulating film 18, the source electrode 5 and the drain electrode 6 are opened, and the source electrode 5 and the drain A source plating electrode and a drain plating electrode 60 formed on the electrode 6 are provided. In FIG. 2B, a drain field plate (FP) structure in which a drain plating electrode 60 is extended to the gate electrode 7 and the gate field plate electrode 9 side is provided.

  Here, in the semiconductor device according to the second embodiment of the present invention, the end point A on the side where the gate electrode 7 is provided on the bottom surface of the insulating film 8, similarly to the structure shown in FIG. Between the imaginary line connecting the end point B on the bottom surface of the field plate electrode 9 formed on the inclined portion of the insulating film 8 and the upper surface of the nitride-based compound semiconductor layer (3,4) (taper angle) α1 is not less than 1 degree and not more than 40 degrees.

  Alternatively, similarly to the structure shown in FIG. 7B, the gate field plate electrode 9 has, for example, an angle α1 with respect to the upper surface of the insulating film 100 on the electron supply layer 4. Here, the angle α1 is an inclination start point A and an inclination end point B (the end point B of the gate field plate electrode 9 that is in contact with the insulating film 8 when the gate field plate electrode 9 is formed only halfway through the inclination). ) And an upper surface of the electron supply layer 4 (taper angle).

  Alternatively, similarly to the structure shown in FIG. 7C, the gate field plate electrode 9 has an angle α <b> 1 with respect to the upper surface of the electron supply layer 4, for example. Here, the angle α1 is an inclination start point A and an inclination end point B (the gate field plate in contact with the insulating film 100 on the insulating film 8 when the gate field plate electrode 9 is formed only partway through the inclination. This is an angle (taper angle) formed between a virtual straight line connecting the end point B) of the electrode 9 and the upper surface of the electron supply layer 4.

  Further, in the semiconductor device according to the second embodiment of the present invention, the end point A on the side where the gate electrode 7 is provided on the bottom surface of the insulating film 8 and the end point A, similarly to the structure shown in FIG. An imaginary line connecting the intersection C of the inclined portion of the bottom surface of the field plate electrode 9 formed by extending to the drain electrode 6 side to the inclined portion of the insulating film 8 and further to the flat portion of the insulating film 8. The angle (taper angle) α2 between the upper surface of the nitride-based compound semiconductor layer (3,4) may be not less than 1 degree and not more than 40 degrees.

  Further, as shown in FIG. 2A, the semiconductor device according to the second embodiment of the present invention includes a nitride compound semiconductor layer 4 and a low resistance on the nitride compound semiconductor layer (3,4). On the drain electrode 6 in contact, the source electrode 5 in low resistance contact with the nitride compound semiconductor layer 4 on the nitride compound semiconductor layer (3,4), and the nitride compound semiconductor layer (3,4) The insulating film 8 is provided in a region sandwiched between the drain electrode 6 and the source electrode 5 and has an inclined portion that gradually increases in thickness on the source electrode 5 side, and the nitride-based compound semiconductor layer (3,4). Thus, a Schottky junction with the nitride-based compound semiconductor layer 4 is formed in the region between the insulating film 8 and the drain electrode 6, and the source-side side of the insulating film 8 on the source electrode 5 side And a gate electrode 7 provided so as to extend to the inclined portion.

  Here, in the semiconductor device according to the second embodiment of the present invention, the end point on the source side where the gate electrode 7 is provided on the bottom surface of the insulating film 8 is the same as the structure shown in FIG. An angle (tapered) between an imaginary line connecting A and the end point B on the bottom surface of the gate field plate electrode 9 formed on the inclined portion of the insulating film 8 and the upper surface of the nitride-based compound semiconductor layer (3,4) Angle) α1 may be not less than 1 degree and not more than 40 degrees.

  Further, in the semiconductor device according to the second embodiment of the present invention, the end point A on the side where the gate electrode 7 is provided on the bottom surface of the insulating film 8 also on the source side, similarly to the structure shown in FIG. And an imaginary line connecting the inclined portion of the bottom of the field plate electrode 9 formed to extend over the flat portion of the insulating film 8 and the intersection C of the flat portion and the nitride-based compound semiconductor layer (3, 4) The angle α2 between the upper surface and the upper surface may be 1 degree or more and 40 degrees or less.

  In the semiconductor device according to the second embodiment of the present invention, the nitride-based compound semiconductor layer (3,4) has a heterojunction and has a two-dimensional electron gas layer 11 in the vicinity of the heterointerface. .

  In the semiconductor device according to the second embodiment of the present invention, the insulating film 8 may be a silicon oxide film.

FIG. 3 shows the characteristics of the semiconductor device according to the second embodiment of the present invention. FIG. 3A shows an example of the characteristics of the on-resistance R _on (Ω · mm) depending _on the taper angle α. FIG. 3B shows a characteristic example of the leakage current I _gs (A / mm) _{depending on} the taper angle α.

  The actual dimensions are, for example: The gate length is about 2 μm, the distance between the gate electrode 7 and the drain electrode 6 is about 12 μm, the distance between the drain electrode 6 and the gate field plate electrode 9 is about 10 μm, and the drain electrode 6 and the source The distance from the electrode 5 is about 17.5 μm. The thickness of the gate field plate electrode 9 is about 350 nm.

3A and 3B show the resistance value R _on (when the high angle pulse (drain-source voltage: 450 V, gate-source voltage: −8 V) operation is performed when the angle α is changed. Ω · mm) and gate leakage current I _gs (A / mm) when 600 V is applied between the drain and source and −7 V is applied between the gate and source.

  FIG. 4 is a cross-sectional structural view of one step of the manufacturing process of the semiconductor device according to the second embodiment of the present invention corresponding to the sample of FIG. 3, and a structural example with a taper angle α = 52.2 °, FIG. 5 is a cross-sectional structural view of one step of the manufacturing process of the semiconductor device according to the second embodiment of the present invention corresponding to the sample of FIG. 3, and a structural example with a taper angle α = 39.0 °, FIG. 6 is a cross-sectional structural view of one step of the manufacturing process of the semiconductor device according to the second embodiment of the present invention corresponding to the sample of FIG. 3, and a structural example having a taper angle α = 28.6 °. Each is shown.

  4 to 6, the window width of the resist 10, the taper angle α of the insulating film 8, and the width of the nitride-based compound semiconductor layer (3,4) are changed by changing the etching conditions. It shows how can be done.

  As shown in FIG. 3, as the angle α is smaller, both the resistance value Ron (Ω · mm) and the gate leakage current Igs (A / mm) during high voltage operation decrease. However, although the angle α is greatly reduced to around 40 degrees, the decrease is reduced at 1 degree or more and 40 degrees or less, and it can be seen that there is a singular point in the vicinity of 40 degrees.

  In the semiconductor device according to the second embodiment of the present invention, the angle α is reduced so that the inclined portion of the gate field plate electrode 9 is further laid, thereby being trapped at the surface level near the end of the gate electrode 7. Electrons are easily extracted by the electric field generated by the gate field plate electrode 9, and as a result, the current collapse phenomenon can be suppressed.

  Further, in the semiconductor device according to the second embodiment of the present invention, the electric field concentration in the vicinity of the end of the gate electrode 7 is alleviated by laying down the inclined portion of the gate field plate electrode 9, and the injected electrons are reduced. it can. As a result, electrons themselves captured by the surface state can be reduced. As a result, the current collapse phenomenon can be suppressed.

  Similarly, in the semiconductor device according to the second embodiment of the present invention, the electric field concentration in the vicinity of the end of the gate electrode 7 is alleviated and the effective gate length is increased, so that the gate leakage current can be reduced.

  That is, in the semiconductor device according to the second embodiment of the present invention, the current collapse phenomenon can be reduced and the gate leakage current can be reduced by further laying down the inclined portion of the gate field plate electrode 9. .

  In the semiconductor device according to the second embodiment of the present invention, the breakdown voltage of the semiconductor device does not depend on the length of the gate field plate electrode 9, and the distance between the gate field plate electrode 9 and the drain electrode 6 or the source electrode 5 Depends on. On the other hand, when the distance between the gate field plate electrode 9 and the drain electrode 6 or the source electrode 5 is constant, the gate field plate electrode 9 is preferably shorter in order to suppress the current collapse phenomenon.

  Furthermore, in the semiconductor device according to the second embodiment of the present invention, the insulating film 8 is preferably a silicon oxide film compared to a silicon nitride film. Since the silicon nitride film applies tensile stress to the electron supply layer 4 in the same manner as the electron transit layer 3, the piezoelectric polarization between the electron transit layer 3 and the electron supply layer 4 is weakened, and the electron concentration is lowered to reduce the semiconductor device. This is because the on-resistance increases.

  Furthermore, in the semiconductor device according to the second embodiment of the present invention, the buffer layer 2 can be omitted.

  Further, in the semiconductor device according to the second embodiment of the present invention, the drain electrode 6 and the source electrode 5 are also provided with a drain field plate structure and a source field plate structure to alleviate electric field concentration and reduce a current collapse phenomenon. A structure that reduces the gate leakage current may be used.

  Furthermore, in the semiconductor device according to the second embodiment of the present invention, when the substrate 1 is a conductive substrate, a back electrode is provided on the back side of the substrate 1, and the source electrode 5 and the back electrode are electrically connected by wiring. By doing so, the electric field concentration in the vicinity of the drain electrode 6 can be relaxed.

  Furthermore, in the semiconductor device according to the second embodiment of the present invention, a barrier layer such as an AlGaN barrier layer may be provided between the electron supply layer 4 and the electron transit layer 3.

  According to the semiconductor device of the second embodiment of the present invention, the nitride compound compound has the field plate electrode on the nitride compound semiconductor layer through the insulating film, and is electrically connected to the field plate electrode. In a semiconductor device having an electrode in Schottky contact with a semiconductor layer, the resistance value and leakage current during high-voltage operation can be further reduced.

[Third Embodiment]
FIG. 9 is a schematic cross-sectional structure diagram of a Schottky diode, which is a semiconductor device according to the third embodiment of the present invention.

  As shown in FIG. 9, the semiconductor device according to the third embodiment of the present invention has a cathode electrode 14 in low resistance contact with the nitride compound semiconductor layer 4 on the nitride compound semiconductor layer (3,4). And an insulating film 8 provided on a region adjacent to the anode electrode 12 on the nitride-based compound semiconductor layer (3,4) and having an inclined portion gradually increasing on the anode electrode 12 side, and a nitride-based compound An anode electrode 12 that is in Schottky contact with the nitride-based compound semiconductor layer 4 in a region adjacent to the insulating film 8 on the semiconductor layer (3, 4), and an inclined portion on the side of the insulating film 8 from the anode electrode 12 And an anode field plate electrode 16 provided so as to extend to the right.

  The semiconductor device according to the third embodiment of the present invention is similar to the structure shown in FIGS. 7A to 7C on the side where the anode electrode 12 is provided on the bottom surface of the insulating film 8. An angle α1 between an imaginary line connecting the end point A and the end point B on the bottom surface of the anode field plate electrode 16 formed on the inclined portion of the insulating film 8 and the upper surface of the nitride-based compound semiconductor layer (3,4) Is 1 degree or more and 40 degrees or less.

  Alternatively, in the semiconductor device according to the third embodiment of the present invention, the end point A on the side where the anode electrode 12 is provided on the bottom surface of the insulating film 8 and the end point A, similarly to the structure shown in FIG. From the inclined portion of the insulating film 8 to the flat portion of the insulating film 8 and the intersection C between the inclined portion of the bottom surface of the anode field plate electrode 16 formed to extend toward the cathode electrode 14 and the flat portion. The angle (taper angle) α2 between the line and the upper surface of the nitride-based compound semiconductor layer (3,4) may be not less than 1 degree and not more than 40 degrees.

  Similar to the characteristics of the semiconductor device according to the first embodiment and the second embodiment of the present invention, the Schottky diode which is the semiconductor device according to the third embodiment of the present invention also has a reverse direction. It is possible to reduce on-resistance (forward voltage rise) and reverse leakage current between the anode and cathode after voltage application.

  In the semiconductor device according to the third embodiment of the present invention, the electrons trapped in the surface level near the end of the anode electrode 12 are reduced by reducing the angle α so that the inclined portion of the field plate electrode is further laid. The electric field generated by the field plate electrode facilitates extraction, and as a result, the current collapse phenomenon can be suppressed.

  Further, in the semiconductor device according to the third embodiment of the present invention, the electric field concentration in the vicinity of the end of the anode electrode 12 is relaxed and the injected electrons can be reduced by further laying the inclined portion of the field plate electrode. As a result, electrons themselves captured by the surface state can be reduced. As a result, the current collapse phenomenon can be suppressed.

  Similarly, in the semiconductor device according to the third embodiment of the present invention, the electric field concentration in the vicinity of the end of the anode electrode 12 is relaxed and the effective anode length is increased, so that the leakage current can be reduced.

  That is, in the semiconductor device according to the third embodiment of the present invention, the current collapse phenomenon can be reduced and the gate leakage current can be reduced by further laying the inclined portion of the field plate electrode.

In the semiconductor device according to the third embodiment of the present invention, the breakdown voltage of the semiconductor device does not depend on the length of the field plate electrode but depends on the distance _LAK between the field plate electrode and the cathode electrode 14. On the other hand, when the distance L _AK between the field plate electrode and the cathode electrode 14 is constant, in order to suppress the current collapse phenomenon, it field plate electrode is short is good.

  Furthermore, in the semiconductor device according to the third embodiment of the present invention, the insulating film 8 is preferably a silicon oxide film compared to a silicon nitride film. Since the silicon nitride film applies tensile stress to the electron supply layer 4 in the same manner as the electron transit layer 3, the piezoelectric polarization between the electron transit layer 3 and the electron supply layer 4 is weakened, and the electron concentration is lowered to reduce the semiconductor device. This is because the on-resistance increases.

  Furthermore, in the semiconductor device according to the third embodiment of the present invention, a field plate structure is also provided on the cathode electrode 14 to alleviate electric field concentration, reduce current collapse, and reduce gate leakage current. A structure may be used.

  Furthermore, in the semiconductor device according to the third embodiment of the present invention, when the substrate 1 is a conductive substrate, a back electrode is provided on the back side of the substrate 1 and the anode electrode 12 and the back electrode are electrically connected by wiring. By doing so, the electric field concentration near the anode electrode 12 can be relaxed.

  Furthermore, in the semiconductor device according to the third embodiment of the present invention, a barrier layer such as an AlN barrier layer may be provided between the electron supply layer 4 and the electron transit layer 3.

  According to the semiconductor device of the third embodiment of the present invention, the field plate electrode is provided on the nitride compound semiconductor layer with respect to the anode electrode via the insulating film, and is electrically connected thereto, In addition, in a Schottky diode having an electrode in Schottky contact with the nitride-based compound semiconductor layer, it is possible to reduce on-resistance (forward voltage drop) and reverse leakage current between the anode and the cathode during high voltage operation. .

[Other embodiments]
As described above, the present invention has been described according to the first to third embodiments. However, it should be understood that the description and drawings constituting a part of this disclosure do not limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

For example, the semiconductor device according to the embodiment of the present invention is not limited to the high electron mobility transistor (HEMT) shown in the first embodiment, and is a composite semiconductor device in which a plurality of elements are formed. It may be.

Further, by changing the structure of the device formation layer, the semiconductor substrate according to the embodiment of the present invention can be obtained by using a light emitting element such as a light emitting diode or a semiconductor laser, a metal semiconductor field effect transistor (MESFET). Metal-oxide-semiconductor field effect transistors (MOSFETs), metal-insulator-semiconductor field-effect transistors (MISFETs), heterojunction bipolar transistors (HBTs) Junction Bipolar Transistor) is also applicable.

For example, a MISFET has a semiconductor device configuration as shown in FIG.

In the semiconductor devices according to the first to third embodiments of the present invention, the semiconductor device in which the gate field plate electrode structure of the present invention is mainly applied to the gate electrode of the HEMT has been described. As shown in b), a similar structure may be applied to the drain electrode. Moreover, you may adapt to both.

As described above, the present invention naturally includes various embodiments that are not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

1 is a schematic sectional view of a semiconductor device according to a first embodiment of the present invention. FIG. 4 is a schematic cross-sectional structure diagram of a semiconductor device according to a second embodiment of the present invention, where (a) a basic configuration diagram, (b) a drain plating electrode 60 on the gate electrode 7 and gate field plate electrode 9 side. FIG. The characteristics of the semiconductor device according to the second embodiment of the present invention are as follows: (a) a characteristic example of the on-resistance R _on (Ω · mm) depending _on the magnitude of the taper angle α, and (b) depending on the magnitude of the taper angle α. The characteristic example of leak current _Igs (A / mm). FIG. 6 is a cross-sectional structural view of one step of a manufacturing process of a semiconductor device according to the second embodiment of the present invention corresponding to the sample of FIG. FIG. 6 is a cross-sectional structural view of one step of a manufacturing process of a semiconductor device according to the second embodiment of the present invention corresponding to the sample of FIG. 3, and shows a structural example with a taper angle α = 39.0 °. FIG. 6 is a cross-sectional structural view of one step of a manufacturing process of a semiconductor device according to the second embodiment of the present invention corresponding to the sample of FIG. 3, and shows a structural example with a taper angle α = 28.6 °. In the semiconductor device according to the first embodiment of the present invention, (a) a schematic enlarged cross-sectional structure diagram of a structural example in which the gate field plate electrode 9 is formed partway through the inclined portion of the insulating film 8, (b) (C) Electron supply schematic view of a structural example in which the gate field plate electrode 9 is formed partway through the inclined portion of the insulating film 8 via the insulating film 100 formed on the electron supply layer 4; FIG. 4 is a schematic enlarged cross-sectional structure diagram of a structural example in which a gate field plate electrode 9 is formed partway through an inclined portion of an insulating film 8 through an insulating film 100 formed on the layer 4 and the insulating film 8. FIG. 4 is a schematic enlarged cross-sectional structure diagram of a structural example in which a gate field plate electrode 9 is formed up to a flat portion of an insulating film 8 in the semiconductor device according to the first embodiment of the present invention. FIG. 6 is a schematic cross-sectional structure diagram of a Schottky diode, which is a semiconductor device according to a third embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Buffer layer 3 ... Electron transit layer 4 ... Electron supply layer 5 ... Source electrode 6 ... Drain electrode 7 ... Gate electrode 8, 18 ... Insulating layer 9 ... Gate field plate electrode 10 ... Photoresist 11 ... Two-dimensional electron Gas (2 DEG) layer 12 ... Anode electrode 14 ... Cathode electrode 16 ... Anode field plate electrode 50 ... Source plating electrode 60 ... Drain plating electrode 100 ... Insulating film

Claims (10)

On the nitride compound semiconductor layer, an insulating film having an inclined portion that gradually increases, and
An electrode provided so as to extend on the inclined portion of the insulating film from the nitride-based compound semiconductor layer, and
An imaginary line connecting an end point on the bottom surface of the insulating film on which the electrode is provided and an end point on the bottom surface of the electrode formed on the inclined portion of the insulating film, and an upper surface of the nitride-based compound semiconductor layer The semiconductor device is characterized in that the angle between is not less than 1 degree and not more than 40 degrees. On the nitride compound semiconductor layer, an insulating film having an inclined portion that gradually increases, and
An electrode provided so as to extend from above the nitride-based compound semiconductor layer on the inclined portion of the insulating film and further on a flat portion parallel to the nitride-based compound semiconductor layer,
An imaginary line connecting the end point on the side where the electrode is provided on the bottom surface of the insulating film and the intersection of the inclined portion and the flat portion of the bottom surface of the electrode formed by extending to the flat portion of the insulating film And an angle between the upper surface of the nitride-based compound semiconductor layer and the upper surface of the nitride-based compound semiconductor layer is 1 degree or more and 40 degrees or less. A drain electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer;
A source electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer;
An insulating film on the nitride-based compound semiconductor layer, provided in a region sandwiched between the drain electrode and the source electrode, and having an inclined portion that gradually increases in thickness on the drain electrode side;
Provided on the nitride-based compound semiconductor layer and in a region between the insulating film and the source electrode so as to extend from the nitride-based compound semiconductor layer to the inclined portion of the insulating film. A semiconductor device having a gate electrode,
An imaginary line connecting an end point on the bottom surface of the insulating film on which the electrode is provided and an end point on the bottom surface of the electrode formed on the inclined portion of the insulating film, and an upper surface of the nitride-based compound semiconductor layer The semiconductor device is characterized in that the angle between is not less than 1 degree and not more than 40 degrees. A drain electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer;
A source electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer;
An insulating film on the nitride-based compound semiconductor layer, provided in a region sandwiched between the drain electrode and the source electrode, and having an inclined portion that gradually increases in thickness on the drain electrode side;
Provided on the nitride-based compound semiconductor layer and in a region between the insulating film and the source electrode so as to extend from the nitride-based compound semiconductor layer to the inclined portion of the insulating film. A semiconductor device having a gate electrode,
An imaginary line connecting the end point on the side where the electrode is provided on the bottom surface of the insulating film and the intersection of the inclined portion and the flat portion of the bottom surface of the electrode formed by extending to the flat portion of the insulating film And an angle between the upper surface of the nitride-based compound semiconductor layer and the upper surface of the nitride-based compound semiconductor layer is 1 degree or more and 40 degrees or less. In the semiconductor device according to claim 3 or 4,
The gate electrode is formed between the gate electrode and the insulating film in the inclined portion, or between the nitride compound semiconductor layer and the insulating film, and between the gate electrode and the nitride compound semiconductor layer. A semiconductor device comprising a gate oxide film therebetween. In the semiconductor device according to claim 3 or 4,
The gate electrode is in Schottky contact with the nitride compound semiconductor layer. A cathode electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer;
An insulating film on the nitride-based compound semiconductor layer, provided in a region adjacent to the cathode electrode, and having an inclined portion that gradually increases toward the cathode electrode;
A semiconductor having an anode electrode provided on the nitride compound semiconductor layer and in a region adjacent to the insulating film so as to extend from the nitride compound semiconductor layer to the inclined portion of the insulating film. A device,
An imaginary line connecting an end point on the bottom surface of the insulating film on which the electrode is provided and an end point on the bottom surface of the electrode formed on the inclined portion of the insulating film, and an upper surface of the nitride-based compound semiconductor layer The semiconductor device is characterized in that the angle between is not less than 1 degree and not more than 40 degrees. A cathode electrode in low resistance contact with the nitride compound semiconductor layer on the nitride compound semiconductor layer;
An insulating film on the nitride-based compound semiconductor layer, provided in a region adjacent to the cathode electrode, and having an inclined portion that gradually increases toward the cathode electrode;
A semiconductor having an anode electrode provided on the nitride compound semiconductor layer and in a region adjacent to the insulating film so as to extend from the nitride compound semiconductor layer to the inclined portion of the insulating film. A device,
An imaginary line connecting the end point on the side where the electrode is provided on the bottom surface of the insulating film and the intersection of the inclined portion and the flat portion of the bottom surface of the electrode formed by extending to the flat portion of the insulating film And an angle between the upper surface of the nitride-based compound semiconductor layer and the upper surface of the nitride-based compound semiconductor layer is 1 degree or more and 40 degrees or less. The semiconductor device according to any one of claims 1 to 8,
The nitride compound semiconductor layer has a heterojunction, and has a two-dimensional electron gas layer in the vicinity of the heterointerface. The semiconductor device according to any one of claims 1 to 9,
The semiconductor device, wherein the insulating film is a silicon oxide film.