JP2008235916A5 - - Google Patents
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- JP2008235916A5 JP2008235916A5 JP2008098000A JP2008098000A JP2008235916A5 JP 2008235916 A5 JP2008235916 A5 JP 2008235916A5 JP 2008098000 A JP2008098000 A JP 2008098000A JP 2008098000 A JP2008098000 A JP 2008098000A JP 2008235916 A5 JP2008235916 A5 JP 2008235916A5
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- JP
- Japan
- Prior art keywords
- manufacturing
- semiconductor device
- wiring board
- support portion
- product support
- Prior art date
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- 239000004065 semiconductor Substances 0.000 claims 40
- 238000004519 manufacturing process Methods 0.000 claims 29
- 238000007789 sealing Methods 0.000 claims 19
- 239000000758 substrate Substances 0.000 claims 18
- 230000000712 assembly Effects 0.000 claims 12
- 239000000463 material Substances 0.000 claims 5
- 230000000875 corresponding Effects 0.000 claims 4
- 238000004140 cleaning Methods 0.000 claims 2
- 238000000465 moulding Methods 0.000 claims 2
- 239000011347 resin Substances 0.000 claims 2
- 229920005989 resin Polymers 0.000 claims 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 2
- 238000001035 drying Methods 0.000 claims 1
Claims (20)
(a)複数のデバイス領域および前記複数のデバイス領域の間に位置するダイシング領域を有する基材と、前記複数のデバイス領域にそれぞれ搭載された複数の半導体チップと、前記複数の半導体チップを一括で封止する一括封止部とを備えた組み立て体を準備する工程;(A) a substrate having a plurality of device regions and a dicing region located between the plurality of device regions, a plurality of semiconductor chips respectively mounted on the plurality of device regions, and the plurality of semiconductor chips together Preparing an assembly including a batch sealing portion to be sealed;
(b)前記(a)工程の後、前記基材の前記ダイシング領域に対応する溝および前記基材の前記複数のデバイス領域にそれぞれ対応する複数の貫通孔を有する製品支持部を備えた基材保持治具を介して、前記組み立て体をダイサーカットステージ上に配置する工程;(B) After the step (a), a substrate provided with a product support portion having a plurality of through holes respectively corresponding to a groove corresponding to the dicing region of the substrate and the plurality of device regions of the substrate. Arranging the assembly on a dicer cut stage via a holding jig;
(c)前記(b)工程の後、前記ダイサーカットステージに設けられた吸着孔および前記基材保持治具の前記製品支持部に設けられた前記複数の貫通孔を介して前記一括封止部の表面を吸着保持した状態で、前記ダイシング領域に沿ってブレードを走行させることで前記一括封止部および前記基材を分割する工程;(C) After the step (b), the collective sealing portion via the suction holes provided in the dicer cut stage and the plurality of through holes provided in the product support portion of the base material holding jig A step of dividing the batch sealing portion and the base material by running a blade along the dicing area in a state where the surface of the substrate is adsorbed and held;
ここで、here,
前記(b)工程では、前記一括封止部の前記表面が前記基材保持治具の前記製品支持部と対向し、かつ前記製品支持部に設けられた前記溝および前記複数の貫通孔が前記ダイシング領域および前記複数のデバイス領域とそれぞれ対応するように、前記組み立て体は前記基材保持治具上に配置され、In the step (b), the surface of the batch sealing portion is opposed to the product support portion of the base material holding jig, and the grooves and the plurality of through holes provided in the product support portion are The assembly is disposed on the substrate holding jig so as to correspond to the dicing area and the plurality of device areas, respectively.
前記製品支持部は、ゴムで構成されている。The product support portion is made of rubber.
前記製品支持部は、プレート状の治具本体上に固定されていることを特徴とする半導体装置の製造方法。The method of manufacturing a semiconductor device, wherein the product support portion is fixed on a plate-shaped jig body.
前記(a)工程の後、かつ前記(b)工程の前に、After the step (a) and before the step (b),
(d)前記基材の複数の外部端子を治具移載ハンドのスポンジに接触させた状態で、前記治具移載ハンドを用いて前記組み立て体を保持し、(D) In a state where the plurality of external terminals of the base material are in contact with the sponge of the jig transfer hand, the assembly is held using the jig transfer hand,
(e)前記(d)工程の後、前記一括封止部の前記表面が前記製品支持部と対向し、かつ前記溝および前記複数の貫通孔が前記ダイシング領域および前記複数のデバイス領域とそれぞれ対応するように、前記組み立て体を保持している前記治具移載ハンドを用いて前記基材保持治具を保持する、(E) After the step (d), the surface of the collective sealing portion faces the product support portion, and the groove and the plurality of through holes correspond to the dicing region and the plurality of device regions, respectively. To hold the base material holding jig using the jig transfer hand holding the assembly,
ことを特徴とする半導体装置の製造方法。A method for manufacturing a semiconductor device.
前記(e)工程では、位置決めピンで前記治具移載ハンドをガイドすることで、前記溝および前記複数の貫通孔を前記ダイシング領域および前記複数のデバイス領域とを、それぞれ対応させることを特徴とする半導体装置の製造方法。In the step (e), by guiding the jig transfer hand with a positioning pin, the dicing region and the plurality of device regions correspond to the groove and the plurality of through holes, respectively. A method for manufacturing a semiconductor device.
前記複数の半導体チップは、複数のワイヤを介して前記複数のデバイス領域とそれぞれ電気的に接続されていることを特徴とする半導体装置の製造方法。The semiconductor device manufacturing method, wherein the plurality of semiconductor chips are electrically connected to the plurality of device regions through a plurality of wires, respectively.
(a)複数のデバイス領域が形成された主面、前記主面と反対側の裏面、及び前記複数のデバイス領域の間に位置するダイシング領域を有する配線基板を準備する工程;
(b)前記(a)工程の後、前記配線基板の前記複数のデバイス領域に複数の半導体チップをそれぞれ固定する工程;
(c)前記(b)工程の後、前記配線基板の前記主面上に、前記複数の半導体チップを一括で覆う一括封止部を形成する工程;
(d)前記(c)工程の後、前記複数のデバイス領域のそれぞれに対応するように、前記配線基板の前記裏面に複数の外部端子を取り付ける工程;
(e)前記(d)工程の後、前記配線基板の前記ダイシング領域に対応する溝、及び前記配線基板の前記複数のデバイス領域にそれぞれ対応する複数の貫通孔を有する製品支持部を備えた基板保持治具を介して、前記配線基板をダイサーカットステージ上に配置する工程;
(f)前記(e)工程の後、前記ダイサーカットステージに設けられた吸着孔及び前記基板保持治具の前記製品支持部に設けられた前記複数の貫通孔を介して前記一括封止部の表面を吸着保持した状態で、前記配線基板の前記裏面側から前記ダイシング領域に沿ってダイシング用のブレードを走行させることで前記一括封止部及び前記配線基板を分割し、複数の組み立て体を取得する工程;
ここで、
前記(e)工程では、前記配線基板の前記一括封止部の前記表面が前記基板保持治具の前記製品支持部と対向し、かつ前記製品支持部に設けられた前記溝及び前記複数の貫通孔が前記配線基板の前記ダイシング領域及び前記複数のデバイス領域とそれぞれ対応するように、前記配線基板は前記基板保持治具上に配置され、
前記製品支持部は、ゴムで構成されている。 A method for manufacturing a semiconductor device comprising the following steps:
(A) preparing a wiring board having a main surface on which a plurality of device regions are formed, a back surface opposite to the main surface, and a dicing region located between the plurality of device regions;
(B) After the step (a), a step of fixing a plurality of semiconductor chips to the plurality of device regions of the wiring board, respectively.
(C) After the step (b), a step of forming a collective sealing portion that collectively covers the plurality of semiconductor chips on the main surface of the wiring board;
(D) After the step (c), attaching a plurality of external terminals to the back surface of the wiring board so as to correspond to each of the plurality of device regions;
(E) Substrate provided with a product support portion having a plurality of through holes respectively corresponding to the grooves corresponding to the dicing region of the wiring board and the plurality of device regions of the wiring board after the step (d). Disposing the wiring board on a dicer cut stage via a holding jig;
(F) After the step (e), the collective sealing portion is inserted through the suction holes provided in the dicer cut stage and the plurality of through holes provided in the product support portion of the substrate holding jig. With the front surface held by suction, a dicing blade is run along the dicing area from the back side of the wiring board to divide the batch sealing portion and the wiring board to obtain a plurality of assemblies. The step of:
here,
In the step (e), the surface of the collective sealing portion of the wiring board faces the product support portion of the substrate holding jig, and the groove and the plurality of through holes provided in the product support portion The wiring board is disposed on the substrate holding jig so that holes correspond to the dicing area and the plurality of device areas of the wiring board, respectively.
The product support portion is made of rubber.
前記(f)工程の後、前記複数の組み立て体が配置された前記基板保持治具を、治具移載ハンドを用いて次工程に搬送することを特徴とする半導体装置の製造方法。 The method of manufacturing a semiconductor device according to claim 6 , wherein the product support portion is fixed on a plate-shaped jig body.
After the step (f), the substrate holding jig on which the plurality of assemblies are arranged is transported to the next step using a jig transfer hand.
(g)前記複数の組み立て体のそれぞれの封止部の表面が水切りハンドの吸水スポンジに接触するように、前記複数の組み立て体のそれぞれを前記水切りハンドにセットし、前記水切りハンドの前記吸水スポンジに設けられた複数の貫通孔を介して前記複数の組み立て体のそれぞれの前記封止部の前記表面を吸着する工程;
(h)前記(g)工程の後、前記複数の組み立て体のそれぞれの前記封止部の前記表面を前記水切りハンドの前記吸水スポンジに押し当てる工程;
(i)前記(h)工程の後、前記水切りハンドから前記複数の組み立て体のそれぞれを取り出し、前記複数の組み立て体のそれぞれの前記封止部の前記表面をブラシを用いて擦る工程。 10. The method of manufacturing a semiconductor device according to claim 9 , further comprising the following steps (g) to (i) after the drying step:
(G) Each of the plurality of assemblies is set on the draining hand so that the surface of each sealing portion of the plurality of assemblies contacts the water absorbing sponge of the draining hand, and the water absorbing sponge of the draining hand a step of adsorbing the surface of each of the sealing portions of the plurality of assembly through a plurality of through holes provided et the to;
(H) After the step (g), the step of pressing the surface of the sealing portion of each of the plurality of assemblies against the water-absorbing sponge of the draining hand;
(I) After the step (h), a step of taking out each of the plurality of assemblies from the draining hand and rubbing the surface of the sealing portion of each of the plurality of assemblies using a brush.
(j)前記複数の半導体チップと前記複数のデバイス領域をそれぞれ複数のワイヤを介して電気的に接続する工程。 12. The method of manufacturing a semiconductor device according to claim 11 , further comprising the following step (j) after the step (b) and before the step (c). Method:
(J) electrically connecting the plurality of semiconductor chips and the plurality of device regions through a plurality of wires, respectively.
前記(f)工程では、前記配線パターンを認識カメラで認識することで、前記ダイシング領域を割り出した後、前記配線基板の前記裏面側から前記ダイシング領域に沿って前記ダイシング用のブレードを走行させることを特徴とする半導体装置の製造方法。 8. The method of manufacturing a semiconductor device according to claim 7 , wherein a wiring pattern is formed on the back surface of the wiring board.
In the step (f), after the dicing area is determined by recognizing the wiring pattern with a recognition camera, the dicing blade is caused to travel along the dicing area from the back side of the wiring board. A method of manufacturing a semiconductor device.
(k)前記(d)工程の後、治具移載ハンドのスポンジに前記配線基板の前記複数の外部端子を接触させた状態で、前記配線基板を前記治具移載ハンドで保持する工程;
(l)前記(k)工程の後、前記配線基板の前記一括封止部の表面が前記基板保持治具の前記製品支持部と対向し、前記製品支持部に設けられた前記溝及び前記複数の貫通孔が前記配線基板の前記ダイシング領域及び前記複数のデバイス領域とそれぞれ対応するように、前記配線基板を保持している前記治具移載ハンドで前記基板保持治具を保持する工程。 16. The method of manufacturing a semiconductor device according to claim 15 , further comprising the following steps (k) to (l) after the step (d) and before the step (e): Semiconductor device manufacturing method:
(K) After the step (d), holding the wiring board with the jig transfer hand in a state where the plurality of external terminals of the wiring board are in contact with the sponge of the jig transfer hand;
(L) After the step (k), the surface of the collective sealing portion of the wiring board faces the product support portion of the substrate holding jig, and the grooves and the plurality of grooves provided in the product support portion A step of holding the substrate holding jig with the jig transfer hand holding the wiring substrate so that the through-holes correspond to the dicing region and the plurality of device regions of the wiring substrate, respectively.
(m)前記複数の半導体チップと前記複数のデバイス領域をそれぞれ複数のワイヤを介して電気的に接続する工程。 18. The method of manufacturing a semiconductor device according to claim 17 , further comprising the following step (m) after the step (b) and before the step (c). Method:
(M) A step of electrically connecting the plurality of semiconductor chips and the plurality of device regions via a plurality of wires, respectively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008098000A JP4769839B2 (en) | 2008-04-04 | 2008-04-04 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008098000A JP4769839B2 (en) | 2008-04-04 | 2008-04-04 | Manufacturing method of semiconductor device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002211939A Division JP2004055860A (en) | 2002-07-22 | 2002-07-22 | Semiconductor device fabricating process |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011070010A Division JP2011181936A (en) | 2011-03-28 | 2011-03-28 | Method for manufacturing semiconductor device |
Publications (3)
Publication Number | Publication Date |
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JP2008235916A JP2008235916A (en) | 2008-10-02 |
JP2008235916A5 true JP2008235916A5 (en) | 2010-10-21 |
JP4769839B2 JP4769839B2 (en) | 2011-09-07 |
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JP2008098000A Expired - Lifetime JP4769839B2 (en) | 2008-04-04 | 2008-04-04 | Manufacturing method of semiconductor device |
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JP (1) | JP4769839B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP5918943B2 (en) * | 2011-08-10 | 2016-05-18 | 味の素株式会社 | Manufacturing method of semiconductor package |
KR101422405B1 (en) * | 2013-04-22 | 2014-07-22 | 세메스 주식회사 | Apparatus for punching light emitting devices |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH11330010A (en) * | 1998-05-15 | 1999-11-30 | Fujitsu Ltd | Producing method for semiconductor device |
JP2000025074A (en) * | 1998-07-14 | 2000-01-25 | Aoi Denshi Kk | Apparatus and method for molding, method for cutting molded semiconductor apparatus, and manufacture of semiconductor apparatus |
JP3556503B2 (en) * | 1999-01-20 | 2004-08-18 | 沖電気工業株式会社 | Method for manufacturing resin-encapsulated semiconductor device |
JP2001345399A (en) * | 2000-05-31 | 2001-12-14 | Fujitsu Ltd | Semiconductor device and its manufacture |
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2008
- 2008-04-04 JP JP2008098000A patent/JP4769839B2/en not_active Expired - Lifetime
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