JP2008227060A - Method of manufacturing annealed wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an annealed wafer by which a homogeneous and high-quality annealed wafer having no change in specific resistance in a surface layer thereof before and after heat treatment by efficiently removing conductive impurities such as phosphorus and boron. <P>SOLUTION: The annealed wafer is obtained through processes of: loading a silicon wafer on a boat and introducing it into a furnace in an inactive gas atmosphere; turning the inside of the furnace into an atmosphere containing oxygen to oxidize the surface of the wafer and boat; introducing a gas containing hydrogen into the furnace; and heat-treating the wafer in the inactive gas atmosphere. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for producing a high-quality annealed wafer having a uniform wafer surface resistivity.

A silicon wafer used for manufacturing a semiconductor device is generally manufactured from a silicon single crystal grown by the Czochralski method (CZ method).
In recent years, in semiconductor device manufacturing processes, low temperature and high integration have progressed. With this, low density grown-in defects formed during silicon single crystal growth, which has not been a problem in the past, It has been shown to affect properties.

  When the Grown-in defect exists in the grown single crystal, it has a structure in which single or plural octahedral voids are connected, and when it is exposed to the surface after being processed into a wafer, It becomes a concave pit with a quadrangular pyramid shape. After mirror polishing and cleaning of the wafer, defect pits called COP (Crystal Originated Particles) appeared on the wafer surface, which had an effect on the oxide film breakdown voltage.

Conventionally, the growth of single-crystals by the CZ method has been attempted to reduce Grown-in defects, which are octahedral voids, but the size tends to increase.
In recent years, device patterns have been further miniaturized, and accordingly, the size of the grown-in defect cannot be ignored from the comparison with the pattern size, and there is almost no grown-in defect in the device region. Wafers have been demanded.

  For this reason, in an advanced system LSI process, an epitaxial wafer having no grown-in defects or a hydrogen / argon annealed wafer having an effect of eliminating grown-in defects near the surface is used.

  However, when manufacturing an annealed wafer, it is known that the specific resistance of the silicon wafer changes when the silicon wafer is subjected to high-temperature heat treatment in an argon gas atmosphere (see, for example, Non-Patent Document 1). This is because phosphorus or boron brought from the environment such as the dope or heat treatment furnace adheres to the silicon wafer, and when high temperature heat treatment is performed in this state, the phosphorus and boron diffuse into the wafer, As a result, it is estimated that the specific resistance is changed.

As a countermeasure, for example, in Patent Document 1, by preheating at a low temperature before the high-temperature heat treatment, phosphorus adhering to the silicon wafer is removed from the environment and a heat treatment furnace or the like. There has been proposed a method for preventing a change in specific resistance in the vicinity of the wafer surface layer due to.
Patent Document 2 discloses a method of exhausting phosphorus from a gap in the furnace port by reducing or stopping the boat insertion speed into the heat treatment furnace.
JP 2004-207601 A JP 2006-114629 A “Chemical pollution in semiconductor process environment and countermeasures”, Realize Inc., 1997, p. 60

However, the contamination removal method using the preheating device as described in Patent Document 1 causes a decrease in productivity and increases the cost.
Further, in the method of reducing or stopping the boat insertion speed as described in Patent Document 2 above, it is difficult to stably remove phosphorus because a complicated air flow is generated at the furnace port. .

  Furthermore, these methods cannot completely remove a small amount of conductive impurities such as phosphorus and boron, and it is difficult to suppress the change in the specific resistance of the wafer before and after the heat treatment. Had the problem of being. As the substrate resistance of the wafer increases, this effect cannot be ignored in the manufacturing process of the device, and therefore, a method capable of more efficiently removing conductive impurities such as phosphorus and boron has been demanded.

  The present invention has been made in order to solve the above technical problems, efficiently removes conductive impurities such as phosphorus and boron, and does not change the specific resistance of the wafer surface layer before and after the heat treatment. And it aims at providing the method of manufacturing a high quality annealed wafer.

The method for manufacturing an annealed wafer according to the present invention includes a step of loading a silicon wafer on a boat and inserting the wafer into a furnace in an inert gas atmosphere, and setting the inside of the furnace to an atmosphere containing oxygen. The method includes a step of oxidizing, a step of introducing a gas containing hydrogen into the furnace, and a step of heat-treating the wafer in an inert gas atmosphere.
According to the above manufacturing method, phosphorus and boron on the wafer can be effectively discharged out of the furnace, contamination by conductive impurities can be prevented, and in a reducing gas atmosphere containing an inert gas or hydrogen. COP defects and the like near the wafer surface can be eliminated by the high-temperature heat treatment.
In the manufacturing method, it is particularly preferable to use argon as the inert gas.

In the atmosphere containing oxygen, a heat treatment is performed at a temperature in the range of 500 to 800 ° C. for 5 to 60 minutes from the viewpoint of incorporating conductive impurities such as phosphorus and boron into the oxide film. It is preferable.
Further, in the step of making the atmosphere containing hydrogen, a heat treatment is performed at a temperature in the range of 800 to 1100 ° C. for 5 to 60 minutes from the viewpoint of efficiently removing the oxide film incorporating the conductive impurities. It is preferable.

Furthermore, in the step of heat treatment in the inert gas atmosphere, it is preferable that the maximum temperature is 1000 ° C. or more and 1200 ° C. or less.
By conducting high-temperature heat treatment at a temperature within the above range, the conductive impurities can be completely removed outside the furnace, and the grown-in defects that become COP sources on the wafer surface existing in the wafer surface layer can be effectively reduced. Can do.

As described above, according to the method of manufacturing an annealed wafer according to the present invention, conductive impurities such as phosphorus and boron on the wafer are efficiently removed and exist on the wafer surface layer from the surface to a depth of several μm. It is possible to effectively reduce Grown-in defects that become COP sources on the wafer surface.
Therefore, according to the present invention, the change in the specific resistance of the wafer surface before and after the heat treatment can be more reliably suppressed, and a homogeneous and high quality annealed wafer can be obtained.

Hereinafter, the present invention will be described in more detail.
In the annealed wafer manufacturing method according to the present invention, first, a silicon wafer is loaded on a boat and inserted into a furnace in an inert gas atmosphere. Then, the inside of the furnace is set to an atmosphere containing oxygen, the surfaces of the wafer and the boat are oxidized, and then a gas containing hydrogen is introduced into the furnace. Thereafter, the wafer is heat-treated in an inert gas atmosphere.
By passing through the above processes, the surface of the member such as a wafer and a boat is oxidized, and conductive impurities such as phosphorus and boron are taken into the oxide film, and the oxide film is removed by a gas containing hydrogen. Thus, the phosphorus and boron can be effectively discharged out of the furnace.
Therefore, COP defects near the wafer surface can be eliminated by high-temperature heat treatment in an inert gas such as argon or a reducing gas atmosphere containing hydrogen, and contamination by conductive impurities can be prevented. .

  Examples of the inert gas include helium, neon, argon, nitrogen and the like, and argon is particularly preferably used.

Further, in the step of making the atmosphere containing oxygen, an oxide film incorporating a conductive impurity such as phosphorus or boron is formed on the surface of a member such as a wafer and a boat, so that the temperature is within a range of 500 to 800 ° C. It is preferable to perform heat treatment for ˜60 minutes.
In a heat treatment at a temperature of 500 ° C. or lower and less than 5 minutes, the surface of a member such as a wafer or boat is not sufficiently oxidized.
On the other hand, when the heat treatment temperature exceeds 800 ° C., and when the heat treatment time exceeds 60 minutes, the oxide film becomes too thick, and phosphorus or phosphorus incorporated into the oxide film by the subsequent treatment in an atmosphere containing hydrogen can be obtained. It becomes difficult to remove together with conductive impurities such as boron.

Further, in the step of making the atmosphere containing hydrogen, in order to remove the oxide film formed in the previous step, it is preferable to perform a heat treatment at a temperature within a range of 800 to 1100 ° C. for 5 to 60 minutes.
Heat treatment at a temperature of 800 ° C. or lower and less than 5 minutes cannot sufficiently remove the oxide film on the surface of a member such as a wafer or boat.
On the other hand, when the heat treatment temperature exceeds 1100 ° C. or when the heat treatment time exceeds 60 minutes, the dopant diffuses outward due to the reducing action of hydrogen, so that the resistance value on the substrate surface side may fluctuate.

Further, in the step of heat treatment in the inert gas atmosphere, the maximum temperature is set in order to effectively eliminate the COP existing on the wafer surface layer from the wafer surface to a depth of several μm and the grown-in defects serving as the COP source. It is preferable to set it to 1000 ° C. or more and 1200 ° C. or less.
When the heat treatment temperature is less than 1000 ° C., the grown-in defects present in the wafer surface layer cannot be sufficiently reduced.
On the other hand, when the maximum temperature of the heat treatment temperature exceeds 1200 ° C., the silicon wafer may be deformed or cracked, which is not preferable.

  The specific heat treatment step in the method for producing an annealed wafer according to the present invention as described above is preferably performed in a sequence as shown in the following examples.

EXAMPLES Hereinafter, although this invention is demonstrated more concretely based on an Example, this invention is not restrict | limited by the following Example.
[Example 1]
A silicon wafer having a P-type having a diameter of 300 mm, a crystal orientation <100>, and a specific resistance of about 25 Ω · cm was subjected to heat treatment after SC-1 cleaning.
85 wafers (upper and lower five dummy wafers) were mounted on a silicon carbide boat and inserted into a furnace core tube in an argon gas atmosphere at 600 ° C.
Then, through the annealing sequence under the temperature and gas conditions as shown in FIG. 1, the resistance profile from the wafer surface to a depth of 10 μm was evaluated by the SR method for the annealed wafer.

[Comparative Example 1]
As a conventional method, a P-type silicon wafer (boron dope) was annealed in an argon gas atmosphere at a maximum holding temperature of 1200 ° C. for 1 hour.
The resistance profile of the annealed wafer was also evaluated in the same manner as in Example 1.
FIG. 2 shows the relationship between the resistance of each annealed wafer and the depth from the wafer surface in the examples and comparative examples.

As can be seen from the graph shown in FIG. 2, the annealed wafer by the conventional method (Comparative Example 1) has a slightly higher surface resistance than the bulk resistance, and is presumed to have an influence of contamination by a small amount of phosphorus.
On the other hand, the resistance value of the bulk and the surface of the annealed wafer in Example 1 is almost the same, and according to the method according to the present invention, it was confirmed that a uniform and high quality annealed wafer can be obtained. .

FIG. 3 is a diagram showing an annealing sequence under temperature and gas conditions in Example 1. 6 is a graph showing the relationship between the resistance of each annealed wafer of Example 1 and Comparative Example 1 and the depth from the wafer surface.

Claims (5)

  A step of loading a silicon wafer on a boat and inserting it into a furnace in an inert gas atmosphere, a step of making the inside of the furnace an atmosphere containing oxygen, oxidizing the surface of the wafer and the boat, and hydrogen in the furnace A method for producing an annealed wafer, comprising: a step of introducing a gas containing the material; and a step of heat-treating the wafer in an inert gas atmosphere.   The method for manufacturing an annealed wafer according to claim 1, wherein argon is used as the inert gas.   3. The annealed wafer manufacturing method according to claim 1, wherein in the atmosphere containing oxygen, heat treatment is performed at a temperature in a range of 500 to 800 ° C. for 5 to 60 minutes. Method.   The annealing according to any one of claims 1 to 3, wherein in the atmosphere containing hydrogen, a heat treatment is performed at a temperature in a range of 800 to 1100 ° C for 5 to 60 minutes. Wafer manufacturing method.   5. The method for manufacturing an annealed wafer according to claim 1, wherein in the heat treatment in the inert gas atmosphere, the maximum temperature is set to 1000 ° C. or more and 1200 ° C. or less.

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