JP2008218941A - Electronic circuit device, electronic apparatus employing it and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic circuit device having a double-sided mounting structure for simplifying interlayer connection while enhancing reliability. <P>SOLUTION: The electronic circuit device 100 comprises a first wiring layer 101, an electronic component 105 mounted to an electrode provided on the upper surface of the first wiring layer 101, a second wiring layer 104 connected with the first wiring layer 101 through a bump 110 on the first wiring layer 101, and an adhesive layer 108 arranged between the first wiring layer 101 and the second wiring layer 104. The second wiring layer 104 has an opening larger than the upper surface of the electronic component 105 above the electronic component 105 and the height of the bump 110 is shorter than the distance between upper surfaces of the first wiring layer 101 and the electronic component 105. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an electronic circuit device that is miniaturized and densified by a three-dimensional mounting technology for electronic components, an electronic device using the electronic circuit device, and a manufacturing method thereof.

  As electronic devices become smaller and lighter, demands for higher density printed wiring boards and smaller mounted components have become stricter. In the printed wiring board, the density is increased in the direction parallel to the surface of the wiring board by reducing the wiring rules. Furthermore, by adopting a build-up method, wiring is laminated, and via holes are formed between arbitrary layers, so that it is possible to increase the density in a direction perpendicular to the surface of the wiring board.

  On the other hand, as a semiconductor package, a surface mount device (SMD; Surface Mount Device) such as SOP (Small Outline Package) or QFP (Quad Flat Package) having a multi-pin lead on the outer periphery of the conventional package is used. There were many. In recent years, in order to further reduce the size of a semiconductor package, a chip size package (CSP) has been achieved by flip chip mounting in which an active surface of a semiconductor element faces a substrate. According to flip-chip mounting, a semiconductor element is directly mounted on a substrate via electrode terminals called bumps without using leads as bare chips. According to the flip chip mounting described above, the area where the bare chip semiconductor can be mounted is the surface of the substrate, and the mounting density is limited by the substrate size. Therefore, it is difficult to further improve the mounting density. In view of this, a means has been proposed in which a three-dimensionally structured portion formed by a three-dimensional wiring board is used to newly secure a mounting area for components such as semiconductor elements to increase the mounting density and to reduce the size of the electronic device.

  Hereinafter, an electronic circuit device using a conventional three-dimensional wiring board will be described with reference to FIGS. FIG. 10 is a process sectional view of a manufacturing method of a three-dimensional wiring board, and FIG. 11 is a sectional view of an electronic circuit device using a conventional three-dimensional wiring board.

  As shown in FIG. 10 (a), the three-dimensional wiring board is manufactured by forming predetermined NC holes 12 in the double-sided copper-clad laminate 1 and then, as shown in FIG. 10 (b), electroless plating. Then, electrolytic plating is performed to form through holes 4 for electrically connecting the copper foils on both the front and back surfaces of the laminate. Thereafter, the through-hole 4 disposed in the electronic component storage portion penetrates the planar wiring board and fills the through-hole 4 with a filler 6 such as resin so that flux, sealing resin, processing liquid, etc. do not penetrate. The non-penetrating conduction hole 7 is used. Furthermore, after forming the 2nd plating layer which contact | connects the non-penetration conduction hole 7 by the electroless plating and the electroplating on the end surface of the non-penetration conduction hole 7 filled with the filler 6, the back surface of the double-sided copper-clad laminate 1 ( Circuit conductors and connection lands 3 are formed only on the lower surface) side to form the upper wiring board 1A. Next, as shown in FIG. 10 (c), after forming the semi-cured adhesive layer 13 on the insulating resin surface on the upper side of the single-sided copper-clad laminate 1, A through-hole 14 having a specified shape is formed at a location by pressing or the like to form the lower wiring board 1B. Next, as shown in FIG. 10D, the lower wiring board 1B is disposed on the back surface side of the upper wiring board 1A via the adhesive layer 13, and is integrated by thermocompression bonding. Next, as shown in FIG. 10E, NC holes 12 penetrating the upper wiring board 1A and the lower wiring board 1B are drilled at predetermined positions. Thereafter, as shown in FIG. 10 (f), electroless plating and electrolytic plating are performed to form through holes 4 for electrically connecting the conductors on both the front and back surfaces and end face electrodes for use as connection terminals for chip-type electronic components. A through hole 4 is formed. Then, the inner layer circuit conductor inside the electronic component housing hole, the inner layer circuit conductor such as the connection land 3 of the electronic component, and the subsequent through-hole plating process, the process of etching the outer surface layer circuit conductor of the wiring board, and the metal plating process Protect the inner layer circuit conductor from plating and etching so that the inner layer circuit conductor inside the electronic component housing hole that has already been formed does not cause circuit failure or quality failure due to contamination or damage due to plating adhesion, etching, etc. Therefore, the hole filling resin 15 is filled into the inside of the hole 16 of the reverse recess that is open to one side at the reverse recess. Then, as shown in FIG. 10 (g), both surfaces of the front and back outer layer surfaces of the multilayer wiring board in which the upper wiring board 1A and the lower wiring board 1B are laminated and integrated are etched to form a predetermined outer layer. After forming circuit conductors, connection lands 3 for electronic parts, etc., the filling resin is dissolved and removed to form a three-dimensional wiring board 18.

  Next, an electronic circuit device using a conventional three-dimensional wiring board will be described with reference to FIG. A chip-type electronic component 30 or a hybrid IC is mounted with solder 35 on the connection land 3 of the electronic component formed on the upper surface facing the outside of the upper wiring board of the three-dimensional wiring board 18 and exposed to the electronic component storage unit 20. By mounting the chip-type electronic component 30 on the connection land 3 of the electronic component formed on the inner bottom surface with the solder 35 with the solder 35, the electronic component 30 is also mounted on the mounting surface side to the mother board 40 to reduce the size. An electronic circuit device can be obtained.

As prior art document information of this technology, for example, Patent Document 1 is known.
Japanese Patent No. 3582645

  In an electronic circuit device using such a conventional three-dimensional wiring board, in the case of a three-dimensional wiring board in which a concave portion is formed on the wiring board, in order to use a solder material to mount a component in the concave shape, Concavities and convexities become a problem, it is not possible to supply solder by the screen printing method, it is necessary to supply solder by dispenser or stacking, it is poor in mass productivity, and usually flux cleaning is performed after solder mounting, Since it is mounted in the recess and is very difficult to clean, there is a problem that the flux cannot be removed sufficiently.

  When a semiconductor bare chip is flip-chip mounted using ACF (Anisotropic Conductive Film) or NCF (Non Conductive Film) in the recess, the ACF or NCF is placed in the recess. Pasting is very difficult, and as a result, there is a problem that the mass productivity is poor and the mounting yield is lowered.

  SUMMARY OF THE INVENTION The present invention solves such a problem, and an object of the present invention is to provide a simple and highly reliable electronic circuit device, an electronic device using the electronic circuit device, and a manufacturing method thereof.

  In order to achieve the above object, the present invention provides a first wiring layer, an electronic component mounted on an electrode provided on the upper surface of the first wiring layer, and a bump on the first wiring layer. A second wiring layer connected to the first wiring layer; and an adhesive layer disposed between the first wiring layer and the second wiring layer, wherein the second wiring layer is formed of the electronic component. The electronic circuit device has an opening larger than the upper surface of the electronic component above, and the height of the bump is smaller than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component, By setting the height of the bump connecting the first wiring layer and the second wiring layer to be lower than the height of the electronic component, the connection reliability between the first wiring layer and the second wiring layer can be improved. The total thickness of the wiring layers used in the electronic circuit device can be reduced. Further, while effectively utilizing both surfaces of the first wiring layer as the electronic component mounting surface, the presence of the second wiring layer makes it possible to protect from external loads such as collision of foreign matter on the electronic component, and The electric wiring pattern can be optimized with the two wiring portions.

  According to a second aspect of the present invention, the distance between the upper surface of the first wiring layer and the upper surface of the second wiring layer is greater than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component. The electronic circuit device according to claim 1, wherein the presence of the second wiring layer makes it possible to protect from external loads such as collision of foreign matter with the electronic component, and the outer surface of the second wiring layer is a motherboard. It can be used as a mounting surface.

  The invention according to claim 3 is the electronic circuit device according to claim 1, wherein the adhesive layer is made of a thermosetting resin including at least one of a glass woven fabric, an aramid nonwoven fabric, and an inorganic filler. It has the effect of realizing a low thermal expansion coefficient and stabilizing the connection reliability between the first wiring layer and the second wiring layer.

  The invention according to claim 4 is the electronic circuit device according to claim 1, wherein the bump is made of a metal bump using a metal wire or a metal plating film, and the bump can be formed by a simple method. In addition, it has an effect that good connection reliability can be realized.

  The invention according to claim 5 is an electronic apparatus in which the electronic circuit device according to any one of claims 1 to 4 and a display device connected to the electronic circuit device are mounted. -By using an electronic circuit device that can be reduced in height, the electronic device can be reduced in size.

  The invention according to claim 6 includes a step of mounting an electronic component on the first wiring layer, a step of forming a first bump on the first wiring layer, and a portion corresponding to the mounting area of the electronic component. Preparing a second wiring layer having an opening larger than the upper surface of the electronic component, and preparing an adhesive sheet having a space by removing the mounting area of the electronic component and the portion corresponding to the bump A step of superposing the adhesive sheet and the second wiring layer in order on a desired position on the electronic component and the first wiring layer after mounting the first bump, the first wiring layer, Integrating the adhesive sheet and the second wiring layer by applying pressure while heating until the height of the first bump is smaller than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component; A method of manufacturing an electronic circuit device provided with By mounting the electronic component on the flat first wiring layer and then laminating the second wiring layer, it becomes possible to easily mount the electronic component, and heating and pressurization by using bumps The first wiring layer and the second wiring layer can be electrically connected only by the process.

  According to a seventh aspect of the present invention, there is provided a step of mounting an electronic component on the first wiring layer, and a portion corresponding to the mounting area of the electronic component is deleted to provide a larger opening than the upper surface of the electronic component. A step of preparing two wiring layers; a step of forming second bumps on the second wiring layer; and an adhesive sheet provided with a space by deleting a mounting area of the electronic component and a portion corresponding to the second bumps A step of superposing the adhesive sheet and the second wiring layer in order on a desired position on the first wiring layer after mounting the electronic component, and the first wiring layer and the adhesive sheet And a step of pressing and integrating the second wiring layer while heating until the height of the second bump is smaller than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component. This is a method for manufacturing an electronic circuit device. By mounting the electronic component on the first wiring layer and then laminating the second wiring layer, it becomes possible to easily mount the electronic component, and by using the bump, only the heating and pressing process can be performed. The first wiring layer and the second wiring layer can be electrically connected.

  The invention according to claim 8 includes a step of mounting an electronic component on the first wiring layer, a step of forming a first bump on the first wiring layer, and a portion corresponding to the mounting area of the electronic component. A step of removing and preparing a second wiring layer having an opening larger than the upper surface of the electronic component; a step of forming a second bump on the second wiring layer; a mounting area of the electronic component; Removing a portion corresponding to one bump and the second bump to prepare an adhesive sheet having a space; and placing the electronic component and the first wiring layer on the first wiring layer after the first bump is mounted at a desired position. A step of superimposing the second wiring layer after mounting the second bump so that the first bump and the second bump are in contact with each other while sandwiching the adhesive sheet; and the first wiring layer, the adhesive sheet, and the second wiring A layer and a height of the first bump A method of manufacturing an electronic circuit device comprising: a step of applying pressure while heating until the sum of the heights of the second bumps becomes smaller than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component. By mounting the electronic component on the flat first wiring layer and then stacking the second wiring layer, it becomes possible to easily mount the electronic component, and on the first wiring layer. By directly connecting the bumps on the second wiring layer and the bumps on the second wiring layer, it is possible to further stabilize the electrical connection between the first wiring layer and the second wiring layer, which is performed only in the heating and pressing step. Have.

  In a ninth aspect of the present invention, the distance between the upper surface of the first wiring layer and the upper surface of the second wiring layer is greater than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component. Alternatively, the electronic circuit device manufacturing method according to claim 7 or claim 8 is provided, and the presence of the second wiring layer makes it possible to protect against external loads such as collision of foreign matter on the electronic component. At the same time, the outer surface of the second wiring layer can be used as a mounting surface on the mother board.

  According to a tenth aspect of the present invention, the adhesive sheet is made of a thermosetting resin including at least one of a glass woven fabric, an aramid non-woven fabric, and an inorganic filler. This method is a method for manufacturing a circuit device, and has the effect of realizing a low thermal expansion coefficient and stabilizing the connection reliability between the first wiring layer and the second wiring layer.

  According to an eleventh aspect of the present invention, in the electronic circuit according to the sixth, seventh or eighth aspect, the space formed in the adhesive sheet is formed in an area surrounding all of the electronic component and the bump. This is an apparatus manufacturing method, and has an effect that the space forming method can be simplified.

  According to a twelfth aspect of the present invention, in the step of forming the second bump on the second wiring layer, an opening larger than the upper surface of the electronic component is provided by removing a portion corresponding to the mounting area of the electronic component. 9. The method of manufacturing an electronic circuit device according to claim 7, which is performed before the step of preparing the second wiring layer, and the second bump is also formed when the second wiring layer is manufactured. Therefore, the process can be simplified.

  The invention according to claim 13 is the electronic circuit device manufacturing method according to claim 6 or 8, wherein the first bump comprises a metal bump using a metal wire. In addition, it is possible to realize stable reliability of electrical connection between the first wiring layer and the second wiring layer.

  According to a fourteenth aspect of the present invention, there is provided the electronic circuit device manufacturing method according to the seventh or eighth aspect, wherein the second bump is a metal bump using a metal wire. In addition, it is possible to realize stable reliability of electrical connection between the first wiring layer and the second wiring layer.

  The invention according to claim 15 is the method of manufacturing an electronic circuit device according to claim 8, wherein one of the first bump and the second bump is made of a metal bump using a metal wire, and the other is made of a metal plating film. Since the soft metal bumps are pressed against the hard metal plating film in the pressure contact between the bumps, the metal bumps are crushed by the pressure at the time of heating and pressurizing and the connection is eased. Therefore, it is possible to realize stable reliability with respect to the electrical connection between the first wiring layer and the second wiring layer.

  The invention according to claim 16 is the method of manufacturing an electronic circuit device according to claim 15, wherein the metal bump and the metal plating film have a larger diameter than the metal plating film. In this case, the soft metal bumps are pressed against the hard metal plating film, so that the metal plating film is crushed by the pressure during heating and pressurization, and the metal plating film works as a support when connecting while relaxing the stress. Thus, it is possible to realize stable reliability of electrical connection between the first wiring layer and the second wiring layer.

  According to a seventeenth aspect of the present invention, an anisotropic conductive sheet is interposed between the first wiring layer and the adhesive sheet, and the electrical connection between the second bump and the first wiring layer is the anisotropic. 7. The method of manufacturing an electronic circuit device according to claim 6, which is performed through a conductive sheet, and has an effect that electrical connection can be further stabilized in connection using bumps.

  The invention according to claim 18 is the method of manufacturing an electronic circuit device according to claim 17, wherein the second bump is made of a metal bump using a metal wire or a metal plating film. In addition, it is possible to realize stable reliability of electrical connection between the first wiring layer and the second wiring layer.

  According to a nineteenth aspect of the present invention, the thermosetting resin that has flowed out of the adhesive sheet is adhered to at least a side surface portion of the electronic component. This is an electronic circuit device manufacturing method, and has an effect that the electronic component surrounded by the second wiring layer can be more reliably protected.

  According to a twentieth aspect of the present invention, the pressure is also applied to the electronic component during the step of integrating the first wiring layer, the adhesive sheet, and the second wiring layer. According to the method of manufacturing an electronic circuit device according to claim 8 or claim 17, it is possible to stabilize the connection reliability because a pressing force can be applied to the electronic component during the heating and pressing step. Has an effect.

  By setting the height of the bump connecting the first wiring layer and the second wiring layer to be lower than the height of the electronic component, the connection reliability between the first wiring layer and the second wiring layer can be improved. The total thickness of the wiring layers used in the electronic circuit device can be reduced. Further, while effectively utilizing both surfaces of the first wiring layer as the electronic component mounting surface, the presence of the second wiring layer makes it possible to protect from external loads such as collision of foreign matter on the electronic component, and flatness. By mounting the electronic component on the first wiring layer and then laminating the second wiring layer, it becomes possible to easily mount the electronic component. Furthermore, by using bumps, only the heating and pressurizing steps can be performed. The first wiring layer and the second wiring layer can be electrically connected.

(Embodiment 1)
Embodiments of an electronic circuit device of the present invention, an electronic apparatus using the electronic circuit device, and a manufacturing method thereof will be described below with reference to the drawings. FIG. 1 is a sectional view of an electronic circuit device according to Embodiment 1 of the present invention.

  As shown in FIG. 1A, the electronic circuit device 100 according to the first embodiment includes a first wiring layer 101, a second wiring layer 104 and an electronic component 105 provided on the first wiring layer 101. Prepare. A first conductive pattern 102 and a second conductive pattern 106 are provided on the upper surface of the first wiring layer 101. The first wiring layer 101 is a multilayer wiring board whose insulating layer is made of a thermosetting resin. As the thermosetting resin, for example, epoxy resin, phenol resin, cyanate resin, or BT resin (bismaleimide / triazine resin) can be used. Epoxy resins are particularly preferred because of their high heat resistance. The first conductive pattern 102 and the second conductive pattern 106 are made of a material having electrical conductivity, for example, a Cu foil or a conductive resin composition. In the present invention, Cu foil is used. The inner via 113 included in the first wiring layer 101 is made of, for example, a thermosetting conductive material such as a metal material by Cu plating or a conductive resin composition in which metal particles and a thermosetting resin are mixed. Become. Au, Ag, Cu, or the like can be used as the metal particles in the conductive material. Au, Ag, or Cu is preferable because of its high conductivity, and Cu is particularly preferable because of its high conductivity, low migration, and low cost. Moreover, as a thermosetting resin, an epoxy resin, a phenol resin, and cyanate resin can be used, for example. Epoxy resins are particularly preferred because of their high heat resistance.

  An Au plating film is formed on the first conductive pattern 102 on the upper surface of the first wiring layer 101. For example, the Au plating film is formed by performing Ni plating by an electroless plating method on a base metal, and forming an Au plating film by an electroless plating method on the Ni plating. Note that the Au plating film forming method is not limited to the method described above, and can be realized by various methods. However, in order to stabilize the electrical continuity when the electronic component 105 is mounted later, the Au plating film forming method is the most important. It is important that an Au plating film is formed on the surface layer.

  An electronic component 105 is mounted on the first conductive pattern 102 on which the Au plating film is formed. As the electronic component 105, a passive component made of a chip component such as LCR or a semiconductor component can be used. As the semiconductor component, for example, a semiconductor bare chip IC on which bumps 110 are formed is flip-chip mounted. As a material of the bump 110, a bump that can be formed by a simple method such as an Au stud bump by Au wire, an Au or solder bump by plating, an Ag bump by conductive paste, or the like can be used. Note that the bumps 110 may be formed by various methods without being limited to the method described above. As for the flip-chip mounting method of the semiconductor bare chip IC, an Au-Au direct connection method that does not use an auxiliary material at the time of mounting or a solder connection method using solder bumps can be used. Any flip-chip mounting method can be used as long as the mounting method is down. Further, as the mounting auxiliary material 111, a pressure contact method using Au bumps using ACF or NCF, or a method of filling an underfill between the semiconductor bare chip IC and the first wiring layer 101 after flip-chip mounting can be used. Note that the present invention is not limited to the above method, and any method can be used as long as it is a flip-chip mounting method in which the semiconductor bare chip IC is mounted face-down using the mounting auxiliary material 111.

  When a chip component is used as the electronic component 105, solder or a conductive adhesive can be used as the mounting material. As the solder, materials such as Sn—Ag, Sn—Ag—Cu, Sn—Zn, and Au—Zn can be used. However, the material is not limited to these materials and can be used to mount the electronic component 105. Any material can be used. However, it is important that the material does not contain Pb, which is an environmental pollutant. As the conductive adhesive, a material obtained by mixing metal particles such as Au, Ag, or Cu and a thermosetting resin such as an epoxy resin, a phenol resin, or a cyanate resin can be used. Among them, a combination of Ag and an epoxy resin is particularly preferable because it has high conductivity and high heat resistance.

  A second wiring layer 104 is laminated on the first wiring layer 101 with an adhesive layer 108 interposed therebetween. As the adhesive layer 108, a glass epoxy prepreg in which a glass woven fabric is impregnated with a thermosetting epoxy resin, a BT resin prepreg in which a glass woven fabric is impregnated with a thermosetting bismaleimide / triazine resin, and an aramid nonwoven fabric are thermally cured. It is possible to use an aramid prepreg impregnated with a curable epoxy resin, but various materials can be used as long as the structure is a woven fabric or nonwoven fabric impregnated with a thermosetting resin. . In addition to the prepreg obtained by impregnating a woven or non-woven fabric with a thermosetting resin, it is also possible to use a mixture of an inorganic filler such as silicon dioxide or alumina and a thermosetting resin.

  The second wiring layer 104 is a wiring substrate having a third conductive pattern 115 and a fourth conductive pattern 116 on the front and back surfaces, and an insulating layer made of a thermosetting resin. Similar to the first wiring layer 101, as the thermosetting resin, for example, epoxy resin, phenol resin, cyanate resin, or BT resin can be used. Epoxy resins are particularly preferred because of their high heat resistance. The third conductive pattern 115 and the fourth conductive pattern 116 are made of a material having electrical conductivity, for example, a Cu foil or a conductive resin composition. In the present invention, Cu foil is used. In the present invention, the second wiring layer 104 has a two-layer structure, but is not limited to a two-layer structure, and a multilayer wiring board may be used. In addition, as a method for performing interlayer connection in the second wiring layer, a general printed wiring board connection method such as an inner via structure or a through-hole structure can be used. Note that the material selection of the first wiring layer 101, the adhesive layer 108, and the second wiring layer 104 can be arbitrarily performed, but the difference in thermal expansion coefficient is not increased when the materials are made of the same kind of material. It is particularly preferable for effectively preventing warpage and maintaining high reliability.

  Electrical connection between the first wiring layer 101 and the second wiring layer 104 is made by a bump 118 formed between the second conductive pattern 106 and the third conductive pattern 115. The second conductive pattern 106 and the third conductive pattern 115 are formed with an Au plating film on the surface for good connection with the bump 118. A method of roughening the pattern surface may be used instead of the Au plating film. The bump 118 is made of a metal bump or a metal plating film such as an Au stud bump made of Au wire, a Cu stud bump made of Cu wire, or an Al stud bump made of Al wire. Au stud bumps are particularly preferable because they are soft and have high connection stability. The bump 118 is set to be smaller than the height from the first wiring layer 101 on the upper surface of the electronic component 105 mounted on the first wiring layer 101.

  The second wiring layer 104 has a structure in which a portion located on the electronic component 105 on the first wiring layer 101 is opened. Further, the opening of the second wiring layer 104 is set to be larger than the shape of the electronic component 105, the second wiring layer 104 and the electronic component 105 are arranged so as not to contact each other, and are laminated on the first wiring layer 101. The height of the upper surface of the second wiring layer 104 from the first wiring layer 101 is set higher than the height of the upper surface of the electronic component 105 mounted on the first wiring layer 101 from the first wiring layer 101.

  After the structure of FIG. 1A is completed, as shown in FIG. 1B, the first wiring layer 101 is made of a passive component made of a chip component such as LCR or a semiconductor component on the surface opposite to the electronic component 105 mounting surface. The surface layer component 120 and the metal case 121 can be mounted to form the electronic circuit device 100. The electronic circuit device 100 can be mounted on a mother board (not shown) by the fourth conductive pattern 116.

  With the above configuration, the connection reliability between the first wiring layer and the second wiring layer is improved by setting the height of the bump connecting the first wiring layer and the second wiring layer to be lower than the height of the electronic component. In addition, the total thickness of the wiring layers used in the electronic circuit device can be reduced. In addition, since both the front and back surfaces of the first wiring layer can be effectively used as mounting surfaces for the electronic component 105 and the like, the electronic circuit device 100 can be reduced in size. Moreover, the second wiring layer 104 is disposed so as to surround the outer periphery of the electronic component 105, and the height of the second wiring layer 104 is set higher than the electronic component 105, so that the electronic circuit device 100 has a motherboard mounting surface side. Despite the arrangement of the electronic component 105, it is possible to protect the electronic component 105 from external loads such as collision of foreign matter and impact during mounting. In addition, the mother board is usually composed of a printed wiring board, but the connection reliability between the mother board and the electronic circuit device 100 can be stabilized by using the second wiring layer 104 using the same kind of material as the mother board. It is something that can be done.

  Next, an embodiment of a method for manufacturing an electronic circuit device of the present invention will be described with reference to the drawings.

  FIG. 2 is a manufacturing process sectional view of the electronic circuit device according to the first embodiment of the present invention.

  As shown in FIG. 2A, the first conductive pattern of the multilayer wiring board including the first conductive pattern 102 disposed on the upper surface of the first wiring layer 101, the second conductive pattern 106, and the inner via 113. An Au plating film is formed on 102. Thereafter, as shown in FIG. 2B, the electronic component 105 made of a semiconductor bare chip IC in which bumps 110 are formed on the electrodes is flip-chip mounted on the first conductive pattern 102. In the present invention, the height of the bump 110 is 20 μm, and the thickness of the electronic component 105 is 150 μm. However, these sizes are merely examples, and are not limited to these sizes.

  Next, as shown in FIG. 2 (c), an opening is formed at a desired position of the second wiring layer 104 made of a two-layer substrate and having the third conductive pattern 115 and the fourth conductive pattern 116 on the front and back surfaces. 131 is formed. In the present invention, the thickness of the second wiring layer 104 is set to a total thickness of 200 μm including the thicknesses of the third conductive pattern 115 and the fourth conductive pattern 116. However, these sizes are merely examples, and are not limited to these sizes.

  Thereafter, as shown in FIG. 2D, a first bump 132 is formed on the third conductive pattern 115 of the second wiring layer 104 in which the opening 131 is formed. As the first bump 132, an Au stud bump made of Au wire, a Cu stud bump made of Cu wire, or an Al stud bump made of Al wire can be used. Au stud bumps are particularly preferable because they are soft and have high connection stability. In the present invention, the height of the first bump 132 formed on the third conductive pattern 115 is 100 μm. However, these sizes are merely examples, and are not limited to these sizes.

  In another step, as shown in FIG. 2E, an adhesive sheet 133 containing a thermosetting resin is prepared, and when this adhesive sheet 133 is overlapped with the first wiring layer 101 later, the electronic component 105 The electronic component 105 and spaces 134 and 135 larger than the electronic component 105 are formed at positions corresponding to the first bumps 132. In the present invention, a prepreg having an initial thickness of 80 μm obtained by impregnating a glass woven fabric having a thickness of 60 μm with an epoxy resin is used. However, these materials and sizes are merely examples, and are not limited to these materials and sizes. Note that the spaces 134 and 135 are not only formed individually, but may be integrated into a large space surrounding all of the electronic component 105 and the first bump 132. The advantage of a large space that surrounds everything is that the process of creating the space can be simplified.

  Next, as shown in FIG. 2F, an adhesive sheet 133 in which spaces 134 and 135 are formed on the first wiring layer 101 after the electronic component 105 is mounted, and a second wiring layer 104 in which first bumps 132 are formed. Are sequentially overlapped so that the first bumps 132 are located on the first wiring layer 101 side. The first wiring layer 101, the adhesive sheet 133, and the second wiring layer 104 are preferably made of the same composition material in order to prevent warping and deformation of the substrate after lamination, but when different materials are used. It is important to select a material having a small difference in thermal expansion coefficient.

  Next, as shown in FIG. 2 (g), each of the superimposed constituent materials is pressurized at a pressure of 4 MPa while being heated at, for example, 200 ° C. by a press machine (not shown). The bump 132 is pressed onto the second conductive pattern 106 on the first wiring layer 101 and brought into contact therewith. At this time, since the thermosetting resin contained in the adhesive sheet 133 is cured by being pushed by heating and pressurizing to fix the first wiring layer 101 and the second wiring layer 104, the heating and pressurizing process is completed. The thickness of the adhesive sheet 133 decreases from 80 μm to 60 μm, which is the thickness of the glass woven fabric. Accordingly, the first bump 132 is present between the first wiring layer 101 and the second wiring layer 104 while being crushed to 60 μm, which is substantially equal to the thickness of the adhesive sheet. In this way, the first bumps 132 are crushed and come into contact with the second conductive pattern 106, so that a sufficient contact area is secured between the first bumps 132 and the second conductive pattern 106, and stable electrical conduction is achieved. Can be done. Further, the adhesive sheet 133 is cured while being thinned by the heating / pressurizing process, and the second wiring layer 104 is fixed on the first wiring layer 101. After the heating / pressing process is completed, the mounting height of the electronic component 105 is increased. It is important to design in consideration of the thickness of each material so that the height of the second wiring layer 104 is higher than that. Accordingly, the second wiring layer 104 is disposed so as to surround the outer periphery of the electronic component 105, and the height of the second wiring layer 104 is set higher than that of the electronic component 105, whereby the motherboard mounting surface of the electronic circuit device 100 is set. Even though the electronic component 105 is arranged on the side, it is possible to protect the electronic component 105 from external loads such as collision of foreign matter and impact during mounting. In addition, since the pressure can be sufficiently transmitted between the first wiring layer 101, the adhesive sheet 133, and the second wiring layer 104 during the heating / pressurizing process, the first bump 132 is crushed to ensure the second conductivity. It is possible to make contact with the pattern 106. Furthermore, since the second wiring layer 104 is used, the second wiring layer 104 is not only an electrode part but can be used as a wiring pattern.

  Thereafter, as shown in FIG. 2 (h), the surface layer part 120 and the metal case 121 made of passive parts made of chip parts such as LCR and semiconductor parts and the metal case 121 are placed on the surface opposite to the mounting surface of the electronic parts 105 of the first wiring layer 101. The electronic circuit device 100 can be mounted. The electronic circuit device 100 can be mounted on a mother board (not shown) by the fourth conductive pattern 116.

  Hereinafter, the characteristics of the electronic circuit device and the manufacturing method thereof shown in the first embodiment will be described.

  In the electronic circuit device and the method of manufacturing the same according to the present invention, it is flat compared to a method of preparing a wiring board having a concave portion and mounting an electronic component in the concave portion to produce an electronic circuit device. By stacking the second wiring layer after mounting the electronic component on the first wiring layer, it is possible to perform the process very easily as compared with mounting the electronic component in the recess. By using bumps, the wiring layer and the second wiring layer can be electrically connected by a simple method of heating / pressing process, so that the concave shape can be easily formed without going through a complicated plating process. It is possible. Therefore, while effectively utilizing both surfaces of the first wiring layer as the electronic component mounting surface, the presence of the second wiring layer makes it possible to protect from an external load such as a collision of a foreign substance on the electronic component. Since the thickness of the adhesive layer sandwiched between the first wiring layer and the second wiring layer can be reduced, the electronic circuit device can be reduced in size, and the total thickness of the wiring layers used in the electronic circuit device is further reduced. Therefore, it can greatly contribute to the reduction in thickness of the electronic circuit device.

  As described above, according to the first embodiment, while effectively utilizing both surfaces of the first wiring layer as the electronic component mounting surface, the presence of the second wiring layer prevents external collision of the electronic component. It is possible to protect against an electrical load, and the thickness of the adhesive layer sandwiched between the first wiring layer and the second wiring layer can be reduced, so that the total thickness of the wiring layer used in the electronic circuit device is reduced. can do. Also, by mounting the electronic component on the flat first wiring layer and then laminating the second wiring layer, it becomes possible to easily mount the electronic component, and further, heating and pressurization can be achieved by using bumps. The electrical connection between the first wiring layer and the second wiring layer can be performed only by the process.

(Embodiment 2)
Hereinafter, Embodiment 2 according to the present invention will be described with reference to the drawings. FIG. 3 is a manufacturing process sectional view of an electronic circuit device according to Embodiment 2 of the present invention. Unless otherwise described, the same structure as that of the first embodiment is given the same number and the description thereof is omitted.

  As shown in FIG. 3C, the main difference between the second embodiment and the first embodiment is that the second bump 142 is formed on the second conductive pattern 106 of the first wiring layer on which the electronic component 105 is mounted. Is forming. As the second bump 142, an Au stud bump made of Au wire, a Cu stud bump made of Cu wire, or an Al stud bump made of Al wire can be used. Au stud bumps are particularly preferable because they are soft and have high connection stability. On the surface of the second conductive pattern 106 on which the second bump 142 is formed, an Au plating film is formed in order to easily form the bump. Then, the surface of the third conductive pattern 115 connected to the second bump 142 is formed with an Au plating film on the surface in advance or an Au plating film is formed in order to make a good connection with the second bump 142. Instead, a method of roughening the pattern surface by etching or the like may be used. In the present invention, the height of the second bump 142 is 100 μm. However, these sizes are merely examples, and are not limited to these sizes.

  By forming a bump electrically connecting the first wiring layer 101 and the second wiring layer 104 as the second bump 142 on the second conductive pattern 106 on the first wiring layer 101, the thin second wiring layer 104 is formed. Since the bump formation can be performed on the thick first wiring layer 101 instead of the bump formation on the substrate, the bump formation process becomes easier as compared with the first embodiment.

  Other structures have the same characteristics as those of the first embodiment.

(Embodiment 3)
Embodiment 3 according to the present invention will be described below with reference to the drawings. 4 is a cross-sectional view of a manufacturing process of an electronic circuit device according to Embodiment 3 of the present invention. Unless otherwise specified, the same structures as those in Embodiments 1 and 2 are given the same reference numerals and description thereof is omitted.

  The main difference between the first embodiment and the second embodiment in the third embodiment is that between the first wiring layer 101 and the second wiring layer 104, as shown in FIGS. 4C and 4E. Are formed on both the first wiring layer 101 and the second wiring layer 104, respectively. As the first bump 132, an Au stud bump made of Au wire, a Cu stud bump made of Cu wire, or an Al stud bump made of Al wire can be used. Au stud bumps are particularly preferable because they are soft and have high connection stability. Similarly, as the second bump 142, an Au stud bump made of Au wire, a Cu stud bump made of Cu wire, or an Al stud bump made of Al wire can be used. Au stud bumps are particularly preferable because they are soft and have high connection stability. At this time, the surface of the second conductive pattern 106 that forms the first bump 132 and the surface of the third conductive pattern 115 that forms the second bump 142 have good connection with the first bump 132 and the second bump 142, respectively. For this purpose, an Au plating film is formed on the surface in advance. Then, as shown in FIGS. 4 (h) and 4 (i), the first bump 132 and the second bump 142 are pressed and integrated while being crushed.

  Moreover, about the 1st bump 132 and the 2nd bump 142, either bump can be made into the plating bump which consists of metal plating films. By using the plating bumps, it is possible to prevent a connection failure caused when the bumps are crushed and fallen from the vertical direction and fall when the bumps are crushed. In this case, the plating bump serves as a pillar in the heating / pressurizing process to prevent the bump from falling down. Furthermore, in this case, it is important that the plating bump made of the metal plating film has a larger diameter than the metal bump using the metal wire. By increasing the diameter, it becomes possible to play the role of a pillar in the heating / pressurizing process more reliably. In addition, it becomes possible to stabilize the electrical connection with the metal bump using a metal wire by forming the Au plating film on the surface of the plating bump or roughening the surface. An example of this structure is shown in FIG. In the present invention, the height of the metal bump using the metal wire is 50 μm, the diameter is 100 μm, and the height of the plating bump made of the metal plating film is 50 μm and the diameter is 300 μm. However, these sizes are merely examples, and are not limited to these sizes.

(Embodiment 4)
Embodiment 4 according to the present invention will be described below with reference to the drawings. FIG. 6 is a manufacturing process sectional view of an electronic circuit device according to Embodiment 4 of the present invention. Unless otherwise described, the same structure as that of the first embodiment is given the same number and the description thereof is omitted.

  The main difference between the first embodiment and the first embodiment is that an anisotropic conductive sheet 143 is disposed between the first wiring layer 101 and the adhesive sheet 133 as shown in FIG. It is that you are. In the anisotropic conductive sheet 143, a space 144 is formed in a portion corresponding to the electronic component 105, and a portion corresponding to the first bump 132 is arranged so that the anisotropic conductive sheet 143 exists as it is. By disposing the anisotropic conductive sheet 143, the first bump 132 is electrically connected to the second conductive pattern 106 of the first wiring layer 101 via the anisotropic conductive sheet 143 during the heating / pressurizing process. And connection reliability can be stabilized.

(Embodiment 5)
Embodiment 5 according to the present invention will be described below with reference to the drawings. FIG. 7 is a cross-sectional view of an electronic circuit device according to Embodiment 5 of the present invention. Unless otherwise described, the same structure as that of the first embodiment is given the same number and the description thereof is omitted.

  As shown in FIG. 7A, when the first wiring layer 101 and the second wiring layer 104 are fixed by heating and pressurizing to fix the first wiring layer 101 and the second wiring layer 104, the heat curing resin contained in the adhesive sheet 133 is washed away. The curable resin is bonded to the side surface of the electronic component 105 so as to protect the side surface portion of the electronic component 105 and cured, or the thermosetting resin is completely applied to the electronic component 105 as shown in FIG. It is to drain and harden until it is covered. By doing so, the effect of protecting the electronic component 105 is enhanced particularly when a semiconductor component that is weak against external stress is used as the electronic component 105. Furthermore, when the electronic component 105 is completely covered with a thermosetting resin, a force that pushes the electronic component 105 toward the first wiring layer 101 is applied during the heating / pressurizing process. It is possible to prevent the electrical connection of the terminal from becoming unstable.

(Embodiment 6)
Embodiment 6 according to the present invention will be described below with reference to the drawings. FIG. 8 is a cross-sectional view of the heating / pressurizing process when manufacturing the electronic circuit device of the present invention. Unless otherwise described, the same structure as that of the first embodiment is given the same number and the description thereof is omitted.

  In the sixth embodiment, as shown in FIG. 8A, the process of pressing the first wiring layer 101, the adhesive sheet 133, and the second wiring layer 104 with a press machine 150 while heating is performed on the electronic component 105. The structure applies pressure. By doing so, a force that pushes the electronic component 105 toward the first wiring layer 101 works, so that it is possible to prevent the electrical connection of the electronic component 105 from becoming unstable during the heating process. Further, as shown in FIG. 8B, not only the electronic component 105 is directly pressed by the press machine 150, but also a heating / pressurizing process may be performed by interposing a cushioning elastic body 151. However, it is of course important to select a material that enables the elastic body 151 to come into contact with the electronic component 105 during the heating / pressurizing process. By using the elastic body 151 having this cushioning property, it is possible to apply pressure to the electronic component 105 without strictly setting the parallelism of the press machine 150 to the electronic component 150.

(Embodiment 7)
In the seventh embodiment, as shown in FIG. 9, the electronic circuit device 100 of the present invention is used, and the antenna 201 and the display device 202 are connected to each other, whereby the electronic device 200 can be obtained. The electronic circuit device 100 of the present invention is not limited to the above-described configuration, and can be made into various electronic devices by connecting to various components and devices.

  The electronic circuit device, the electronic device using the same, and the manufacturing method thereof according to the present invention improve the connection reliability between the first wiring layer and the second wiring layer, and the total thickness of the wiring layer used in the electronic circuit device. Can be made thin, and can be used, for example, for manufacturing an ultra-small three-dimensional mounting module.

Sectional drawing of the electronic circuit apparatus in Embodiment 1 of this invention Manufacturing process sectional drawing of the electronic circuit device in Embodiment 1 of this invention Manufacturing process sectional drawing of the electronic circuit device in Embodiment 2 of this invention Manufacturing process sectional drawing of the electronic circuit device in Embodiment 3 of this invention Sectional drawing of the electronic circuit apparatus in Embodiment 3 of this invention Manufacturing process sectional drawing of the electronic circuit device in Embodiment 4 of this invention Sectional drawing of the electronic circuit apparatus in Embodiment 5 of this invention Sectional drawing of the heating and pressurization process at the time of electronic circuit device manufacture in Embodiment 6 of this invention The figure which shows an example of the electronic device using the electronic circuit apparatus of this invention Cross-sectional view of the manufacturing process of a conventional electronic circuit device Sectional view of a conventional electronic circuit device

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Electronic circuit apparatus 101 1st wiring layer 102 1st conductive pattern 104 2nd wiring layer 105 Electronic component 106 2nd conductive pattern 108 Adhesion layer 110 Bump 111 Mounting aid material 113 Inner via 115 3rd conductive pattern 116 4th Conductive pattern 118 Bump 120 Surface layer part 121 Metal case

Claims (20)

A first wiring layer;
An electronic component mounted on an electrode provided on the upper surface of the first wiring layer;
A second wiring layer connected to the first wiring layer via a bump on the first wiring layer;
An adhesive layer disposed between the first wiring layer and the second wiring layer;
The second wiring layer has an opening larger than the upper surface of the electronic component above the electronic component, and the height of the bump is a distance between the upper surface of the first wiring layer and the upper surface of the electronic component. Smaller electronic circuit device. 2. The electronic circuit device according to claim 1, wherein a distance between an upper surface of the first wiring layer and an upper surface of the second wiring layer is larger than a distance between an upper surface of the first wiring layer and an upper surface of the electronic component. The electronic circuit device according to claim 1, wherein the adhesive layer is made of a thermosetting resin including at least one of a glass woven fabric, an aramid nonwoven fabric, and an inorganic filler. The electronic circuit device according to claim 1, wherein the bump is made of a metal bump using a metal wire or a metal plating film. An electronic circuit device according to any one of claims 1 to 4,
An electronic device including a display device connected to the electronic circuit device. Mounting an electronic component on the first wiring layer;
Removing a portion corresponding to the mounting area of the electronic component to prepare a second wiring layer having an opening larger than the upper surface of the electronic component;
Forming a first bump on the second wiring layer;
A step of preparing an adhesive sheet provided with a space by deleting a portion corresponding to the mounting area of the electronic component and the first bump;
Superimposing the adhesive sheet and the second wiring layer in order on a desired position on the first wiring layer after mounting the electronic component;
The first wiring layer, the adhesive sheet, and the second wiring layer are heated and heated until the height of the first bump is smaller than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component. A method for manufacturing an electronic circuit device comprising a step of pressing and integrating. Mounting an electronic component on the first wiring layer;
Forming a second bump on the first wiring layer;
Removing a portion corresponding to the mounting area of the electronic component to prepare a second wiring layer having an opening larger than the upper surface of the electronic component;
A step of preparing an adhesive sheet provided with a space by deleting a portion corresponding to the mounting area of the electronic component and the second bump;
A step of sequentially superimposing the adhesive sheet and the second wiring layer on a desired position on the first wiring layer after mounting the electronic component and the second bump;
The first wiring layer, the adhesive sheet, and the second wiring layer are heated and heated until the height of the second bump is smaller than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component. A method for manufacturing an electronic circuit device comprising a step of pressing and integrating. Mounting an electronic component on the first wiring layer;
Forming a second bump on the first wiring layer;
Removing a portion corresponding to the mounting area of the electronic component to prepare a second wiring layer having an opening larger than the upper surface of the electronic component;
Forming a first bump on the second wiring layer;
A step of preparing an adhesive sheet provided with a space by deleting a portion corresponding to the mounting area of the electronic component and the first bump and the second bump;
The first and second bumps are mounted on the second wiring layer after mounting the first bump while sandwiching the adhesive sheet at a desired position on the first wiring layer after mounting the electronic component and the second bump. A process of overlapping so that
The first wiring layer, the adhesive sheet, and the second wiring layer are configured such that the sum of the height of the first bump and the height of the second bump is the upper surface of the first wiring layer and the upper surface of the electronic component. A method of manufacturing an electronic circuit device comprising: a step of applying pressure while heating until the distance becomes smaller than the distance. The distance between the upper surface of the first wiring layer and the upper surface of the second wiring layer is greater than the distance between the upper surface of the first wiring layer and the upper surface of the electronic component. The manufacturing method of the electronic circuit device of description. The method for manufacturing an electronic circuit device according to claim 6, wherein the adhesive sheet is made of a thermosetting resin including at least one of a glass woven fabric, an aramid nonwoven fabric, and an inorganic filler. 9. The electronic circuit according to claim 6, wherein the space formed in the adhesive sheet is formed in an area surrounding all of the electronic component and the first bump and / or the second bump. Device manufacturing method. Forming a first bump on the second wiring layer;
The electronic according to claim 7 or 8, which is performed before the step of preparing a second wiring layer in which a portion corresponding to the mounting area of the electronic component is deleted and an opening larger than the upper surface of the electronic component is provided. A method of manufacturing a circuit device. The method for manufacturing an electronic circuit device according to claim 6, wherein the first bump is a metal bump using a metal wire. The method for manufacturing an electronic circuit device according to claim 7, wherein the second bump is a metal bump using a metal wire. 9. The method of manufacturing an electronic circuit device according to claim 8, wherein one of the first bump and the second bump is a metal bump using a metal wire, and the other is a metal plating film. The method of manufacturing an electronic circuit device according to claim 15, wherein the metal bump and the metal plating film have a larger diameter than the metal plating film. An anisotropic conductive sheet is interposed between the first wiring layer and the adhesive sheet, and electrical connection between the first bump and the first wiring layer is performed via the anisotropic conductive sheet. Item 7. A method for manufacturing an electronic circuit device according to Item 6. The method of manufacturing an electronic circuit device according to claim 17, wherein the first bump is made of a metal bump using a metal wire or a metal plating film. The method for manufacturing an electronic circuit device according to claim 6, claim 7, claim 8, or claim 17, wherein the thermosetting resin that has flowed out of the adhesive sheet is adhered to at least a side surface portion of the electronic component. 18. The electron according to claim 6, 7 or 8 or claim 17, wherein pressure is also applied to the electronic component during the step of integrating the first wiring layer, the adhesive sheet, and the second wiring layer. A method of manufacturing a circuit device.

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