JP2008193557A - Pulse transmission circuit - Google Patents

Pulse transmission circuit Download PDF

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JP2008193557A
JP2008193557A JP2007027724A JP2007027724A JP2008193557A JP 2008193557 A JP2008193557 A JP 2008193557A JP 2007027724 A JP2007027724 A JP 2007027724A JP 2007027724 A JP2007027724 A JP 2007027724A JP 2008193557 A JP2008193557 A JP 2008193557A
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transmission circuit
pulse transformer
signal transmission
voltage
circuit
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Ryuji Yamada
隆二 山田
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Fuji Electric Co Ltd
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Fuji Electric Systems Co Ltd
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  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Power Conversion In General (AREA)
  • Electronic Switches (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To transmit a gate signal etc. in a sufficiently small delay time. <P>SOLUTION: The delay time by a photo-coupler 1 is compensated by a pulse transformer 4 to make the delay time small by connecting a signal transmission circuit using the photo-coupler 1 and a signal transmission circuit using the pulse transformer 4 in parallel with each other in an input part and connecting them so that an output of the signal transmission circuit by the photo-coupler and an output of the signal transmission circuit by the pulse transformer are added to each other in an output part. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は、スイッチング電源などにおいて、ゲート信号を絶縁して伝送する場合に用いて好適なパルス伝送回路に関する。   The present invention relates to a pulse transmission circuit suitable for use in a case where a gate signal is insulated and transmitted in a switching power supply or the like.

スイッチング電源などにおいては、制御回路と主回路とは互いに異なる電位で運用されることがあり、このような場合には、回路内のスイッチング素子のオン/オフを制御するゲート信号を絶縁して伝送することが必要になる。
このような回路として例えば特許文献1に開示されるような例があり、その例を図3として示す。
In switching power supplies, etc., the control circuit and the main circuit may be operated at different potentials. In such a case, the gate signal for controlling on / off of the switching element in the circuit is insulated and transmitted. It becomes necessary to do.
An example of such a circuit is disclosed in Patent Document 1, for example, and is shown in FIG.

図3において、1はフォトカプラで、2,3は抵抗であり互いに絶縁された電源P1,P2に接続される。P1,P2はそれぞれN1,N2に対して、正の電圧を持つようにする。なお、ここではP1,P2は互いに同じ値の電圧としている。また、入力端子INは、図示されないスイッチ素子により、N1に対し短絡または開放状態にされる。   In FIG. 3, 1 is a photocoupler, 2 and 3 are resistors, and are connected to power supplies P1 and P2 which are insulated from each other. P1 and P2 have positive voltages with respect to N1 and N2, respectively. Here, P1 and P2 are set to the same voltage. The input terminal IN is short-circuited or opened with respect to N1 by a switch element (not shown).

図4に図3の動作波形を示す。
いま、図3の入力端子INがN1と短絡されると、フォトカプラ1のフォトダイオードには図4にIfで示す入力電流が流れ、遅延時間Td1後にフォトカプラ1のフォトトランジスタが動作することで、出力端子OUTはN2電位となる。その後、端子INが開放されるとIfが遮断され、遅延時間Td2後に端子OUTはP2電位となる。このような動作により、出力側に信号が伝達されることになる。
FIG. 4 shows the operation waveform of FIG.
Now, when the input terminal IN of FIG. 3 is short-circuited to N1, the input current indicated by If in FIG. 4 flows to the photodiode of the photocoupler 1, and the phototransistor of the photocoupler 1 operates after the delay time Td1. The output terminal OUT is at the N2 potential. After that, if the terminal IN is opened, If is cut off, and after the delay time Td2, the terminal OUT becomes the P2 potential. With such an operation, a signal is transmitted to the output side.

特開昭59−050580号公報JP 59-050580 A

ところで、例えば並列に接続された複数のスイッチング回路を同時に動作させる場合には、各回路へのゲート信号のタイミングを厳密に合わせる必要がある。なぜならば、タイミングがずれると、特定の回路に電流が集中したり、または或る回路の出力電圧を別の回路で短絡してしまい、結果として過電流を生じるからである。
高速のスイッチング素子では数ns〜数10ns程度以内の遅れで動作できるものもあるが、フォトカプラは高速のものでも100ns程度の遅延時間が存在し、さらにこの値は一定ではなく個体のばらつきや、温度変化または経年変化により或る範囲に分布する。このため、同時に動作すべき素子が動作を終えているタイミングで、別の素子はまだ動作を開始していないという場合もあり、上述のような問題が生じる。
By the way, for example, when simultaneously operating a plurality of switching circuits connected in parallel, it is necessary to strictly match the timing of the gate signal to each circuit. This is because if the timing is shifted, the current concentrates in a specific circuit or the output voltage of a certain circuit is short-circuited by another circuit, resulting in an overcurrent.
Some high-speed switching elements can operate with a delay within about several ns to several tens ns, but even with a high-speed photocoupler, there is a delay time of about 100 ns, and this value is not constant, It is distributed in a certain range due to temperature change or aging change. For this reason, there is a case where another element has not yet started operating at the timing when the elements to be operated simultaneously have finished operating, and the above-described problems arise.

一方、他の絶縁信号伝送手段としてはパルストランスを用いるものがあり、遅延時間は一般的にフォトカプラよりも小さくできるが、下記のような問題がある。
(1)パルストランスを小型化するためには、極力小さい鉄心を用いる必要があるが、磁気飽和を避けるために、磁束密度を飽和値以内にする必要がある。磁束密度はコイルの巻数に反比例するので、巻数を増やせば磁束密度を下げられるが、限られた体積の中で巻数を増やすには、巻線を細くする必要がある。巻線材料の入手性、巻線の信頼性の問題でこれには限度があるため、パルストランス自体の小型化には限界がある。
On the other hand, as another insulation signal transmission means, there is one using a pulse transformer, and the delay time can generally be made smaller than that of a photocoupler, but there are the following problems.
(1) In order to reduce the size of the pulse transformer, it is necessary to use an iron core as small as possible. However, in order to avoid magnetic saturation, the magnetic flux density needs to be within a saturation value. Since the magnetic flux density is inversely proportional to the number of turns of the coil, the magnetic flux density can be lowered by increasing the number of turns. However, in order to increase the number of turns in a limited volume, it is necessary to make the windings thinner. Since this is limited by the availability of winding materials and the reliability of windings, there is a limit to the miniaturization of the pulse transformer itself.

(2)パルストランスでは、直流や低周波の成分を伝送することができない。一方、ゲート信号は、状態に応じて時比率(スイッチング動作の一周期に占めるオン期間の割合)が大きく変化する場合がある。これに対応し、誤りなく信号を伝送するための回路がトランスの前後に必要となる。これは、例えば信号をさらに高周波の交流に変調し、トランスで絶縁した後に復調するなどの方法で実現できるが、回路規模が大きくなり小型化,低コスト化の妨げとなる。 (2) A pulse transformer cannot transmit direct current or low frequency components. On the other hand, the time ratio of the gate signal (the ratio of the on period in one cycle of the switching operation) may vary greatly depending on the state. Corresponding to this, a circuit for transmitting a signal without error is required before and after the transformer. This can be realized by, for example, a method of modulating the signal into a high-frequency alternating current, demodulating it after being insulated by a transformer, but the circuit scale becomes large and hinders miniaturization and cost reduction.

この発明は以上のような点に鑑みなされたもので、その課題は充分小さい遅延時間で、ゲート信号などを伝達できるようにすることにある。   The present invention has been made in view of the above points, and an object thereof is to enable transmission of a gate signal or the like with a sufficiently small delay time.

このような課題を解決するため、この発明では、フォトカプラを用いた第1の信号伝送回路と、パルストランスを用いた第2の信号伝送回路とを入力部においてそれぞれ並列に接続し、出力部において前記第1の信号伝送回路の出力と、前記第2の信号伝送回路の出力とが互いに加算されるように接続し、かつ前記パルストランスの伝送可能なパルス幅を、前記フォトカプラの遅延時間よりも長く、入力信号のパルス幅よりも十分に短くすることを特徴とする。   In order to solve such a problem, in the present invention, a first signal transmission circuit using a photocoupler and a second signal transmission circuit using a pulse transformer are respectively connected in parallel at an input unit, and an output unit The output of the first signal transmission circuit and the output of the second signal transmission circuit are connected so as to be added to each other, and the pulse width that can be transmitted by the pulse transformer is determined by the delay time of the photocoupler. Longer than the pulse width of the input signal.

この発明によれば、最小限の大きさのパルストランスを組み合わせるだけで、ゲート信号を十分小さな遅延時間で伝送することが可能になる。   According to the present invention, it becomes possible to transmit a gate signal with a sufficiently small delay time only by combining a pulse transformer having a minimum size.

図1はこの発明の実施の形態を示す回路図である。
図1からも明らかなように、図3の回路にパルストランス4を並列に接続した点が特徴である。なお、5〜7は抵抗、8〜10はダイオード、11はツェナーダイオードである。
FIG. 1 is a circuit diagram showing an embodiment of the present invention.
As is apparent from FIG. 1, the pulse transformer 4 is connected in parallel to the circuit of FIG. Note that 5 to 7 are resistors, 8 to 10 are diodes, and 11 is a Zener diode.

図2は図1の動作を説明する波形図である。
いま、図1の入力端子INがN1と短絡されると、電流Ifが流れるとともにパルストランス4の一次側に電圧V1が印加される。パルストランス4の遅延時間を無視するものとすると、その変圧比倍(図1では1:1としている)の電圧V2が瞬時に二次側に発生する。このとき、フォトカプラ1の出力電圧Vcは、遅延があるためP2のままである。ここで、抵抗6,7の抵抗値が抵抗3の抵抗値に対して十分大きく、かつ互いに等しいものとすると、抵抗6,7の接続点電圧はVc,V2の分圧値(極性を考慮した加算値)となるため、ほぼ0Vまで瞬時に低下し、これにより遅延無く「L」レベルの信号が伝達される。
FIG. 2 is a waveform diagram for explaining the operation of FIG.
Now, when the input terminal IN of FIG. 1 is short-circuited with N1, the current If flows and the voltage V1 is applied to the primary side of the pulse transformer 4. Assuming that the delay time of the pulse transformer 4 is ignored, a voltage V2 that is multiplied by the transformation ratio (1: 1 in FIG. 1) is instantaneously generated on the secondary side. At this time, the output voltage Vc of the photocoupler 1 remains P2 due to a delay. Here, if the resistance values of the resistors 6 and 7 are sufficiently larger than the resistance value of the resistor 3 and equal to each other, the voltage at the connection point of the resistors 6 and 7 is a divided value of Vc and V2 (in consideration of the polarity). Therefore, the voltage is instantaneously reduced to almost 0 V, thereby transmitting an “L” level signal without delay.

遅延時間Td1後にVcが0Vになると、OUT端子の電圧は負になろうとするが、ダイオード10によりクランプされるため、ほぼ0Vに留まる。パルストランス4はその後飽和し、V1,V2は0Vになってパルストランス4の入力は短絡状態になるが、その一次電流は抵抗5で制限される。   When Vc becomes 0V after the delay time Td1, the voltage at the OUT terminal tends to become negative, but is clamped by the diode 10 and therefore remains at almost 0V. The pulse transformer 4 then saturates, V1 and V2 become 0V, and the input of the pulse transformer 4 is short-circuited, but its primary current is limited by the resistor 5.

端子INが開放されると、パルストランス4の励磁電流がツェナーダイオード11→ダイオード8→P1の経路で流れ、V1=V2=−Vrとなる。このとき、ツェナーダイオード11は、入力信号のOFF直後に、一定値の負の入力電圧をパルストランス4に与えるために設けられる。Vcは遅延Td2により未だ0Vなので、OUT端子の電圧はほぼVr/2となる。この電圧を、後段の回路が「H」レベルとして認識するように予め設定しておけば、遅延無く「H」レベルの信号を伝達できることになる。   When the terminal IN is opened, the exciting current of the pulse transformer 4 flows through the path of the Zener diode 11 → the diode 8 → P1, and V1 = V2 = −Vr. At this time, the Zener diode 11 is provided to give a negative input voltage having a constant value to the pulse transformer 4 immediately after the input signal is turned OFF. Since Vc is still 0 V due to the delay Td2, the voltage at the OUT terminal is approximately Vr / 2. If this voltage is set in advance so that the subsequent circuit recognizes it as the “H” level, the signal of the “H” level can be transmitted without delay.

その後、Vc=P2電圧になると、OUT端子の電圧はP2電圧を超えようとするが、ダイオード9によりクランプされるため、P2電圧よりわずかに高い電圧に留まる。パルストランス4の励磁電流はツェナーダイオード11の電圧により減少し、0Aになると再びV1=V2=0Vとなるが、このときは既にVc=P2電圧なので、OUT端子の電圧はP2電圧のままとなる。   Thereafter, when Vc = P2 voltage is reached, the voltage at the OUT terminal tends to exceed the P2 voltage, but is clamped by the diode 9 and therefore remains at a voltage slightly higher than the P2 voltage. The exciting current of the pulse transformer 4 decreases due to the voltage of the Zener diode 11, and when it becomes 0A, V1 = V2 = 0V again. At this time, since Vc = P2 voltage, the voltage at the OUT terminal remains the P2 voltage. .

なお、パルストランス4は遅延時間の間だけ信号を伝達できれば良く、その後は飽和しても構わないため巻数を少なくでき、結果として小形のものを用いることができる。また直流,低周波成分の伝送はフォトカプラ1が行なうため、これらを伝えるための複雑な回路が不要となり、小形且つ安価な回路で遅延の無い伝送を実現することができる。   The pulse transformer 4 only needs to be able to transmit a signal only during the delay time, and thereafter may be saturated, so the number of turns can be reduced, and as a result, a small-sized one can be used. Further, since the photocoupler 1 performs transmission of direct current and low frequency components, a complicated circuit for transmitting these is not necessary, and transmission without delay can be realized with a small and inexpensive circuit.

この発明の実施の形態を示す回路図Circuit diagram showing an embodiment of the present invention 図1の動作を説明する波形図Waveform diagram explaining the operation of FIG. 従来例を示す回路図Circuit diagram showing a conventional example 図3の動作を説明する波形図Waveform diagram explaining the operation of FIG.

符号の説明Explanation of symbols

1…フォトカプラ、2,3〜5〜7…抵抗、4…パルストランス、8〜10…ダイオード、11…ツェナーダイオード。   DESCRIPTION OF SYMBOLS 1 ... Photocoupler, 2, 3-5-7 ... Resistance, 4 ... Pulse transformer, 8-10 ... Diode, 11 ... Zener diode.

Claims (1)

フォトカプラを用いた第1の信号伝送回路と、パルストランスを用いた第2の信号伝送回路とを入力部においてそれぞれ並列に接続し、出力部において前記第1の信号伝送回路の出力と、前記第2の信号伝送回路の出力とが互いに加算されるように接続し、かつ前記パルストランスの伝送可能なパルス幅を、前記フォトカプラの遅延時間よりも長く、入力信号のパルス幅よりも十分に短くすることを特徴とするパルス伝送回路。   A first signal transmission circuit using a photocoupler and a second signal transmission circuit using a pulse transformer are connected in parallel at the input unit, and the output of the first signal transmission circuit at the output unit; The output of the second signal transmission circuit is connected to be added to each other, and the pulse width that can be transmitted by the pulse transformer is longer than the delay time of the photocoupler and sufficiently larger than the pulse width of the input signal. A pulse transmission circuit characterized by shortening.
JP2007027724A 2007-02-07 2007-02-07 Pulse transmission circuit Pending JP2008193557A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016130701A (en) * 2015-01-15 2016-07-21 横河電機株式会社 Signal transmission device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58107629U (en) * 1982-01-18 1983-07-22 株式会社チノ− switch drive circuit
JPS58176433U (en) * 1982-05-20 1983-11-25 富士電機株式会社 signal transmission circuit
JPS6444620A (en) * 1987-08-13 1989-02-17 Nippon Inter Electronics Corp Mos fet gate driving circuit
JP2003133932A (en) * 2001-10-26 2003-05-09 Matsushita Electric Works Ltd Driving circuit for semiconductor switch element and semiconductor relay using the same
JP2004153347A (en) * 2002-10-28 2004-05-27 Matsushita Electric Works Ltd Drive circuit of semiconductor switch element and semiconductor relay using the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58107629U (en) * 1982-01-18 1983-07-22 株式会社チノ− switch drive circuit
JPS58176433U (en) * 1982-05-20 1983-11-25 富士電機株式会社 signal transmission circuit
JPS6444620A (en) * 1987-08-13 1989-02-17 Nippon Inter Electronics Corp Mos fet gate driving circuit
JP2003133932A (en) * 2001-10-26 2003-05-09 Matsushita Electric Works Ltd Driving circuit for semiconductor switch element and semiconductor relay using the same
JP2004153347A (en) * 2002-10-28 2004-05-27 Matsushita Electric Works Ltd Drive circuit of semiconductor switch element and semiconductor relay using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016130701A (en) * 2015-01-15 2016-07-21 横河電機株式会社 Signal transmission device

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