JP2008192872A - Method for manufacturing electronic device and transistor, and display unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a transistor having a high degree of freedom with a few restriction of components. <P>SOLUTION: The method for manufacturing the transistor 40 comprises the steps of forming a part of the constituent element of the transistor 40 including at lest a gate electrode 68 on a first substrate 11, forming a part of the constituent element of the transistor 40 including at least a semiconductor layer 52 on a second substrate 12, forming a gate insulating film 54 by oxygenizing the surface of the semiconductor layer 52, sticking the first substrate 11 and the second substrate 12 together so that the gate electrode 68 faces to the gate insulating film 54, and separating at least one of the first substrate 11 and the second substrate 12 from the constituent element of the transistor 40 formed on the substrate. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an electronic device manufacturing method, a transistor manufacturing method, and a display device using the same.

  Transistors as electronic devices are widely used as drive elements or switching elements in display devices. In general, a transistor is formed by repeating a thin film forming process and a thin film patterning process on a glass substrate or the like and laminating each component in order from the lower layer (from the substrate side) (Patent Document 1). ). In many cases, the above-described substrate is used as a component of a completed transistor as it is. However, a method of peeling the completed transistor from the substrate and transferring it to another substrate has also been proposed (Patent Document 2). .

JP 05-175231 A JP 11-312811 A

  However, the above-described method has a problem that the degree of freedom is small because each process is restricted by the heat resistance and the like of the lower layer components. The present invention has been made to solve such a problem, and an object of the present invention is to provide a transistor manufacturing method and a display device with a high degree of freedom, which are less limited by other components.

  In order to solve the above-described problem, an electronic device manufacturing method according to the present invention includes a first portion of a component of an electronic device in a first recess of a first substrate and an electronic device in a second recess of a second substrate. Forming a second portion of each component of the apparatus; a surface of the first substrate on which the first portion of the component is formed; and a second portion of the component on the second substrate. And a step of bonding the surface on which the portion is formed.

  According to this manufacturing method, the processing conditions and the like of the component formed on one substrate can be determined without considering the influence of the processing on the component of the other substrate. Therefore, the degree of freedom of the manufacturing process of the electronic device can be improved as compared with the method of sequentially stacking the components of the electronic device on one substrate.

  In order to solve the above problems, a method for manufacturing a transistor of the present invention includes a step of forming a part of a component of a transistor including at least a gate electrode over a first substrate, Forming a part of a component of the transistor including at least a semiconductor layer; oxidizing a part of the semiconductor layer to form a gate insulating film; and the first substrate and the second substrate; Bonding the gate electrode and the gate insulating film so as to face each other, and at least one of the first substrate and the second substrate from a component of a transistor formed over the substrate And a step of separating.

  According to such a manufacturing method, for example, after the second substrate is separated from the semiconductor layer, a gate oxide film is formed without considering the heat resistance of the gate electrode, and then the gate electrode is formed on the semiconductor layer. It can be located in the lower layer. Accordingly, a gate insulating film that has been subjected to a high-temperature oxidation process can be used for a bottom-gate transistor having a gate electrode made of a material having low heat resistance such as aluminum, and the degree of freedom in the manufacturing process of the transistor can be improved.

  In order to solve the above problems, a method for manufacturing a transistor of the present invention includes a step of forming a first depression in a first substrate, and a structure of a transistor including at least a gate electrode in the first depression. Forming a part of the element so as to fit in the first depression; forming a second depression in the second substrate; and a transistor including at least a semiconductor layer in the second depression. Forming a part of the component so as to fit in the second depression, oxidizing a part of the semiconductor layer to form a gate insulating film, and part of the first substrate And forming the adhesive layer on at least one part of the second substrate, and the first substrate and the second substrate such that the gate electrode and the gate insulating film face each other, A step of bonding through the adhesive layer, and At least one of the first substrate and the second substrate, characterized by comprising the step of separating the components of the transistor formed on the substrate.

  According to this manufacturing method, since the substrate surface and the upper surface of the component of the transistor are located on the same plane, when the gate electrode and the gate insulating film are bonded together, the first substrate and the second substrate are combined. The substrate is also attached. Accordingly, the subsequent steps can be performed in a stable state, and the degree of freedom in the transistor manufacturing process can be further improved.

Preferably, at least one of the first substrate and the second substrate uses a substrate made of a light-transmitting material, and peels off by applying predetermined energy to the surface of the substrate made of the light-transmitting material. The method further includes the step of forming a release layer having the following.
According to this manufacturing method, the substrate and the constituent elements of the transistor can be easily separated by irradiating an energy beam from the back surface of the substrate made of the light-transmitting material. Therefore, conditions such as the process of bonding the two substrates described above can be easily set, and the degree of freedom in the transistor manufacturing process can be further improved.

  In order to solve the above-described problem, the transistor manufacturing method of the present invention includes a step of forming a first depression in a first substrate made of a light-transmitting material, and the first depression including the inside of the first depression. A step of forming a first release layer having a property of being peeled off by applying predetermined energy to a part of one substrate; and the first release layer located in the first depression includes at least a gate electrode. Forming a part of a component of the transistor so as to fit in the first depression, forming a second depression in a second substrate made of a light-transmitting material, and the second depression A step of forming a second release layer having a property of being peeled off by applying predetermined energy to a part of the second substrate including the inside, and the second release layer located in the second depression, Part of a transistor component including at least a semiconductor layer Forming a gate insulating film by oxidizing the surface of the semiconductor layer, forming a part of the first substrate, and forming a part of the second substrate. Forming a first adhesive layer on at least one of the first portion, and the first substrate and the second substrate so that the gate electrode and the gate insulating film face each other. A step of bonding through a layer, a predetermined energy beam is irradiated to the first substrate, a predetermined energy is applied to the first release layer, the first substrate is removed, and the gate is removed. Exposing the electrode; implanting impurity ions into the semiconductor layer using the gate electrode as a mask to form a source region and a drain region; forming a second adhesive layer covering the gate electrode; Adhesive layer And bonding the third substrate, irradiating the second substrate with a predetermined energy beam, applying predetermined energy to the second release layer, and peeling the second substrate. Removing and exposing the source region and the drain region.

  According to this manufacturing method, in the bottom-gate transistor, the AL gate electrode and the gate insulating film that has undergone a high-temperature oxidation process can be combined. In the bottom-gate transistor, the source region and the drain region can be formed by self-alignment. Therefore, the degree of freedom in the transistor manufacturing process can be further improved.

Preferably, the release layer is made of a material that can be selectively etched with respect to a substrate on which the release layer is formed.
With such a configuration, the release layer can be removed without changing the shape of the recess formed in the substrate. Therefore, the substrate can be reused, and the cost required for manufacturing the transistor can be reduced.

Preferably, the step of forming part of the components of the transistor is a step of forming a liquid material by curing.
With such a manufacturing method, it becomes easy to place a part of the constituent elements of the transistor in the above-described recess and position the substrate surface and the upper surface of the constituent elements of the transistor on the same plane. Therefore, formation of the adhesive layer and subsequent bonding of the first substrate and the second substrate are facilitated, and the cost required for manufacturing the transistor can be reduced.

A display device according to the present invention includes a transistor manufactured by any one of the above-described methods.
With this invention, a display device can be obtained at low cost.

  A method for manufacturing a transistor as an electronic device according to an embodiment of the present invention will be described below with reference to the drawings. In the drawings shown below, the dimensions and ratios of the components are appropriately different from the actual ones in order to make the components large enough to be recognized on the drawings.

<First Embodiment>
1 to 5 are schematic cross-sectional views illustrating a method for manufacturing a transistor according to the first embodiment. It is sectional drawing which shows the state cut | disconnected by the surface perpendicular | vertical with respect to the extending | stretching direction of the gate electrode (gate electrode wiring) of a transistor. In the embodiment of the present invention, after the first member 10 and the second member 20 are obtained by forming part of the components of the electronic device on each of the two substrates, both the members are bonded together. First, the formation process of each member is shown, and then the bonding process is described.

  FIG. 1A to FIG. 1F show a process for forming the first member 10. First, as shown in FIG. 1A, a first recess 21 is formed in a first substrate 11 made of quartz as a translucent material. The first recess 21 is formed by a general photolithography method. That is, a photoresist layer is formed in a region other than the region where the first depression 21 is to be formed. Then, using the resist layer as a mask, the quartz substrate in the region where the first depression 21 is to be formed is etched to a predetermined depth. The size (planar shape) of the region where the first depression 21 is to be formed is a size obtained by adding a slight margin to the size of the semiconductor layer constituting the transistor.

  Next, as shown in FIG. 1B, a first release layer 31 is formed on the entire surface of the first substrate 11 including the first recess 21. When predetermined energy is applied to the first release layer 31 by irradiation of a laser beam or the like, the bonding force between atoms or molecules of the substance constituting the release layer disappears or decreases, so that And / or a material having a property of peeling at the interface. Specifically, a silicon nitride film or a silicon oxide film containing hydrogen atoms is preferably formed with a thickness of about 10 to 100 nanometers. By irradiation with a laser beam or the like, hydrogen atoms are released as a gas, and the above-described bonding force between molecules can be reduced. When the plasma CVD method is used, a silicon nitride film containing a large amount of the above hydrogen atoms can be formed.

  A so-called hydrogenated amorphous silicon film that is stabilized by bonding hydrogen atoms to dangling bonds is also preferable. Similarly to the silicon nitride film and the like, hydrogen atoms are released by irradiation with a laser beam and the above-described bonding between molecules is reduced, so that it can function as a peeling layer.

  Next, as shown in FIG.1 (c), the 1st liquid material 46 containing the particle | grains of the silicon | silicone which is a semiconductor is dripped in the 1st hollow 21 with the inkjet method. By dropping the first droplet 44 made of the first liquid material 46 from the first ink head nozzle 42 into the first recess 21, an arbitrary amount of the first liquid material is placed in the recess. 46 can be supplied. As the ink jet method, either a method of extruding the liquid material by volume expansion by heating the liquid material to partially vaporize or a method of extruding the liquid material by mechanical pressure using a piezo element or the like is applied. it can.

  The liquid material containing silicon particles is preferably a liquid or gel-like polysilane derivative, or a solution obtained by dissolving polysilane or a derivative thereof in a solvent. The liquid material is solidified by drying and removing the solvent by heating, or by releasing bonds between silicon atoms and hydrogen atoms constituting the polysilane. When solidifying, the volume decreases due to the release of gas, so it is necessary to determine the dropping amount in consideration of it. For example, in order to make the height after solidification the same as the upper surface of the first release layer 31 on the first substrate 11, the first liquid material starts from the edge of the first recess 21 as shown in the figure. It is necessary to add 46 so that 46 rises.

  Next, as shown in FIG. 1D, the first liquid material 46 is heated and solidified to form a layer 48 made of silicon fine particles. By heating the entire substrate at a film thickness of about 300 ° C., the solvent and the like can be removed to form an amorphous silicon layer. In the case of using a quartz substrate, a crystalline silicon layer can be obtained by heating to 600 ° C. or higher without passing through a laser light irradiation step described later.

  Next, as shown in FIG. 1E, a layer 48 made of silicon fine particles is irradiated with laser light 50 to be crystallized to obtain a polycrystalline silicon layer 52 as a semiconductor layer which is a component of the transistor. . The laser beam 50 is preferably an excimer laser, a YAG laser, or an argon laser.

  Next, as shown in FIG. 1F, the polycrystalline silicon layer 52 is thermally oxidized to form a gate insulating film 54 as a component of the transistor, thereby forming the first member 10. Oxidation is preferably WET oxidation at 800 ° C. or higher (a technique of oxidizing by introducing water vapor obtained by burning hydrogen gas in an oxidation furnace). Since the quartz substrate has high heat resistance, a gate insulating film can be formed at a high temperature. In addition, the gate insulating film can be formed at a high temperature, so that mixing of protons (hydrogen ions) can be suppressed. In addition, the said process is not limited to WET oxidation, Dry oxidation of 1100 degree | times or more can also be used.

  Next, the process of forming the second member 20 will be described with reference to FIGS. 2 (a) to 2 (d). First, as shown in FIG. 2A, the second recess 22 is formed in the second substrate 12 made of quartz as a light-transmitting material. The method for forming the second recess 22 is the same as the method for forming the first recess 21.

  Next, as shown in FIG. 2B, a second release layer 32 is formed on the entire surface of the second substrate 12 including the second depression 22. The material and formation method of the second release layer 32 are the same as those of the first release layer 31.

  Next, as shown in FIG. 2C, a second liquid material 66 in which fine particles of metal such as Al (aluminum) or Ag (silver) are dispersed in a solvent in the second recess 22 by an ink jet method. Is dripped. By dropping the second droplet 64 made of the second liquid material 66 from the second ink head nozzle 62 toward the second recess 22, an arbitrary amount of the second liquid is put into the recess. The material 66 can be supplied. The solvent is preferably an alcohol such as methanol or ethanol, or a hydrocarbon compound such as toluene or xylene.

Next, as shown in FIG. 2D, the solvent is dried and removed by heating the second liquid material 66 to form a gate electrode 68 as a component of the transistor.
As described above, the second member 20 is formed in the steps shown in FIGS.

  Next, a process of forming a transistor from the constituent elements of the transistors formed on both members by bonding the first member 10 and the second member 20 and adding another predetermined process will be described.

  First, as shown in FIG. 3A, a first adhesive layer 72 is formed on the surface of the first member 10 (the surface on the side where the polycrystalline silicon layer 52 is formed). The first adhesive layer 72 is formed by applying a liquid material in which polysilazane is dispersed in a solvent such as xylene by a spin-on method (rotary coating method). Then, the first member 10 and the second member 20 are aligned with each other so that the approximate center of the polycrystalline silicon layer 52 and the gate electrode 68 face each other, and are bonded together via the first adhesive layer 72. Since the polycrystalline silicon layer 52 (including the gate insulating film 54) and the gate electrode 68 are contained in a recess formed in the substrate, both the above members can be bonded together. And after bonding, the 1st contact bonding layer 72 is hardened by heating, and both members are couple | bonded completely.

  Next, as shown in FIG. 3B, the laser beam 70 is irradiated from the back surface of the second member 20 (the back surface of the second substrate 12), and the bonding force of the second release layer 32 disappears. Let Since the second substrate 12 is made of quartz, which is a translucent material, the laser light 70 reaches the second release layer 32 by irradiation from the back surface, and silicon atoms and hydrogen atoms contained in the release layer are formed. The bond is broken and the hydrogen atom is gasified. As a result, it is considered that bonding between silicon atoms contained in the second release layer 32 is weakened, and peeling occurs in the release layer. As a result, the second member 20 can be peeled off from the second substrate 12. Note that the wavelength of the laser light 70 is preferably selected so as to be easily absorbed by the second release layer 32.

  Next, as shown in FIG. 3C, the second substrate 12 is removed from the combined body of the first member 10 and the second member 20. As described above, since the bonding force of the second release layer 32 is lost, while the bonding force of the first adhesive layer 72 is increased by curing, the gate electrode 68 is separated from the second substrate 12. As a result, the first member 10 is joined to the first member 10 via the first adhesive layer 72. Hereinafter, this state is referred to as a third member 30.

  Next, as shown in FIG. 3D, impurity ions 80 such as phosphorus are implanted from the surface of the first substrate 11 into the polycrystalline silicon layer 52 by an I / I (ion implantation) method. Using the gate electrode 68 as a mask, a source region 74 and a drain region 76 are formed so as to sandwich the gate electrode 68. Thus, the transistor 40 is formed. In this state, the transistor 40 is a top gate type.

  Next, a process in which the top-gate transistor 40 is converted into a bottom-gate transistor using a third substrate is described. First, as shown in FIG. 4A, the second adhesive layer 82 is formed on the third member 30. Similarly to the first adhesive layer 72, a liquid material in which polysilazane is dispersed in a solvent such as xylene is applied by a spin-on method (rotary coating method). Note that the thickness of the second adhesive layer 82 is preferably larger than that of the first adhesive layer 72 so as to cover the gate electrode 68 and cancel out the step caused by the gate electrode 68.

  Next, as shown in FIG. 4B, the third substrate 13 is placed on the surface of the third member 30 (the surface on the side where the gate electrode 68 is bonded) via the second adhesive layer 82. to paste together. Since the third substrate 13 is not formed with transistor components or the like, strict alignment with the third member is not required. Since the third substrate 13 does not require high heat resistance, a normal glass substrate is sufficient instead of a quartz substrate. Furthermore, since a light-transmitting property is not required, a plastic substrate or the like can be used.

  Next, as shown in FIG. 4C, the second adhesive layer 82 is cured by heating, and the third member 30 and the third substrate 13 are completely passed through the second adhesive layer 82. Combine. Here, FIG. 4C is turned upside down for easy understanding. After the bonding, the laser beam 90 is irradiated from the back surface of the third member 30 (the back surface of the first substrate 11), and the bonding force of the first release layer 31 is lost.

  Next, as shown in FIG. 4D, the first substrate 11 is removed from the combined body of the third member 30 and the third substrate 13. The bonding strength of the first release layer 31 is lost, while the bonding strength of the second adhesive layer 82 is increased by curing and the first adhesive layer 72 is strongly bonded to the first adhesive layer 72, so that the transistor 40 is not connected to the first adhesive layer 72. It is separated from the substrate 11 and joined to the third substrate 13 via the second adhesive layer 82.

  4A to 4D, the transistor 40 that was the top gate type at the time of forming in FIG. 3D is converted to the bottom gate type.

  Finally, FIG. 5 shows an aspect in which the transistor 40 is connected to a source wiring 94 made of a conductive material and a pixel electrode 98 made of a transparent conductive material to enable image display. The source wiring 94 transmits a signal from a data line driving circuit (not shown) to the source region 74. Then, the signal is transmitted to the drain region 76 under ON / OFF control by a gate electrode 68 that is electrically connected to a scanning line driving circuit (not shown). Therefore, an arbitrary signal can be transmitted to the pixel electrode 98 connected to the drain region 76.

  An image can be displayed by arranging the transistors 40 in a matrix, and a color image can be displayed by arranging a color filter on each pixel electrode 98.

  Both the source wiring 94 and the pixel electrode 98 are preferably formed by an inkjet method. Since the source region 74 and the drain region 76 are exposed, the liquid material can be directly dropped without forming a conduction path such as a contact hole. Further, since the gate electrode 68 is buried in the second adhesive layer 82, a step due to the transistor 40 on the third substrate 13 is suppressed, and the pixel electrode 98 is formed using an inkjet method without forming a partition wall or the like. Etc. can be formed.

  Similarly to the formation of the gate electrode 68, the source wiring 94 is obtained by dropping a liquid material in which Al fine particles are dispersed in a solvent onto the third substrate 13 so that a part thereof overlaps the source region 74. It can be formed by removing by drying. Similarly, the pixel electrode 98 is made of a transparent conductive material, specifically, ITO (indium tin oxide), indium zinc oxide, or a liquid material in which fine particles such as indium, tin, and zinc are dispersed in a solvent. A portion is dropped on the third substrate 13 so as to overlap the drain region 76, and the solvent is removed by drying. Since the source wiring 94 and the pixel electrode 98 are separated and independent from each other on the third substrate 13, it is preferable to reduce the number of steps by combining the dropping step and the drying step at a time.

  As described above, in the transistor manufacturing method according to the present embodiment, the polycrystalline silicon layer 52 and the gate electrode 68, which are part of the components of the transistor, are separately formed on each of the two substrates. The substrate is attached to form a transistor. Then, after implanting impurities into the polycrystalline silicon layer 52 in the top gate mode, the pixel electrode 98 and the like are formed in the bottom gate mode. As a result, since the polycrystalline silicon layer 52 and the gate electrode 68 can be formed without considering the influence on other components, the degree of freedom in the process of forming the transistor 40 can be improved.

  Specifically, the gate insulating film 54 formed by thermal oxidation and the gate electrode 68 made of Al having a low melting point can be combined in a bottom gate mode. In addition, since the impurity is implanted by I / I in the top gate mode and then converted into the bottom gate mode, the source region is finally formed in the transistor 40 that becomes the bottom gate by a self-alignment process using the gate electrode 68 as a mask. 74 and drain region 76 can be formed.

  Further, according to the method for manufacturing a transistor according to the present embodiment, the third substrate 13 on which the transistor 40 is finally formed does not require heat resistance or the like, and an inexpensive substrate such as plastic is used. Therefore, the substrate on which the transistor 40 is arranged can be formed at low cost. Further, since the first adhesive layer 72 and the second adhesive layer 82 are silicon nitride films, the first adhesive layer 72 and the second adhesive layer 82 can be selectively etched with respect to quartz which is a material for forming the first substrate 11 and the second substrate 12. Therefore, the first substrate 11 and the second substrate 12 can be reused repeatedly by washing without removing the dimension of the depression formed in the substrate. As a result, the manufacturing cost of the transistor can be further reduced.

<Second Embodiment>
6 to 8 are schematic cross-sectional views showing a method for manufacturing a transistor according to the second embodiment. It is sectional drawing seen from the direction perpendicular | vertical with respect to the extending | stretching direction of the gate electrode (gate electrode wiring) of a transistor similarly to 1st Embodiment. Hereinafter, each step will be described.

  First, as shown in FIG. 6A, a first release layer 31 is formed on the entire surface of a first substrate 11 made of quartz as a translucent material, and a polycrystalline silicon layer 15 is formed on the upper surface of the release layer. Form. The material, formation method, and the like of the first release layer 31 are the same as those in the first embodiment, and when given energy is applied by laser beam irradiation or the like, the atoms of the substance constituting the release layer When the bonding force between or between molecules disappears or decreases, it has a property of peeling in the layer and / or at the interface. The polycrystalline silicon layer 15 is formed by a CVD method.

  Next, as shown in FIG. 6B, the polycrystalline silicon layer 15 is patterned into an island shape by photolithography. The patterned polycrystalline silicon layer 15 functions as a semiconductor layer which is a component of a transistor to be formed in the future. Therefore, patterning is performed so as to obtain a shape suitable for the function.

  Next, as shown in FIG. 6C, the polycrystalline silicon layer 15 is thermally oxidized to form a gate insulating film 55 as a component of the transistor on the surface of the polycrystalline silicon layer. Oxidation is performed by WET oxidation at 800 ° C. or higher or dry oxidation at a higher temperature than in the first embodiment. By this method, mixing of impurities such as protons is suppressed as much as possible, and a high quality gate insulating film 55 is obtained. The first member 35 is formed through the steps so far.

  Next, as shown in FIG. 6D, a first adhesive layer 72 is formed on the entire surface of the first substrate 11. The material and forming method of the first adhesive layer 72 are the same as those in the first embodiment. However, the adhesive layer is formed slightly thick so that the step formed in the polycrystalline silicon layer 15 and the gate insulating film 55 is canceled and the upper surface of the first adhesive layer 72 is flattened.

  Next, as shown in FIG. 6 (e), the second member 20 used in the first embodiment for the first member 35, that is, the second substrate 12 with the second release layer 32 interposed therebetween. A member (see FIG. 2D) in which the gate electrode 68 made of Al is embedded is bonded. The alignment is performed so that the gate electrode 68 is opposed to the approximate center of the polycrystalline silicon layer 15 as in the first embodiment. As described above, since the first adhesive layer 72 is formed so that the upper surface is flat, both members can be surface-bonded. And after bonding together, the 1st contact bonding layer 72 is heated and hardened, and both the bonded members are completely joined.

  Next, as shown in FIG. 7A, the bonding force of the second release layer 32 is lost by irradiating the laser beam 70 from the back surface side of the second member 20.

  Next, as shown in FIG. 7B, the second substrate 12 is removed while maintaining the bonding between the gate electrode 68 and the first adhesive layer 72. The gate electrode 68 is joined to the first member 35 via the first adhesive layer 72. Hereinafter, this state is referred to as a third member 36.

  Next, as shown in FIG. 7C, impurity ions 80 such as phosphorus are implanted from the surface of the first substrate 11 into the polycrystalline silicon layer 15 by an I / I (ion implantation) method. Region 76 is formed. Thus, the transistor 41 is formed. At this stage, since the transistor 41 is a top gate type, the gate electrode 68 functions as a mask, and the polycrystalline silicon layer 15 can be divided into a region where impurities are implanted and a region where impurities are not implanted.

  Next, as shown in FIG. 7D, a second adhesive layer 82 is formed on the entire surface of the first adhesive layer 72 and the gate electrode 68. The material and forming method of the second adhesive layer 82 are the same as those for forming the first adhesive layer 72. The thickness of the adhesive layer is set such that the step formed in the gate electrode 68 is canceled and the upper surface of the formed second adhesive layer 82 is flattened.

  Next, as shown in FIG. 8A, the third substrate 13 is bonded to the second adhesive layer 82. After the bonding, the second adhesive layer 82 is heated and cured.

  Next, as shown in FIG. 8B, the bonding force of the first release layer 31 is lost by irradiating laser light 90 from the back surface of the first substrate 11. Here, in FIG. 8B, the upper and lower sides are inverted for easy understanding.

  Next, as shown in FIG. 8C, the first substrate 11 is removed. A source region 74 and a drain region 76 formed by I / I are exposed in the polycrystalline silicon layer 15 to form a bottom gate type transistor 41. Since no depression is formed in the first substrate 11, unlike the first embodiment, the polycrystalline silicon layer 15 is embedded in the first adhesive layer 72.

  Finally, as shown in FIG. 8D, the source wiring 94 and the pixel electrode 98 are formed to enable image display. The material of both of the above elements is the same as that of the first embodiment, and the forming method is also the ink jet method.

  According to the method of manufacturing a transistor according to the present embodiment, the source region 74 and the drain region 76 are embedded in the first adhesive layer 72 so that the surface on which the source wiring 94 and the pixel electrode 98 are formed is flat. Can do. As a result, pattern formation by the ink jet method becomes easier, and a higher definition pattern can be formed without using a partition wall.

1 is a schematic cross-sectional view showing a method for manufacturing a transistor according to a first embodiment. 1 is a schematic cross-sectional view showing a method for manufacturing a transistor according to a first embodiment. 1 is a schematic cross-sectional view showing a method for manufacturing a transistor according to a first embodiment. 1 is a schematic cross-sectional view showing a method for manufacturing a transistor according to a first embodiment. 1 is a schematic cross-sectional view showing a method for manufacturing a transistor according to a first embodiment. FIG. 6 is a schematic cross-sectional view illustrating a method for manufacturing a transistor according to a second embodiment. FIG. 6 is a schematic cross-sectional view illustrating a method for manufacturing a transistor according to a second embodiment. FIG. 6 is a schematic cross-sectional view illustrating a method for manufacturing a transistor according to a second embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... 1st member, 11 ... 1st board | substrate, 12 ... 2nd board | substrate, 13 ... 3rd board | substrate, 15 ... Polycrystalline silicon layer, 20 ... 2nd member, 21 ... 1st hollow, 22 2nd depression, 30 ... 3rd member, 31 ... 1st peeling layer, 32 ... 2nd peeling layer, 35 ... 1st member, 36 ... 3rd member, 40 ... transistor, 41 ... transistor 42 ... first ink head nozzle, 44 ... first droplet, 46 ... first liquid material, 48 ... layer made of silicon fine particles, 50 ... laser light, 52 ... polycrystalline silicon layer, 54 ... gate Insulating film, 55 ... Gate insulating film, 62 ... Second ink jet head, 64 ... Second droplet, 66 ... Second liquid material, 68 ... Gate electrode, 70 ... Laser beam, 72 ... First adhesive layer 74 ... Source region, 76 ... Drain region, 80 ... Impurity ions, 82 ... Second adhesive layer 90 ... laser beam 94 ... source wiring, 98 ... pixel electrode.

Claims (8)

Forming a first portion of a component of the electronic device in a first recess of the first substrate and a second portion of the component of the electronic device in a second recess of the second substrate;
Bonding the surface of the component of the first substrate on which the first portion is formed and the surface of the component of the second substrate on which the second portion is formed. A method for manufacturing an electronic device. Forming a part of a component of a transistor including at least a gate electrode on a first substrate;
Forming a part of a component of a transistor including at least a semiconductor layer on a second substrate;
Forming a gate insulating film by oxidizing a part of the semiconductor layer;
Bonding the first substrate and the second substrate so that the gate electrode and the gate insulating film face each other;
Separating at least one of the first substrate and the second substrate from the components of the transistors formed on the substrate;
A method for manufacturing a transistor comprising: Forming a first depression in a first substrate;
Forming a part of a component of a transistor including at least a gate electrode in the first depression so as to fit in the first depression;
Forming a second depression in the second substrate;
Forming a part of a component of a transistor including at least a semiconductor layer in the second depression so as to be accommodated in the second depression;
Forming a gate insulating film by oxidizing a part of the semiconductor layer;
Forming an adhesive layer on at least one of a part of the first substrate and a part of the second substrate;
Bonding the first substrate and the second substrate through the adhesive layer such that the gate electrode and the gate insulating film face each other;
Separating at least one of the first substrate and the second substrate from the components of the transistors formed on the substrate;
A method for manufacturing a transistor comprising:   At least one of the first substrate and the second substrate uses a substrate made of a light-transmitting material, and has a property of peeling by applying predetermined energy to the surface of the substrate made of the light-transmitting material. 4. The method of manufacturing a transistor according to claim 2, further comprising a step of forming a layer. Forming a first depression in a first substrate made of a translucent material;
Forming a first release layer having a property of being peeled off by applying predetermined energy to a part of the first substrate including the inside of the first depression;
Forming a part of a component of a transistor including at least a gate electrode in the first release layer located in the first depression so as to be accommodated in the first depression;
Forming a second depression in a second substrate made of a translucent material;
Forming a second release layer having a property of being peeled off by applying predetermined energy to a part of the second substrate including the inside of the second depression;
Forming a part of a component of a transistor including at least a semiconductor layer in the second peeling layer located in the second depression so as to be accommodated in the second depression;
Oxidizing the surface of the semiconductor layer to form a gate insulating film;
Forming a first adhesive layer on at least one of a part of the first substrate and a part of the second substrate;
Bonding the first substrate and the second substrate through the first adhesive layer so that the gate electrode and the gate insulating film face each other;
Irradiating the first substrate with a predetermined energy beam, applying predetermined energy to the first peeling layer to separate the first substrate, removing the first substrate, and exposing the gate electrode;
Implanting impurity ions into the semiconductor layer using the gate electrode as a mask to form a source region and a drain region;
Forming a second adhesive layer covering the gate electrode, and bonding a third substrate through the second adhesive layer;
Irradiating the second substrate with a predetermined energy beam, applying a predetermined energy to the second release layer to separate the second substrate, removing the second substrate, and exposing the source and drain regions. When,
A method for manufacturing a transistor comprising:   The method for manufacturing a transistor according to claim 4, wherein the release layer is made of a material that can be selectively etched with respect to a substrate on which the release layer is formed.   The method for manufacturing a transistor according to claim 3, wherein the step of forming a part of the constituent elements of the transistor is a step of forming by curing a liquid material.   A display device comprising the transistor manufactured by the manufacturing method according to claim 2.

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