JP4940402B2 - Method for manufacturing thin film device - Google Patents

Description

  The present invention relates to a method for manufacturing a thin film device using an inter-substrate transfer technique for a thin film device.

Related technology

  In semiconductor application devices such as liquid crystal display devices (LCD) and electroluminescence (EL) display devices, a plastic substrate is used as a base substrate for reasons such as prevention of breakage due to deformation and dropping, flexibility, and weight reduction. Sometimes it is desirable. However, since a plastic substrate does not have heat resistance to a high temperature process required for manufacturing a semiconductor device, a semiconductor device cannot be formed on the plastic substrate by a normal semiconductor manufacturing process.

Conventionally, as a technique for forming a semiconductor device on a plastic substrate, after forming a thin film semiconductor device on a heat-resistant manufacturer's substrate, an element formation layer (transfer target layer) on which the thin film semiconductor device is formed from the substrate is formed. There has been a transfer technique for manufacturing a semiconductor application device by peeling and attaching this to a plastic substrate as a transfer destination substrate. These transfer techniques are described in detail, for example, as “peeling method” in JP-A-10-125929, JP-A-10-125930, and JP-A-10-125931.
Japanese Patent Laid-Open No. 10-125929 Japanese Patent Laid-Open No. 10-125930 Japanese Patent Laid-Open No. 10-125931

  However, in the thin film device manufactured using the above transfer technology, the element forming layer is relatively inverted and transferred in a state where it is transferred once from the manufacturer substrate to the transfer destination substrate. The original upper surface is in close contact with the transfer destination substrate, and external wiring cannot be connected to the element formation layer as it is. For this reason, it was necessary to form a wiring electrically connected to the thin film device in the element formation layer by removing the release layer after transfer to the transfer destination substrate and then forming and patterning the metal layer again.

  Further, the release layer is a temporary material that is completely removed after the transfer, and there is a problem that the material cost is wasted and waste materials are increased, which is not preferable for environmental protection.

  Therefore, an object of the present invention is to provide a method of manufacturing a thin film device that can be transferred once and can simplify the wiring process to the thin film device while reducing waste of materials.

  In order to solve the above problems, a method of manufacturing a thin film device of the present invention includes a step of forming a release layer on a transfer source substrate having a property of peeling by applying predetermined energy and exhibiting conductivity, A step of forming a transfer layer including a thin film device on the release layer, a step of bonding a transfer destination substrate to one surface of the transfer layer via an adhesive layer, and a transfer source substrate by applying energy to the release layer A separation layer is formed between the substrate and the release layer, and the layer to be transferred is transferred to the transfer destination substrate together with the release layer, and the release layer transferred and exposed to the transfer destination substrate is patterned to electrically connect with the thin film device. And a step of forming a connected wiring layer.

  According to the above process, after the release layer is kept electrically conductive and transferred to the transfer destination substrate only once, a part of the release layer is electrically connected to the thin film device instead of removing all of the release layer. Therefore, the peeling layer itself can be used as a wiring layer for the thin film device. For this reason, the process for forming a wiring layer separately can be deleted, and the amount of the release layer to be discarded can be reduced.

  In the present invention, the transfer destination substrate is not limited to a plastic substrate, and various substrates such as glass and ceramic can be used.

  Here, for example, the transferred layer includes a step of forming a base layer on the release layer, a step of providing a through hole in the base layer, a step of providing a conductive material in the through hole provided in the base layer, Forming the thin film device so that the connection point of the thin film device is positioned on the through hole provided in the substrate. Through such a process, since the electrical connection with the thin film device is already obtained when the release layer is peeled off, the release layer can be used as a wiring layer only by patterning.

  Here, for example, the thin film device includes one or more of a wiring film, an electrode, and a semiconductor device. This is because these are considered to be included in the transferred layer and require electrical connection to the outside of the substrate.

  For example, the conductive release layer preferably includes metal fine particles. According to the metal fine particles, it is possible to easily impart conductivity to the entire peeling layer regardless of the conductivity of the main material of the peeling layer, and it is also possible to improve the conductivity by subsequent heat treatment or the like. It is.

  The release layer is preferably formed of a material that loses or reduces the bonding force between atoms or molecules when irradiated with light. This is because, if it has such properties, the physical bonding force can be easily eliminated or reduced by light irradiation, and the peeling operation can be simplified.

  Such a material preferably contains amorphous silicon. This is because amorphous silicon has the above characteristics and is easily peeled off from the transfer source substrate.

  In the case where amorphous silicon is used as the peeling layer, an impurity for amorphous silicon may be included. This is because amorphous silicon easily exhibits conductivity by adding impurities as a semiconductor material, and thus can have both characteristics of easy peeling and retention of conductivity.

  The present invention is also an electronic apparatus including such an electro-optical device. “Electronic device” refers to a general device that exhibits a certain function by a combination of a plurality of elements or circuits, and includes, for example, an electro-optical device and a memory. Although there is no particular limitation on the configuration, for example, a television device including the electro-optical device, a roll-up television device, a personal computer, a mobile phone, a video camera, a head-mounted display, a rear-type or front-type projector, Examples include a fax machine with a display function, a finder for a digital camera, a portable TV, a DSP device, a PDA, an electronic notebook, an electric bulletin board, an IC card, and a display for advertisement.

  Next, the best mode for carrying out the present invention will be described with reference to the drawings. The following embodiments are merely examples of the present invention and do not limit the scope of the present invention.

The present embodiment relates to a case where a thin film transistor is manufactured as a thin film device. The manufacturing method of the thin film device in the present embodiment basically includes the following steps.
1) A step of forming on a transfer source substrate a release layer having a property of peeling by applying predetermined energy and exhibiting conductivity;
2) forming a transfer layer including a thin film device on the release layer;
3) A step of bonding the transfer destination substrate to one surface of the transferred layer via an adhesive layer;
4) A step of applying energy to the peeling layer to cause peeling between the transfer source substrate and the peeling layer, and transferring the transfer layer together with the peeling layer to the transfer destination substrate; and 5) being transferred to the transfer destination substrate. A step of patterning the exposed release layer to form a wiring layer electrically connected to the thin film device.

  According to the above process, after the release layer is kept electrically conductive and transferred to the transfer destination substrate only once, a part of the release layer is electrically connected to the thin film device instead of removing all of the release layer. Therefore, the peeling layer itself can be used as a wiring layer for the thin film device. For this reason, the process for forming a wiring layer separately can be deleted, and the amount of the release layer to be discarded can be reduced.

  2 and 3 are cross-sectional views of manufacturing steps for explaining the method of manufacturing the thin film device according to this embodiment. FIG. 2 is a diagram showing from the release layer forming step to the transferred layer forming step, and FIG. 3 is a diagram showing from the joining step to the wiring layer forming step. These drawings schematically show a manufacturing process for two thin film transistors, and are enlarged sectional views of a transistor region. Each process will be described in detail below.

<1: Release layer forming step>
As shown in FIG. 2A, a release layer 102 is formed on the transfer source substrate 100. As the transfer source substrate (manufacturer substrate) 100, a substrate that can sufficiently withstand a high-temperature process for manufacturing a thin film transistor, for example, a quartz glass party translucent heat-resistant substrate that can withstand about 1000 ° C. is used. For the transfer source substrate 100, heat resistant glass such as soda glass, Corning 7059, and Nippon Electric Glass OA-2 can be used in addition to quartz glass. The thickness of the transfer source substrate 100 is not used for the final product, and thus there is no major limiting factor, but it is preferably about 0.1 mm to 0.5 mm, more preferably 0.5 mm to 1.5 mm. preferable. If the thickness of the transfer source substrate is too thin, the strength is reduced. Conversely, if the transfer source substrate is too thick, the irradiation light is attenuated when the transmittance of the transfer source substrate is low. However, when the transmittance of the irradiation light of the transfer source substrate is high, the thickness can be increased beyond the upper limit.

  The peeling layer 102 is related to the present invention and has a property of peeling when given energy is applied and needs to exhibit conductivity. The property of peeling is a property of causing peeling (also referred to as “in-layer peeling” or “interface peeling”) in the layer or at the interface by irradiation light such as laser light. That is, by irradiating with a certain intensity of light, the interatomic or intermolecular bonding force in the atoms or molecules of the material constituting the peeling layer 102 disappears or decreases, causing ablation and the like. It is what happens. In addition, gas may be released from the release layer 102 by light irradiation, leading to separation. There are a case where the component contained in the release layer 102 is released as a gas and results in separation, and a case where the release layer 102 absorbs light and becomes a gas, and the vapor is emitted and results in separation.

  As a composition suitable for the release layer 102 having such characteristics, for example, amorphous (amorphous) silicon (a-Si) can be used. This amorphous silicon may contain hydrogen (H). The hydrogen content is preferably about 2 at% or more, and more preferably 2 to 20 at%. When hydrogen is contained, hydrogen is released by light irradiation to generate an internal pressure in the peeling layer 102, which promotes peeling. The content of hydrogen is set appropriately according to film forming conditions, for example, when using the CVD method, such as gas composition, gas pressure, gas atmosphere, gas flow rate, gas temperature, substrate temperature, and light power to be input. To make adjustments.

  The thickness of the release layer 102 is preferably about 1 nm to 20 μm, more preferably about 10 nm to 2 μm, and further preferably about 40 nm to 1 μm. This is because if the thickness of the release layer 102 is too thin, the uniformity of the formed film thickness is lost and unevenness occurs in the release. Further, if the thickness of the release layer 102 is too thick, it is necessary to increase the power (light quantity) of irradiation light required for the release, and it takes time to pattern the release layer 102 after the release. Because.

  The formation method of the peeling layer 102 should just be a method which can form a peeling layer with uniform thickness, and can be suitably selected according to various conditions, such as a composition and thickness of the peeling layer 102. FIG. For example, various vapor deposition methods such as CVD (including MOCCVD, low pressure CVD, ECR-CVD), vapor deposition, molecular beam vapor deposition (MB), sputtering, ion plating, PVD, electroplating, immersion plating ( Dipping), various plating methods such as electroless plating method, Langmuir-Blodget (LB) method, coating method such as spin coating, spray coating method, roll coating method, various printing methods, transfer method, inkjet method, powder jet method Applicable to etc. Of these, two or more methods may be combined.

  In particular, when the composition of the release layer 102 is amorphous silicon (a-Si), it is preferable to form the film by CVD, particularly low-pressure CVD or plasma CVD. Further, when the release layer 102 is formed by using a ceramic by a sol-gel method or is made of an organic polymer material, it is preferably formed by a coating method, particularly by spin coating.

  The present embodiment is characterized in that the release layer 102 contains metal fine particles. As the metal fine particles, fine particles such as silver can be used. There is no particular limitation on the particle size of the metal fine particles. The density of the metal fine particles is set so that sufficient conductivity can be imparted. If the density is higher than this range, the conductivity can be secured, but the function as a release layer is affected. If the density is lower than this range, the conductivity cannot be secured sufficiently.

  As described above, the release layer 102 of this embodiment is amorphous silicon and does not have electrical conductivity by itself. However, by including metal fine particles, the entire release layer can be easily provided with conductivity. The conductivity can be improved by a subsequent heat treatment or the like.

  Note that when amorphous silicon is used as the separation layer 102, conductivity can be imparted to the amorphous silicon by introducing impurities in addition to including metal fine particles. For example, by introducing an impurity for making the semiconductor film N-type or P-type into the separation layer 102 in advance or after separation, the semiconductor film exhibits conductivity and functions as a wiring layer.

<2: Transferred layer forming step>
2B to 2F show a process for forming the transferred layer 110.

  The thickness of the foundation layer 104 is appropriately determined according to the purpose of formation. Usually, the thickness is preferably about 10 nm to 5 μm, and more preferably about 40 nm to 1 μm. This is because if the underlayer is too thin, the functions of the protective layer and the like cannot be achieved, and if the underlayer is too thick, the entire film becomes thick.

  As a method for forming the base layer 104, various methods described for the separation layer 102 can be used. Note that the underlayer can be formed as a single layer, or two or more layers using a plurality of materials having the same or different compositions.

  As shown in FIG. 2C, the base layer 104 is further provided with a through hole 112. The through-hole 112 is provided at a position where the source 103s and the drain 103d are provided in later semiconductor thin film formation. This is because by forming the through hole 112 in such a position in advance, electrical connection can be easily made after one transfer. The through hole 112 can be formed by applying a method for providing a through hole or a via in a normal insulating film.

  Note that the through-hole 112 may be provided when electrical continuity needs to be obtained from the peeling layer 102 after one transfer. This is because, in the present embodiment, the wiring layers 107s and 107d are separately provided in the upper layer, so that it is not necessary to provide a through hole until only the wiring layer is sufficient. When a metal material is used for the base layer 104, a wiring layer is formed together with the peeling layer 102 in subsequent patterning, so that formation of a through hole or the like is unnecessary.

  As shown in FIG. 2D, after the through hole 112 is formed, the conductive material 114 is filled into the through hole. The conductive material 114 may be any material that is conductive and can be easily filled into the through hole 112. For example, aluminum, copper, gold, nickel, tantalum, silver, or the like can be used.

  As shown in FIG. 2E, when the through hole 112 is filled with the conductive material 114, the connection point of the thin film device, that is, the source 103s and / or the drain 103d of the thin film transistors T1 and T2 are formed on the through hole 112. The semiconductor film 103 is formed so as to be positioned. The semiconductor film 103 may be formed using a known semiconductor thin film formation technique. For example, a silicon film is formed by depositing silicon on the base layer 104 in which the through holes 112 are formed by a CVD method. Next, the semiconductor film 103 is formed by patterning the silicon film into the shape of the transistor region of the thin film transistor.

  As shown in FIG. 2F, after the semiconductor film 103 is formed, a thin film transistor is formed using the semiconductor film 103 as a transistor region. First, the gate insulating film 106 is formed by depositing silicon by a CVD method and oxidizing it, or by directly depositing silicon oxide or the like. Next, ion implantation for the channel 103 c is performed on the semiconductor film 103. Next, a gate electrode 105 is formed by depositing a metal film such as tantalum, or depositing polysilicon in which impurities are diffused at a high concentration by a CVD method, and performing patterning. Next, high concentration impurity implantation is performed on the source 103s and drain 103d regions of the semiconductor film 103 using the gate electrode 105 as a mask, thereby forming the source 103s and drain 103d in a self-aligning manner. Next, a heat treatment for impurity activation is performed, and a silicon oxide film is deposited by a CVD method, whereby an interlayer insulating film 108 is formed. Contact holes reaching the source 103 s and the drain 103 d are provided in the interlayer insulating film 108. Then, polysilicon layers implanted with impurities at a high concentration are deposited by CVD or metal films are deposited by sputtering, thereby patterning them to form wiring layers 107s and 107d.

  As shown in FIG. 2F, a transfer layer (element forming layer) 110 including the thin film transistors T1 and T2 as a thin film device is thus formed. The method for forming the thin film transistor is not limited to the above, and a known thin film semiconductor manufacturing technique can be applied. Examples of the thin film device that can be included in the transfer layer 110 include passive components such as a pixel electrode, a connection pad, a resistor, and a capacitor in addition to a thin film transistor.

  In the above embodiment, the transferred layer 110 is a thin film including a thin film device. However, the transferred layer is not limited to a thin film, and may be a thick film such as a coating film or a sheet.

<3: Joining process>
As shown in FIG. 3A, when the transferred layer 110 including the thin film transistors T1 and T2 is formed, the adhesive layer 120 is formed by applying an adhesive onto the transferred layer by spin coating or the like. The transfer substrate 5 is placed on the adhesive layer 120 and bonded.

  As the adhesive, for example, various curable adhesives such as a reactive curable adhesive, a thermosetting adhesive, a photocurable adhesive, and an anaerobic curable adhesive can be used. The composition is appropriately selected from epoxy, acrylate, silicone and the like.

  The transfer destination substrate 122 is used as a permanent substrate, and can be used even if it has relatively poor heat resistance and corrosion resistance as one of the effects of the transfer technique of the present invention. Moreover, it may have low rigidity, flexibility, and elasticity. Examples of such materials include various synthetic resins and various glass agents. The synthetic resin may be either a thermoplastic resin or a thermal effect resin. For example, other resins such as polyethylene, polypropylene, and ethylene-propylene copolymer are applicable. As the glass material, for example, quartz glass, alkali silicate glass, soda lime glass, and others can be used.

  As the transfer destination substrate 122, in addition to a substrate made of a single material, for example, a liquid crystal cell constituting an independent device itself, for example, a color filter, an electrode layer, a dielectric layer, You may use the member which comprises a part of device like an insulating layer and a semiconductor element.

<4: Peeling process>
As shown in FIGS. 3B and 3C, after joining the transfer destination substrate 122, energy is applied to the release layer 102 to cause peeling between the transfer source substrate 100 and the release layer 102, The transferred layer 110 is transferred to the transfer destination substrate 122 together with the release layer 102.

It is preferable to apply energy by applying laser light. Any laser beam may be used as long as it causes in-layer peeling and / or interfacial peeling in the peeling layer 102. In particular, an excimer laser outputs high energy in a short wavelength region, so that it can be performed in a very short time. This is preferable because ablation can be caused in the release layer. Energy density of the laser beam in the case of excimer lasers, it is preferable to be 10~5000mJ / cm ² or so, and more preferably, especially 100~5299mJ / cm ² approximately. It is preferably about 1 to 1000 nsec, and more preferably about 10 to 100 nsec. If the energy density is low or the irradiation time is short, sufficient ablation does not occur. If the energy density is high or the irradiation time is long, the semiconductor film 103 is adversely affected by the irradiation light transmitted through the peeling layer 102 and the base layer 104. Sometimes.

  As shown in FIG. 3B, it is preferable to irradiate the laser beam so that its intensity is uniform. The light irradiation direction is not limited to the direction perpendicular to the release layer, and may be a direction inclined by a predetermined angle with respect to the release layer. In addition, when the area of the release layer is larger than the irradiation area of one irradiation light, the entire area of the release layer may be irradiated with light in a plurality of times. Moreover, you may irradiate the same location several times. Moreover, you may irradiate the same area | region or a different area | region several times with the light of a different kind and a different wavelength (wavelength range).

  As shown in FIG. 3C, the bonding of atoms and molecules in the peeling layer 102 is weakened by the laser light irradiation and the like, peeling occurs at the interface between the peeling layer 102 and the transfer source substrate 100, and the peeling layer 102 Is peeled off together with the transfer destination substrate 122. The element forming layer as the transfer layer 110 is transferred to the transfer destination substrate 122.

<5: Wiring layer forming step>
As shown in FIG. 3D, when the transfer source substrate 100 and the peeling layer 102 are peeled off, the peeling layer 102 transferred and exposed to the transfer destination substrate 122 is patterned and electrically connected to the thin film transistor. Wiring layers 102a to 102d are formed.

  That is, since the peeling layer 102 is already conductive, the peeling layer 102 is patterned so as to include the through holes 112 provided corresponding to the source 103s and the drain 103d of each thin film transistor T1 or T2. By separating, each separated separation layer can function as the wiring layers 102a to 102d. For patterning, dropping of an etching solution by photolithography or an inkjet method, laser etching, or the like can be applied. The wiring layers 102a to 102d can be arbitrarily patterned according to the purpose. This wiring layer 102a can be connected to a pixel electrode or the like.

  Note that in the case where a metal material is used for the base layer 104, the base layer 104 is patterned into a similar wiring shape simultaneously with the peeling layer 102.

  FIG. 1 shows a layer structure of a thin film device formed by the method for manufacturing a thin film device of the present embodiment. FIG. 1 shows a state in which the thin film transistors T 1 and T 2 are further connected to the base substrate 200.

  As shown in FIG. 1, a transfer layer 110 including thin film transistors T1 and T2 electrically connected to the wiring layers 102a to 102d, an adhesive layer 120, and a transfer destination substrate 122 are formed on a base substrate 200. ing. The transfer layer 110 includes a base layer 104, a semiconductor film 103 including a source 103s and a drain 103d doped with impurities, a gate insulating film 106, a gate electrode 105, an interlayer insulating film 108, a wiring layer 107, and the like. The base substrate 200 is provided with vias 201a to 201d for providing conduction on both sides corresponding to the positions of the wiring layers 102a to 102d.

  Thus, a connection terminal with a thin film transistor can be provided by using the base substrate 200. If the base substrate 200 is provided with pixel electrodes of a liquid crystal display device, an electroluminescence device, or an electrophoretic device according to the application, it is easy to connect the base substrate 200 and the wiring layers 102a to 102d after one transfer. A connection to the pixel electrode can be provided. Note that in addition to the pixel electrode, a connection terminal, a wiring, another thin film transistor, or the like may be connected. Further, the wiring layers 102a to 102d may be electrically connected by another method without providing the base substrate.

  FIG. 4 shows a circuit diagram of the electro-optical device 1 including an active matrix substrate manufactured by using the manufacturing method of the thin film device. The electro-optical device 1 is manufactured by forming an active matrix driving type active matrix substrate with thin film transistors T1 and T2 on a transfer destination substrate 122 and connecting peripheral circuits by the above manufacturing method.

  As shown in FIG. 4, the electro-optical device 1 includes each pixel G including an organic electroluminescent element OLED and a capacitor C electrically connected from the thin film transistors T1 to T4 and the wiring layers 102a to 102d. These are connected in a matrix by scanning lines Vgp and row selection lines Vsel wired in the row direction, power supply lines Vdd and data lines Idata wired in the column direction. The scanning driver 2 supplies a scanning control signal to the scanning line Vgp and a row selection signal to the row selection line Vsel. From the current driver 3, a power supply voltage is supplied to the power supply line Vdd, and a data signal is supplied to the data line Idata.

  In the electro-optical device 1, when both the scanning line Vgp and the data line Idata are selected, a current from the power supply line Vdd flows through the organic electroluminescent element OLED.

  FIG. 5A and FIG. 5B show examples of electronic apparatuses including the electro-optical device as shown in FIG. FIG. 5A is an example applied to the television apparatus 300, and the electronic apparatus includes the electro-optical device 1 according to the present invention. FIG. 5B shows a roll-up television device 310 including the electro-optical device 1 according to the present invention.

  Note that the structures of the electro-optical device and the electronic apparatus are merely examples, and can be widely applied to devices using a thin film device that is transferred and manufactured by the method of manufacturing a thin film device of the present invention.

  The method for manufacturing a thin film device according to the present invention is not limited to the above-described embodiment, and can be used with various modifications. For example, as a thin film device, not only a thin film transistor but also a wiring and an electrode can be included.

  Further, the electro-optical device is not limited to an electroluminescent device, but is not limited to the form of an element related to display, such as a liquid crystal display device, an electrophoretic device, and an electron-emitting device, and can be applied in various ways.

  Further, the electronic device is not limited to the above-described configuration. For example, a personal computer, a mobile phone, a video camera, a head-mounted display, a rear-type or front-type projector, a fax machine with a display function, a digital camera finder, a mobile phone The present invention can be applied to a type TV, a DSP device, a PDA, an electronic notebook, an electric bulletin board, an IC card, an advertisement display, and the like.

Sectional drawing of the thin film apparatus manufactured with the manufacturing method of the thin film apparatus in this embodiment It is a manufacturing process sectional drawing of the thin film device in this embodiment, and is a figure which shows from a peeling layer formation process to a to-be-transferred layer formation process It is a manufacturing process sectional drawing of the thin film device in this embodiment, and is a figure which shows from a joining process to a wiring layer formation process Circuit diagram of electro-optical device Application examples of electronic devices

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Electro-optical device, 2 Scan driver, 3 Current driver, 100 Transfer origin (manufacturer) board | substrate, 102 peeling layer, 102a-d wiring layer, 103 semiconductor film, 103c channel, 103s source, 103d drain, 104 underlayer, 105 gate Electrode, 106 gate insulating film, 107s / 107d wiring layer, 108 interlayer insulating film, 110 transferred layer (element forming layer), 112 through hole, 114 conductive material, 120 adhesive layer, 122 transfer destination substrate (permanent substrate), 200 Base substrate, 201a to d via

Claims (8)

A step of forming a release layer on the transfer source substrate having a property of peeling by applying predetermined energy and exhibiting conductivity;
Forming a transfer layer including a thin film device on the release layer;
Bonding the transfer destination substrate to the one surface of the transferred layer via an adhesive layer;
Applying the energy to the release layer to cause release between the transfer source substrate and the release layer, and transferring the transfer layer together with the release layer to the transfer destination substrate;
Forming a wiring layer electrically connected to the thin film device by patterning the peeling layer transferred and exposed to the transfer destination substrate. The transferred layer is
Forming an underlayer on the release layer;
Providing a through hole in the underlayer;
Providing a conductive material in the through hole provided in the base layer;
The thin film device manufacturing method according to claim 1, wherein the thin film device is formed such that a connection point of the thin film device is positioned on the through hole provided in the base layer.   The method of manufacturing a thin film device according to claim 1, wherein the thin film device includes one or more of a wiring film, an electrode, and a semiconductor device.   The method of manufacturing a thin film device according to claim 1, wherein the release layer includes metal fine particles.   5. The method for manufacturing a thin film device according to claim 1, wherein the release layer is formed of a material that loses or reduces the bonding force between atoms or molecules when irradiated with light.   The method of manufacturing a thin film device according to claim 5, wherein the release layer includes amorphous silicon.   The method of manufacturing a thin film device according to claim 6, wherein the release layer is configured to include an impurity with respect to the amorphous silicon.   The method for manufacturing a thin film device according to claim 1, wherein the adhesive layer is a permanent adhesive.

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