JP2008192764A - Method of manufacturing photoelectric conversion element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method which can achieve a high conversion efficiency, especially, in a hetero-junction photoelectric conversion element. <P>SOLUTION: The method of manufacturing the photoelectric conversion element comprises a crystal semiconductor substrate 10 having a first conductivity type, first intrinsic semiconductor layer 11 formed on the light receiving surface of the crystal semiconductor substrate 10, opposite conductivity type semiconductor layer 14 which is formed on the first intrinsic semiconductor layer 11 and has a conductivity type opposite to that of the crystal semiconductor substrate 10, second intrinsic semiconductor layer 12 formed on the non-light receiving surface of the crystal semiconductor substrate 10, and first conductivity type semiconductor layer 13 formed on the second intrinsic semiconductor layer 12. The method of manufacturing the photoelectric conversion element includes processes of: forming the first intrinsic semiconductor layer 11 on the light receiving surface of the crystal semiconductor substrate 10; and forming the second intrinsic semiconductor layer 12 on the non-light receiving surface of the crystal semiconductor substrate 10. These processes are performed continuously. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a photoelectric conversion element.

  A conventional method for manufacturing a photoelectric conversion element will be described by taking the photoelectric conversion element shown in FIG. 1 as an example.

  In FIG. 1, 1 is an n-type single crystal silicon substrate, 2 is an i-type amorphous layer, 3 is a p-type amorphous layer, 4 is an i-type amorphous layer, 5 is an n-type amorphous layer, 6 Is a light receiving surface side transparent conductive layer, 7 is a back surface side transparent conductive layer, 8 is a light receiving surface side extraction electrode, and 9 is a back surface side extraction electrode.

  Such a photoelectric conversion element was formed in the following order (for example, refer patent document 1 etc.).

First, an i-type amorphous layer 2 is formed on one main surface of an n-type single crystal silicon substrate 1 by a plasma CVD method or the like, and further, plasma using a diborane (B ₂ H ₆ ) gas as a doping source. A p-type amorphous layer 3 is formed by the CVD method.

  Next, an i-type amorphous layer 4 is formed on the other main surface of the n-type single crystal silicon substrate 1, and an n-type amorphous layer 5 is further formed thereon.

  Next, the light-receiving surface side transparent conductive layer 6 and the back surface side transparent conductive layer 7 made of ITO or the like are formed by sputtering or the like.

Then, a light receiving surface side extraction electrode 8 is formed on the light receiving surface side transparent conductive layer 6, and a back surface side extraction electrode 9 is formed on the back surface side transparent conductive layer 7.
Japanese Patent No. 3653379

  However, according to the above-described conventional technology, there are the following problems in achieving high efficiency of the solar cell.

  That is, in the conventional manufacturing method described above, as the formation order of the amorphous layers, i on the nn + junction side (n-type single crystal silicon substrate 1, i-type amorphous layer 4, n-type amorphous layer 5) is formed. The type amorphous layer 4 is an i type amorphous layer 2 or p type amorphous on the pn junction side (n type single crystal silicon substrate 1, i type amorphous layer 2, p type amorphous layer 3). Since the layer 3 is formed next to the layer 3, natural oxidation of the substrate surface on the nn + junction side progresses in the process of forming another layer, and surface contamination due to impurity adsorption from the atmosphere occurs. There was a problem that an interface having a low surface recombination velocity could not be obtained.

Further, since the p-type amorphous layer 3 is formed by the plasma CVD method using diborane (B ₂ H ₆ ) gas as a doping source, the gas to the back side of the substrate when the p-type amorphous layer 3 is formed. In other words, an interface having a low surface recombination rate cannot be obtained on the nn + junction side due to the surrounding contamination of the nuclei and the adsorption contamination of the decomposition species on the back side of the substrate.

  This invention is made | formed in view of such a problem, The objective is providing the manufacturing method for implement | achieving high conversion efficiency especially in a heterojunction type photoelectric conversion element.

A method for producing a photoelectric conversion element of the present invention includes a crystalline semiconductor substrate having one conductivity type, a first intrinsic semiconductor layer formed on a light receiving surface of the crystalline semiconductor substrate, and the first intrinsic semiconductor layer. A reverse conductivity type semiconductor layer having a conductivity type opposite to that of the crystalline semiconductor substrate, a second intrinsic semiconductor layer formed on a non-light-receiving surface of the crystalline semiconductor substrate, and the second intrinsic semiconductor A one-conductivity-type semiconductor layer formed on the layer, and a method of manufacturing a photoelectric conversion element comprising:
The step of forming the first intrinsic semiconductor layer on the light-receiving surface of the crystalline semiconductor substrate and the step of forming the second intrinsic semiconductor layer on the non-light-receiving surface of the crystalline semiconductor substrate are continuously performed. It is what.

  In particular, following the step of forming the first intrinsic semiconductor layer on the light receiving surface of the crystalline semiconductor substrate, the step of forming the second intrinsic semiconductor layer on the non-light receiving surface of the crystalline semiconductor substrate may be performed. preferable.

  Further, following the step of forming the first intrinsic semiconductor layer and the second intrinsic semiconductor layer, a step of forming a one-conductivity-type semiconductor layer on the second intrinsic semiconductor layer, and the first intrinsic semiconductor layer It is preferable to sequentially perform the step of forming the reverse conductivity type semiconductor layer on the semiconductor layer.

  Further, the crystalline semiconductor substrate is preferably n-type.

  Furthermore, it is preferable that at least one of the intrinsic semiconductor layers has a non-single crystal phase.

A method for producing a photoelectric conversion element of the present invention includes a crystalline semiconductor substrate having one conductivity type, a first intrinsic semiconductor layer formed on a light receiving surface of the crystalline semiconductor substrate, and the first intrinsic semiconductor layer. A reverse conductivity type semiconductor layer having a conductivity type opposite to that of the crystalline semiconductor substrate, a second intrinsic semiconductor layer formed on a non-light-receiving surface of the crystalline semiconductor substrate, and the second intrinsic semiconductor A one-conductivity-type semiconductor layer formed on the layer, and a method of manufacturing a photoelectric conversion element comprising:
From the step of forming the first intrinsic semiconductor layer on the light receiving surface of the crystalline semiconductor substrate and the step of forming the second intrinsic semiconductor layer on the non-light receiving surface of the crystalline semiconductor substrate, Since the intrinsic semiconductor layers are formed on both surfaces of the substrate having a clean surface state, it is possible to manufacture a photoelectric conversion element having a high conversion efficiency having a low surface recombination speed at the same interface.

  In particular, following the step of forming the first intrinsic semiconductor layer on the light receiving surface of the crystalline semiconductor substrate, the step of forming the second intrinsic semiconductor layer on the non-light receiving surface of the crystalline semiconductor substrate may be performed. Preferably, this makes it possible to form a favorable internal electric field in the pn junction side region, and to manufacture a photoelectric conversion element having higher conversion efficiency.

  Further, following the step of forming the first intrinsic semiconductor layer and the second intrinsic semiconductor layer, a step of forming a one-conductivity-type semiconductor layer on the second intrinsic semiconductor layer, and the first intrinsic semiconductor layer A step of forming the reverse conductivity type semiconductor layer on the semiconductor layer in order, and thus a second intrinsic semiconductor layer having a clean surface state to which a doping element used for forming the reverse conductivity type semiconductor layer does not adhere Since the one-conductivity-type semiconductor layer is formed thereon, it is possible to manufacture a photoelectric conversion element with high conversion efficiency having a lower surface recombination velocity at the same interface.

  Furthermore, it is preferable that the crystalline semiconductor substrate is n-type, whereby the surface recombination reduction effect by the second intrinsic semiconductor layer is greater than when a p-type semiconductor substrate is used. The effect of reducing the surface recombination rate due to the difference in the cleanliness of the surface becomes more remarkable, and it becomes possible to manufacture a photoelectric conversion element having high conversion efficiency.

  Furthermore, it is preferable that at least one of the intrinsic semiconductor layers has a non-single-crystal phase, whereby the semiconductor substrate and the intrinsic semiconductor layer are heterocontacted to form a relatively large band offset at the interface, thereby reducing recombination. It is possible to achieve speed. Here, the non-single crystal phase is a concept that means a phase having a single crystal or a polycrystalline phase excluding a polycrystalline phase in which no difference is observed in the optical band gap or mobility gap. This indicates that the crystal arrangement is changed by addition or alloying of other elements, and at least the band gap is changed as compared with the complete crystal structure, and specifically, amorphous or microcrystalline.

  Hereinafter, the photoelectric conversion element of the present invention and the manufacturing method thereof will be described in detail.

  First, the manufacturing method in the present invention will be described in the photoelectric conversion element having the structure shown in FIG.

<Preparation process of crystalline semiconductor substrate>
As the crystalline semiconductor substrate, for example, a silicon substrate 10 made of p-type or n-type single crystal or polycrystalline silicon can be used. Here, the crystal system is a concept including single crystal, polycrystal and microcrystal.

  Note that although an example in which silicon is used as a crystalline semiconductor substrate will be described below, other crystal materials having an appropriate optical band gap and carrier mobility may be used as a photoelectric conversion material. Examples other than silicon include indium phosphide, gallium arsenide, indium copper selenide, indium copper sulfide, cadmium selenide, cadmium sulfide, tin sulfide, copper oxide, indium arsenide, indium nitride, iron silicide, indium gallium copper selenide. It is possible to use silicon-based substrates such as silicon carbide.

  The silicon substrate 10 contains a conductivity determining element such as boron (B) or phosphorus (P), and has a resistivity of, for example, about 0.3 to 2.0 Ω · cm, and is formed by a casting method or the like. An ingot formed by a casting method is cut into a size of about 10 cm × 10 cm to 25 cm × 25 cm, and sliced to a thickness of 300 μm or less, more preferably 200 μm or less to obtain a silicon substrate 10.

  The damaged layer on the surface is removed by subjecting the sliced silicon substrate 10 to a very small amount of etching using an aqueous NaOH solution, an aqueous KOH solution, hydrofluoric acid, a mixed solution of hydrofluoric acid and nitric acid, or the like.

<Surface irregularity forming process>
It is preferable to form an uneven structure on the surface of the silicon substrate 10.

  When a polycrystalline silicon substrate is used as the silicon substrate 10, it is preferable to form a fine concavo-convex (roughened) structure on the substrate surface (light-receiving surface) side that is a light incident surface by using a dry etching method. . In particular, the reactive ion etching (RIE) method is used, and the size can be changed by controlling the gas concentration or etching time.

  The width and height of the fine concavo-convex structure are each set to 2 μm or less, for example. In order to form this fine concavo-convex structure over almost the entire surface of the silicon substrate 10 with uniform and accurate controllability, the width and height of the concavo-convex structure is preferably 1 μm or less. The aspect ratio of the fine irregularities (height / width of the irregularities) is desirably 0.5 or more and 2 or less. When this aspect ratio is larger than 2, fine irregularities are damaged in the manufacturing process, and when a solar battery cell is formed, a leak current becomes large and good output characteristics cannot be obtained. Further, in the case where the junction is formed by diffusion, there is a problem that the uniform concentration cannot be formed because the doping concentration is different between the tip portion and the root portion of the unevenness. On the contrary, when this aspect ratio is smaller than 0.5, the adhesive strength of the electrode is lowered.

In the reactive ion etching method, for example, a reaction pressure of about 1 to 1000 mTorr using trifluoromethane (CHF ₃ ), chlorine (Cl ₂ ), oxygen (O ₂ ), sulfur hexafluoride (SF ₆ ), and the like as process gases. The processing is performed at an RF power of about 100 to 800 W for performing plasma excitation. Thereafter, etching residues remaining on the surface of the silicon substrate 10 are removed. As a method of removing the residue, there is a method of applying ultrasonic waves to the silicon substrate 10 in a water tank. As the types of apparatuses for applying ultrasonic waves, the frequencies of main commercially available ultrasonic cleaning apparatuses are several tens of kHz to several hundreds of kHz, and the vibrators to be applied have various materials, shapes, outputs, etc. Although there are types, the type of this device can be selected depending on the ease of removing the residue on the surface. The ease of residue removal varies depending on the shape and size of the unevenness, the remaining amount of residue, the thickness of the substrate, etc., and also varies depending on the frequency of the ultrasonic wave. However, the residue can be removed by lengthening the application time. A small amount of hydrofluoric acid may be added to the treatment liquid in the water tank.

  After the surface irregularities are formed as described above, the surface of the semiconductor substrate is cleaned by performing cleaning processing such as RCA cleaning and dilute hydrofluoric acid processing for the purpose of removing the oxide film, and cleaning with water.

  When a polycrystalline silicon substrate is used as the silicon substrate 10, a conventionally known passivation process or gettering process may be performed at this time.

<First intrinsic semiconductor layer forming step>
Next, the substantially intrinsic first intrinsic semiconductor layer 11 is formed on the light receiving surface of the silicon substrate 10 or on the surface on which the irregularities are formed by the dry etching method described above. In this specification, a substantially intrinsic semiconductor layer broadly refers to a layer formed without intentionally adding a conductivity type determining element when forming a semiconductor layer.

  As a forming method, a thin film forming method such as a chemical vapor deposition method typified by a plasma CVD method or a physical vapor deposition method typified by a sputtering method is used. At this time, it is preferable that the first intrinsic semiconductor layer 11 has a non-single crystal phase such as amorphous or microcrystalline, so that the substrate and the semiconductor layer are hetero-contacted, and a relatively large band offset is generated at the interface. This makes it possible to achieve a low recombination rate.

  As the material for the first intrinsic semiconductor layer, in addition to silicon, indium phosphide, gallium arsenide, indium copper selenide, indium copper sulfide, cadmium selenide, cadmium sulfide, tin sulfide, copper oxide, indium arsenide, Indium nitride, iron silicide, indium gallium copper selenide, silicon carbide, zinc oxide, indium oxide, zinc sulfide, indium sulfide, silicon oxide, silicon nitride, or the like is preferably used. In addition, it is preferable to use these also as a material of the 2nd intrinsic semiconductor layer mentioned later, a 1 conductivity type semiconductor layer, and a reverse conductivity type semiconductor layer.

<Second intrinsic semiconductor layer forming step>
Next, a substantially intrinsic second intrinsic semiconductor layer 12 is formed on the non-light-receiving surface of the silicon substrate 10.

  In the method of the present invention, the second intrinsic semiconductor layer 12 is formed before the first intrinsic semiconductor layer 11 and the doped layers (one-conductivity type semiconductor layer 13 and reverse conductivity type semiconductor layer 14) described later are formed. Is formed first. As a result, it is possible to reduce the surface recombination velocity value at the back surface side joint, which greatly affects the characteristics of the photoelectric conversion element, particularly the open circuit voltage value. That is, the surface state of the main surface of the substrate before forming the semiconductor layer greatly affects the bonding characteristics, and before the formation of the natural oxide film and the adsorption of impurities due to the atmosphere proceed, the clean substrate It is considered that a good heterojunction can be formed by forming the first intrinsic semiconductor layer 11 and then the second intrinsic semiconductor layer 12 on both main surfaces.

<Formation process of one conductivity type semiconductor layer and reverse conductivity type semiconductor layer>
Next, a one-conductivity-type semiconductor layer 13 having the same conductivity type as that of the silicon substrate 10 is formed on the second intrinsic semiconductor layer 12, and then a reverse-conductivity-type semiconductor layer 14 having the opposite conductivity type to that of the silicon substrate 10 is formed. It is formed on the first intrinsic semiconductor layer 11.

When the conductivity type layer is n-type, hydrogen (H ₂ ), silane (SiH ₄ ) and phosphine (PH ₃ ) are used as source gases, and when p-type, hydrogen (H ₂ ), silane (SiH ₄ ) and Using diborane (B ₂ H ₆ ) as a source gas, it is formed using a known film forming method such as plasma CVD, hot filament CVD, or photo CVD.

At this time, as a method of the present invention, it is preferable to sequentially form the one-conductivity-type semiconductor layer 13 and then the reverse-conductivity-type semiconductor layer 14, whereby a photoelectric conversion element with excellent conversion efficiency can be manufactured. . That is, when forming the reverse conductivity type semiconductor layer 14, it is necessary to use a source gas containing a conductivity type determining element, but the element component that determines the reverse conductivity type generated from the material at this time is desired. Adsorption and diffusion on the surface of the substrate that does not occur will result in the formation of reverse bonding and structural defects that degrade the properties at that site. Therefore, by forming a semiconductor layer having the same conductivity type as that of the substrate first and then forming a reverse conductivity type semiconductor layer later, the photoelectric conversion element having high conversion efficiency can be prevented by preventing the occurrence of the reverse junction and defects described above. Can be produced. In particular, since diborane (B ₂ H ₆ ) typically used for forming a p-type semiconductor layer has high decomposability, when an n-type substrate is used and a pn junction is formed by the p-type semiconductor layer, The effect of the present invention appears remarkably.

  Note that a surface modification treatment such as hydrogen plasma treatment or carbon dioxide gas plasma treatment or cleaning treatment may be introduced in the chamber before and after the formation of each semiconductor layer described above.

<Antireflection film formation process>
Next, the antireflection layer 15 is formed.

Examples of the material of the antireflection layer 15 include a silicon nitride: SiNx film (with a composition ratio (x) having a width centered on Si ₃ N ₄ stoichiometry), a SiOyNz film (0 <y, z <1). TiO2, MgF2, ITO, ZnO, SnO2 and the like can be used. The antireflection layer 15 may be configured so that the refractive index is about 1.8 to 2.3 and the thickness is about 500 to 1200 mm when the base material is silicon.

  As a manufacturing method of the antireflection layer 15, a PECVD method, a CatCVD method, a vapor deposition method, a sputtering method, or the like is used.

<Back electrode formation process>
Next, the back electrode 16 is formed on the one conductivity type semiconductor layer 13.

  A low-resistance material is used for the back electrode 16, and Al, Ag, etc. are suitably used, but ITO, Ga, or Al is doped to improve the reflectivity at the interface between the one-conductive semiconductor layer 13 and the back electrode 16. Alternatively, a transparent conductive film made of a metal oxide such as ZnO or fluorine doped SnO 2 may be inserted. The back electrode 16 is formed by sputtering, vapor deposition, printing, spray pyrolysis, or the like. The back electrode 16 may be formed on substantially the entire surface of the one-conductivity type semiconductor layer 13 or may be partially formed in a lattice shape or the like.

<Light-receiving surface electrode formation process>
Next, the light receiving surface electrode 17 is formed on the reverse conductivity type semiconductor layer 14 or the antireflection layer 15.

  In the case where an insulating layer such as silicon nitride is used for the antireflection layer 15, an opening is provided, for example, by patterning in advance or by etching away a portion where the light receiving surface electrode 17 is to be formed. 14 to be in direct contact. On the other hand, when a conductive material such as ITO is used for the antireflection layer 15, the light receiving surface electrode 17 is directly formed on the antireflection layer 15.

  As the material of the light receiving surface electrode 17, Al, Ag, Cu or the like is preferably used. However, in order to reduce the contact resistance with the reverse conductivity type semiconductor layer 14 or the antireflection layer 15, a buffer layer of Pd, Os, Au or the like. May be inserted. Examples of the method for forming the light-receiving surface electrode 17 include a method in which an electrode paste is formed by printing, dispenser application, and the like, followed by baking, or a method in which a mask is used to form by sputtering, vapor deposition, or the like.

  At this time, if fine irregularities are formed on the surface of the silicon substrate 10, this increases the contact area between the light receiving surface electrode 17 and the base, and further sets the angle of the interface between the electrode and the base in the pulling direction. On the other hand, the joint strength of the light-receiving surface electrode 17 can be improved by approaching parallel.

  As described above, high efficiency can be achieved by the photoelectric conversion element manufacturing method of the present invention, particularly in a photoelectric conversion element formed of a silicon substrate and a silicon thin film.

  As an example, the result of manufacturing a photoelectric conversion element having the structure shown in FIG. 2 by the manufacturing method of the present invention will be described.

  First, the damaged layer on the surface of the n-type polycrystalline silicon substrate 10 having a thickness of 200 μm, an outer shape of 10 cm × 10 cm, and a specific resistance of 1.5 Ω · cm was etched and washed with an aqueous KOH solution.

Thereafter, a concavo-convex structure was formed on the surface by reactive ion etching. As conditions, while flowing about 12.00 sccm of trifluoromethane (CHF ₃ ), about 72 sccm of chlorine (Cl ₂ ), about 9 sccm of oxygen (O ₂ ), and about 65 sccm of sulfur hexafluoride (SF ₆ ), The treatment was performed at a reaction pressure of about 50 mTorr and an RF power of about 500 W. Next, the substrate was immersed in a dilute hydrofluoric acid aqueous solution and subjected to ultrasonic cleaning.

  Thereafter, annealing was performed in a furnace heated to at least 750 ° C. in a hydrogen atmosphere.

  Next, after removing impurities on the surface by RCA cleaning, the substrate was immersed in a 1% hydrofluoric acid aqueous solution and washed with water to remove the surface oxide film.

  Next, the first intrinsic semiconductor layer 11 was formed on the light-receiving surface side of the substrate with a film thickness of 5 nm by plasma CVD using hydrogen and silane as source gases. At this time, the gas pressure in the chamber was 2 torr, the RF power was 20 W, and the substrate temperature was 200 ° C.

  Next, on the non-light-receiving surface (back surface) opposite to the light-receiving surface on which the first intrinsic semiconductor layer 11 of the silicon substrate 10 is formed, the second intrinsic semiconductor layer 12 is formed to 5 nm by plasma CVD using hydrogen and silane as source gases. The film thickness was formed. At this time, the gas pressure in the chamber was 2 torr, the RF power was 20 W, and the substrate temperature was 200 ° C.

  Next, phosphine was added to the source gas, and an n-type amorphous silicon layer to be the one-conductivity type semiconductor layer 13 was stacked on the second intrinsic semiconductor layer 12 to a thickness of 10 nm. At this time, the gas pressure in the chamber was 2 torr, the RF power was 20 W, and the substrate temperature was 200 ° C.

  Further, a p-type amorphous silicon layer serving as the reverse conductivity type semiconductor layer 14 was stacked on the first intrinsic semiconductor layer 11 with a film thickness of 5 nm by plasma CVD using hydrogen, silane, and diborane as source gases. . At this time, the gas pressure in the chamber was 2 torr, the RF power was 20 W, and the substrate temperature was 200 ° C.

  Next, an ITO layer serving as an antireflection layer 15 is formed with a film thickness of 85 nm on the light receiving surface side of the substrate using a double-sided sputtering apparatus, and an ITO layer serving as a buffer layer (not shown) is formed with a film thickness of 40 nm on the back surface side. And laminated.

  Next, an Ag layer to be the back electrode 16 was formed on the ITO layer on the back side by a sputtering method with a film thickness of 0.2 μm.

  Finally, in order to form the light-receiving surface electrode 17, a silver paste containing a low-temperature curing type epoxy resin is patterned on the ITO layer on the light-receiving surface side using a screen printing method, and baked at a low temperature of 200 ° C. Went.

  At this time, in order to perform low-temperature firing at 200 ° C., it was formed on a substantially flat surface, or on a surface having a gentle, spontaneous concavo-convex structure formed by etching a single crystal silicon substrate with an alkaline aqueous solution or the like. It is known that the adhesion strength of the light-receiving surface electrode to the base is greatly inferior to that of the type that is baked at 600 ° C. or higher. By forming the structure on the base on which the structure is formed, the adhesive strength can be greatly improved. This is because the contact area between the light-receiving surface electrode and the base increases due to the fine concavo-convex structure, and the angle of the interface between the light-receiving surface electrode and the base is made parallel to the tensile direction, thereby improving the bonding strength. It is thought that.

  As described above, Example 1 of the photoelectric conversion element was produced based on the production method of the present invention.

  Further, as Examples 2 to 4 and Comparative Examples 1 and 2, photoelectric conversion elements were produced by changing only the formation order of the respective semiconductor layers from Example 1 described above. The other steps were the same as in Example 1.

Table 1 shows the order of formation of the semiconductor layers of Examples 1 to 4 and Comparative Examples 1 and 2 of the present invention.

Lastly, the photoelectric conversion elements of Examples 1 to 4 of the present invention and Comparative Examples 1 and 2 were irradiated with pseudo-sunlight whose incident light intensity was adjusted to 100 mW / cm ² to evaluate the characteristics. The characteristic evaluation results are shown in Table 2.

  First, it can be seen that Examples 1 to 4 are superior to Comparative Examples 1 and 2 in terms of open circuit voltage and curvature factor. In the first to fourth embodiments, since the intrinsic semiconductor layer is rapidly formed on both surfaces of the substrate having a clean surface state before the growth of the natural oxide film proceeds, the low defect density bonding is performed. This is probably because a low surface recombination velocity at the same interface could be realized.

  Next, it can be seen that Examples 1 and 3 are particularly excellent in the fill factor as compared with Examples 2 and 4. This indicates that the junction quality of the pn junction side region has a larger influence on the characteristics than the junction quality of the nn + junction side region, particularly for the substrate and the intrinsic semiconductor layer. This is presumably because a good internal electric field was formed in the formed pn junction side region.

  And it turns out that Example 1 is excellent with respect to Example 3 in all the points of a short circuit current, an open circuit voltage, and a curvature factor. This is because the one-conductivity-type semiconductor layer is formed before the substrate and the reverse-conductivity-type semiconductor layer are formed, so that a low junction density is not formed without forming a reverse junction or the like at the interface between the one-conductivity-type semiconductor layer and the intrinsic semiconductor layer. This is presumably because the BSF structure was formed.

  As described above, a photoelectric conversion element having high conversion efficiency can be manufactured by defining the manufacturing method of the present invention, particularly the order of forming the semiconductor layers.

  In the example of the present invention, an example using an n-type polycrystalline silicon substrate has been described, but the same effect is expected when a p-type polycrystalline silicon substrate, a single crystal silicon substrate, or another semiconductor substrate is used. it can.

It is a figure for demonstrating the manufacturing method of the conventional photoelectric conversion element. It is a figure which shows one Embodiment of the photoelectric conversion element formed with the manufacturing method of the photoelectric conversion element of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... n-type single crystal silicon substrate 2 ... i-type amorphous layer 3 ... p-type amorphous layer 4 ... i-type amorphous layer 5 ... n-type amorphous layer 6... Light receiving surface side transparent conductive layer 7... Back surface side transparent conductive layer 8... Light receiving surface side extraction electrode 9 .. Back surface side extraction electrode 10 .. n-type polycrystalline silicon substrate 11. Intrinsic semiconductor layer 12 .. Second intrinsic semiconductor layer 13 .. One conductivity type semiconductor layer 14 .. Reverse conductivity type semiconductor layer 15 .. Antireflection layer 16 .. Back electrode 17.

Claims (5)

A crystalline semiconductor substrate exhibiting one conductivity type;
A first intrinsic semiconductor layer formed on the light receiving surface of the crystalline semiconductor substrate;
A reverse conductivity type semiconductor layer formed on the first intrinsic semiconductor layer and exhibiting a conductivity type opposite to that of the crystalline semiconductor substrate;
A second intrinsic semiconductor layer formed on the non-light-receiving surface of the crystalline semiconductor substrate;
A one-conductivity-type semiconductor layer formed on the second intrinsic semiconductor layer, and a method of manufacturing a photoelectric conversion element comprising:
The step of forming the first intrinsic semiconductor layer on the light-receiving surface of the crystalline semiconductor substrate and the step of forming the second intrinsic semiconductor layer on the non-light-receiving surface of the crystalline semiconductor substrate are continuously performed. A method for producing a photoelectric conversion element.   A step of forming a second intrinsic semiconductor layer on the non-light-receiving surface of the crystalline semiconductor substrate is performed following the step of forming the first intrinsic semiconductor layer on the light-receiving surface of the crystalline semiconductor substrate. The manufacturing method of the photoelectric conversion element of Claim 1.   Following the step of forming the first intrinsic semiconductor layer and the second intrinsic semiconductor layer, a step of forming a one conductivity type semiconductor layer on the second intrinsic semiconductor layer, and the first intrinsic semiconductor layer The method for producing a photoelectric conversion element according to claim 1, wherein the step of forming the reverse conductivity type semiconductor layer thereon is sequentially performed.   The method for manufacturing a photoelectric conversion element according to claim 1, wherein the crystalline semiconductor substrate is n-type.   The method for manufacturing a photoelectric conversion element according to claim 1, wherein at least one of the intrinsic semiconductor layers has a non-single-crystal phase.

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