WO2013161145A1 - Backside bonded solar cell and method for manufacturing same - Google Patents

Backside bonded solar cell and method for manufacturing same Download PDF

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Publication number
WO2013161145A1
WO2013161145A1 PCT/JP2013/000916 JP2013000916W WO2013161145A1 WO 2013161145 A1 WO2013161145 A1 WO 2013161145A1 JP 2013000916 W JP2013000916 W JP 2013000916W WO 2013161145 A1 WO2013161145 A1 WO 2013161145A1
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layer
conductivity type
solar cell
contact region
back junction
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PCT/JP2013/000916
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French (fr)
Japanese (ja)
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篠原　亘
本間　運也
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パナソニック株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • H01L31/03529—Shape of the potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells

Definitions

  • the present invention relates to a back junction solar cell and a manufacturing method thereof.
  • Patent Document 1 a back junction solar cell in which a single crystal doping layer is homojunctioned to a single crystal silicon substrate on the back surface side is disclosed.
  • An object of the present invention is to provide a back junction solar cell that suppresses efficiency reduction due to recombination and a method for manufacturing the back junction solar cell.
  • One aspect of the present invention is a back junction solar cell having a first conductivity type contact region and a second conductivity type contact region on a main surface opposite to a light incident surface, the first conductivity type contact region Is a region where the crystalline base layer and the crystalline first conductivity type layer or the first conductivity type diffusion layer are homojunction, and the second conductivity type contact region is the base layer and the amorphous i-type
  • the back junction solar cell is a region where the layer and the second conductivity type layer are heterojunctioned.
  • a crystalline first conductivity type layer or a first conductivity type diffusion layer is formed on a main surface opposite to a light incident surface in a base layer of a crystalline semiconductor layer serving as a power generation layer.
  • the present invention it is possible to provide a back junction solar cell that suppresses a decrease in efficiency due to recombination and a method for manufacturing the same.
  • the solar cell 100 in the first embodiment includes a substrate 18, a passivation layer 16, a base layer 14, a first conductivity type layer 12, an insulating layer 20, an i-type layer 22, A two-conductivity type layer 24, a transparent electrode layer 26, and a metal layer 28 (first electrode 28n, second electrode 28p) are included.
  • Solar cell 100 in the present embodiment is a back junction solar cell, and an electrode for taking out the electric power generated by the solar cell to the outside is provided only on the main surface (hereinafter referred to as the back surface) opposite to the light receiving surface. .
  • the light receiving surface means a main surface on which light is mainly incident in the solar cell, and specifically, a surface on which most of the light incident on the solar cell is incident.
  • a back surface means the surface on the opposite side to the light-receiving surface of a solar cell.
  • the substrate 18 mechanically supports the solar cell and protects the semiconductor layer included in the solar cell from the external environment. Further, since the substrate 18 is arranged on the light receiving surface side of the solar cell, the substrate 18 is a material that can transmit light in a wavelength band used for power generation in the solar cell and mechanically support each layer such as the base layer 14. .
  • the substrate 18 may be a light-transmitting glass or plastic.
  • the base layer 14 is a crystalline semiconductor layer.
  • the base layer 14 becomes a power generation layer of the solar cell.
  • the base layer 14 is an n-type crystalline silicon layer to which an n-type dopant is added.
  • the doping concentration of the base layer 14 may be about 10 16 / cm 3 .
  • the film thickness of the base layer 14 is preferably a film thickness that can sufficiently generate carriers as the power generation layer, and may be, for example, 1 ⁇ m or more and 100 ⁇ m or less.
  • the crystalline includes not only a single crystal but also a polycrystal in which a large number of crystal grains are aggregated.
  • the passivation layer 16 is provided between the substrate 18 and the base layer 14.
  • the passivation layer 16 plays a role of terminating dangling bonds (dangling bonds) on the surface of the base layer 14 and suppresses carrier recombination on the surface of the base layer 14.
  • dangling bonds dangling bonds
  • the passivation layer 16 may include, for example, a silicon nitride layer (SiN), and more preferably has a stacked structure of a silicon oxide layer (SiOx) and silicon nitride.
  • SiN silicon nitride layer
  • SiOx silicon oxide layer
  • silicon nitride a structure in which a silicon oxide layer and a silicon nitride layer are sequentially stacked with a thickness of 30 nm and 40 nm, respectively, may be used.
  • the first conductivity type layer 12 is a crystalline semiconductor layer.
  • the first conductivity type layer 12 is an n-type crystalline silicon layer to which an n-type dopant is added.
  • the first conductivity type layer 12 is a layer bonded to the metal layer 28 (first electrode 28 n), and has a higher doping concentration than the base layer 14.
  • the doping concentration of the first conductivity type layer 12 may be about 10 19 / cm 3 .
  • the film thickness of the first conductivity type layer 12 is preferably as thin as possible within a range where the contact resistance with the metal can be sufficiently lowered, and may be, for example, 0.1 ⁇ m or more and 2 ⁇ m or less.
  • the base layer 14 and the first conductivity type layer 12 form a first conductivity type contact region C1 in which the crystalline materials are homo-joined.
  • the first conductivity type contact region C ⁇ b> 1 is formed in a comb shape including fingers and bus bars in the surface of the solar cell 100, for example.
  • the area of the first conductivity type contact region C ⁇ b> 1 means the area of a region that is homojunction with the first conductivity type layer 12 on the main surface of the base layer 14.
  • the insulating layer 20 is used to electrically insulate the first conductivity type layer 12 from an i-type layer 22 and a second conductivity type layer 24 described later, and a mask for etching the first conductivity type layer 12.
  • Used as The insulating layer 20 is made of an electrically insulating material, for example, silicon nitride (SiN).
  • the thickness of the insulating layer 20 may be about 100 nm, for example.
  • the i-type layer 22 and the second conductivity type layer 24 are amorphous semiconductor layers. Note that the amorphous system includes an amorphous phase or a microcrystalline phase in which minute crystal grains are precipitated in the amorphous phase.
  • the i-type layer 22 and the second conductivity type layer 24 are made of amorphous silicon containing hydrogen.
  • the i-type layer 22 is a substantially intrinsic amorphous silicon layer.
  • the second conductivity type layer 24 is an amorphous silicon layer to which a p-type dopant is added.
  • the second conductivity type layer 24 is a semiconductor layer having a higher doping concentration than the i-type layer 22.
  • the i-type layer 22 is not intentionally doped, and the doping concentration of the second conductivity type layer 24 may be about 10 18 / cm 3 .
  • the thickness of the i-type layer 22 is made thin so that light absorption can be suppressed as much as possible, while it is made thick enough that the surface of the base layer 14 is sufficiently passivated. Specifically, the thickness may be 1 nm or more and 50 nm or less, for example, 10 nm.
  • the film thickness of the second conductivity type layer 24 is made thin so that light absorption can be suppressed as much as possible, while it is made so thick that the open circuit voltage of the solar cell becomes sufficiently high. For example, the thickness may be 1 nm or more and 50 nm or less, for example, 10 nm.
  • the transparent electrode layer 26 is doped with tin oxide (SnO 2 ), zinc oxide (ZnO), indium tin oxide (ITO), etc. with tin (Sn), antimony (Sb), fluorine (F), aluminum (Al), etc. It is preferable to use at least one or a combination of a plurality of transparent conductive oxides (TCO).
  • TCO transparent conductive oxides
  • ZnO zinc oxide
  • the film thickness of the transparent electrode layer 26 may be 10 nm or more and 500 nm or less, for example, 100 nm.
  • the base layer 14, the i-type layer 22, and the second conductivity type layer 24 form a second conductivity type contact region C2 in which crystalline and amorphous are heterojunctioned.
  • the second conductivity type contact region C2 includes, for example, fingers and bus bars on the surface of the solar cell 100, and is formed in a comb shape combined with the first conductivity type contact region C1.
  • the area of the second conductivity type contact region C ⁇ b> 2 means the area of a region heterojunction with the i-type layer 22 and the second conductivity type layer 24 on the main surface of the base layer 14.
  • the metal layer 28 is a layer serving as an electrode provided on the back side of the solar cell.
  • the metal layer 28 is made of a conductive material such as metal, and is made of a material containing, for example, copper (Cu) or aluminum (Al).
  • the metal layer 28 includes a first electrode 28 n connected to the first conductivity type layer 12 and a second electrode 28 p connected to the second conductivity type layer 24.
  • the metal layer 28 may further include an electrolytic plating layer such as copper (Cu) or tin (Sn). However, it is not limited to this, It is good also as other metals, such as gold
  • 2A to 2J show a method for manufacturing solar cell 100 in the first embodiment.
  • the substrate 10 is made of a crystalline semiconductor material.
  • a semiconductor substrate such as silicon, polycrystalline silicon, gallium arsenide (GaAs), or indium phosphide (InP) is used.
  • the substrate 10 may be made of a material other than silicon, and these layers may be made of materials other than the silicon layer.
  • a porous layer 10a is formed on one main surface of the substrate 10 (FIG. 2A).
  • the porous layer 10a can be formed by anodic oxidation or the like.
  • the electrolyte used for anodization can be, for example, a mixed liquid of hydrofluoric acid and ethanol, or a mixed liquid of hydrofluoric acid and hydrogen peroxide.
  • the current density of the anodic oxidation may be 5 mA / cm 2 or more and 600 nA / cm 2 or less, for example, about 10 mA / cm 2 .
  • the thickness of the porous layer 10a may be 0.01 ⁇ m or more and 30 ⁇ m or less, for example, about 10 ⁇ m.
  • the pore diameter of the porous layer 10a may be 0.002 ⁇ m or more and 5 ⁇ m or less, for example, about 0.01 ⁇ m.
  • the porosity of the porous layer 10a may be 10% or more and 70% or less, for example, about 20%.
  • a first conductivity type layer 12 and a base layer 14 are formed on the porous layer 10a of the substrate 10 (FIG. 2B).
  • the first conductivity type layer 12 and the base layer 14 can be formed by chemical vapor deposition (CVD).
  • the first conductivity type layer 12 and the base layer 14 are formed by epitaxial growth using the porous layer 10a as a seed layer, and form a homojunction region in which crystalline semiconductor layers are joined to each other.
  • the film can be formed by heating the substrate 10 to 950 ° C. and supplying dichlorosilane (SiH 2 Cl 2 ) diluted with hydrogen (H 2 ) as a source gas.
  • the flow rates of hydrogen (H 2 ) and dichlorosilane (SiH 2 Cl 2 ) are, for example, 0.5 (l / min) and 180 (l / min), respectively. Further, if necessary, phosphine (PH 3 ) is added as a doping gas.
  • a passivation layer 16 is formed on the base layer 14 (FIG. 2C).
  • the passivation layer 16 can be formed by plasma enhanced chemical vapor deposition (PECVD) in which a raw material gas obtained by mixing oxygen (O 2 ) or nitrogen (N 2 ) with silane (SiH 4 ) is supplied as a plasma.
  • PECVD plasma enhanced chemical vapor deposition
  • the substrate 18 is bonded to the passivation layer 16 (FIG. 2D).
  • the substrate 18 is bonded to the passivation layer 16 with an adhesive or the like.
  • the adhesive is a material that transmits light in a wavelength band used for power generation in a solar cell.
  • FIGS. 2A to 2C are shown upside down from FIGS. 2A to 2C for easy understanding.
  • the solar cell may be modularized by bonding a plurality of substrates 10 to the substrate 18.
  • FIG. 3 shows an example in which 24 substrates 10 are bonded to one substrate 18 to form a module.
  • the substrate 10 is separated using the porous layer 10a (FIG. 2E).
  • the substrate 10 can be separated by mechanical processing.
  • the substrate 10 can be separated from the porous layer 10a portion by adsorbing the substrate 10 and the substrate 18 with a vacuum chuck and pulling the substrate 10 and the substrate 18 apart.
  • the substrate 10 can be separated from the porous layer 10a portion. If a part of the porous layer 10a remains on the first conductivity type layer 12 side, the first layer is etched by hydrofluoric acid mixed with hydrofluoric acid (HF) and nitric acid (HNO 3 ).
  • the porous layer 10a on the conductive type layer 12 may be removed.
  • the insulating layer 20 is formed on the first conductivity type layer 12, and the first conductivity type layer 12 is patterned (FIG. 2F).
  • the insulating layer 20 can be formed by plasma enhanced chemical vapor deposition (PECVD) in which a raw material gas in which nitrogen (N 2 ) is mixed with silane (SiH 4 ) is supplied in a plasma state.
  • PECVD plasma enhanced chemical vapor deposition
  • Patterning can be performed using an etching paste.
  • the first conductive type layer 12 is removed together with the insulating layer 20 by applying an etching paste containing phosphoric acid in a desired pattern by a screen printing method or the like.
  • the insulating layer 20 may be removed by dry etching so that a desired pattern is obtained, and the first conductivity type layer 12 may be removed by dry etching or wet etching using the insulating layer 20 as a mask.
  • RIE reactive ion etching
  • CF 4 carbon tetrafluoride
  • RIE reactive ion etching
  • SF 6 sulfur hexafluoride
  • An etchant containing hydrofluoric acid may be used for wet etching of the first conductivity type layer 12.
  • the insulating layer 20 and the first conductivity type layer 12 are preferably patterned so that power can be collected as evenly as possible from the back surface of the solar cell.
  • a comb-shaped pattern including fingers and bus bars that are generally applied to solar cells is preferable.
  • An i-type layer 22, a second conductivity type layer 24, and a transparent electrode layer 26 are formed on the base layer 14 and the insulating layer 20 exposed by patterning (FIG. 2G).
  • the i-type layer 22 and the second conductivity type layer 24 can be formed by PECVD of a silicon-containing gas such as silane (SiH 4 ). While supplying a silicon-containing gas such as silane (SiH 4 ) and supplying a high-frequency power from a high-frequency power source to a high-frequency electrode, plasma of the source gas is generated, and the source material is supplied from the plasma onto the base layer 14 and the insulating layer 20. Thus, a silicon thin film is formed.
  • the source gas is mixed with a dopant-containing gas such as boron (B 2 H 6 ) as necessary.
  • the transparent electrode layer 26 can be formed using a sputtering method or the like.
  • the i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the insulating layer 20 formed on the entire surface are patterned (FIG. 2H). Patterning can be performed using an etching paste.
  • the i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the insulating layer 20 are removed by applying an etching paste containing phosphoric acid in a desired pattern by a screen printing method or the like.
  • the layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the insulating layer 20 are removed and patterned.
  • the pattern is set so that power can be collected as evenly as possible from the back surface of the solar cell.
  • a comb pattern that is alternately combined with the comb pattern of the first conductivity type layer 12 is preferable.
  • a metal layer 28 is formed on the patterned surface (FIG. 2I).
  • the metal layer 28 can be formed by a thin film formation method such as sputtering or plasma enhanced chemical vapor deposition (PECVD).
  • PECVD plasma enhanced chemical vapor deposition
  • the i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26 and the metal layer 28 are partially removed (FIG. 2J). Thereby, the metal layer 28 is divided, and the first electrode 28 n connected to the first conductivity type layer 12 and the second electrode 28 p connected to the transparent electrode layer 26 are formed.
  • the i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the metal layer 28 can be removed by laser etching. Also, a resist mask is applied by screen printing or the like to form a patterned mask, and the i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the metal layer 28 are separately etched using the mask. May be. If the metal layer 28 is copper (Cu), ferric chloride may be used as an etchant, and if the metal layer 28 is aluminum (Al), phosphoric acid may be used as an etchant. For etching the transparent electrode layer 26, an etchant containing hydrochloric acid (HCl) may be used. An etchant containing hydrofluoric acid (HF) may be used for etching the i-type layer 22 and the second conductivity type layer 24.
  • Cu copper
  • ferric chloride may be used as an etchant
  • Al aluminum
  • phosphoric acid may be used as an etchant.
  • HCl hydro
  • the i-type layer 22 and the second conductive layer are connected so that the first electrode 28n connected to the first conductive type layer 12 and the second electrode 28p connected to the second conductive type layer 24 are electrically separated.
  • the mold layer 24, the transparent electrode layer 26, and the metal layer 28 are removed.
  • the i-type layer 22, the second conductivity-type layer 24, the transparent electrode layer 26, and the metal layer 28 on the region of the insulating layer 20 left on the first conductivity-type layer 12 are removed.
  • a metal layer may be further laminated on the first electrode 28n and the second electrode 28p by electrolytic plating or the like.
  • electrolytic plating For example, copper (Cu) or tin (Sn) is formed by electrolytic plating.
  • Cu copper
  • Sn tin
  • the metal layer is laminated only on the region where the first electrode 28n and the second electrode 28p are left.
  • solar cell 100 in the present embodiment is formed (FIG. 2J).
  • the substrate 18 is on the light receiving surface side
  • the first electrode 28n and the second electrode 28p are both a back surface junction type provided on the back surface side.
  • the first electrode 28n and the second electrode 28p of the plurality of solar cells arranged in parallel are connected by a conductive tab, and the plurality of solar cells are connected in series or in parallel.
  • coat a filler to the back surface side of a solar cell and you may seal with a sealing material.
  • the filler and the sealing material can be resin materials such as EVA and polyimide. This can prevent moisture from entering the power generation layer of the solar cell module.
  • the sealing material can be the same glass or plastic transparent substrate as the substrate 10. Thereby, the intensity
  • a reflective layer may be provided between the filler and the transparent substrate, or the sealing material itself may be a colored substrate.
  • first conductivity type layer 12 is epitaxially grown on base layer 14 to form first conductivity type contact region C1 that is a homojunction between crystalline materials.
  • the second conductivity type layer 24 forms a second conductivity type contact region C2 which is a heterojunction between the base layer 14 and crystalline and amorphous.
  • passivation is sufficient at the junction interface, and loss of carriers due to recombination can be suppressed. Thereby, the power generation efficiency of the solar cell 100 can be improved.
  • the porous layer 10a may be left on the first conductivity type layer 12.
  • the porous layer 10a since the porous layer 10a remains between the first conductivity type layer 12 and the insulating layer 20 with the surface being uneven, the light reaching the porous layer 10a out of the light incident from the substrate 18 side is diffusely reflected. To return to the base layer 14.
  • the solar cell 102 in the second embodiment includes a substrate 18, a passivation layer 16, a base layer 14, a first conductivity type layer 12, an insulating layer 20, an i-type layer 22, A two-conductivity type layer 24, a transparent electrode layer 26, and a metal layer 28 (first electrode 28n, second electrode 28p) are included.
  • This embodiment is different from the solar cell 100 in the first embodiment in that an undercut A (gap) is provided between the first conductivity type layer 12 and the i-type layer 22 and the second conductivity type layer 24. . Since other components are the same as those of the solar cell 100 in the first embodiment, description thereof is omitted. Hereinafter, the undercut A will be described together with the manufacturing method.
  • the first conductivity type layer 12 is also etched in the plane direction of the substrate 18 to form an undercut A (FIG. 5A).
  • the undercut A is a space formed under the patterned insulating layer 20.
  • the undercut A can be formed by subjecting the first conductivity type layer 12 to isotropic etching.
  • hydrofluoric acid obtained by mixing hydrofluoric acid (HF) and nitric acid (HNO 3 ) may be used.
  • the undercut A functions as a gap (space) that prevents the i-type layer 22 and the second conductivity type layer 24 from being in direct contact with the first conductivity type layer 12 (FIG. 5B).
  • the processing is performed up to the patterning of the metal layer 28 (FIGS. 5C to 5E). Thereby, the solar cell 102 is formed.
  • the i-type layer 22 and the second conductivity type layer 24 are not in direct contact with the first conductivity type layer 12 by providing a gap (undercut A) that is a space in which nothing is filled. Therefore, current leakage between the i-type layer 22 and the second conductivity type layer 24 and the first conductivity type layer 12 is suppressed, and the power generation efficiency of the solar cell 102 is improved.
  • the solar cell 104 in the third embodiment includes a substrate 18, a passivation layer 16, a base layer 14, a first conductivity type diffusion layer 42, an i-type layer 22, and a second conductivity type.
  • the layer 24 includes the transparent electrode layer 26 and the metal layer 44 (first electrode 44n, second electrode 44p).
  • Solar cell 104 in the present embodiment is a back junction solar cell, and an electrode for taking out the electric power generated by the solar cell to the outside is provided only on the main surface (hereinafter referred to as the back surface) opposite to the light receiving surface. .
  • the first conductivity type layer 12, the insulating layer 20, and the metal layer 28 are not provided, but the first conductivity type diffusion layer 42 and the metal layer 44 are provided. Since it is different from the solar cell 100 in the embodiment, these will be described in detail, and description of similar components will be omitted.
  • the first conductivity type diffusion layer 42 is a layer obtained by diffusing a first conductivity type (n-type) dopant in the base layer 14.
  • the first conductivity type diffusion layer 42 is provided in a region where the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are not formed.
  • the doping concentration of the first conductivity type diffusion layer 42 may be about 10 19 / cm 3 .
  • the base layer 14 and the first conductivity type diffusion layer 42 form a first conductivity type contact region C1 in which crystals are homo-joined.
  • the first conductivity type contact region C ⁇ b> 1 is formed in a comb shape including fingers and bus bars on the surface of the solar cell 104, for example.
  • the area of the first conductivity type contact region C ⁇ b> 1 means the area of a region that is homojunction with the first conductivity type diffusion layer 42 in the main surface of the base layer 14.
  • the pattern width of the first conductivity type diffusion layer 42 is 1.6 mm
  • the pattern width of the second conductivity type layer 24 is May be set to 2.0 mm, and a region in which the base layer 14 of 0.2 mm is left between the two may be provided.
  • the metal layer 44 is a layer serving as an electrode provided on the back side of the solar cell. Similarly to the metal layer 28, the metal layer 44 is made of a conductive material such as metal, and is made of, for example, a material containing copper (Cu) or aluminum (Al).
  • the metal layer 44 includes a first electrode 44 n connected to the first conductivity type diffusion layer 42 and a second electrode 44 p connected to the second conductivity type layer 24.
  • the metal layer 44 may further include an electrolytic plating layer such as copper (Cu) or tin (Sn). However, it is not limited to this, It is good also as other metals, such as gold
  • 7A to 7L show a method for manufacturing the solar cell 104 according to the third embodiment.
  • the substrate 10 is made of a crystalline semiconductor material as in the first embodiment.
  • a porous layer 10a is formed on the substrate 10 (FIG. 7A).
  • a base layer 14 is formed on the porous layer 10a (FIG. 7B).
  • the first conductivity type layer 12 is not formed.
  • a passivation layer 16 is formed on the base layer 14 (FIG. 7C). The formation method of the base layer 14 and the passivation layer 16 may be the same as that in the first embodiment.
  • the passivation layer 16 is bonded to the substrate 18 (FIG. 7D). Then, the substrate 10 is separated using the porous layer 10a (FIG. 7E). These processes can also be performed as in the first embodiment.
  • An i-type layer 22, a second conductivity type layer 24, and a transparent electrode layer 26 are formed on the base layer 14 separated from the substrate 10 (FIG. 7F).
  • the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 can be formed in the same manner as in the first embodiment except that they are formed on the entire surface of the base layer 14. That is, the i-type layer 22 and the second conductivity type layer 24 may be amorphous semiconductor layers, and the transparent electrode layer 26 may be a transparent conductive oxide (TCO) such as tin oxide (SnO 2 ).
  • TCO transparent conductive oxide
  • SnO 2 tin oxide
  • the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are patterned. Patterning can be performed using an etching paste, as in the first embodiment.
  • the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 may be patterned so that power can be collected as evenly as possible from the back surface of the solar cell. For example, it is preferable to use a comb pattern as in the first embodiment.
  • a doped layer 40 containing an n-type dopant is formed on the patterned transparent electrode layer 26 and the exposed base layer 14 (FIG. 7H).
  • the doped layer 40 is used for diffusing an n-type dopant in the base layer 14.
  • the doped layer 40 can be, for example, an amorphous silicon layer containing n-type dopant, phosphosilicate glass (PSG), or the like.
  • the amorphous silicon layer can be formed by atmospheric pressure CVD or the like, and PSG can be formed by a coating method or the like.
  • the thickness of the doped layer 40 is preferably about 300 nm, for example.
  • the first conductivity type diffusion layer 42 is formed by the diffusion treatment of the dopant into the base layer 14 (FIG. 7I).
  • a process is performed in which diffusion is performed only in a region where the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are removed, that is, a region where the doped layer 40 is in direct contact with the base layer 14.
  • the first conductivity type diffusion layer 42 can be formed by irradiating only the target region with the laser beam B and diffusing the dopant into the base layer 14 by local heating with the laser beam B.
  • the laser beam B may have a wavelength of 532 nm, a power of 0.89 W, and a scanning speed of 50 mm / s.
  • the unnecessary doped layer 40 is removed by etching (FIG. 7J).
  • the doped layer 40 can be removed by, for example, nitrogen trifluoride (NF 3 ) plasma etching.
  • NF 3 nitrogen trifluoride
  • a metal layer 44 is formed on the patterned transparent electrode layer 26 and the exposed base layer 14 (FIG. 7K). The metal layer 44 can be formed in the same manner as in the first embodiment.
  • the metal layer 44 is removed, the metal layer 44 is divided, and the first electrode 44 n connected to the first conductivity type diffusion layer 42 and the second electrode 44 p connected to the transparent electrode layer 26. Are formed (FIG. 7L). Similar to the first embodiment, the metal layer 44 can be removed by laser etching or chemical etching.
  • the solar cell 104 in the present embodiment is formed.
  • the first conductivity type diffusion layer 42 diffuses a dopant into the base layer 14 to form a first conductivity type contact region C 1 that is a homojunction, but the i type layer 22 and the second conductivity type layer 24.
  • Forms a second conductivity type contact region C2 which is a heterojunction between the base layer 14 and crystalline and amorphous.
  • passivation is sufficient at the junction interface, and loss of carriers due to recombination can be suppressed. Thereby, the power generation efficiency of the solar cell 104 can be improved.
  • the low-concentration base layer 14 is left between the first conductivity type diffusion layer 42 and the second conductivity type layer 24, so that the gap between the first conductivity type diffusion layer 42 and the second conductivity type layer 24 is maintained. Current leakage is suppressed, and the power generation efficiency of the solar cell 102 is improved.
  • the base layer 14 is formed using the porous layer 10a formed on the substrate 10, and the base layer 14 is separated from the substrate 10 for use.
  • the scope of application of the present invention is not limited to this.
  • a back junction solar cell in which a first conductivity type contact region having a homojunction and a second conductivity type contact region having a hetero junction are formed on a single crystal substrate may be used.
  • the modification of the solar cell 104 in the third embodiment is configured to further include a passivation layer 50 as shown in the cross-sectional view of FIG.
  • the passivation layer 50 is provided between the first conductivity type diffusion layer 42 and the metal layer 44, and has a structure in which the generated current is taken out from the opening 50a provided in the passivation layer 50 to the first electrode 44n and the second electrode 44p. ing.
  • the solar cell 104 in this modification is formed in the same manner as in the third embodiment up to the step of FIG. 7J. Thereafter, a plasma of a raw material gas in which silane (SiH 4 ), hydrogen (H 2 ) and ammonia gas (NH 3 ) or silane (SiH 4 ), hydrogen (H 2 ), and nitrogen (N 2 ) are mixed is formed on the base layer 14.
  • a passivation layer 50 is formed by plasma enhanced chemical vapor deposition (PECVD) supplied (FIG. 9A). Thereby, the main component of the passivation layer 50 is silicon nitride (SiN).
  • the passivation layer 50 is not limited to silicon nitride (SiN), but may be hydrogenated amorphous silicon (a-Si: H) or amorphous silicon oxide (a-SiO 2 ) by a thermal CVD method.
  • the passivation layer 50 may be of a thickness that provides an effect of reducing carrier recombination.
  • the passivation layer 50 preferably has a thickness of several nm to 20 nm.
  • an opening 50a is formed in the passivation layer 50 (FIG. 9B).
  • the opening 50a can be formed by laser irradiation.
  • An opening 50a can be formed by irradiating a corresponding portion of the passivation layer 50 with a laser B2 having a wavelength of 355 nm (Nd: YAG laser beam third harmonic).
  • the laser B2 irradiation conditions are preferably an average power of 0.12 to 0.20 W, an oscillation frequency of 60 to 100 kHz, and a scanning speed of 700 to 1000 mm / s.
  • the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are not damaged significantly on the transparent electrode layer 26 and the first conductivity type diffusion layer 42.
  • the passivation layer 50 can be completely removed. Thereby, electrical contact between the first conductivity type diffusion layer 42 and the first electrode 44n and between the transparent electrode layer 26 and the second electrode 44p can be satisfactorily realized.
  • the opening 50a may be formed so that at least a part of the region between the first conductivity type diffusion layer 42 and the first electrode 44n is passivated by the passivation layer 50.
  • an opening 50 a having a width of 5 ⁇ m may be formed along the first conductivity type diffusion layer 42.
  • the passivation layer 50 between the transparent electrode layer 26 and the second electrode 44p may not be left.
  • the metal layer 44 is formed (FIG. 9C), and the first electrode 44n and the second electrode 44p are formed by removing a part of the metal layer 44 (FIG. 9). 9D).
  • the passivation layer 50 plays a role of terminating dangling bonds (dangling bonds) at the interface between the first conductivity type diffusion layer 42 and the first electrode 44n, which are homojunctions, and recombines carriers at this interface. Reduce losses due to By forming the passivation layer 50, the lifetime of the carrier is improved several times to 10 times or more, and as a result, the open circuit voltage Voc of the solar cell 104 is increased by about 1.1 times to 1.2 times.
  • Table 1 shows the open circuit voltage Voc, the short-circuit current Isc, and the curve factor F.E. when annealing is performed at an annealing temperature of 100 ° C., 150 ° C., and 200 ° C. for about 1 hour. F. And the power generation efficiency Pmax.
  • the value normalized with respect to other conditions is shown with the power generation efficiency Pmax being 1.

Abstract

This backside bonded solar cell has a first conductivity type contact region and a second conductivity type contact region on the principal surface on the opposite side from the light incidence surface, the first conductivity type contact region being a region of homojunction between a crystalline base layer and a crystalline first conductivity type layer, and the second conductivity type contact region being a region of heterojunction between a base layer, an amorphous i type layer, and a second conductivity type layer.

Description

裏面接合型太陽電池及びその製造方法Back junction solar cell and manufacturing method thereof
　本発明は、裏面接合型太陽電池及びその製造方法に関する。 The present invention relates to a back junction solar cell and a manufacturing method thereof.
　太陽光発電システム等の発電効率を高めるために様々なタイプの太陽電池が考え出されている。裏面接合型太陽電池は、受光面側には電極を設けず、裏面側のみに電極が設けられるので、有効受光面積を増加させることができ、発電効率を高めることができる。また、太陽電池セル間の接続を裏面側のみで行えるので、幅広の配線材を用いることができる。したがって、配線部分における電圧降下や電力損失を抑制することができる。 Various types of solar cells have been devised to increase the power generation efficiency of solar power generation systems. Since the back junction solar cell is not provided with an electrode on the light receiving surface side but is provided only on the back surface side, the effective light receiving area can be increased and the power generation efficiency can be increased. Moreover, since the connection between photovoltaic cells can be performed only on the back side, a wide wiring material can be used. Therefore, voltage drop and power loss in the wiring portion can be suppressed.
　例えば、裏面側で単結晶シリコン基板に単結晶のドーピング層をホモ接合させた裏面接合型太陽電池が開示されている（特許文献１）。 For example, a back junction solar cell in which a single crystal doping layer is homojunctioned to a single crystal silicon substrate on the back surface side is disclosed (Patent Document 1).
米国特許出願公開第２０１０／０１０８１３０号明細書US Patent Application Publication No. 2010/0108130
　ところで、結晶質の半導体層同士を接合したホモ接合領域では、接合界面でのパッシベーション効果が十分に得られず、キャリアの再結合が生じ易い。したがって、発電層で生成されたキャリアが界面で再結合し易くなり、太陽電池の発電効率を低下させる原因となっている。 By the way, in the homojunction region in which crystalline semiconductor layers are joined together, the passivation effect at the joining interface cannot be sufficiently obtained, and carrier recombination is likely to occur. Therefore, carriers generated in the power generation layer are easily recombined at the interface, which is a cause of reducing the power generation efficiency of the solar cell.
　本発明は、再結合による効率低下を抑制した裏面接合型太陽電池及びその製造方法を提供することを目的とする。 An object of the present invention is to provide a back junction solar cell that suppresses efficiency reduction due to recombination and a method for manufacturing the back junction solar cell.
　本発明の１つの態様は、光の入射面と反対側の主面に、第１導電型コンタクト領域及び第２導電型コンタクト領域を有する裏面接合型太陽電池であって、第１導電型コンタクト領域は、結晶質のベース層と結晶質の第１導電型層又は第１導電型拡散層とがホモ接合された領域であり、第２導電型コンタクト領域は、ベース層と非結晶質のｉ型層及び第２導電型層とがヘテロ接合された領域である、ことを特徴とする裏面接合型太陽電池である。 One aspect of the present invention is a back junction solar cell having a first conductivity type contact region and a second conductivity type contact region on a main surface opposite to a light incident surface, the first conductivity type contact region Is a region where the crystalline base layer and the crystalline first conductivity type layer or the first conductivity type diffusion layer are homojunction, and the second conductivity type contact region is the base layer and the amorphous i-type The back junction solar cell is a region where the layer and the second conductivity type layer are heterojunctioned.
　本発明の別の態様は、発電層となる結晶質の半導体層のベース層における光の入射面と反対側の主面に結晶質の第１導電型層又は第１導電型拡散層を形成し、ベース層とホモ接合された第１導電型コンタクト領域を形成する第１の工程と、ベース層の主面に非晶質のｉ型層及び第２導電型層を形成し、ベース層とヘテロ接合された第２導電型コンタクト領域を形成する第２の工程と、を備えることを特徴とする裏面接合型太陽電池の製造方法である。 According to another aspect of the present invention, a crystalline first conductivity type layer or a first conductivity type diffusion layer is formed on a main surface opposite to a light incident surface in a base layer of a crystalline semiconductor layer serving as a power generation layer. A first step of forming a first conductivity type contact region homojunction with the base layer, and forming an amorphous i-type layer and a second conductivity type layer on the main surface of the base layer, And a second step of forming a joined second conductivity type contact region. A method of manufacturing a back junction type solar cell.
　本発明によれば、再結合による効率低下を抑制した裏面接合型太陽電池及びその製造方法を提供することができる。 According to the present invention, it is possible to provide a back junction solar cell that suppresses a decrease in efficiency due to recombination and a method for manufacturing the same.
第１の実施の形態における太陽電池の構造を示す断面図である。It is sectional drawing which shows the structure of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 第１の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 1st Embodiment. 本発明の実施の形態における太陽電池の平面構造を示す図である。It is a figure which shows the planar structure of the solar cell in embodiment of this invention. 第２の実施の形態における太陽電池の構造を示す断面図である。It is sectional drawing which shows the structure of the solar cell in 2nd Embodiment. 第２の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 2nd Embodiment. 第２の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 2nd Embodiment. 第２の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 2nd Embodiment. 第２の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 2nd Embodiment. 第２の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 2nd Embodiment. 第３の実施の形態における太陽電池の構造を示す断面図である。It is sectional drawing which shows the structure of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in 3rd Embodiment. 第３の実施の形態の変形例における太陽電池の構造を示す断面図である。It is sectional drawing which shows the structure of the solar cell in the modification of 3rd Embodiment. 第３の実施の形態の変形例における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in the modification of 3rd Embodiment. 第３の実施の形態の変形例における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in the modification of 3rd Embodiment. 第３の実施の形態の変形例における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in the modification of 3rd Embodiment. 第３の実施の形態の変形例における太陽電池の製造方法を示す図である。It is a figure which shows the manufacturing method of the solar cell in the modification of 3rd Embodiment.
＜第１の実施の形態＞
　第１の実施の形態における太陽電池１００は、図１の断面図に示すように、基板１８、パッシベーション層１６、ベース層１４、第１導電型層１２、絶縁層２０、ｉ型層２２、第２導電型層２４、透明電極層２６及び金属層２８（第１電極２８ｎ、第２電極２８ｐ）を含んで構成される。本実施の形態における太陽電池１００は、裏面接合型太陽電池であり、太陽電池で発電された電力を外部へ取り出す電極が受光面とは反対側の主面（以下、裏面という）のみに設けられる。 <First Embodiment>
As shown in the cross-sectional view of FIG. 1, the solar cell 100 in the first embodiment includes a substrate 18, a passivation layer 16, a base layer 14, a first conductivity type layer 12, an insulating layer 20, an i-type layer 22, A two-conductivity type layer 24, a transparent electrode layer 26, and a metal layer 28 (first electrode 28n, second electrode 28p) are included. Solar cell 100 in the present embodiment is a back junction solar cell, and an electrode for taking out the electric power generated by the solar cell to the outside is provided only on the main surface (hereinafter referred to as the back surface) opposite to the light receiving surface. .
　ここで、受光面とは、太陽電池において主に光が入射される主面を意味し、具体的には、太陽電池に入射される光の大部分が入射される面である。また、裏面とは、太陽電池の受光面とは反対側の面を意味する。 Here, the light receiving surface means a main surface on which light is mainly incident in the solar cell, and specifically, a surface on which most of the light incident on the solar cell is incident. Moreover, a back surface means the surface on the opposite side to the light-receiving surface of a solar cell.
　基板１８は、太陽電池を機械的に支持すると共に、太陽電池に含まれる半導体層を外部環境から保護する。また、基板１８は、太陽電池の受光面側に配置されるので、太陽電池で発電に利用される波長帯域の光を透過し、ベース層１４等の各層を機械的に支持できる材料とされる。基板１８、例えば、透光性を有するガラス又はプラスチック等とすればよい。 The substrate 18 mechanically supports the solar cell and protects the semiconductor layer included in the solar cell from the external environment. Further, since the substrate 18 is arranged on the light receiving surface side of the solar cell, the substrate 18 is a material that can transmit light in a wavelength band used for power generation in the solar cell and mechanically support each layer such as the base layer 14. . The substrate 18 may be a light-transmitting glass or plastic.
　ベース層１４は、結晶質の半導体層である。ベース層１４は、太陽電池の発電層となる。ここでは、ベース層１４は、ｎ型のドーパントが添加されたｎ型結晶質シリコン層とする。ベース層１４のドーピング濃度は１０１６／ｃｍ３程度とすればよい。ベース層１４の膜厚は、発電層として十分にキャリアを発生できる膜厚とすることが好ましく、例えば１μｍ以上１００μｍ以下とすればよい。なお、結晶質とは、単結晶のみならず、多数の結晶粒が集合した多結晶も含むものとする。 The base layer 14 is a crystalline semiconductor layer. The base layer 14 becomes a power generation layer of the solar cell. Here, the base layer 14 is an n-type crystalline silicon layer to which an n-type dopant is added. The doping concentration of the base layer 14 may be about 10 16 / cm 3 . The film thickness of the base layer 14 is preferably a film thickness that can sufficiently generate carriers as the power generation layer, and may be, for example, 1 μm or more and 100 μm or less. Note that the crystalline includes not only a single crystal but also a polycrystal in which a large number of crystal grains are aggregated.
　パッシベーション層１６は、基板１８とベース層１４と間に設けられる。パッシベーション層１６は、ベース層１４の表面の未結合手（ダングリングボンド）を終端させる等の役割を果し、ベース層１４の表面におけるキャリアの再結合を抑制する。パッシベーション層１６を設けることによって、太陽電池の受光面側においてベース層１４の表面でのキャリアの再結合による損失を抑制することができる。 The passivation layer 16 is provided between the substrate 18 and the base layer 14. The passivation layer 16 plays a role of terminating dangling bonds (dangling bonds) on the surface of the base layer 14 and suppresses carrier recombination on the surface of the base layer 14. By providing the passivation layer 16, loss due to carrier recombination on the surface of the base layer 14 on the light-receiving surface side of the solar cell can be suppressed.
　パッシベーション層１６は、例えば、窒化シリコン層（ＳｉＮ）を含むようにすればよく、酸化シリコン層（ＳｉＯｘ）と窒化シリコンとの積層構造とすることがより好ましい。例えば、酸化シリコン層及び窒化シリコン層をそれぞれ３０ｎｍ及び４０ｎｍの膜厚で順に積層した構造とすればよい。 The passivation layer 16 may include, for example, a silicon nitride layer (SiN), and more preferably has a stacked structure of a silicon oxide layer (SiOx) and silicon nitride. For example, a structure in which a silicon oxide layer and a silicon nitride layer are sequentially stacked with a thickness of 30 nm and 40 nm, respectively, may be used.
　第１導電型層１２は、結晶質の半導体層である。ここでは、第１導電型層１２は、ｎ型のドーパントが添加されたｎ型結晶質シリコン層とする。第１導電型層１２は、金属層２８（第１電極２８ｎ）と接合される層であり、ベース層１４よりも高いドーピング濃度とされる。第１導電型層１２のドーピング濃度は１０１９／ｃｍ３程度とすればよい。第１導電型層１２の膜厚は、金属との接触抵抗を十分に低くできる範囲でできるだけ薄くすることが好ましく、例えば０．１μｍ以上２μｍ以下とすればよい。 The first conductivity type layer 12 is a crystalline semiconductor layer. Here, the first conductivity type layer 12 is an n-type crystalline silicon layer to which an n-type dopant is added. The first conductivity type layer 12 is a layer bonded to the metal layer 28 (first electrode 28 n), and has a higher doping concentration than the base layer 14. The doping concentration of the first conductivity type layer 12 may be about 10 19 / cm 3 . The film thickness of the first conductivity type layer 12 is preferably as thin as possible within a range where the contact resistance with the metal can be sufficiently lowered, and may be, for example, 0.1 μm or more and 2 μm or less.
　ベース層１４と第１導電型層１２とは結晶質同士がホモ接合された第１導電型コンタクト領域Ｃ１を形成する。第１導電型コンタクト領域Ｃ１は、例えば、太陽電池１００の面上内においてフィンガー及びバスバーを含む櫛形に形成される。第１導電型コンタクト領域Ｃ１の面積は、ベース層１４の主面上において第１導電型層１２とホモ接合されている領域の面積を意味する。 The base layer 14 and the first conductivity type layer 12 form a first conductivity type contact region C1 in which the crystalline materials are homo-joined. The first conductivity type contact region C <b> 1 is formed in a comb shape including fingers and bus bars in the surface of the solar cell 100, for example. The area of the first conductivity type contact region C <b> 1 means the area of a region that is homojunction with the first conductivity type layer 12 on the main surface of the base layer 14.
　絶縁層２０は、第１導電型層１２と後述するｉ型層２２及び第２導電型層２４とを電気的に絶縁するために用いられると共に、第１導電型層１２をエッチングするためのマスクとして利用される。絶縁層２０は、電気的に絶縁性を有する材料から構成し、例えば、窒化シリコン（ＳｉＮ）とすればよい。絶縁層２０の膜厚は、例えば１００ｎｍ程度とすればよい。 The insulating layer 20 is used to electrically insulate the first conductivity type layer 12 from an i-type layer 22 and a second conductivity type layer 24 described later, and a mask for etching the first conductivity type layer 12. Used as The insulating layer 20 is made of an electrically insulating material, for example, silicon nitride (SiN). The thickness of the insulating layer 20 may be about 100 nm, for example.
　ｉ型層２２及び第２導電型層２４は、非晶質系の半導体層とされる。なお、非晶質系とは、アモルファス相又はアモルファス相内に微少な結晶粒が析出している微結晶相を含む。本実施の形態では、ｉ型層２２及び第２導電型層２４は、水素を含有するアモルファスシリコンとする。ｉ型層２２は、実質的に真性のアモルファスシリコン層とされる。第２導電型層２４は、ｐ型のドーパントが添加されたアモルファスシリコン層とされる。第２導電型層２４は、ｉ型層２２よりもドーピング濃度が高い半導体層とされる。例えば、ｉ型層２２には意図的にドーピングを行わず、第２導電型層２４のドーピング濃度は１０１８／ｃｍ３程度とすればよい。ｉ型層２２の膜厚は、光の吸収をできるだけ抑えられるように薄くし、一方でベース層１４の表面が十分にパッシベーションされる程度に厚くする。具体的には、１ｎｍ以上５０ｎｍ以下とすればよく、例えば１０ｎｍとする。また、第２導電型層２４の膜厚は、光の吸収をできるだけ抑えられるように薄くし、一方で太陽電池の開放電圧が十分に高くなるような程度に厚くする。例えば、１ｎｍ以上５０ｎｍ以下とすればよく、例えば１０ｎｍとする。 The i-type layer 22 and the second conductivity type layer 24 are amorphous semiconductor layers. Note that the amorphous system includes an amorphous phase or a microcrystalline phase in which minute crystal grains are precipitated in the amorphous phase. In the present embodiment, the i-type layer 22 and the second conductivity type layer 24 are made of amorphous silicon containing hydrogen. The i-type layer 22 is a substantially intrinsic amorphous silicon layer. The second conductivity type layer 24 is an amorphous silicon layer to which a p-type dopant is added. The second conductivity type layer 24 is a semiconductor layer having a higher doping concentration than the i-type layer 22. For example, the i-type layer 22 is not intentionally doped, and the doping concentration of the second conductivity type layer 24 may be about 10 18 / cm 3 . The thickness of the i-type layer 22 is made thin so that light absorption can be suppressed as much as possible, while it is made thick enough that the surface of the base layer 14 is sufficiently passivated. Specifically, the thickness may be 1 nm or more and 50 nm or less, for example, 10 nm. The film thickness of the second conductivity type layer 24 is made thin so that light absorption can be suppressed as much as possible, while it is made so thick that the open circuit voltage of the solar cell becomes sufficiently high. For example, the thickness may be 1 nm or more and 50 nm or less, for example, 10 nm.
　透明電極層２６は、酸化錫（ＳｎＯ２）、酸化亜鉛（ＺｎＯ）、インジウム錫酸化物（ＩＴＯ）等に錫（Ｓｎ）、アンチモン（Ｓｂ）、フッ素（Ｆ）、アルミニウム（Ａｌ）等をドープした透明導電性酸化物（ＴＣＯ）のうち少なくとも一種類又は複数種を組み合わせて用いることが好適である。特に、酸化亜鉛（ＺｎＯ）は、透光性が高く、抵抗率が低い等の利点を有している。透明電極層２６の膜厚は、１０ｎｍ以上５００ｎｍ以下とすればよく、例えば１００ｎｍとする。 The transparent electrode layer 26 is doped with tin oxide (SnO 2 ), zinc oxide (ZnO), indium tin oxide (ITO), etc. with tin (Sn), antimony (Sb), fluorine (F), aluminum (Al), etc. It is preferable to use at least one or a combination of a plurality of transparent conductive oxides (TCO). In particular, zinc oxide (ZnO) has advantages such as high translucency and low resistivity. The film thickness of the transparent electrode layer 26 may be 10 nm or more and 500 nm or less, for example, 100 nm.
　ベース層１４とｉ型層２２及び第２導電型層２４とは結晶質と非晶質とがヘテロ接合された第２導電型コンタクト領域Ｃ２を形成する。第２導電型コンタクト領域Ｃ２は、例えば、太陽電池１００の面上内においてフィンガー及びバスバーを含み、第１導電型コンタクト領域Ｃ１と組み合わされた櫛形に形成される。第２導電型コンタクト領域Ｃ２の面積は、ベース層１４の主面上においてｉ型層２２及び第２導電型層２４とヘテロ接合されている領域の面積を意味する。ここで、第１導電型コンタクト領域Ｃ１の面積を第２導電型コンタクト領域Ｃ２の面積より小さくするようにパターンを形成することが好適である。 The base layer 14, the i-type layer 22, and the second conductivity type layer 24 form a second conductivity type contact region C2 in which crystalline and amorphous are heterojunctioned. The second conductivity type contact region C2 includes, for example, fingers and bus bars on the surface of the solar cell 100, and is formed in a comb shape combined with the first conductivity type contact region C1. The area of the second conductivity type contact region C <b> 2 means the area of a region heterojunction with the i-type layer 22 and the second conductivity type layer 24 on the main surface of the base layer 14. Here, it is preferable to form a pattern so that the area of the first conductivity type contact region C1 is smaller than the area of the second conductivity type contact region C2.
　金属層２８は、太陽電池の裏面側に設けられる電極となる層である。金属層２８は、金属等の導電性の材料から構成され、例えば、銅（Ｃｕ）やアルミニウム（Ａｌ）を含む材料とする。金属層２８は、第１導電型層１２に接続される第１電極２８ｎと第２導電型層２４に接続される第２電極２８ｐとを含む。金属層２８は、さらに銅（Ｃｕ）や錫（Ｓｎ）等の電解メッキ層を含んでもよい。ただし、これに限定されるものでなく、金、銀等の他の金属、他の導電性材料、又はそれらの組み合わせとしてもよい。 The metal layer 28 is a layer serving as an electrode provided on the back side of the solar cell. The metal layer 28 is made of a conductive material such as metal, and is made of a material containing, for example, copper (Cu) or aluminum (Al). The metal layer 28 includes a first electrode 28 n connected to the first conductivity type layer 12 and a second electrode 28 p connected to the second conductivity type layer 24. The metal layer 28 may further include an electrolytic plating layer such as copper (Cu) or tin (Sn). However, it is not limited to this, It is good also as other metals, such as gold | metal | money and silver, another electroconductive material, or those combinations.
　次に、太陽電池１００の製造方法について説明する。図２Ａ～図２Ｊは、第１の実施の形態における太陽電池１００の製造方法を示す。 Next, a method for manufacturing the solar cell 100 will be described. 2A to 2J show a method for manufacturing solar cell 100 in the first embodiment.
　基板１０は、結晶質の半導体材料からなる。例えば、シリコン、多結晶シリコン、砒化ガリウム（ＧａＡｓ）、インジウム燐（ＩｎＰ）等の半導体基板とする。 The substrate 10 is made of a crystalline semiconductor material. For example, a semiconductor substrate such as silicon, polycrystalline silicon, gallium arsenide (GaAs), or indium phosphide (InP) is used.
　本実施の形態では、基板１０として単結晶シリコン基板を用いた例を示す。したがって、後述する第１導電型層１２、ベース層１４、ｉ型層２２及び第２導電型層２４もシリコン層とする。ただし、基板１０をシリコン以外の材料としてもよく、これらの層もシリコン層以外の材料としてもよい。 In this embodiment, an example in which a single crystal silicon substrate is used as the substrate 10 is shown. Therefore, the first conductivity type layer 12, the base layer 14, the i-type layer 22, and the second conductivity type layer 24 described later are also silicon layers. However, the substrate 10 may be made of a material other than silicon, and these layers may be made of materials other than the silicon layer.
　基板１０の一主面にはポーラス層１０ａが形成される（図２Ａ）。ポーラス層１０ａは、陽極酸化処理等によって形成することができる。陽極酸化に用いる電解質は、例えば、フッ化水素酸及びエタノールの混合液又はフッ化水素酸及び過酸化水素水の混合液とすることができる。陽極酸化の電流密度は、５ｍＡ／ｃｍ２以上６００ｎＡ／ｃｍ２以下とすればよく、例えば１０ｍＡ／ｃｍ２程度とする。 A porous layer 10a is formed on one main surface of the substrate 10 (FIG. 2A). The porous layer 10a can be formed by anodic oxidation or the like. The electrolyte used for anodization can be, for example, a mixed liquid of hydrofluoric acid and ethanol, or a mixed liquid of hydrofluoric acid and hydrogen peroxide. The current density of the anodic oxidation may be 5 mA / cm 2 or more and 600 nA / cm 2 or less, for example, about 10 mA / cm 2 .
　ポーラス層１０ａの厚さは、０．０１μｍ以上３０μｍ以下とすればよく、例えば１０μｍ程度とする。ポーラス層１０ａの空孔径は、０．００２μｍ以上５μｍ以下とすればよく、例えば０．０１μｍ程度とする。ポーラス層１０ａの空孔率は、１０％以上７０％以下とすればよく、例えば２０％程度とする。 The thickness of the porous layer 10a may be 0.01 μm or more and 30 μm or less, for example, about 10 μm. The pore diameter of the porous layer 10a may be 0.002 μm or more and 5 μm or less, for example, about 0.01 μm. The porosity of the porous layer 10a may be 10% or more and 70% or less, for example, about 20%.
　基板１０のポーラス層１０ａ上に第１導電型層１２、ベース層１４が形成される（図２Ｂ）。第１導電型層１２及びベース層１４は、化学気相成長法（ＣＶＤ）で形成することができる。第１導電型層１２及びベース層１４は、ポーラス層１０ａをシード層としたエピタキシャル成長により形成され、結晶質の半導体層同士が接合されたホモ接合領域を形成する。例えば、基板１０を９５０℃に加熱し、水素（Ｈ２）で希釈されたジクロロシラン（ＳｉＨ２Ｃｌ２）を原料ガスとして供給することにより成膜することができる。水素（Ｈ２）とジクロロシラン（ＳｉＨ２Ｃｌ２）の流量は、例えばそれぞれ０．５（ｌ／ｍｉｎ）及び１８０（ｌ／ｍｉｎ）とする。また、必要に応じてホスフィン（ＰＨ３）をドーピングガスとして添加する。 A first conductivity type layer 12 and a base layer 14 are formed on the porous layer 10a of the substrate 10 (FIG. 2B). The first conductivity type layer 12 and the base layer 14 can be formed by chemical vapor deposition (CVD). The first conductivity type layer 12 and the base layer 14 are formed by epitaxial growth using the porous layer 10a as a seed layer, and form a homojunction region in which crystalline semiconductor layers are joined to each other. For example, the film can be formed by heating the substrate 10 to 950 ° C. and supplying dichlorosilane (SiH 2 Cl 2 ) diluted with hydrogen (H 2 ) as a source gas. The flow rates of hydrogen (H 2 ) and dichlorosilane (SiH 2 Cl 2 ) are, for example, 0.5 (l / min) and 180 (l / min), respectively. Further, if necessary, phosphine (PH 3 ) is added as a doping gas.
　ベース層１４上にパッシベーション層１６が形成される（図２Ｃ）。パッシベーション層１６は、シラン（ＳｉＨ４）に酸素（Ｏ２）又は窒素（Ｎ２）を混合した原料ガスをプラズマ化して供給するプラズマ化学気相成長法（ＰＥＣＶＤ）により形成することができる。 A passivation layer 16 is formed on the base layer 14 (FIG. 2C). The passivation layer 16 can be formed by plasma enhanced chemical vapor deposition (PECVD) in which a raw material gas obtained by mixing oxygen (O 2 ) or nitrogen (N 2 ) with silane (SiH 4 ) is supplied as a plasma.
　パッシベーション層１６を形成後、パッシベーション層１６に基板１８が接着される（図２Ｄ）。基板１８は、接着剤等によりパッシベーション層１６に接着される。接着剤は、太陽電池で発電に利用される波長帯域の光を透過する材料とされる。 After forming the passivation layer 16, the substrate 18 is bonded to the passivation layer 16 (FIG. 2D). The substrate 18 is bonded to the passivation layer 16 with an adhesive or the like. The adhesive is a material that transmits light in a wavelength band used for power generation in a solar cell.
　なお、図２Ｄ～図２Ｊでは、説明を分かり易くするために図２Ａ～図２Ｃとは図の上下を逆にして示す。 2D to 2J are shown upside down from FIGS. 2A to 2C for easy understanding.
　図３の平面図に示すように、基板１８に複数の基板１０を接着して太陽電池をモジュール化してもよい。図３は、２４枚の基板１０を１枚の基板１８に接着してモジュール化した例を示している。 As shown in the plan view of FIG. 3, the solar cell may be modularized by bonding a plurality of substrates 10 to the substrate 18. FIG. 3 shows an example in which 24 substrates 10 are bonded to one substrate 18 to form a module.
　次に、ポーラス層１０ａを利用して基板１０が分離される（図２Ｅ）。基板１０は、機械的な処理により分離することができる。例えば、基板１０及び基板１８を真空チャックで吸着し、双方を引き離すように引っ張ることによって、ポーラス層１０ａ部分から基板１０を切り離すことができる。また、基板１０の側面からポーラス層１０ａにウォータージェットを吹き付けることによって、ポーラス層１０ａ部分から基板１０を切り離すことができる。もし、第１導電型層１２側にポーラス層１０ａの一部が残留している場合には、フッ化水素酸（ＨＦ）と硝酸（ＨＮＯ３）とを混合したフッ硝酸によるエッチング等で第１導電型層１２上のポーラス層１０ａを除去してもよい。 Next, the substrate 10 is separated using the porous layer 10a (FIG. 2E). The substrate 10 can be separated by mechanical processing. For example, the substrate 10 can be separated from the porous layer 10a portion by adsorbing the substrate 10 and the substrate 18 with a vacuum chuck and pulling the substrate 10 and the substrate 18 apart. Further, by spraying a water jet from the side surface of the substrate 10 onto the porous layer 10a, the substrate 10 can be separated from the porous layer 10a portion. If a part of the porous layer 10a remains on the first conductivity type layer 12 side, the first layer is etched by hydrofluoric acid mixed with hydrofluoric acid (HF) and nitric acid (HNO 3 ). The porous layer 10a on the conductive type layer 12 may be removed.
　基板１０から切り離された後、第１導電型層１２上に絶縁層２０が形成されると共に、第１導電型層１２がパターンニングされる（図２Ｆ）。絶縁層２０は、シラン（ＳｉＨ４）に窒素（Ｎ２）を混合した原料ガスをプラズマ化して供給するプラズマ化学気相成長法（ＰＥＣＶＤ）により形成することができる。 After being separated from the substrate 10, the insulating layer 20 is formed on the first conductivity type layer 12, and the first conductivity type layer 12 is patterned (FIG. 2F). The insulating layer 20 can be formed by plasma enhanced chemical vapor deposition (PECVD) in which a raw material gas in which nitrogen (N 2 ) is mixed with silane (SiH 4 ) is supplied in a plasma state.
　パターンニングは、エッチングペーストを用いて行うことができる。燐酸を含むエッチングペーストをスクリーン印刷法等により所望のパターンに塗布することによって、絶縁層２０と共に第１導電型層１２を除去する。また、所望のパターンとなるように絶縁層２０をドライエッチングで除去し、絶縁層２０をマスクとして第１導電型層１２をドライエッチング又はウエットエッチングにより除去してもよい。絶縁層２０のドライエッチングには、四フッ化炭素（ＣＦ４）を用いた反応イオンエッチング（ＲＩＥ）を適用すればよい。また、第１導電型層１２のドライエッチングには、六フッ化硫黄（ＳＦ６）を用いた反応イオンエッチング（ＲＩＥ）を適用すればよい。第１導電型層１２のウエットエッチングには、フッ化水素酸を含むエッチャントを用いればよい。 Patterning can be performed using an etching paste. The first conductive type layer 12 is removed together with the insulating layer 20 by applying an etching paste containing phosphoric acid in a desired pattern by a screen printing method or the like. Alternatively, the insulating layer 20 may be removed by dry etching so that a desired pattern is obtained, and the first conductivity type layer 12 may be removed by dry etching or wet etching using the insulating layer 20 as a mask. For dry etching of the insulating layer 20, reactive ion etching (RIE) using carbon tetrafluoride (CF 4 ) may be applied. Further, reactive ion etching (RIE) using sulfur hexafluoride (SF 6 ) may be applied to the dry etching of the first conductivity type layer 12. An etchant containing hydrofluoric acid may be used for wet etching of the first conductivity type layer 12.
　絶縁層２０及び第１導電型層１２は、太陽電池の裏面からできるだけ均等に電力を集電できるようにパターンニングすることが好ましい。例えば、太陽電池に一般的に適用されているフィンガー及びバスバーを含む櫛形のパターンとすることが好ましい。ここで、第１導電型コンタクト領域Ｃ１の面積を第２導電型コンタクト領域Ｃ２の面積より小さくするようにパターンを形成することが好適である。 The insulating layer 20 and the first conductivity type layer 12 are preferably patterned so that power can be collected as evenly as possible from the back surface of the solar cell. For example, a comb-shaped pattern including fingers and bus bars that are generally applied to solar cells is preferable. Here, it is preferable to form a pattern so that the area of the first conductivity type contact region C1 is smaller than the area of the second conductivity type contact region C2.
　パターンニングによって露出されたベース層１４及び絶縁層２０上にｉ型層２２、第２導電型層２４及び透明電極層２６が形成される（図２Ｇ）。ｉ型層２２及び第２導電型層２４は、シラン（ＳｉＨ４）等のケイ素含有ガスのＰＥＣＶＤにより形成することができる。シラン（ＳｉＨ４）等のケイ素含有ガスを供給しつつ、高周波電源から高周波電極へ高周波電力を供給することによって原料ガスのプラズマが生成され、プラズマからベース層１４及び絶縁層２０上に原料が供給されてシリコン薄膜が形成される。原料ガスには、必要に応じてボロン（Ｂ２Ｈ６）等のドーパント含有ガスを混合する。透明電極層２６は、スパッタリング法等を用いて形成することができる。 An i-type layer 22, a second conductivity type layer 24, and a transparent electrode layer 26 are formed on the base layer 14 and the insulating layer 20 exposed by patterning (FIG. 2G). The i-type layer 22 and the second conductivity type layer 24 can be formed by PECVD of a silicon-containing gas such as silane (SiH 4 ). While supplying a silicon-containing gas such as silane (SiH 4 ) and supplying a high-frequency power from a high-frequency power source to a high-frequency electrode, plasma of the source gas is generated, and the source material is supplied from the plasma onto the base layer 14 and the insulating layer 20. Thus, a silicon thin film is formed. The source gas is mixed with a dopant-containing gas such as boron (B 2 H 6 ) as necessary. The transparent electrode layer 26 can be formed using a sputtering method or the like.
　次に、全面に形成されたｉ型層２２、第２導電型層２４、透明電極層２６及び絶縁層２０がパターニングされる（図２Ｈ）。パターンニングは、エッチングペーストを用いて行うことができる。燐酸を含むエッチングペーストをスクリーン印刷法等により所望のパターンに塗布することによって、ｉ型層２２、第２導電型層２４、透明電極層２６及び絶縁層２０を除去する。 Next, the i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the insulating layer 20 formed on the entire surface are patterned (FIG. 2H). Patterning can be performed using an etching paste. The i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the insulating layer 20 are removed by applying an etching paste containing phosphoric acid in a desired pattern by a screen printing method or the like.
　ここでは、ｉ型層２２がベース層１４に直接接触している領域以外の領域、すなわち、絶縁層２０及び第１導電型層１２が残されている第１導電型コンタクト領域Ｃ１上のｉ型層２２、第２導電型層２４、透明電極層２６及び絶縁層２０を除去してパターンニングする。パターンは、太陽電池の裏面からできるだけ均等に電力を集電できるように設定する。例えば、第１導電型層１２の櫛形のパターンと交互に組み合わされる櫛形のパターンとすることが好ましい。 Here, the region other than the region where the i-type layer 22 is in direct contact with the base layer 14, that is, the i-type on the first conductivity type contact region C1 where the insulating layer 20 and the first conductivity type layer 12 are left. The layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the insulating layer 20 are removed and patterned. The pattern is set so that power can be collected as evenly as possible from the back surface of the solar cell. For example, a comb pattern that is alternately combined with the comb pattern of the first conductivity type layer 12 is preferable.
　パターニングされた表面上に金属層２８が形成される（図２Ｉ）。金属層２８は、スパッタリング法又はプラズマ化学気相成長法（ＰＥＣＶＤ）等の薄膜形成方法で形成することができる。 A metal layer 28 is formed on the patterned surface (FIG. 2I). The metal layer 28 can be formed by a thin film formation method such as sputtering or plasma enhanced chemical vapor deposition (PECVD).
　ｉ型層２２、第２導電型層２４、透明電極層２６及び金属層２８の一部が除去される（図２Ｊ）。これにより、金属層２８が分断され、第１導電型層１２に接続される第１電極２８ｎと、透明電極層２６に接続される第２電極２８ｐと、が形成される。 The i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26 and the metal layer 28 are partially removed (FIG. 2J). Thereby, the metal layer 28 is divided, and the first electrode 28 n connected to the first conductivity type layer 12 and the second electrode 28 p connected to the transparent electrode layer 26 are formed.
　ｉ型層２２、第２導電型層２４、透明電極層２６及び金属層２８は、レーザーエッチングにより除去することができる。また、スクリーン印刷法等でレジストを塗布してパターニングされたマスクを形成し、マスクを利用してｉ型層２２、第２導電型層２４、透明電極層２６及び金属層２８をそれぞれ別々にエッチングしてもよい。金属層２８が銅（Ｃｕ）であれば塩化第二鉄をエッチャントとし、金属層２８がアルミニウム（Ａｌ）であれば燐酸をエッチャントとすればよい。また、透明電極層２６のエッチングには、塩酸（ＨＣｌ）を含むエッチャントを用いればよい。また、ｉ型層２２及び第２導電型層２４のエッチングには、フッ化水素酸（ＨＦ）を含むエッチャントを用いればよい。 The i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the metal layer 28 can be removed by laser etching. Also, a resist mask is applied by screen printing or the like to form a patterned mask, and the i-type layer 22, the second conductivity type layer 24, the transparent electrode layer 26, and the metal layer 28 are separately etched using the mask. May be. If the metal layer 28 is copper (Cu), ferric chloride may be used as an etchant, and if the metal layer 28 is aluminum (Al), phosphoric acid may be used as an etchant. For etching the transparent electrode layer 26, an etchant containing hydrochloric acid (HCl) may be used. An etchant containing hydrofluoric acid (HF) may be used for etching the i-type layer 22 and the second conductivity type layer 24.
　このとき、第１導電型層１２に接続される第１電極２８ｎと第２導電型層２４に接続される第２電極２８ｐとが電気的に分離されるようにｉ型層２２、第２導電型層２４、透明電極層２６及び金属層２８を除去する。本実施の形態では、第１導電型層１２上に残された絶縁層２０の領域上のｉ型層２２、第２導電型層２４、透明電極層２６及び金属層２８を除去している。 At this time, the i-type layer 22 and the second conductive layer are connected so that the first electrode 28n connected to the first conductive type layer 12 and the second electrode 28p connected to the second conductive type layer 24 are electrically separated. The mold layer 24, the transparent electrode layer 26, and the metal layer 28 are removed. In the present embodiment, the i-type layer 22, the second conductivity-type layer 24, the transparent electrode layer 26, and the metal layer 28 on the region of the insulating layer 20 left on the first conductivity-type layer 12 are removed.
　また、第１電極２８ｎ及び第２電極２８ｐにさらに電解メッキ等で金属層を積層してもよい。例えば、銅（Ｃｕ）や錫（Ｓｎ）を電解メッキにより形成する。第１電極２８ｎ及び第２電極２８ｐに電位を印加しつつ電解メッキ法で適用することにより、第１電極２８ｎ及び第２電極２８ｐが残された領域上のみに金属層が積層される。 Further, a metal layer may be further laminated on the first electrode 28n and the second electrode 28p by electrolytic plating or the like. For example, copper (Cu) or tin (Sn) is formed by electrolytic plating. By applying an electroplating method while applying a potential to the first electrode 28n and the second electrode 28p, the metal layer is laminated only on the region where the first electrode 28n and the second electrode 28p are left.
　このようにして、本実施の形態における太陽電池１００が形成される（図２Ｊ）。太陽電池１００では、基板１８が受光面側となり、第１電極２８ｎ及び第２電極２８ｐの両方が裏面側に設けられた裏面接合型となる。 In this way, solar cell 100 in the present embodiment is formed (FIG. 2J). In the solar cell 100, the substrate 18 is on the light receiving surface side, and the first electrode 28n and the second electrode 28p are both a back surface junction type provided on the back surface side.
　太陽電池をモジュール化する場合、並置された複数の太陽電池の第１電極２８ｎ及び第２電極２８ｐを導電性のタブで接続して、複数の太陽電池を直列又は並列に接続する。さらに、太陽電池の裏面側に充填材を塗布し、封止材で封止してもよい。充填材及び封止材は、ＥＶＡ、ポリイミド等の樹脂材料とすることができる。これによって、太陽電池モジュールの発電層への水分の浸入等を防ぐことができる。また、封止材は、基板１０と同じガラス、プラスチック等の透明基板とすることができる。これにより、太陽電池全体の強度を向上させることができる。また、裏面側での光の反射性を高めるために、充填材と透明基板との間に反射層を設けたり、又は封止材自体を色付きの基板としてもよい。 When modularizing a solar cell, the first electrode 28n and the second electrode 28p of the plurality of solar cells arranged in parallel are connected by a conductive tab, and the plurality of solar cells are connected in series or in parallel. Furthermore, you may apply | coat a filler to the back surface side of a solar cell, and you may seal with a sealing material. The filler and the sealing material can be resin materials such as EVA and polyimide. This can prevent moisture from entering the power generation layer of the solar cell module. Further, the sealing material can be the same glass or plastic transparent substrate as the substrate 10. Thereby, the intensity | strength of the whole solar cell can be improved. In order to improve the light reflectivity on the back surface side, a reflective layer may be provided between the filler and the transparent substrate, or the sealing material itself may be a colored substrate.
　本実施の形態における太陽電池１００では、第１導電型層１２はベース層１４にエピタキシャル成長されて結晶質同士のホモ接合である第１導電型コンタクト領域Ｃ１を形成するが、ｉ型層２２及び第２導電型層２４はベース層１４と結晶質と非晶質とのヘテロ接合である第２導電型コンタクト領域Ｃ２を形成する。ヘテロ接合が形成された領域では、接合界面においてパッシベーションが十分となり、再結合によるキャリアの損失を抑制することができる。これにより、太陽電池１００の発電効率を向上させることができる。 In solar cell 100 in the present embodiment, first conductivity type layer 12 is epitaxially grown on base layer 14 to form first conductivity type contact region C1 that is a homojunction between crystalline materials. The second conductivity type layer 24 forms a second conductivity type contact region C2 which is a heterojunction between the base layer 14 and crystalline and amorphous. In the region where the heterojunction is formed, passivation is sufficient at the junction interface, and loss of carriers due to recombination can be suppressed. Thereby, the power generation efficiency of the solar cell 100 can be improved.
　特に、第１導電型コンタクト領域Ｃ１の面積を第２導電型コンタクト領域Ｃ２の面積より小さくすることによって、再結合によるキャリアの損失をより抑制することができる。 Particularly, by making the area of the first conductivity type contact region C1 smaller than the area of the second conductivity type contact region C2, loss of carriers due to recombination can be further suppressed.
　なお、ポーラス層１０ａを利用して基板１８を基板１０から分離する際に、第１導電型層１２上にポーラス層１０ａを残留させてもよい。この場合、ポーラス層１０ａは表面に凹凸がある状態で第１導電型層１２と絶縁層２０との間に残留するので、基板１８側から入射した光のうちポーラス層１０ａに到達した光を乱反射させてベース層１４へ戻す役割を果たす。 Note that when the substrate 18 is separated from the substrate 10 using the porous layer 10a, the porous layer 10a may be left on the first conductivity type layer 12. In this case, since the porous layer 10a remains between the first conductivity type layer 12 and the insulating layer 20 with the surface being uneven, the light reaching the porous layer 10a out of the light incident from the substrate 18 side is diffusely reflected. To return to the base layer 14.
＜第２の実施の形態＞
　第２の実施の形態における太陽電池１０２は、図４の断面図に示すように、基板１８、パッシベーション層１６、ベース層１４、第１導電型層１２、絶縁層２０、ｉ型層２２、第２導電型層２４、透明電極層２６及び金属層２８（第１電極２８ｎ、第２電極２８ｐ）を含んで構成される。 <Second Embodiment>
As shown in the sectional view of FIG. 4, the solar cell 102 in the second embodiment includes a substrate 18, a passivation layer 16, a base layer 14, a first conductivity type layer 12, an insulating layer 20, an i-type layer 22, A two-conductivity type layer 24, a transparent electrode layer 26, and a metal layer 28 (first electrode 28n, second electrode 28p) are included.
　本実施の形態では、第１導電型層１２とｉ型層２２及び第２導電型層２４との間にアンダーカットＡ（ギャップ）を有する点で第１の実施の形態における太陽電池１００と異なる。他の構成要素については、第１の実施の形態における太陽電池１００と同様であるので説明を省略する。以下、アンダーカットＡについて製造方法と共に説明する。 This embodiment is different from the solar cell 100 in the first embodiment in that an undercut A (gap) is provided between the first conductivity type layer 12 and the i-type layer 22 and the second conductivity type layer 24. . Since other components are the same as those of the solar cell 100 in the first embodiment, description thereof is omitted. Hereinafter, the undercut A will be described together with the manufacturing method.
　本実施の形態では、絶縁層２０及び第１導電型層１２のパターンニングの際に基板１８の平面方向にも第１導電型層１２をエッチングしてアンダーカットＡを形成する（図５Ａ）。アンダーカットＡは、パターニングされた絶縁層２０の下に形成される空間である。 In the present embodiment, when the insulating layer 20 and the first conductivity type layer 12 are patterned, the first conductivity type layer 12 is also etched in the plane direction of the substrate 18 to form an undercut A (FIG. 5A). The undercut A is a space formed under the patterned insulating layer 20.
　アンダーカットＡは、第１導電型層１２に対して等方性エッチングを施すことにより形成することができる。第１導電型層１２を等方性エッチングするためには、例えば、フッ化水素酸（ＨＦ）と硝酸（ＨＮＯ３）とを混合したフッ硝酸を用いればよい。 The undercut A can be formed by subjecting the first conductivity type layer 12 to isotropic etching. In order to etch the first conductivity type layer 12 isotropically, for example, hydrofluoric acid obtained by mixing hydrofluoric acid (HF) and nitric acid (HNO 3 ) may be used.
　次に、ｉ型層２２、第２導電型層２４及び透明電極層２６に形成する。このとき、アンダーカットＡは、ｉ型層２２及び第２導電型層２４は、第１導電型層１２と直接接触させないようにするギャップ（空間）として機能する（図５Ｂ）。 Next, the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are formed. At this time, the undercut A functions as a gap (space) that prevents the i-type layer 22 and the second conductivity type layer 24 from being in direct contact with the first conductivity type layer 12 (FIG. 5B).
　その後、第１の実施の形態と同様に、金属層２８のパターンニングまで処理が行われる（図５Ｃ～図５Ｅ）。これにより、太陽電池１０２が形成される。 Thereafter, similarly to the first embodiment, the processing is performed up to the patterning of the metal layer 28 (FIGS. 5C to 5E). Thereby, the solar cell 102 is formed.
　太陽電池１０２では、何も充填されていない空間であるギャップ（アンダーカットＡ）が設けられることによって、ｉ型層２２及び第２導電型層２４は、第１導電型層１２と直接接触しない。したがって、ｉ型層２２及び第２導電型層２４と第１導電型層１２との間の電流リークが抑制され、太陽電池１０２の発電効率が向上される。 In the solar cell 102, the i-type layer 22 and the second conductivity type layer 24 are not in direct contact with the first conductivity type layer 12 by providing a gap (undercut A) that is a space in which nothing is filled. Therefore, current leakage between the i-type layer 22 and the second conductivity type layer 24 and the first conductivity type layer 12 is suppressed, and the power generation efficiency of the solar cell 102 is improved.
＜第３の実施の形態＞
　第３の実施の形態における太陽電池１０４は、図６の断面図に示すように、基板１８、パッシベーション層１６、ベース層１４、第１導電型拡散層４２、ｉ型層２２、第２導電型層２４、透明電極層２６及び金属層４４（第１電極４４ｎ、第２電極４４ｐ）を含んで構成される。本実施の形態における太陽電池１０４は、裏面接合型太陽電池であり、太陽電池で発電された電力を外部へ取り出す電極が受光面とは反対側の主面（以下、裏面という）のみに設けられる。 <Third Embodiment>
As shown in the sectional view of FIG. 6, the solar cell 104 in the third embodiment includes a substrate 18, a passivation layer 16, a base layer 14, a first conductivity type diffusion layer 42, an i-type layer 22, and a second conductivity type. The layer 24 includes the transparent electrode layer 26 and the metal layer 44 (first electrode 44n, second electrode 44p). Solar cell 104 in the present embodiment is a back junction solar cell, and an electrode for taking out the electric power generated by the solar cell to the outside is provided only on the main surface (hereinafter referred to as the back surface) opposite to the light receiving surface. .
　本実施の形態では、第１導電型層１２、絶縁層２０及び金属層２８が設けられておらず、第１導電型拡散層４２及び金属層４４が設けられている点において第１の実施の形態における太陽電池１００と相違するのでこれらについて詳しく説明し、同様の構成要素については説明を省略する。 In the present embodiment, the first conductivity type layer 12, the insulating layer 20, and the metal layer 28 are not provided, but the first conductivity type diffusion layer 42 and the metal layer 44 are provided. Since it is different from the solar cell 100 in the embodiment, these will be described in detail, and description of similar components will be omitted.
　第１導電型拡散層４２は、ベース層１４内に第１導電型（ｎ型）のドーパントを拡散させた層である。ここでは、第１導電型拡散層４２は、ｉ型層２２、第２導電型層２４及び透明電極層２６が形成されていない領域に設けられる。第１導電型拡散層４２のドーピング濃度は１０１９／ｃｍ３程度とすればよい。 The first conductivity type diffusion layer 42 is a layer obtained by diffusing a first conductivity type (n-type) dopant in the base layer 14. Here, the first conductivity type diffusion layer 42 is provided in a region where the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are not formed. The doping concentration of the first conductivity type diffusion layer 42 may be about 10 19 / cm 3 .
　ベース層１４と第１導電型拡散層４２とは結晶質同士がホモ接合された第１導電型コンタクト領域Ｃ１を形成する。第１導電型コンタクト領域Ｃ１は、例えば、太陽電池１０４の面上内においてフィンガー及びバスバーを含む櫛形に形成される。第１導電型コンタクト領域Ｃ１の面積は、ベース層１４の主面において第１導電型拡散層４２とホモ接合されている領域の面積を意味する。ここで、第１導電型コンタクト領域Ｃ１の面積を第２導電型コンタクト領域Ｃ２の面積より小さくするようにパターンを形成することが好適である。例えば、第１導電型拡散層４２及び第２導電型層２４の長さが等しければ、第１導電型拡散層４２のパターンの幅は１．６ｍｍとし、第２導電型層２４のパターンの幅は２．０ｍｍとし、双方の間に０．２ｍｍのベース層１４が残された領域を設ければよい。 The base layer 14 and the first conductivity type diffusion layer 42 form a first conductivity type contact region C1 in which crystals are homo-joined. The first conductivity type contact region C <b> 1 is formed in a comb shape including fingers and bus bars on the surface of the solar cell 104, for example. The area of the first conductivity type contact region C <b> 1 means the area of a region that is homojunction with the first conductivity type diffusion layer 42 in the main surface of the base layer 14. Here, it is preferable to form a pattern so that the area of the first conductivity type contact region C1 is smaller than the area of the second conductivity type contact region C2. For example, if the lengths of the first conductivity type diffusion layer 42 and the second conductivity type layer 24 are equal, the pattern width of the first conductivity type diffusion layer 42 is 1.6 mm, and the pattern width of the second conductivity type layer 24 is May be set to 2.0 mm, and a region in which the base layer 14 of 0.2 mm is left between the two may be provided.
　金属層４４は、太陽電池の裏面側に設けられる電極となる層である。金属層４４は、金属層２８と同様に、金属等の導電性の材料から構成され、例えば、銅（Ｃｕ）やアルミニウム（Ａｌ）を含む材料とする。金属層４４は、第１導電型拡散層４２に接続される第１電極４４ｎと第２導電型層２４に接続される第２電極４４ｐとを含む。金属層４４は、さらに銅（Ｃｕ）や錫（Ｓｎ）等の電解メッキ層を含んでもよい。ただし、これに限定されるものでなく、金、銀等の他の金属、他の導電性材料、又はそれらの組み合わせとしてもよい。 The metal layer 44 is a layer serving as an electrode provided on the back side of the solar cell. Similarly to the metal layer 28, the metal layer 44 is made of a conductive material such as metal, and is made of, for example, a material containing copper (Cu) or aluminum (Al). The metal layer 44 includes a first electrode 44 n connected to the first conductivity type diffusion layer 42 and a second electrode 44 p connected to the second conductivity type layer 24. The metal layer 44 may further include an electrolytic plating layer such as copper (Cu) or tin (Sn). However, it is not limited to this, It is good also as other metals, such as gold | metal | money and silver, another electroconductive material, or those combinations.
　次に、太陽電池１０４の製造方法について説明する。図７Ａ～図７Ｌは、第３の実施の形態における太陽電池１０４の製造方法を示す。 Next, a method for manufacturing the solar cell 104 will be described. 7A to 7L show a method for manufacturing the solar cell 104 according to the third embodiment.
　基板１０は、第１の実施の形態と同様に、結晶質の半導体材料とする。また、基板１０上にはポーラス層１０ａが形成される（図７Ａ）。ポーラス層１０ａ上にはベース層１４が形成される（図７Ｂ）。ここでは、第１の実施の形態と異なり、第１導電型層１２は形成されない。続いて、ベース層１４上にパッシベーション層１６が形成される（図７Ｃ）。ベース層１４及びパッシベーション層１６の形成方法は、第１の実施の形態と同様とすればよい。 The substrate 10 is made of a crystalline semiconductor material as in the first embodiment. A porous layer 10a is formed on the substrate 10 (FIG. 7A). A base layer 14 is formed on the porous layer 10a (FIG. 7B). Here, unlike the first embodiment, the first conductivity type layer 12 is not formed. Subsequently, a passivation layer 16 is formed on the base layer 14 (FIG. 7C). The formation method of the base layer 14 and the passivation layer 16 may be the same as that in the first embodiment.
　次に、パッシベーション層１６を基板１８に接着する（図７Ｄ）。そして、ポーラス層１０ａを利用して基板１０を分離する（図７Ｅ）。これらの処理も第１の実施の形態と同様に行うことができる。 Next, the passivation layer 16 is bonded to the substrate 18 (FIG. 7D). Then, the substrate 10 is separated using the porous layer 10a (FIG. 7E). These processes can also be performed as in the first embodiment.
　基板１０から分離されたベース層１４上にｉ型層２２、第２導電型層２４及び透明電極層２６が形成される（図７Ｆ）。ｉ型層２２、第２導電型層２４及び透明電極層２６は、ベース層１４の全面に形成される他は第１の実施の形態と同様に形成することができる。すなわち、ｉ型層２２及び第２導電型層２４は非晶質系の半導体層とし、透明電極層２６は酸化錫（ＳｎＯ２）等の透明導電性酸化物（ＴＣＯ）とすればよい。 An i-type layer 22, a second conductivity type layer 24, and a transparent electrode layer 26 are formed on the base layer 14 separated from the substrate 10 (FIG. 7F). The i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 can be formed in the same manner as in the first embodiment except that they are formed on the entire surface of the base layer 14. That is, the i-type layer 22 and the second conductivity type layer 24 may be amorphous semiconductor layers, and the transparent electrode layer 26 may be a transparent conductive oxide (TCO) such as tin oxide (SnO 2 ).
　ｉ型層２２、第２導電型層２４及び透明電極層２６はパターンニングされる。パターンニングは、第１の実施の形態と同様に、エッチングペーストを用いて行うことができる。ｉ型層２２、第２導電型層２４及び透明電極層２６は、太陽電池の裏面からできるだけ均等に電力を集電できるようにパターンニングすればよい。例えば、第１の実施の形態と同様に櫛形のパターンとすることが好ましい。 The i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are patterned. Patterning can be performed using an etching paste, as in the first embodiment. The i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 may be patterned so that power can be collected as evenly as possible from the back surface of the solar cell. For example, it is preferable to use a comb pattern as in the first embodiment.
　パターンニングされた透明電極層２６及び露出したベース層１４上にｎ型のドーパントを含むドープ層４０を形成する（図７Ｈ）。ドープ層４０は、ベース層１４にｎ型のドーパントを拡散させるために用いられる。ドープ層４０は、例えば、ｎ型のドーパントを含むアモルファスシリコン層やリン珪酸ガラス（ＰＳＧ）等とすることができる。アモルファスシリコン層は常圧ＣＶＤ等で形成することができ、ＰＳＧは塗布法等で形成することができる。ドープ層４０の膜厚は、例えば３００ｎｍ程度することが好ましい。 A doped layer 40 containing an n-type dopant is formed on the patterned transparent electrode layer 26 and the exposed base layer 14 (FIG. 7H). The doped layer 40 is used for diffusing an n-type dopant in the base layer 14. The doped layer 40 can be, for example, an amorphous silicon layer containing n-type dopant, phosphosilicate glass (PSG), or the like. The amorphous silicon layer can be formed by atmospheric pressure CVD or the like, and PSG can be formed by a coating method or the like. The thickness of the doped layer 40 is preferably about 300 nm, for example.
　ドープ層４０を形成後、ベース層１４へのドーパントの拡散処理により第１導電型拡散層４２が形成される（図７Ｉ）。ここでは、ｉ型層２２、第２導電型層２４及び透明電極層２６が除去された領域、すなわちドープ層４０がベース層１４と直接接触している領域のみに拡散が行われるような処理を行う。 After forming the doped layer 40, the first conductivity type diffusion layer 42 is formed by the diffusion treatment of the dopant into the base layer 14 (FIG. 7I). Here, a process is performed in which diffusion is performed only in a region where the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are removed, that is, a region where the doped layer 40 is in direct contact with the base layer 14. Do.
　例えば、対象となる領域のみにレーザ光Ｂを照射し、レーザ光Ｂによる局所加熱によってドーパントをベース層１４内へ拡散させて第１導電型拡散層４２を形成することができる。レーザ光Ｂは、例えば、波長５３２ｎｍ、電力０．８９Ｗ、走査速度５０ｍｍ／ｓとすればよい。 For example, the first conductivity type diffusion layer 42 can be formed by irradiating only the target region with the laser beam B and diffusing the dopant into the base layer 14 by local heating with the laser beam B. For example, the laser beam B may have a wavelength of 532 nm, a power of 0.89 W, and a scanning speed of 50 mm / s.
　第１導電型拡散層４２を形成後、不要となったドープ層４０がエッチングにより除去される（図７Ｊ）。ドープ層４０は、例えば、三フッ化窒素（ＮＦ３）のプラズマエッチングで除去することができる。ドープ層４０を除去後、パターンニングされた透明電極層２６及び露出したベース層１４上に金属層４４が形成される（図７Ｋ）。金属層４４は、第１の実施の形態と同様に形成することができる。 After forming the first conductivity type diffusion layer 42, the unnecessary doped layer 40 is removed by etching (FIG. 7J). The doped layer 40 can be removed by, for example, nitrogen trifluoride (NF 3 ) plasma etching. After removing the doped layer 40, a metal layer 44 is formed on the patterned transparent electrode layer 26 and the exposed base layer 14 (FIG. 7K). The metal layer 44 can be formed in the same manner as in the first embodiment.
　次に、金属層４４の一部が除去され、金属層４４が分断されて、第１導電型拡散層４２に接続される第１電極４４ｎと、透明電極層２６に接続される第２電極４４ｐと、が形成される（図７Ｌ）。金属層４４は、第１の実施の形態と同様に、レーザーエッチングや化学的エッチングにより除去することができる。 Next, a part of the metal layer 44 is removed, the metal layer 44 is divided, and the first electrode 44 n connected to the first conductivity type diffusion layer 42 and the second electrode 44 p connected to the transparent electrode layer 26. Are formed (FIG. 7L). Similar to the first embodiment, the metal layer 44 can be removed by laser etching or chemical etching.
　このようにして、本実施の形態における太陽電池１０４が形成される。太陽電池１０４では、第１導電型拡散層４２はベース層１４にドーパントを拡散させることによってホモ接合である第１導電型コンタクト領域Ｃ１を形成するが、ｉ型層２２及び第２導電型層２４はベース層１４と結晶質と非晶質とのヘテロ接合である第２導電型コンタクト領域Ｃ２を形成する。本実施の形態においても、ヘテロ接合領域では、接合界面においてパッシベーションが十分となり、再結合によるキャリアの損失を抑制することができる。これにより、太陽電池１０４の発電効率を向上させることができる。 In this way, the solar cell 104 in the present embodiment is formed. In the solar cell 104, the first conductivity type diffusion layer 42 diffuses a dopant into the base layer 14 to form a first conductivity type contact region C 1 that is a homojunction, but the i type layer 22 and the second conductivity type layer 24. Forms a second conductivity type contact region C2 which is a heterojunction between the base layer 14 and crystalline and amorphous. Also in the present embodiment, in the heterojunction region, passivation is sufficient at the junction interface, and loss of carriers due to recombination can be suppressed. Thereby, the power generation efficiency of the solar cell 104 can be improved.
　特に、第１導電型コンタクト領域Ｃ１の面積を第２導電型コンタクト領域Ｃ２の面積より小さくすることによって、再結合によるキャリアの損失をより抑制することができる。 Particularly, by making the area of the first conductivity type contact region C1 smaller than the area of the second conductivity type contact region C2, loss of carriers due to recombination can be further suppressed.
　また、第１導電型拡散層４２と第２導電型層２４との間に低濃度のベース層１４が残されることによって、第１導電型拡散層４２と第２導電型層２４との間の電流リークが抑制され、太陽電池１０２の発電効率が向上される。 Further, the low-concentration base layer 14 is left between the first conductivity type diffusion layer 42 and the second conductivity type layer 24, so that the gap between the first conductivity type diffusion layer 42 and the second conductivity type layer 24 is maintained. Current leakage is suppressed, and the power generation efficiency of the solar cell 102 is improved.
　なお、第１～第３の実施の形態では、基板１０に形成されたポーラス層１０ａを利用してベース層１４を形成し、ベース層１４を基板１０から分離して使用する構成としたが、本発明の適用範囲はこれに限定されるものではない。例えば、単結晶基板にホモ接合を有する第１導電型のコンタクト領域とヘテロ接合を有する第２導電型のコンタクト領域を形成した裏面接合型太陽電池としてもよい。 In the first to third embodiments, the base layer 14 is formed using the porous layer 10a formed on the substrate 10, and the base layer 14 is separated from the substrate 10 for use. The scope of application of the present invention is not limited to this. For example, a back junction solar cell in which a first conductivity type contact region having a homojunction and a second conductivity type contact region having a hetero junction are formed on a single crystal substrate may be used.
＜変形例＞
　第３の実施の形態における太陽電池１０４の変形例は、図８の断面図に示すように、さらにパッシベーション層５０を含んで構成される。パッシベーション層５０は、第１導電型拡散層４２と金属層４４との間に設けられ、パッシベーション層５０に設けられた開口５０ａから発電電流を第１電極４４ｎ及び第２電極４４ｐに取り出す構造とされている。 <Modification>
The modification of the solar cell 104 in the third embodiment is configured to further include a passivation layer 50 as shown in the cross-sectional view of FIG. The passivation layer 50 is provided between the first conductivity type diffusion layer 42 and the metal layer 44, and has a structure in which the generated current is taken out from the opening 50a provided in the passivation layer 50 to the first electrode 44n and the second electrode 44p. ing.
　本変形例における太陽電池１０４は、図７Ｊの工程まで上記第３の実施の形態と同様に形成される。その後、ベース層１４上にシラン（ＳｉＨ４）、水素（Ｈ２）及びアンモニアガス（ＮＨ３）又はシラン（ＳｉＨ４）、水素（Ｈ２）及び窒素（Ｎ２）を混合した原料ガスをプラズマ化して供給するプラズマ化学気相成長法（ＰＥＣＶＤ）によりパッシベーション層５０を形成する（図９Ａ）。これにより、パッシベーション層５０の主成分は窒化シリコン（ＳｉＮ）となる。ただし、パッシベーション層５０は、窒化シリコン（ＳｉＮ）に限定されるものではなく、水素化アモルファスシリコン（ａ－Ｓｉ：Ｈ）又は熱ＣＶＤ法によりアモルファス酸化シリコン（ａ－ＳｉＯ２）でもよい。パッシベーション層５０は、キャリアの再結合を低減する効果が得られる程度の厚さであればよく、例えば、数ｎｍ以上２０ｎｍ以下の膜厚とすることが好適である。 The solar cell 104 in this modification is formed in the same manner as in the third embodiment up to the step of FIG. 7J. Thereafter, a plasma of a raw material gas in which silane (SiH 4 ), hydrogen (H 2 ) and ammonia gas (NH 3 ) or silane (SiH 4 ), hydrogen (H 2 ), and nitrogen (N 2 ) are mixed is formed on the base layer 14. A passivation layer 50 is formed by plasma enhanced chemical vapor deposition (PECVD) supplied (FIG. 9A). Thereby, the main component of the passivation layer 50 is silicon nitride (SiN). However, the passivation layer 50 is not limited to silicon nitride (SiN), but may be hydrogenated amorphous silicon (a-Si: H) or amorphous silicon oxide (a-SiO 2 ) by a thermal CVD method. The passivation layer 50 may be of a thickness that provides an effect of reducing carrier recombination. For example, the passivation layer 50 preferably has a thickness of several nm to 20 nm.
　次に、パッシベーション層５０に開口５０ａを形成する（図９Ｂ）。開口５０ａは、レーザ照射により形成することができる。パッシベーション層５０の該当箇所に、波長３５５ｎｍ（Ｎｄ：ＹＡＧレーザビームの第三高調波）のレーザＢ２を照射することにより開口５０ａを形成することができる。レーザＢ２の照射条件は、平均パワー：０．１２～０．２０Ｗ、発振周波数：６０～１００ｋＨｚ、走査速度：７００～１０００ｍｍ／ｓとすることが好適である。この条件下においてレーザＢ２を照射することにより、ｉ型層２２、第２導電型層２４、透明電極層２６に大きな損傷を与えることなく、透明電極層２６及び第１導電型拡散層４２上のパッシベーション層５０を完全に除去することができる。これにより、第１導電型拡散層４２と第１電極４４ｎとの間及び透明電極層２６と第２電極４４ｐとの間の電気的接触を良好に実現することができる。 Next, an opening 50a is formed in the passivation layer 50 (FIG. 9B). The opening 50a can be formed by laser irradiation. An opening 50a can be formed by irradiating a corresponding portion of the passivation layer 50 with a laser B2 having a wavelength of 355 nm (Nd: YAG laser beam third harmonic). The laser B2 irradiation conditions are preferably an average power of 0.12 to 0.20 W, an oscillation frequency of 60 to 100 kHz, and a scanning speed of 700 to 1000 mm / s. By irradiating the laser B2 under these conditions, the i-type layer 22, the second conductivity type layer 24, and the transparent electrode layer 26 are not damaged significantly on the transparent electrode layer 26 and the first conductivity type diffusion layer 42. The passivation layer 50 can be completely removed. Thereby, electrical contact between the first conductivity type diffusion layer 42 and the first electrode 44n and between the transparent electrode layer 26 and the second electrode 44p can be satisfactorily realized.
　また、開口５０ａは、少なくとも第１導電型拡散層４２と第１電極４４ｎとの間の少なくとも一部の領域がパッシベーション層５０によりパッシベーションされるように形成すればよい。例えば、第１導電型拡散層４２に沿って５μｍ幅の開口５０ａを形成すればよい。一方、透明電極層２６と第２電極４４ｐとの間のパッシベーション層５０は残さないようにしてもよい。 The opening 50a may be formed so that at least a part of the region between the first conductivity type diffusion layer 42 and the first electrode 44n is passivated by the passivation layer 50. For example, an opening 50 a having a width of 5 μm may be formed along the first conductivity type diffusion layer 42. On the other hand, the passivation layer 50 between the transparent electrode layer 26 and the second electrode 44p may not be left.
　その後、上記第３の実施の形態と同様に、金属層４４を形成し（図９Ｃ）、金属層４４の一部を除去することによって第１電極４４ｎ及び第２電極４４ｐが形成される（図９Ｄ）。 Thereafter, similarly to the third embodiment, the metal layer 44 is formed (FIG. 9C), and the first electrode 44n and the second electrode 44p are formed by removing a part of the metal layer 44 (FIG. 9). 9D).
　パッシベーション層５０は、ホモ接合である第１導電型拡散層４２と第１電極４４ｎとの界面の未結合手（ダングリングボンド）を終端させる等の役割を果し、この界面におけるキャリアの再結合による損失を抑制する。パッシベーション層５０を形成することにより、キャリアのライフタイムが数倍～１０倍以上向上し、その結果、太陽電池１０４の開放電圧Ｖｏｃが１．１倍～１．２倍程度増加した。 The passivation layer 50 plays a role of terminating dangling bonds (dangling bonds) at the interface between the first conductivity type diffusion layer 42 and the first electrode 44n, which are homojunctions, and recombines carriers at this interface. Reduce losses due to By forming the passivation layer 50, the lifetime of the carrier is improved several times to 10 times or more, and as a result, the open circuit voltage Voc of the solar cell 104 is increased by about 1.1 times to 1.2 times.
　さらに、上記第３の実施の形態及び変形例において、第１電極４４ｎ及び第２電極４４ｐを形成して第１導電型コンタクト領域Ｃ１及び第２導電型コンタクト領域Ｃ２を形成した後、アニール処理を行うことにより発電効率を向上させることができる。 Further, in the third embodiment and the modification example, after the first electrode 44n and the second electrode 44p are formed to form the first conductivity type contact region C1 and the second conductivity type contact region C2, an annealing process is performed. By doing so, the power generation efficiency can be improved.
　表１は、アニール温度１００℃、１５０℃及び２００℃で１時間程度のアニールを行った場合の開放電圧Ｖｏｃ、短絡電流Ｉｓｃ、曲線因子Ｆ．Ｆ．及び発電効率Ｐｍａｘを示す。表１では、２００℃でアニールした例の開放電圧Ｖｏｃ、短絡電流Ｉｓｃ、曲線因子Ｆ．Ｆ．及び発電効率Ｐｍａｘを１として、他の条件について正規化した値を示している。
Figure JPOXMLDOC01-appb-T000001
 Table 1 shows the open circuit voltage Voc, the short-circuit current Isc, and the curve factor F.E. when annealing is performed at an annealing temperature of 100 ° C., 150 ° C., and 200 ° C. for about 1 hour. F. And the power generation efficiency Pmax. In Table 1, the open-circuit voltage Voc, the short-circuit current Isc, the fill factor F. F. And the value normalized with respect to other conditions is shown with the power generation efficiency Pmax being 1.
Figure JPOXMLDOC01-appb-T000001
　表１に示されているように、１５０℃のアニールを１時間程度行うことにより短絡電流Ｉｓｃ、曲線因子Ｆ．Ｆ．及び発電効率Ｐｍａｘが向上した。これは、第１導電型拡散層４２と第１電極４４ｎとの間、第２導電型層２４と透明電極層２６との間、透明電極層２６と第２電極４４ｐとの間のオーミック接触の特性が向上したためであると推察される。また、１００℃以下の低温アニールでは効果が得られず、２００℃以上の高温アニールではヘテロ接合に悪影響を与えるため、１５０℃のアニールが望ましい。 As shown in Table 1, short-circuit current Isc, fill factor F.V. F. And the power generation efficiency Pmax was improved. This is because the ohmic contact between the first conductivity type diffusion layer 42 and the first electrode 44n, between the second conductivity type layer 24 and the transparent electrode layer 26, and between the transparent electrode layer 26 and the second electrode 44p. This is presumed to be due to improved characteristics. In addition, annealing at a temperature of 150 ° C. is desirable because low temperature annealing at 100 ° C. or lower does not provide an effect, and high temperature annealing at 200 ° C. or higher adversely affects the heterojunction.
　１０　基板、１０ａ　ポーラス層、１２　第１導電型層、１４　ベース層、１６　パッシベーション層、１８　基板、２０　絶縁層、２２　ｉ型層、２４　第２導電型層、２６　透明電極層、２８　金属層、２８ｎ　第１電極、２８ｐ　第２電極、４０　ドープ層、４２　第１導電型拡散層、４４　金属層、４４ｎ　第１電極、４４ｐ　第２電極、５０　パッシベーション層、５０ａ　開口、１００，１０２，１０４　太陽電池。 10 substrate, 10a porous layer, 12 first conductivity type layer, 14 base layer, 16 passivation layer, 18 substrate, 20 insulating layer, 22 i type layer, 24 second conductivity type layer, 26 transparent electrode layer, 28 metal layer, 28n first electrode, 28p second electrode, 40 doped layer, 42 first conductivity type diffusion layer, 44 metal layer, 44n first electrode, 44p second electrode, 50 passivation layer, 50a opening, 100, 102, 104 solar cell .

Claims (8)

  1. 　光の入射面と反対側の主面に、第１導電型コンタクト領域及び第２導電型コンタクト領域を有する裏面接合型太陽電池であって、
    　前記第１導電型コンタクト領域は、結晶質のベース層と結晶質の第１導電型層又は第１導電型拡散層とがホモ接合された領域であり、
    　前記第２導電型コンタクト領域は、前記ベース層と非結晶質のｉ型層及び第２導電型層とがヘテロ接合された領域である、
    ことを特徴とする裏面接合型太陽電池。     A back junction solar cell having a first conductivity type contact region and a second conductivity type contact region on a main surface opposite to a light incident surface,
    The first conductivity type contact region is a region where a crystalline base layer and a crystalline first conductivity type layer or a first conductivity type diffusion layer are homojunction,
    The second conductivity type contact region is a region where the base layer, the amorphous i-type layer, and the second conductivity type layer are heterojunction.
    The back junction type solar cell characterized by the above-mentioned.
  2. 　請求項１に記載の裏面接合型太陽電池であって、
    　前記ベース層の受光面側に非晶質の酸化シリコン又は窒化シリコンを含むパッシベーション層が設けられていることを特徴とする裏面接合型太陽電池。     The back junction solar cell according to claim 1,
    A back junction solar cell, wherein a passivation layer containing amorphous silicon oxide or silicon nitride is provided on the light receiving surface side of the base layer.
  3. 　請求項１又は２に記載の裏面接合型太陽電池であって、
    　前記第２導電型コンタクト領域は、前記第１導電型コンタクト領域より面積が広いことを特徴とする裏面接合型太陽電池。     The back junction solar cell according to claim 1 or 2,
    The back junction solar cell, wherein the second conductivity type contact region has a larger area than the first conductivity type contact region.
  4. 　請求項１～３のいずれか１項に記載の裏面接合型太陽電池であって、
    　前記第１導電型コンタクト領域が前記ベース層と前記第１導電型層とがホモ接合された領域である場合、前記第１導電型層と、前記ｉ型層及び第２導電型層と、の間にギャップが設けられていることを特徴とする裏面接合型太陽電池。     The back junction solar cell according to any one of claims 1 to 3,
    When the first conductivity type contact region is a region where the base layer and the first conductivity type layer are homojunction, the first conductivity type layer, the i-type layer and the second conductivity type layer, A back junction solar cell characterized in that a gap is provided therebetween.
  5. 　請求項１～３のいずれか１項に記載の裏面接合型太陽電池であって、
    　前記第１導電型コンタクト領域が前記ベース層と前記第１導電型拡散層とがホモ接合された領域である場合、前記第１導電型拡散層と、前記ｉ型層及び第２導電型層と、の間に前記ベース層が残されていることを特徴とする裏面接合型太陽電池。     The back junction solar cell according to any one of claims 1 to 3,
    When the first conductivity type contact region is a region where the base layer and the first conductivity type diffusion layer are homojunction, the first conductivity type diffusion layer, the i-type layer, and the second conductivity type layer, A back junction solar cell, wherein the base layer is left between the two.
  6. 　発電層となる結晶質の半導体層のベース層における光の入射面と反対側の主面に結晶質の第１導電型層又は第１導電型拡散層を形成し、前記ベース層とホモ接合された第１導電型コンタクト領域を形成する第１の工程と、
    　前記ベース層の前記主面に非晶質のｉ型層及び第２導電型層を形成し、前記ベース層とヘテロ接合された第２導電型コンタクト領域を形成する第２の工程と、
    を備えることを特徴とする裏面接合型太陽電池の製造方法。     A crystalline first conductive type layer or a first conductive type diffusion layer is formed on the main surface opposite to the light incident surface in the base layer of the crystalline semiconductor layer to be the power generation layer, and is homojunction with the base layer. A first step of forming a first conductivity type contact region;
    A second step of forming an amorphous i-type layer and a second conductivity type layer on the main surface of the base layer, and forming a second conductivity type contact region heterojunction with the base layer;
    The manufacturing method of the back junction type solar cell characterized by including.
  7. 　請求項６に記載の裏面接合型太陽電池の製造方法であって、
    　前記第２導電型コンタクト領域の面積を前記第１導電型コンタクト領域の面積より広く形成することを特徴とする裏面接合型代用電池の製造方法。     It is a manufacturing method of the back junction type solar cell according to claim 6,
    A method of manufacturing a back junction type substitute battery, wherein the area of the second conductivity type contact region is formed wider than the area of the first conductivity type contact region.
  8. 　請求項１に記載の裏面接合型太陽電池であって、
    　前記第１導電型層又は前記第１導電型拡散層と金属層との間にパッシベーション層が設けられ、前記パッシベーション層に設けられた開口を介して前記第１導電型層又は前記第１導電型拡散層と前記金属層とが接続されていることを特徴とする裏面接合型太陽電池。
          The back junction solar cell according to claim 1,
    A passivation layer is provided between the first conductivity type layer or the first conductivity type diffusion layer and the metal layer, and the first conductivity type layer or the first conductivity type is provided through an opening provided in the passivation layer. A back junction solar cell, wherein a diffusion layer and the metal layer are connected.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2804219A1 (en) * 2013-05-16 2014-11-19 LG Electronics, Inc. Solar cell and method for manufacturing the same
JPWO2015115360A1 (en) * 2014-01-29 2017-03-23 パナソニックＩｐマネジメント株式会社 Solar cell
EP4073849A4 (en) * 2019-12-10 2023-12-13 Maxeon Solar Pte. Ltd. Aligned metallization for solar cells

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7449152B2 (en) 2020-04-23 2024-03-13 株式会社カネカ Solar cell manufacturing method and solar cell

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010080887A (en) * 2008-09-29 2010-04-08 Sanyo Electric Co Ltd Solar cell and method of manufacturing the same
US20100108130A1 (en) * 2008-10-31 2010-05-06 Crystal Solar, Inc. Thin Interdigitated backside contact solar cell and manufacturing process thereof
JP2011155229A (en) * 2010-01-28 2011-08-11 Sanyo Electric Co Ltd Solar cell and method of manufacturing solar cell

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010080887A (en) * 2008-09-29 2010-04-08 Sanyo Electric Co Ltd Solar cell and method of manufacturing the same
US20100108130A1 (en) * 2008-10-31 2010-05-06 Crystal Solar, Inc. Thin Interdigitated backside contact solar cell and manufacturing process thereof
JP2011155229A (en) * 2010-01-28 2011-08-11 Sanyo Electric Co Ltd Solar cell and method of manufacturing solar cell

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2804219A1 (en) * 2013-05-16 2014-11-19 LG Electronics, Inc. Solar cell and method for manufacturing the same
US10566484B2 (en) 2013-05-16 2020-02-18 Lg Electronics Inc. Solar cell and method for manufacturing the same
JPWO2015115360A1 (en) * 2014-01-29 2017-03-23 パナソニックＩｐマネジメント株式会社 Solar cell
EP4073849A4 (en) * 2019-12-10 2023-12-13 Maxeon Solar Pte. Ltd. Aligned metallization for solar cells

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