JP2008186185A - Serial data transmission method and system therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To selectively transmit serial data to a plurality of slave devices from a master device without increasing the number of signal lines to be output from the master device, without increasing the number of bits of the serial data. <P>SOLUTION: The master device changes over a pulse width of a strobe signal STB according to a storage address of the opposite slave device to be transmitted. The slave device measures the pulse width of the strobe signal STB, detects whether the slave address according to the pulse width and its own slave address accord, and decides the data of a prescribed number of bits taken in by a serial data signal SDATA and a synchronous clock signal SCK when according. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

A conventional general three-wire synchronous serial data transmission apparatus will be described with reference to FIG.
In general, as shown in FIG. 1A, a 3-wire synchronous serial data transmission apparatus transmits a serial data line for transmitting a serial data signal SDATA, a synchronous clock signal line for transmitting a synchronous clock signal SCK, and a strobe signal STB. The master device 10 and the slave device 20 are connected to each other by a strobe signal line. FIGS. 1B and 1C are two types of timing charts for performing serial data transmission using the apparatus shown in FIG. In both types of FIGS. 1B and 1C, the master device 10 outputs a serial data signal to be transmitted and also outputs a synchronous clock signal SCK synchronized with the serial data signal.

  In the type of FIG. 1B, after outputting serial data of a predetermined number of bits, a strobe signal STB is output for one clock. In the type shown in FIG. 1C, the strobe signal STB is held at a high level while the serial data signal SDATA is being output.

  The slave device 20 takes in the state (signal level) of the serial data signal SDATA at the rising timing of the synchronous clock signal SCK. In the type shown in FIG. 1B, when the strobe signal STB rises, a data string of a predetermined number of bits captured so far is determined. In the type shown in FIG. 1C, serial data is sequentially fetched while the strobe signal STB is at a high level, and the fetching is terminated when the strobe signal STB is at a low level.

  In the example shown in FIG. 1, serial data transmission is performed between a single master device 10 and a single slave device 20, but serial communication is performed between a single master device and a plurality of slave devices. Conventionally, two methods have been adopted as a method for performing data transmission.

  FIG. 2 shows the first method. As shown in FIG. 2A, to the master device 10, in this example, three slave devices 20a, 20b, and 20c are connected in common to the serial data signal SDATA and the synchronous clock signal SCK, and the strobe signals STBa and STBb are connected. , STBc are connected to slave devices 20a, 20b, 20c, respectively. That is, in this method, as shown in FIG. 2B, data is output to the slave device to be transmitted using the serial data signal SDATA and the synchronous clock signal SCK, and the slave device to be transmitted is strobe. One of the signals STBa to STBc is output. In the example shown in FIG. 2B, 3-bit serial data 010 is transmitted to the slave device 20a, 6-bit serial data 010010 is transmitted to the slave device 20b, and 7-bit is transmitted to the slave device 20c. Serial data 0101100 is transmitted.

  FIG. 3 is a diagram showing the second method. As shown in FIG. 3A, the master device 11 and the three slave devices 21a to 21c are connected in common by the signal lines of the serial data signal SDATA, the synchronous clock signal SCK, and the strobe signal STB. . In this method, as shown in FIG. 3B, the address information of the slave device is added to the serial data signal SDATA and transmitted. In this example, a slave address “01” is assigned to the slave device 21a, a slave address “10” is assigned to the slave device 21b, and a slave address “11” is assigned to the slave device 21c.

  When the master device 11 transmits serial data as shown in FIG. 3B, the slave device 21a measures the rising edge of the strobe signal STB, and then extracts the slave address from the serial data signal SDATA. It is detected that the slave address matches its own slave address “01”, and the data portion “010” is extracted from the serial data already received. Further, the slave device 21b detects that the slave address extracted from the serial data signal SDATA coincides with its slave address “10”, and extracts “01001010” of the data portion from the serial data. Similarly, the slave device 21c detects that the slave address extracted from the serial data signal SDATA matches its own slave address “11”, and extracts “0101100” of the data portion from the serial data.

A method of transmitting serial data including a slave address in this way is also disclosed in Patent Document 1. However, in Patent Document 1, data transmission is performed in a total of four lines using a signal line for transmitting the master-in signal MISO.
Japanese Patent No. 3459075

  However, in the configuration in which a strobe signal is prepared for each slave device as shown in FIG. 2, the number of signal lines output from the master device increases as the number of slave devices increases. Therefore, there is a problem that the configuration of the master device and the occupied area of the wiring increase.

  Further, the method of including the slave address in the serial data signal as shown in FIG. 3 has a problem that the total number of bits of the serial data is increased by the number of bits of the slave address and the data transmission efficiency (transfer rate) is lowered. .

  Accordingly, an object of the present invention is to selectively transmit serial data from a master device to a plurality of slave devices without increasing the number of signal lines to be output from the master device and without increasing the number of bits of serial data. It is an object of the present invention to provide a serial data transmission method and system that can be used.

(1) In the present invention, the serial data signal line for transmitting the serial data signal, the synchronous clock signal line for transmitting the synchronous clock signal, and the strobe signal line for transmitting the strobe signal are respectively connected and transmitted. A master device for outputting a serial data signal, a synchronous clock signal synchronized with the serial data signal, and a strobe signal for determining the serial data; and a signal level of the serial data signal is captured in synchronization with the synchronous clock signal; A method of transmitting serial data to and from a slave device that determines the serial data according to the timing or state of the strobe signal,
In the master device, the pulse width of the strobe signal is switched according to the slave address of the slave device on the other side to be transmitted,
The slave device measures the pulse width of the strobe signal, and determines the serial data when the slave address corresponding to the pulse width matches the slave address assigned to the slave device. .

  In addition, for the conventional slave address control, a serial data signal that extracts the slave address added to the serial data and enables the data determination means when the slave address matches the slave address assigned to itself. Superposed slave address control means, and slave address control switching means for measuring the pulse width of the strobe signal and enabling the serial data signal superimposed slave address control means when the pulse width is other than the pulse width indicating the slave address. Provide.

  According to the present invention, the master device only has to switch the pulse width of the strobe signal in accordance with the slave address of the slave device on the other side to be transmitted, and the slave device measures the pulse width of the strobe signal and the pulse width. When the slave address corresponding to the slave address matches the slave address assigned to itself, it is sufficient to determine the captured serial data, so when transmitting serial data from one master device to multiple slave devices It is only necessary to commonly connect the three signal lines that transmit the data signal, the synchronous clock signal, and the strobe signal, and the number of signal lines does not increase. Further, since it is not necessary to superimpose the slave address on the serial data, the data transmission efficiency is not lowered.

  Further, by providing the serial data signal superimposed slave address control means, it can be applied to a conventional slave address control signal in which the slave address is superimposed on the serial data, and by the slave address control switching means, Switching to the method of controlling the slave address according to the pulse width of the strobe signal can be performed accurately. Therefore, it is possible to cope with the case where the master device for performing both types of slave address control is switched by a selector or the like.

<< First Embodiment >>
A serial data transmission method and system according to the first embodiment will be described with reference to FIGS.
FIG. 4 is a block diagram showing a configuration of a master device applied to the serial data transmission method and system, and FIG. 5 is a block diagram showing a configuration of the slave device.

  As shown in FIG. 4, the master device 12 includes a parallel / serial conversion circuit 121, a synchronous clock signal generation circuit 122, a strobe signal generation circuit 123, and a slave address / strobe pulse conversion circuit 124.

  The parallel / serial conversion circuit 121 inputs the data and the number of bits to be sent to the slave device in parallel from the host device, converts them into a serial signal, and outputs it as a serial data signal SDATA.

  The synchronous clock signal generation circuit 122 receives transmission speed data from the host device, outputs the number of synchronous clock signals SCK corresponding to the number of bits to be sent to the slave device, and also outputs the parallel / serial conversion circuit 121 and the strobe signal. A synchronous clock signal is supplied to the generation circuit 123.

  The slave address / strobe pulse conversion circuit 124 inputs the slave address of the slave device to which data is to be sent from the host device, and gives a pulse signal having a pulse width corresponding to the slave address to the strobe signal generation circuit 123. This pulse width is a time corresponding to a predetermined number of clocks of the synchronous clock signal, and the strobe signal generation circuit 123 outputs a strobe signal STB that holds a high level by the pulse width corresponding to the slave address.

  FIG. 6 is a timing chart of three signals output from the master device 12. In FIG. 6, numerical values 1 to N attached to the synchronous clock signal SCK represent the number of clocks of the synchronous clock signal. In this example, N synchronous clocks are output. The serial data signal SDATA outputs serial data 01... 110010010110 in time series order. The strobe signal STB is always at the high level at the rising timing of the last clock (clock number 1) of the synchronous clock signal SCK, and the high-level width (pulse width) changes according to the slave address. In the example shown in FIG. 6, the pulse width of the strobe signal STB is the number of clocks of the synchronous clock signal.

As shown in FIG. 5, the slave device 22 includes a shift register 221, a data determination buffer 222, a pulse width measurement circuit 223, and a slave address detection circuit 224.
The shift register 221 sequentially stores the signal level of the serial data signal SDATA in synchronization with the synchronous clock signal SCK, that is, at the rising timing of the synchronous clock signal SCK.

  The pulse width measurement circuit 223 receives the strobe signal STB and the synchronous clock signal SCK and measures the pulse width of the strobe signal STB. That is, while the strobe signal STB is at a high level, the number of rises of the synchronous clock is counted.

  The slave address detection circuit 224 detects whether or not the slave address corresponding to the pulse width measured by the pulse width measurement circuit 223 matches the slave address predetermined for itself. The slave address detection circuit 224 and the pulse width measurement circuit 223 correspond to the “strobe signal superimposed slave address control means” according to the present invention.

  The data determination buffer 222 determines the data of the shift register 221 at the falling timing of the strobe signal STB while the output of the slave address detection circuit 224 is valid, and stores and outputs the data in the buffer. Data is not fixed under other conditions.

  FIG. 7 shows a circuit configuration in which a plurality of slave devices are connected to one master device and a timing chart of three signal lines.

  When a plurality of slave devices are connected to one master device, the serial data signal SDATA, the synchronous clock signal SCK, and the strobe signal STB are commonly connected by bus as shown in FIG. The slave devices 22a, 22b,... 22m buffer the 3-bit serial data 010 in the shift registers 221 with a series of signals indicated by SDa in FIG. In this example, since the pulse width of the strobe signal STB is 1 (one clock of the synchronous clock signal SCK), the data determination buffer 222 of the slave device 22a stores the 3-bit data 010 at the falling timing of the strobe signal STB. Determine.

  Subsequently, the slave devices 22a, 22b,... 22m buffer 6-bit serial data 010010 in their shift registers 221 by a series of signals indicated by SDb in FIG. In this example, since the pulse width of the strobe signal STB is 2 (for two clocks of the synchronous clock signal SCK), the data determination buffer 222 of the slave device 22b stores the 6-bit data 010010 at the falling timing of the strobe signal STB. Determine.

  Then, the slave devices 22a, 22b,... 22m buffer 7-bit serial data 0101100 in their shift registers 221 by a series of signals indicated by SDm in FIG. In this example, since the pulse width of the strobe signal STB is 3 (3 clocks of the synchronous clock signal SCK), the data determination buffer 222 of the slave device 22m stores the 7-bit data 0101100 at the falling timing of the strobe signal STB. Determine.

<< Second Embodiment >>
A serial data transmission method and system according to the second embodiment will be described with reference to FIGS.
FIG. 8 is a configuration diagram of a serial data transmission system in which a master device that performs conventional slave address control and a master device according to the present invention coexist. The master device 12 is a master device according to the present invention that places slave address information on a strobe signal, and the master devices 11b and 11c are conventional master devices that add a slave address to serial data. These master devices are connected to the selector 30. The selector 30 inputs three-line signals output from these master devices, and selectively outputs one of them. Slave devices 23a, 23b, and 23c commonly receive serial data signal SDATA, synchronous clock signal SCK, and strobe signal STB output from selector 30.

  FIG. 9 is a block diagram showing a configuration of one of the slave devices 23a to 23c shown in FIG. All of the slave devices 23a to 23 have the same configuration. The slave device 23 includes a shift register 231, a data determination buffer 232, a pulse width measurement circuit 233, a slave address detection circuit 234, a transmission method identification circuit 235, and a conventional method data processing circuit 236.

The slave device 23 shown in FIG. 9 is obtained by providing a transmission method identification circuit 235 and a conventional method data processing circuit 236 in the slave device 22 shown in FIG.
The shift register 231 sequentially stores the signal level of the serial data signal SDATA in synchronization with the synchronous clock signal SCK, that is, at the rising timing of the synchronous clock signal SCK.

  If the transmission method identification circuit 235 determines that the transmission method of the master device is the conventional method, the conventional method data processing circuit 236 performs processing suitable for the transmission method on the master side. For example, if the last three bits of the serial data are slave address identification bits, address identification processing is performed, and only the data portion addressed to itself is output to the data determination buffer 232. On the other hand, when the transmission method identifying circuit 235 determines that the transmission method of the master device is that of the present invention, the data input from the shift register 231 is passed through without being processed and output to the data determination buffer 232.

  When the transmission method identification circuit 235 identifies the transmission method of the master device as the conventional method, or the transmission method identification circuit 235 identifies the data confirmation buffer 232 as the transmission method of the master device as that of the present invention. When the slave address detection circuit 234 determines that it is addressed to the slave device, the data from the conventional method data processing circuit 236 is determined at the falling edge of the strobe signal STB, stored in the buffer and output. In other cases, that is, when the transmission method identification circuit 235 identifies the transmission method of the master device as that of the present invention, but the slave address detection circuit 234 determines that it is addressed to another slave device, the conventional method data processing The output from circuit 236 is not determined.

  The pulse width measurement circuit 233 receives the strobe signal STB and the synchronous clock signal SCK, and counts the number of rises of the synchronous clock signal while the strobe signal STB is at a high level.

  If the count value of the pulse width measurement circuit 233 is 0 or equal to the number of clocks of the synchronous clock signal SCK, the transmission method identification circuit 235 determines that the transmission method of the master device is the conventional transmission method, and the conventional method data The active signal is output to the processing circuit 236 and the data determination buffer 232. If they are not equal, the transmission method of the present invention is identified, and a non-active signal is output to the conventional method data processing circuit 236 and the data determination buffer 232.

  In this way, serial data can be transmitted to and from a conventional master device in which a slave address is added to serial data.

It is a figure which shows the conventional 3-wire type serial data transmission method. It is a figure which shows the structure which performs serial data transmission between a single master apparatus and a several slave apparatus by a 1st conventional system. It is a figure which shows the structure which performs serial data transmission between a single master apparatus and a several slave apparatus with a 2nd conventional system. It is a block diagram which shows the structure of the master apparatus which concerns on the serial data transmission method and system which concern on 1st Embodiment. It is a block diagram which shows the structure of the slave apparatus which concerns on the same system. It is a timing chart of each output signal of 3 lines. 5 is a configuration and timing chart for performing serial data transmission between a single master device and a plurality of slave devices. It is a block diagram which shows the structure of the serial data transmission system which concerns on 2nd Embodiment. It is a block diagram which shows the structure of the slave apparatus used for the same system.

Explanation of symbols

10-12-Master device 20-23-Slave device 30-Selector SCK-Synchronous clock signal SDATA-Serial data signal STB-Strobe signal

Claims (3)

A serial data signal line for transmitting a serial data signal, a synchronous clock signal line for transmitting a synchronous clock signal, and a strobe signal line for transmitting a strobe signal are connected to each other, and the serial data signal to be transmitted, the serial data A master device that outputs a synchronous clock signal synchronized with the signal and a strobe signal that determines the serial data; and a signal level of the serial data signal is captured in synchronization with the synchronous clock signal, and the timing or state of the strobe signal A method for transmitting serial data to and from a slave device that determines the serial data according to
In the master device, the pulse width of the strobe signal is switched according to the slave address of the slave device on the other side to be transmitted,
Serial data transmission characterized in that the slave device measures the pulse width of the strobe signal and determines the serial data when a slave address corresponding to the pulse width matches an assigned slave address. Method. A master device and a slave device connected respectively by a serial data signal line for transmitting a serial data signal, a synchronous clock signal line for transmitting a synchronous clock signal, and a strobe signal line for transmitting a strobe signal;
Serial data signal output means for outputting the serial data signal to be transmitted, synchronous clock signal output means for outputting a synchronous clock signal synchronized with the serial data signal, and a strobe signal for determining the range of the serial data A strobe signal output means, provided in the master device,
Serial data input means for capturing the signal level of the serial data signal in synchronization with the synchronous clock signal, and the bit length of the serial data input by the serial data input means in accordance with the timing or state of the strobe signal In the serial data transmission system comprising the data confirmation means in the slave device,
Provided in the master device address setting means for switching the pulse width of the strobe signal according to the slave address of the slave device that is the other party to be transmitted,
Strobe signal superimposed slave address control means for measuring the pulse width of the strobe signal and enabling the data determination means when the slave address corresponding to the pulse width matches the assigned slave address. Serial data transmission system installed in The slave address added to the serial data input by the serial data input means is extracted and the serial data signal superimposed slave address that enables the data determination means when the slave address matches the assigned slave address Control means;
Slave address control switching means for measuring the pulse width of the strobe signal and enabling the serial data signal superimposed slave address control means when the pulse width is other than the pulse width indicating the slave address, the slave device The serial data transmission system according to claim 2 provided in the above.

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