JP2008177295A - Laminated mounting structure - Google Patents

Laminated mounting structure Download PDF

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Publication number
JP2008177295A
JP2008177295A JP2007008373A JP2007008373A JP2008177295A JP 2008177295 A JP2008177295 A JP 2008177295A JP 2007008373 A JP2007008373 A JP 2007008373A JP 2007008373 A JP2007008373 A JP 2007008373A JP 2008177295 A JP2008177295 A JP 2008177295A
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Prior art keywords
electrode
substrate
connection terminal
mounting structure
protruding
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JP5086647B2 (en
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Takanori Sekido
孝典 関戸
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Olympus Corp
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Olympus Corp
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Priority to US12/015,212 priority patent/US7649740B2/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/368Assembling printed circuits with other printed circuits parallel to each other
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0367Metallic bump or raised conductor not used as solder bump
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/09181Notches in edge pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2018Presence of a frame in a printed circuit or printed circuit assembly
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Combinations Of Printed Boards (AREA)
  • Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminated mounting structure where a yield is improved, costs are reduced, and manufacturing time is reduced by reducing size, connection resistance, and the number of manufacturing processes. <P>SOLUTION: The laminated mounting structure has: a bump electrode 201 provided on at least one of a first connection terminal 104a and a second connection terminal 104b while at least a pair of the first connection terminal 104a and the second connection terminal 104b is formed; and a conductive paste 105 that is formed on the side face of an intermediate substrate 103 and electrically connects the first connection terminal 104a and the second connection terminal 104b. The first connection terminal 104a and the second connection terminal 104b are each exposed to the surface of the intermediate substrate 103 by a recess 106. The first connection terminal 104a and the second connection terminal 104b are electrically connected via the bump electrode and a conductive paste 106 in the recess 106 provided on the intermediate substrate 103. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、積層実装構造体、特に複数の部材を部材の厚さ方向に積層してできる3次元
的な積層実装構造体に関するものである。
The present invention relates to a stacked mounting structure, and more particularly to a three-dimensional stacked mounting structure formed by stacking a plurality of members in the thickness direction of members.

従来、電子部品が実装されている基板を備える構造体に関しては、種々の構成が提案されている(例えば、特許文献1、特許文献2参照。)。特許文献1には、例えば、図8に示すような、内視鏡10の先端部に設けられている撮像ユニットに関する実装構造体が開示されている。ここでは、撮像素子11と平行に実装基板を積層する技術が述べられている。この技術では、まず、撮像素子11と平行に実装基板12を配置する。そして、撮像素子11が実装された実装基板12と、その他の部品が実装されている実装基板13とを、スペーサを介して実装する。これにより、スペーサの高さ分で得られた空間に実装基板上の実装部品を配置できる。従って、実装構造体の実装密度を向上できる。この結果、内視鏡の先端部に設けられている撮像ユニットの小型化を図ることができる。   Conventionally, various structures have been proposed for a structure including a substrate on which electronic components are mounted (see, for example, Patent Document 1 and Patent Document 2). For example, Patent Document 1 discloses a mounting structure related to an imaging unit provided at a distal end portion of an endoscope 10 as shown in FIG. Here, a technique is described in which a mounting substrate is stacked in parallel with the imaging element 11. In this technique, first, the mounting substrate 12 is arranged in parallel with the image sensor 11. And the mounting board | substrate 12 with which the image pick-up element 11 was mounted, and the mounting board | substrate 13 with which other components are mounted are mounted through a spacer. Thereby, the mounting components on the mounting substrate can be arranged in the space obtained by the height of the spacer. Therefore, the mounting density of the mounting structure can be improved. As a result, it is possible to reduce the size of the imaging unit provided at the distal end portion of the endoscope.

また、特許文献2には、図9に示すような、メモリモジュール基板24を備える実装構造体20の構成が開示されている。対向する基板21の内側は中空である。基板21の両面に複数の電極が設けられている。そして、基板21の表面の電極と、対向する基板21の裏面の電極とが互いに電気的に接続されている。電極どうしの接続部分では、導電性スペーサ25の両面に異方性導電フィルム22が貼り付けられている。このように、特許文献2には、電子部品23が実装されている基板21の実装構造体が開示されている。この構成では、導電性スペーサ25と異方性導電フィルム22との接合のために、導電性スペーサ25上に設けたスルーホール上に電極を設けている。   Further, Patent Document 2 discloses a configuration of a mounting structure 20 including a memory module substrate 24 as shown in FIG. The inside of the opposing substrate 21 is hollow. A plurality of electrodes are provided on both surfaces of the substrate 21. And the electrode of the surface of the board | substrate 21 and the electrode of the back surface of the board | substrate 21 which opposes are mutually connected electrically. The anisotropic conductive film 22 is attached to both surfaces of the conductive spacer 25 at the connection portion between the electrodes. As described above, Patent Document 2 discloses a mounting structure of the substrate 21 on which the electronic component 23 is mounted. In this configuration, an electrode is provided on a through hole provided on the conductive spacer 25 for bonding the conductive spacer 25 and the anisotropic conductive film 22.

特公平4-38417号公報Japanese Patent Publication No. 4-38417 特開平11-111914号公報JP-A-11-111914

特許文献1に開示された構成では、積層して配置した基板間の電気的導通はリード線14により確保されている。リード線14による基板間接合は、作業の自動化が困難である。例えば、立体的に配置された微小な構造体に、短いリード線を配置し、はんだ付けする作業は、一般的な自動実装機では対応が不可能である。   In the configuration disclosed in Patent Document 1, electrical continuity between the stacked substrates is ensured by the lead wires 14. It is difficult to automate operations between the substrates using the lead wires 14. For example, the operation of placing a short lead wire on a three-dimensionally arranged minute structure and soldering cannot be handled by a general automatic mounting machine.

そのため、リード線14の取付け作業は、自ずと手作業になってくる。また、たとえ手作業によっても、このような実装内容は難度が高い部類に入る。自動化が難しく、作業難度が高い技術では、実装コストの増加や生産能力の低下を招いてしまうという問題がある。また、手作業にてハンドリング可能なリード線の大きさ、及びハンドリング時に制御可能なリード線間の間隙を考慮すると、従来技術の構成では、実装構造体の小型化に対しても不利である。   Therefore, the attachment work of the lead wire 14 is naturally a manual work. Also, even if it is done manually, such mounting contents fall into a highly difficult category. A technique that is difficult to automate and has a high work difficulty has a problem of increasing the mounting cost and reducing the production capacity. Further, considering the size of the lead wire that can be handled manually and the gap between the lead wires that can be controlled during handling, the configuration of the conventional technique is disadvantageous for downsizing the mounting structure.

また、特許文献2に開示された構成では、図9から明らかなように、導電性スペーサ25上に、スルーホール外形よりも大きな面積の電極を設ける必要がある。このため、接合部の狭ピッチ化が困難となる。換言すると、実装構造体を上部から見たときの投影面積を小さくすることが困難である。また、この構成では、導電性スペーサ25と基板21との接合材料として、異方性導電フィルム22を用いている。このため、導電性スペーサ25と基板21との間の接続抵抗値が高くなってしまう欠点がある。   Further, in the configuration disclosed in Patent Document 2, it is necessary to provide an electrode having a larger area than the outline of the through hole on the conductive spacer 25, as is apparent from FIG. For this reason, it becomes difficult to narrow the pitch of the joint. In other words, it is difficult to reduce the projected area when the mounting structure is viewed from above. In this configuration, the anisotropic conductive film 22 is used as a bonding material between the conductive spacer 25 and the substrate 21. For this reason, there exists a fault that the connection resistance value between the conductive spacer 25 and the board | substrate 21 will become high.

このように、従来技術の実装構造体は、電子部品の実装スペースを確保するためのスペーサを介した基板積層実装を行う上で、良好な生産性を確保することが困難である。また、基板の平面方向の投影面積を減少させるように小型化することも困難である。   As described above, it is difficult for the mounting structure according to the prior art to secure good productivity when performing the substrate stack mounting via the spacer for securing the mounting space for the electronic component. It is also difficult to reduce the size so as to reduce the projected area of the substrate in the planar direction.

本発明は、上述のような問題点を考慮してなされたものであり、複数の基板をスペーサを介して接続し、基板間の空間に実装部品を実装する積層実装構造体において、基板の平面方向の投影面積を減少させるように小型化しつつ、さらに、接続抵抗を小さくし、製造工程を少なくしたことで歩留まり向上及びコストの低減及び製造時間の短縮を実現した積層実装構造体を提供することを目的とする。   The present invention has been made in consideration of the above-described problems. In a stacked mounting structure in which a plurality of substrates are connected via spacers and mounting components are mounted in a space between the substrates, the plane of the substrate To provide a stacked mounting structure that achieves yield improvement, cost reduction, and manufacturing time reduction by reducing the connection resistance and reducing the manufacturing process while reducing the size to reduce the projected area in the direction. With the goal.

上述した課題を解決し、目的を達成するために、本発明によれば、被実装部品が実装された第1の部材と、第1の部材に対向して配置され、他の被実装部品が実装された第2の部材との少なくとも2つの部材と、第1の部材と第2の部材との間に設置され、第1の部材と第2の部材とを所定の間隙をもって接続し、内側に被実装部品を収納する空間を有する中間部材と、を有する積層実装構造体であって、第1の部材と第2の部材とには、少なくとも一対の第1の電極と第2の電極とが形成され、さらに第1の電極と第2の電極との少なくともいずれか一方に設けられている突起電極と、第1の電極または第2の電極が形成されている面に対して直交する中間部材の面に形成され、第1の電極と第2の電極とを電気的に接続するための導電部を有し、第1の電極または第2の電極が形成されている面に対して直交する中間部材の面に凹部が形成されることにより、第1の部材の第1の電極及び第2の部材の第2の電極がそれぞれ露出され、突起電極と中間部材に設けられている凹部内の導電部とを介して、第1の電極と第2の電極は電気的に接続されていることを特徴とする積層実装構造体を提供できる。   In order to solve the above-described problems and achieve the object, according to the present invention, the first member on which the mounted component is mounted, the first member is disposed facing the first member, and the other mounted component is Installed between at least two members of the mounted second member, the first member and the second member, and connecting the first member and the second member with a predetermined gap, An intermediate member having a space for housing a mounted component, wherein the first member and the second member include at least a pair of a first electrode and a second electrode. And a projection electrode provided on at least one of the first electrode and the second electrode, and a middle perpendicular to the surface on which the first electrode or the second electrode is formed Conductive portion formed on the surface of the member for electrically connecting the first electrode and the second electrode The first electrode and the second member of the first member are formed by forming a recess in the surface of the intermediate member orthogonal to the surface on which the first electrode or the second electrode is formed. Each of the second electrodes is exposed, and the first electrode and the second electrode are electrically connected via the protruding electrode and the conductive portion in the recess provided in the intermediate member. A stacked mounting structure can be provided.

また、本発明の好ましい態様によれば、第1の電極には第1の突起電極が形成され、第2の電極には第2の突起電極が形成されていることが望ましい。   According to a preferred aspect of the present invention, it is desirable that a first protruding electrode is formed on the first electrode and a second protruding electrode is formed on the second electrode.

また、本発明の好ましい態様によれば、突起電極は、積み重ねて形成されていることが望ましい。   Moreover, according to the preferable aspect of this invention, it is desirable that the protruding electrode is formed by stacking.

また、本発明の好ましい態様によれば、突起電極の形状は、先端部が最も細くなっている形状であることが望ましい。   Moreover, according to the preferable aspect of this invention, it is desirable for the shape of a protruding electrode to be a shape where the front-end | tip part is the thinnest.

本発明によれば、複数の基板をスペーサを介して接続し、基板間の空間に実装部品を実装する積層実装構造体において、基板の平面方向の投影面積を減少させるように小型化しつつ、さらに、接続抵抗を小さくし、製造工程を少なくしたことで歩留まり向上及びコストの低減及び製造時間の短縮を実現した積層実装構造体を提供できるという効果を奏する。   According to the present invention, in a stacked mounting structure in which a plurality of substrates are connected via spacers and a mounting component is mounted in a space between the substrates, the size of the substrate can be reduced while reducing the projected area in the plane direction. As a result, it is possible to provide a stacked mounting structure that can improve the yield, reduce the cost, and shorten the manufacturing time by reducing the connection resistance and reducing the number of manufacturing steps.

以下に、本発明に係る積層実装構造体の実施例を図面に基づいて詳細に説明する。なお、この実施例によりこの発明が限定されるものではない。   Hereinafter, embodiments of the stacked mounting structure according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

図1は、本発明の実施例1に係る積層実装構造体100を分解した状態の斜視構成を示している。第1の基板101aには、受動部品、能動部品をはじめ、電子部品である各種のデバイス102a1、102a2、102a3(以下、適宜「デバイス102a1等」という。)が実装されている。また、第2の基板101bには、受動部品、能動部品をはじめ、電子部品である他の各種のデバイス102b1、102b2、102b3(以下、適宜「デバイス102b1等」という。)が実装されている。第1の基板101aと第2の基板101bとは、対向して配置されている。なお、第1の基板101aは、第1の部材に対応する。第2の基板101bは、第2の部材に対応する。デバイス102a1、102b1等は、被実装部品に対応する。   FIG. 1 shows a perspective configuration of an exploded state of the stacked mounting structure 100 according to the first embodiment of the present invention. On the first substrate 101a, various devices 102a1, 102a2, and 102a3 (hereinafter, referred to as “devices 102a1 and the like” as appropriate) which are electronic components such as passive components and active components are mounted. On the second substrate 101b, various other devices 102b1, 102b2, and 102b3 (hereinafter referred to as “device 102b1 etc.” as appropriate) which are electronic components such as passive components and active components are mounted. The first substrate 101a and the second substrate 101b are disposed to face each other. Note that the first substrate 101a corresponds to the first member. The second substrate 101b corresponds to the second member. The devices 102a1, 102b1, etc. correspond to mounted components.

第1の基板101a、第2の基板101b、及び後述する中間基板103は、それぞれ有機基板、セラミック基板、ガラス基板などで構成されている。また、第1の基板101a、第2の基板101b、及び中間基板103は、基板を複合した複合基板でも良い。   The first substrate 101a, the second substrate 101b, and an intermediate substrate 103 to be described later are each composed of an organic substrate, a ceramic substrate, a glass substrate, and the like. Further, the first substrate 101a, the second substrate 101b, and the intermediate substrate 103 may be a composite substrate in which the substrates are combined.

また、第1の基板101aと第2の基板101bとには、少なくとも一対の第1の接続端子104aと第2の接続端子104bとが形成されている。第1の接続端子104aは、第1の電極に対応する。第2の接続端子104bは、第2の電極に対応する。   In addition, at least a pair of first connection terminals 104a and second connection terminals 104b are formed on the first substrate 101a and the second substrate 101b. The first connection terminal 104a corresponds to the first electrode. The second connection terminal 104b corresponds to the second electrode.

第1の基板101aに設けられた接続端子104a(図1では不図示)は、第1の基板101aに実装された各種のデバイス102a1等と電気的に接続されている。また、接続端子104aは、デバイス102a1等と第2の基板101bとを電気的に接続する機能も有している。   A connection terminal 104a (not shown in FIG. 1) provided on the first substrate 101a is electrically connected to various devices 102a1 and the like mounted on the first substrate 101a. The connection terminal 104a also has a function of electrically connecting the device 102a1 and the like to the second substrate 101b.

同様に、第2の基板101bに設けられた接続端子104bは、第2の基板101bに実装された電子部品である各種のデバイス102b1等と電気的に接続されている。また、接続端子104bは、デバイス102b1等と第1の基板101aとを電気的に接続する機能も有している。   Similarly, the connection terminal 104b provided on the second substrate 101b is electrically connected to various devices 102b1 and the like which are electronic components mounted on the second substrate 101b. Further, the connection terminal 104b also has a function of electrically connecting the device 102b1 and the like to the first substrate 101a.

また、中間基板103は、第1の基板101aと第2の基板101bとの間に設置されている。中間基板103は、第1の基板101と第2の基板101bとを所定の間隙をもって接続し、内側に被実装部品であるデバイス102b1等を収納する空間である開口収納部103aを有する。   Further, the intermediate substrate 103 is disposed between the first substrate 101a and the second substrate 101b. The intermediate substrate 103 connects the first substrate 101 and the second substrate 101b with a predetermined gap, and has an opening accommodating portion 103a that is a space for accommodating a device 102b1 or the like as a mounted component inside.

以下、説明の便宜上、第1の接続端子104aまたは第2の接続端子104bが形成されている面に対して直交する中間基板103の面を、以下、適宜「中間基板103の側面」という。   Hereinafter, for convenience of explanation, the surface of the intermediate substrate 103 that is orthogonal to the surface on which the first connection terminal 104a or the second connection terminal 104b is formed is hereinafter referred to as “side surface of the intermediate substrate 103” as appropriate.

中間基板103の側面方向と垂直な方向に開口収納部103aが、ドリリング、パンチング、レーザー加工、エッチング、型成型などによって形成されている。そして、中間基板103の高さは、第2の基板101bに実装された各種のデバイス102b1等の高さと同等か、もしくは大きいように構成されている。   An opening housing portion 103a is formed in a direction perpendicular to the side surface direction of the intermediate substrate 103 by drilling, punching, laser processing, etching, mold molding, or the like. The height of the intermediate substrate 103 is configured to be equal to or greater than the heights of various devices 102b1 mounted on the second substrate 101b.

図2に示すように、本実施例では、中間基板103の側面に凹部106(溝)が形成されている。これにより、第1の基板101aの第1の接続端子104a及び第2の基板101bの第2の接続端子104bが露出される構成となっている。凹部106は、図1に示すように、中間基板103の周囲にわたって形成されている。また、凹部106は、一定の深さで連続して形成されている。   As shown in FIG. 2, in this embodiment, a recess 106 (groove) is formed on the side surface of the intermediate substrate 103. Thus, the first connection terminal 104a of the first substrate 101a and the second connection terminal 104b of the second substrate 101b are exposed. As shown in FIG. 1, the recess 106 is formed over the periphery of the intermediate substrate 103. Further, the recess 106 is continuously formed at a certain depth.

本実施例によれば、中間基板103の側面の少なくとも一部に凹部106が形成されている。このため、第1の接続端子104a及び第2の接続端子104bの一部がそれぞれ基板の主面方向に露出される。これにより、第1の基板101aと中間基板103、及び第2の基板101bと中間基板103の接続端子の接合面積を大きくすることができる。   According to this embodiment, the recess 106 is formed on at least a part of the side surface of the intermediate substrate 103. Therefore, part of the first connection terminal 104a and the second connection terminal 104b is exposed in the main surface direction of the substrate. Accordingly, the bonding area of the connection terminals of the first substrate 101a and the intermediate substrate 103 and the second substrate 101b and the intermediate substrate 103 can be increased.

図2におけるA−A’面の断面構成を用いて、さらに説明を続ける。図3、図4は、図2におけるA−A’断面の構成を示している。図3の(a)に示すように、第1の接続端子104a及び第2の接続端子104bには、それぞれ突起電極201が対向するように形成されている。   Further description will be continued using the cross-sectional configuration of the A-A ′ plane in FIG. 2. 3 and 4 show the configuration of the A-A ′ cross section in FIG. 2. As shown in FIG. 3A, protruding electrodes 201 are formed on the first connection terminal 104a and the second connection terminal 104b so as to face each other.

また、第1の接続端子104aと第2の接続端子104bとが対向する位置に凹部106が形成されている。このように、積層方向から見たとき、第1の接続端子104aと第2の接続端子104bと凹部106とが同一投影面となるように配置されている。   Further, a recess 106 is formed at a position where the first connection terminal 104a and the second connection terminal 104b face each other. As described above, when viewed from the stacking direction, the first connection terminal 104a, the second connection terminal 104b, and the recess 106 are arranged to be on the same projection plane.

次に、図3の(b)に示すように、中間基板103の側面に形成されている凹部106に導電ペースト供給部202より導電ペースト105を供給する。これにより、第1の接続端子104aと第2の接続端子104bとの間に配線を形成できる。   Next, as shown in FIG. 3B, the conductive paste 105 is supplied from the conductive paste supply unit 202 to the recess 106 formed on the side surface of the intermediate substrate 103. Accordingly, a wiring can be formed between the first connection terminal 104a and the second connection terminal 104b.

この結果、図4に示すように、第1の基板101aと第2の基板101bとを電気的に接続できる。突起電極201同士は、導電ペースト105で接続されている。導電ペースト105は、導電部に対応する。また、図5は、y方向から見た中間基板103の側面の構成を示している。   As a result, as shown in FIG. 4, the first substrate 101a and the second substrate 101b can be electrically connected. The protruding electrodes 201 are connected to each other with a conductive paste 105. The conductive paste 105 corresponds to the conductive part. FIG. 5 shows the configuration of the side surface of the intermediate substrate 103 viewed from the y direction.

ここで、第1の接続端子104a、第2の接続端子104bは、めっきで形成されている。その材質は、例えば、Au、Cu、Agなど、導電性を有する材料であれば良い。   Here, the first connection terminal 104a and the second connection terminal 104b are formed by plating. The material may be a conductive material such as Au, Cu, or Ag.

また、突起電極201は、Auからなるスタッドバンプである。突起電極201は、他にも導電材料による印刷バンプやめっきバンプで形成することもできる。突起電極201の形状は、先端部201aが最も細くなっている形状である。   The protruding electrode 201 is a stud bump made of Au. The protruding electrode 201 can also be formed by a printed bump or a plated bump made of a conductive material. The shape of the protruding electrode 201 is such that the tip 201a is the thinnest.

上述したように、第1の基板101aと第2の基板101bは対向して配置されている。第1の接続端子104a、第2の接続端子104bは、中間基板103に設けられた凹部106(溝)に関して、積層方向から見た投影面において完全に重複する位置に配置されている。   As described above, the first substrate 101a and the second substrate 101b are disposed to face each other. The first connection terminal 104 a and the second connection terminal 104 b are arranged at positions that completely overlap with each other on the projection plane viewed from the stacking direction with respect to the recess 106 (groove) provided in the intermediate substrate 103.

しかしながら、これに限られず、第1の接続端子104a、第2の接続端子104bは、中間基板103に設けられた凹部106(溝)に関して、積層方向から見た投影面において一部が重複する位置に配置しても良い。   However, the present invention is not limited to this, and the first connection terminal 104a and the second connection terminal 104b are positions where the concave portions 106 (grooves) provided in the intermediate substrate 103 partially overlap on the projection plane viewed from the stacking direction. You may arrange in.

第1の接続端子104a、第2の接続端子104bの電極の形状は、例えば、一辺140μmの矩形状である。なお、これに限られず、電極の形状は任意の形状でも良い。また、第1の接続端子104a、第2の接続端子104b上にそれぞれ設けられる突起電極201は、中間基板103に設けられた凹部106(溝)に関して、積層方向から見た投影面において完全に重複する位置に配置されている。さらに、突起電極201の径は、例えば、φ80μmである。突起電極201の直径は、凹部106の寸法(深さ)以下であれば良い。   The shape of the electrodes of the first connection terminal 104a and the second connection terminal 104b is, for example, a rectangular shape having a side of 140 μm. Note that the shape of the electrode is not limited to this, and may be any shape. Further, the protruding electrode 201 provided on each of the first connection terminal 104a and the second connection terminal 104b is completely overlapped on the projection surface viewed from the stacking direction with respect to the recess 106 (groove) provided in the intermediate substrate 103. It is arranged at the position to do. Furthermore, the diameter of the protruding electrode 201 is, for example, φ80 μm. The diameter of the protruding electrode 201 may be equal to or smaller than the dimension (depth) of the recess 106.

そして、第1の基板101a及び第2の基板101b及び第1、第2の接続端子104a、104b及び突起電極201及び中間基板103に囲まれた空間に、導電ペースト105が配置されている。   A conductive paste 105 is arranged in a space surrounded by the first substrate 101 a, the second substrate 101 b, the first and second connection terminals 104 a, 104 b, the protruding electrode 201, and the intermediate substrate 103.

導電ペースト105は、例えば、Ag粒子(粒径50〜5000nm)及びAgナノ粒子(粒径5〜20nm)を含有するペーストである。なお、第1の基板101a、中間基板103及び第2の基板101bは、それぞれ接着剤などにより固定されている。   The conductive paste 105 is, for example, a paste containing Ag particles (particle size 50 to 5000 nm) and Ag nanoparticles (particle size 5 to 20 nm). Note that the first substrate 101a, the intermediate substrate 103, and the second substrate 101b are each fixed by an adhesive or the like.

これにより、突起電極201と中間基板103に設けられている凹部106内の導電ペースト105とを介して、第1の接続端子104aと第2の接続端子104bは電気的に接続されている。   Thus, the first connection terminal 104 a and the second connection terminal 104 b are electrically connected via the protruding electrode 201 and the conductive paste 105 in the recess 106 provided in the intermediate substrate 103.

本実施例では、導電ペースト105が、第1、第2の接続端子104a、104bに接触しない状態であっても、突起電極201を介して、より大きな範囲で導電ペースト105と第1、第2の接続端子104a、104bとの電気的な接続を確保できる。このことから、供給する導電ペースト105の分量の制御が容易になる。このため、設計範囲をより広くすることができ、製造が容易となる。   In this embodiment, even when the conductive paste 105 is not in contact with the first and second connection terminals 104a and 104b, the conductive paste 105 and the first and second conductive pastes 105 are disposed in a larger range via the protruding electrodes 201. It is possible to ensure electrical connection with the connection terminals 104a and 104b. This makes it easy to control the amount of the conductive paste 105 to be supplied. For this reason, a design range can be made wider and manufacture becomes easy.

また、導電ペースト105を加熱硬化させる際に生じる寸法変化が生じた場合でも、より大きな範囲で電気的な接続不良の発生を防ぐことができる。このように、本実施例によれば、凹部106に形成される導電ペースト105が小さくなる方向に誤差を生じた場合でも、突起電極201の高さ分の範囲で、その誤差を相殺できる。このため、電気的な接続を確実に行うことができる。この結果、凹部106内の導電ペースト105の形状誤差の影響を受けにくい積層実装構造体を得ることができる。   Even when a dimensional change occurs when the conductive paste 105 is heat-cured, it is possible to prevent the occurrence of electrical connection failure in a larger range. As described above, according to this embodiment, even when an error occurs in the direction in which the conductive paste 105 formed in the recess 106 becomes smaller, the error can be offset within the range corresponding to the height of the protruding electrode 201. For this reason, electrical connection can be reliably performed. As a result, it is possible to obtain a stacked mounting structure that is not easily affected by the shape error of the conductive paste 105 in the recess 106.

また、本実施例によれば、第1の基板101aと中間基板103、及び第2の基板101bと中間基板103の接続端子の接合面積を大きくすることができる。このため、接合抵抗を小さくすることが可能となる。従って、電気的な接続品質が向上した積層実装構造体を提供することが可能となる。   Further, according to the present embodiment, the bonding area of the connection terminals of the first substrate 101a and the intermediate substrate 103 and the second substrate 101b and the intermediate substrate 103 can be increased. For this reason, it becomes possible to make junction resistance small. Therefore, it is possible to provide a stacked mounting structure with improved electrical connection quality.

さらに、電気的なショートに対して安全な積層実装構造体を提供することが可能となる。特に、積層実装構造体が小型化し、中間基板103の導電ペースト105を狭ピッチ化した場合に有効となる。   Furthermore, it is possible to provide a stacked mounting structure that is safe against electrical shorts. This is particularly effective when the stacked mounting structure is downsized and the conductive paste 105 of the intermediate substrate 103 is narrowed.

また、中間基板103の側面に形成された導電ペースト105を、第1の基板101a及び第2の基板101bを上部から見たときの投影像(投影面積)内に収めることができる。   In addition, the conductive paste 105 formed on the side surface of the intermediate substrate 103 can be contained in a projected image (projected area) when the first substrate 101a and the second substrate 101b are viewed from above.

次に、本発明の実施例2に係る積層実装構造体について説明する。実施例1と同一の部分には同一の符号を付し、重複する説明は省略する。図6は、本実施例の積層実装構造体をy方向から見た中間基板103の側面の構成を示している。図7は、図2に示すのと同様にA−A’断面の構成を示している。   Next, a stacked mounting structure according to Embodiment 2 of the present invention will be described. The same parts as those in the first embodiment are denoted by the same reference numerals, and redundant description is omitted. FIG. 6 shows the configuration of the side surface of the intermediate substrate 103 when the stacked mounting structure of this embodiment is viewed from the y direction. FIG. 7 shows the configuration of the A-A ′ cross section in the same manner as shown in FIG. 2.

本実施例では、突起電極201は、それぞれさらに突起電極301が積み重ねて形成されている。また、突起電極301の形状は、先端部が最も細くなっている形状である。   In this embodiment, each protruding electrode 201 is formed by further stacking protruding electrodes 301. In addition, the shape of the protruding electrode 301 is a shape in which the tip portion is the thinnest.

本実施例では、供給する導電ペースト105の分量にばらつきが生じて導電ペースト供給量が少ない場合であっても、突起電極201が一段の場合に比較して、より大きな範囲で電気的な接続不良の発生を防ぐことができる。   In this embodiment, even when the amount of the conductive paste 105 to be supplied varies and the supply amount of the conductive paste is small, the electrical connection failure is larger in a larger range than when the protruding electrode 201 is one stage. Can be prevented.

また、導電ペースト105を加熱硬化させる際に生じる寸法変化が生じた場合でも、より大きな範囲で電気的な接続不良の発生を防ぐことができる。さらに、突起電極201を積み重ねて、多段化することで、より大きな突起電極表面積において導電ペースト105と接触する。このため、電気的な接続品質がより向上及び安定する。   Even when a dimensional change occurs when the conductive paste 105 is heat-cured, it is possible to prevent the occurrence of electrical connection failure in a larger range. Further, the protruding electrodes 201 are stacked and multi-staged so that the conductive paste 105 is brought into contact with a larger protruding electrode surface area. For this reason, the electrical connection quality is further improved and stabilized.

上記各実施例では、2つの対向する突起電極201を用いている。しかしながら、これに限られず、接続端子104a、104bのうちの少なくとも一方の接続端子に突起電極を形成する構成でも良い。また、突起電極201を積み重ねる場合は、2段に限られない。3段以上に突起電極201を積み重ねることで、さらに上述の効果を奏することができる。   In each of the above embodiments, two opposing protruding electrodes 201 are used. However, the present invention is not limited to this, and a configuration in which a protruding electrode is formed on at least one of the connection terminals 104a and 104b may be employed. Further, the stacking of the protruding electrodes 201 is not limited to two steps. By stacking the protruding electrodes 201 in three or more stages, the above-described effects can be further achieved.

このように、本発明によれば、製造が容易で、小型かつ、電気的接続が確実で、品質が向上及び安定した積層実装構造体を得ることができる。本発明は、その趣旨を逸脱しない範囲で、様々な変形例をとることができる。   Thus, according to the present invention, it is possible to obtain a stacked mounting structure that is easy to manufacture, small in size, reliable in electrical connection, improved in quality, and stable. The present invention can take various modifications without departing from the spirit of the present invention.

以上のように、本発明にかかる積層実装構造体は、端子同士の接合を確実に行うことができ、小型な構造体に有用である。   As described above, the stacked mounting structure according to the present invention can reliably join the terminals, and is useful for a small structure.

本発明の実施例1に係る積層実装構造体を分解した状態の斜視構成を示す図である。It is a figure which shows the isometric view structure of the state which decomposed | disassembled the laminated mounting structure which concerns on Example 1 of this invention. 本発明の実施例1に係る積層実装構造体の斜視構成を示す図である。It is a figure which shows the isometric view structure of the laminated mounting structure which concerns on Example 1 of this invention. 本発明の実施例1に係る積層実装構造体の断面構成を示す図である。It is a figure which shows the cross-sectional structure of the laminated mounting structure which concerns on Example 1 of this invention. 本発明の実施例1に係る積層実装構造体の断面構成を示す他の図である。It is another figure which shows the cross-sectional structure of the laminated mounting structure which concerns on Example 1 of this invention. 本発明の実施例1に係る積層実装構造体の側面構成を示す図である。It is a figure which shows the side surface structure of the laminated mounting structure which concerns on Example 1 of this invention. 本発明の実施例2に係る積層実装構造体の側面構成を示す図である。It is a figure which shows the side surface structure of the laminated mounting structure which concerns on Example 2 of this invention. 本発明の実施例2に係る積層実装構造体の断面構成を示す図である。It is a figure which shows the cross-sectional structure of the laminated mounting structure which concerns on Example 2 of this invention. 従来技術の積層実装構造体の断面構成を示す図である。It is a figure which shows the cross-sectional structure of the laminated mounting structure of a prior art. 従来技術の他の積層実装構造体の断面構成を示す図である。例を示す図である。It is a figure which shows the cross-sectional structure of the other laminated mounting structure of a prior art. It is a figure which shows an example.

符号の説明Explanation of symbols

100 積層実装構造体
101a 第1の基板
101b 第2の基板
102a1、102a2、102a3 デバイス
102b1、102b2、102b3 デバイス
103 中間基板
103a 開口収納部
104a、104b 接続端子
105 導電ペースト
106 凹部
201、301 突起電極
201a 先端部
DESCRIPTION OF SYMBOLS 100 Laminated mounting structure 101a 1st board | substrate 101b 2nd board | substrate 102a1, 102a2, 102a3 Device 102b1, 102b2, 102b3 Device 103 Intermediate board 103a Opening accommodating part 104a, 104b Connection terminal 105 Conductive paste 106 Recessed part 201, 301 Protruding electrode 201a Tip

Claims (4)

被実装部品が実装された第1の部材と、
前記第1の部材に対向して配置され、他の被実装部品が実装された第2の部材との少なくとも2つの部材と、
前記第1の部材と前記第2の部材との間に設置され、前記第1の部材と前記第2の部材とを所定の間隙をもって接続し、内側に前記被実装部品を収納する空間を有する中間部材と、を有する積層実装構造体であって、
前記第1の部材と前記第2の部材とには、少なくとも一対の第1の電極と第2の電極とが形成され、
さらに前記第1の電極と前記第2の電極との少なくともいずれか一方に設けられている突起電極と、
前記第1の電極または前記第2の電極が形成されている面に対して直交する前記中間部材の面に形成され、前記第1の電極と前記第2の電極とを電気的に接続するための導電部を有し、
前記第1の電極または前記第2の電極が形成されている面に対して直交する前記中間部材の面に凹部が形成されることにより、前記第1の部材の前記第1の電極及び前記第2の部材の前記第2の電極がそれぞれ露出され、
前記突起電極と前記中間部材に設けられている前記凹部内の前記導電部とを介して、前記第1の電極と前記第2の電極は電気的に接続されていることを特徴とする積層実装構造体。
A first member on which a component to be mounted is mounted;
At least two members arranged opposite to the first member and a second member on which another mounted component is mounted;
It is installed between the first member and the second member, connects the first member and the second member with a predetermined gap, and has a space for housing the mounted component inside. A laminated mounting structure having an intermediate member,
The first member and the second member are formed with at least a pair of a first electrode and a second electrode,
Furthermore, a protruding electrode provided on at least one of the first electrode and the second electrode;
Formed on the surface of the intermediate member orthogonal to the surface on which the first electrode or the second electrode is formed, for electrically connecting the first electrode and the second electrode Having a conductive part of
By forming a recess in the surface of the intermediate member orthogonal to the surface on which the first electrode or the second electrode is formed, the first electrode and the first electrode of the first member The second electrodes of the two members are respectively exposed;
The multilayer mounting characterized in that the first electrode and the second electrode are electrically connected via the protruding electrode and the conductive portion in the recess provided in the intermediate member. Structure.
前記第1の電極には第1の突起電極が形成され、
前記第2の電極には第2の突起電極が形成されていることを特徴とする請求項1に記載の積層実装構造体。
A first protruding electrode is formed on the first electrode,
The stacked mounting structure according to claim 1, wherein a second protruding electrode is formed on the second electrode.
前記突起電極は、積み重ねて形成されていることを特徴とする請求項1または2に記載の積層実装構造体。   The stacked mounting structure according to claim 1, wherein the protruding electrodes are formed by being stacked. 前記突起電極の形状は、先端部が最も細くなっている形状であることを特徴とする請求項1〜3のいずれか一項に記載の積層実装構造体。   The stacked mounting structure according to any one of claims 1 to 3, wherein a shape of the protruding electrode is a shape in which a tip end portion is the thinnest.
JP2007008373A 2007-01-17 2007-01-17 Stacked mounting structure Expired - Fee Related JP5086647B2 (en)

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