JP2008147334A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device by which individual portions of a semiconductor substrate can be selectively heat-treated at different temperatures by using a laser light. <P>SOLUTION: The method of manufacturing the semiconductor device includes a process (a) wherein a mask member 3 having a laser transmitting portion 3a having a predetermined transmissivity at a portion corresponding to a specific portion A3 of a semiconductor substrate 1 and a laser reflecting portion 3b at a portion corresponding to another portion B3 of the semiconductor substrate 1 is disposed on the semiconductor substrate 1; and a process (b) wherein a laser light 7 is irradiated on the semiconductor substrate 1 via the mask member 3 to heat-treat only the specific portion A3 of the semiconductor substrate 1 by the laser light 7 which has passed through the laser transmitting portion 3a of the mask member 3. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, in which each portion of a semiconductor substrate is selectively heat-treated at different temperatures using laser light.

  Manufacturing a semiconductor device requires a large number of thermal processes. The purpose of the heat treatment is divided into two types: activation of impurities added to the semiconductor and annealing of the deposition film. Conventionally, heat treatment using an electric furnace has been common, but in recent years heat treatment by lamp heating has become mainstream. In any case, the same heat treatment is performed on all devices on the semiconductor substrate. In recent years, a heat treatment technique using laser light is being performed at the research level, and it is possible to activate impurities while maintaining the impurity distribution immediately after impurity implantation by heat treatment in msec (Non-patent Document 1). ).

A. Shima, et.al: Dopant Profile Engineering of CMOS Devices Formed By non-melt Laser Spike Annealing, VLSI Technology Symp.

  However, as a result of performing heat treatment at the same temperature on all devices on the semiconductor substrate, it has been impossible to perform heat treatment optimal for each impurity and structure. For example, when manufacturing a CMOS transistor, B used for SD of pFET has a larger thermal diffusion coefficient than As used for SD (source drain) of nFET, so that pFET should be used to satisfy the short channel characteristics of pFET. When the heat treatment was performed, the heat treatment of the nFET was insufficient, and the performance could not be sufficiently obtained. In addition, the polysilicon of the gate has a lower melting point than the Si substrate, and the upper limit temperature in the optimization has been narrowed to determine the upper limit temperature of the Si substrate heat treatment.

  Accordingly, the present invention has been made to solve the above-described problems, and manufacturing a semiconductor device capable of selectively heat-treating each portion of a semiconductor substrate at a different temperature (appropriate temperature) using a laser beam. It is to provide a method.

  In order to solve the above-mentioned problem, the invention according to claim 1 has a laser transmission part having a predetermined transmittance in a part corresponding to a specific part of the semiconductor substrate, and corresponds to another part of the semiconductor substrate. A mask member having a laser reflecting portion in a portion is disposed on the semiconductor substrate, and the semiconductor substrate is irradiated with laser light through the mask member, so that only the specific portion of the semiconductor substrate is in the mask member. It heat-processes with the said laser beam which permeate | transmitted the laser permeation | transmission part.

  According to a seventh aspect of the present invention, the first specific portion of the semiconductor substrate includes a first laser transmitting portion having a first transmittance, and the second specific portion of the semiconductor substrate is provided with the first specific portion. A mask member having a second laser transmitting portion having a second transmittance different from the first transmittance in a corresponding portion is disposed on the semiconductor substrate, and laser light is transmitted to the semiconductor substrate through the mask member. Irradiating and heat-treating the first specific portion of the semiconductor substrate with the laser light transmitted through the first laser transmitting portion of the mask member, and the second specific portion of the semiconductor substrate, Heat treatment is performed by the laser beam transmitted through the second laser transmitting portion of the mask member.

  According to the first aspect of the present invention, each part of the semiconductor substrate can be selectively heat-treated at different temperatures (appropriate temperatures).

  According to the seventh aspect of the invention, in addition to the effect of the first aspect, the first and second specific portions can be simultaneously heat-treated at an appropriate temperature (different temperatures) by one laser irradiation.

  The present invention utilizes the fact that laser light is irradiated in a single direction at a single wavelength, and arranges a mask member having a different transmittance depending on each part on a semiconductor substrate, and the semiconductor through the mask member. This is a method for manufacturing a semiconductor device in which each part of a semiconductor substrate is heat-treated at different temperatures by irradiating the substrate with laser light.

Embodiment 1 FIG.
In this embodiment, the basic mode of the present invention will be described. Hereinafter, focusing on the impurity implantation regions included in each device (here, two devices) formed on the semiconductor substrate as each portion of the semiconductor substrate, a case will be described where each impurity implantation region is heat-treated at a different temperature. .

  First, as shown in FIG. 1, impurity implantation regions A3 and B3 are formed in formation regions A2 and B2 in the semiconductor substrate 1 where the devices A and B are formed, respectively. Then, a mask member 3 is disposed at a predetermined position on the semiconductor substrate 1.

  The mask member 3 has a predetermined transmittance (that is, transmitted light having a light intensity suitable for the heat treatment of the impurity implantation region A3) in a portion corresponding to a portion (in this case, the impurity implantation region A3: specific portion) to be heat-treated in the semiconductor substrate 1. And a laser reflecting portion 3b in a portion corresponding to a portion of the semiconductor substrate 1 where heat treatment is not desired (impurity implantation region B3: other portion). It is formed like this.

  Then, as shown in FIG. 2, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3. Thus, the impurity implantation region B3 is protected by the laser reflecting portion 3b of the mask member 3 and is not heat-treated, and only the impurity implantation region A3 is heat-treated at an appropriate temperature by the laser light 7 transmitted through the laser transmission portion 3a. .

  After the heat treatment, only the impurity-implanted region B3 is heat-treated at an appropriate temperature in accordance with the procedure based on the above procedure. In this way, the impurity implantation regions A and B of the semiconductor substrate 1 are heat-treated at different temperatures (appropriate temperatures) using the laser beam 7.

  Here, the mask member 3 will be described in detail.

  The mask member 3 is formed in a plate shape, for example. The laser reflecting portion 3b of the mask member 3 is configured by forming a reflective film made of a material having a small absorption coefficient on the mask member 3 (structure 1) or a condition for total reflection (formula 1 described later). Two types of transparent members having different refractive indexes are superposed so as to satisfy the above structure (Structure 2).

  In the case of the structure 1, for example, a metal is used as the substance having a small absorption coefficient. In particular, a metal thin film formed by vacuum deposition is a reflective film having a high reflectivity, and is effectively adapted to an LSI process. The metal is not particularly limited, but it is desirable to select a metal having high affinity with the LSI manufacturing process among Al, Cu, Au, Ag, Co, Ni, W, Pt, Fe, and Ti. In this way, the laser reflecting portion 3b can be configured with a simple configuration using a metallic reflective film.

  Total reflection is a phenomenon in which light is reflected 100% at the boundary surface when light travels from a material with a high refractive index to a material with a low refractive index. For this reason, the heat treatment by the laser beam 7 can be completely blocked even by the laser reflecting portion 3b configured as in the structure 2 described above. The condition for total reflection is that the incident angle of the incident light is larger than the critical angle θc expressed by the following formula 1. Here, n1 is the refractive index of the incident source substance, and n2 (n1> n2) is the refractive index of the incident substance.

  θc ＝ arcsin (n2 / n1) ・ ・ ・ Equation 1

  In this way, the laser reflection portion 3b can be configured with a simple configuration using the total reflection condition (the above formula 1).

  The laser transmitting portion 3a of the mask member 3 is used when transmitting completely (that is, when the transmittance is 100%) and when transmitting at an arbitrary transmittance (that is, when the transmittance is greater than 0% and less than 100%). The configuration is different. That is, when transmitting completely, the laser transmission part 3a is comprised by providing the mask member 3 with an opening part. In this way, the laser transmitting portion 3a having a transmittance of 100% can be configured with a simple configuration in which only an opening is provided. On the other hand, when transmitting with arbitrary transmittance, the configuration of the mask member 3 is different between the case of using light refraction and the case of using a metallic permeable film by a metal vapor deposition method or a sputtering method.

  That is, when using light refraction, the laser transmitting portion 3a is configured as a multilayer structure (for example, a two-layer structure) by superposing a plurality of transparent members having different refractive indexes. Light refraction means that when light travels from the substance P (refractive index Np) to the substance Q (refractive index Nq), the light is not reflected 100% at the boundary surface, and a part of the light travels beyond the boundary surface. The transmittance at this time is related to the refractive indexes Np and Nq of the respective substances P and Q, and an arbitrary transmittance can be obtained by overlapping a plurality of substances having appropriate refractive indexes. A substance can be obtained. Utilizing this characteristic, in this case (that is, when utilizing light refraction), the laser transmitting portion 3a having an arbitrary transmittance is configured. In this way, the laser transmitting portion 3a having an arbitrary transmittance can be configured with a simple configuration using a combination of refractive indexes.

On the other hand, in the case of using a metal permeable film formed by a metal vapor deposition method or a sputtering method, the laser transmitting portion 3a is a metal made of a metal such as Cr, Inconel, and aluminum on a transmissive member (for example, SiO ₂ substrate) as a base portion. The conductive permeable film is formed by metal vapor deposition or sputtering. In this configuration, the laser transmission portion 3a having an arbitrary transmittance is configured by adjusting the material or thickness of the metallic transmission film. In this way, the laser transmission portion 3a having an arbitrary transmittance can be configured with a simple configuration using a metallic transmission film formed by a metal vapor deposition method or a sputtering method.

  According to the method for manufacturing a semiconductor device described above, the laser transmitting portion 3a having a predetermined transmittance is provided in a portion corresponding to a portion (specific portion) to be heat-treated in the semiconductor substrate 1, and the heat treatment in the semiconductor substrate 1 is performed. A mask member 3 having a laser reflecting portion 3b in a portion corresponding to a portion not desired (other portion) is disposed on the semiconductor substrate 1, and the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3. Thus, the portion of the semiconductor substrate 1 that is not to be heat-treated is protected by the laser reflecting portion 3b and is not heat-treated. Since the heat treatment is performed, each portion of the semiconductor substrate 1 can be selectively heat treated at a different temperature (appropriate temperature). As a result, it is possible to optimize the heat treatment according to the type of impurities, and the improvement of device performance can be expected.

  In addition, the above effect can be realized by adding one mask member 3 to the laser annealing process without adding a processing process for the surface of the semiconductor substrate 1.

  In this embodiment, the impurity implantation regions A3 and B3 included in the devices A and B formed on the semiconductor substrate 1 are handled as the portions of the semiconductor substrate 1, but the impurity implantation regions A3 and B3 Instead, the parts (for example, gate electrodes) of the devices A and B may be handled. By doing so, it is possible to optimize the heat treatment according to the parts of the device, etc., by simply optimizing the heat treatment according to the type of impurities, and further improve the device performance.

Embodiment 2. FIG.
In the first embodiment, the impurity implantation regions A3 and B3 are heat-treated at different temperatures “in different steps”. In contrast, in this embodiment, the impurity implantation regions A3 and B3 are heat-treated at different temperatures “simultaneously”. Hereinafter, this embodiment will be described in detail.

  As shown in FIG. 3, the mask member 3 of this embodiment has a first transmittance (that is, a light intensity suitable for heat treatment of the impurity implantation region A3) in a portion corresponding to the device A (first specific portion). A first laser transmitting portion 3a-1 having a light transmission rate), and a second transmittance different from the first transmittance (a second specific portion) corresponding to the device B (second specific portion) That is, it is formed so as to have the second laser transmitting portion 3a-2 having transmitted light (transmittance at a light intensity suitable for the heat treatment of the impurity implantation region B3).

  As shown in FIG. 3, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3. As a result, the device A (accordingly, the impurity implantation region A3) is heat-treated at an appropriate temperature by the laser beam 7 transmitted through the first laser transmitting portion 3a-1 of the mask member 3, and the device B (accordingly, the impurity implantation region B3). Is heat-treated at an appropriate temperature by the laser light 7 transmitted through the second laser transmitting portion 3a-2 of the mask member 3. In this way, each of the impurity implantation regions A3 and B3 of the semiconductor substrate 1 is simultaneously heat-treated at an appropriate temperature (different temperature) using the laser beam 7.

  According to the semiconductor device manufacturing method described above, in addition to the effects of the first embodiment, the impurity implantation regions A3 and B3 are simultaneously heat-treated at an appropriate temperature (different temperatures) by one laser irradiation. it can.

  In this embodiment, two parts (first and second specific parts) are handled as parts to be simultaneously heat-treated at different temperatures. However, in general, N parts (N: an integer of 3 or more) ( The first, second,..., Nth specific portion) may be handled.

  In this embodiment, the impurity implantation regions A3 and B3 included in the devices A and B formed on the semiconductor substrate 1 are handled as the portions of the semiconductor substrate 1, but the impurity implantation regions A3 and B3 Instead, the parts (for example, gate electrodes) of the devices A and B may be handled.

Embodiment 3 FIG.
The semiconductor device manufacturing method according to this embodiment is obtained by applying the semiconductor device manufacturing method according to the above-described first embodiment to the heat treatment process of the SD (source drain) of the CMOS process, and the SD region of the pFET and the nFET. The SD regions are heat treated at different temperatures. Hereinafter, for example, a CMOS transistor equipped with two devices, nFET and pFET, will be described as an example.

  First, as shown in FIG. 4, according to a normal CMOS process, a CMOS transistor is manufactured up to a stage before heat treatment. That is, for example, an element isolation film 4 is formed on a semiconductor substrate (for example, Si substrate) 1, and a p-well B5 and an n + SD region (impurity implantation region) B3 are formed in a formation region B2 where an nFET is formed in the semiconductor substrate 1. The gate insulating film B6 and the gate electrode B7 are formed, and the n-well A5, the p + SD region (impurity implantation region) A3, the gate insulating film A6, and the gate are formed in the formation region A2 in the semiconductor substrate 1 where the pFET is formed. Electrode A7 is formed.

  As shown in FIG. 4, first, a mask member 3 n for selectively heat-treating the nFET formation region B <b> 2 is disposed at a predetermined position on the semiconductor substrate 1. This mask member 3n has a predetermined transmittance (that is, a transmittance with which light having a light intensity suitable for heat treatment of the nFET (particularly the SD region B3) is obtained) in a portion corresponding to the nFET formation region B2 (specific portion). The laser transmission part 3a is provided, and the laser reflection part 3b is formed in a part (other part) corresponding to the pFET formation region A2.

  Then, as shown in FIG. 5, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3n. Thus, the pFET is protected by the laser reflecting portion 3b of the mask member 3n and is not heat-treated, and only the nFET is heat-treated at an appropriate temperature by the laser light 7 transmitted through the laser transmitting portion 3a of the mask member 3n.

  Then, as shown in FIG. 6, a mask member 3p for selectively heat-treating the pFET formation region A2 is disposed at a predetermined position on the semiconductor substrate 1 instead of the mask member 3n. The mask member 3p has a predetermined transmittance (that is, a transmittance with which light having a light intensity suitable for heat treatment of the pFET (particularly the SD region A3) is obtained) in a portion (specific portion) corresponding to the pFET formation region A2. The laser transmission part 3a is provided, and the laser reflection part 3b is formed in a part (other part) corresponding to the nFET formation region B2.

  Then, as shown in FIG. 6, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3p. Thereby, the nFET is protected by the laser reflecting portion 3b of the mask member 3p and is not heat-treated, and only the pFET is heat-treated at an appropriate temperature by the laser light 7 transmitted through the laser transmitting portion 3a of the mask member 3p. In this way, using the laser beam 7, the pFET (particularly the SD region A3) and the nFET (particularly the SD region B3) in the semiconductor substrate 1 are heat-treated at appropriate temperatures (different temperatures).

  According to the semiconductor device manufacturing method described above, the nFET (especially the SD region B3) and the pFET (especially the SD region A3) in the CMOS transistor can be heat-treated at appropriate temperatures (different temperatures) to improve the performance of the CMOS transistor. Can be made. In this regard, the conventional method can only perform heat treatment at the same temperature for nFET and pFET. Generally, As, which is often used as an impurity in nFET, has a feature that thermal diffusion is small and it is easy to activate at higher temperatures, while B, which is used as an impurity in pFET, has a feature that the diffusion amount is considerably large. Then, the upper limit of the temperature of the heat treatment performed on the entire semiconductor substrate 1 is limited by the pFET, and it is difficult to perform the heat treatment at a temperature suitable for the nFET.

Embodiment 4 FIG.
In the third embodiment, the pFET and the nFET are heat-treated at different temperatures in “different processes”. On the other hand, in this embodiment, the semiconductor device manufacturing method of the above-described second embodiment is used to heat-treat the pFET and the nFET “differently” at different temperatures. Hereinafter, this embodiment will be described in detail.

  First, as shown in FIG. 7, a CMOS transistor is manufactured up to a stage before heat treatment according to a normal CMOS process. That is, for example, an element isolation film 4 is formed on a semiconductor substrate (for example, Si substrate) 1, and a p-well B5 and an n + SD region (impurity implantation region) B3 are formed in a formation region B2 where an nFET is formed in the semiconductor substrate 1. The gate insulating film B6 and the gate electrode B7 are formed, and the n-well A5, the p + SD region (impurity implantation region) A3, the gate insulating film A6, and the gate are formed in the formation region A2 in the semiconductor substrate 1 where the pFET is formed. Electrode A7 is formed.

  Then, as shown in FIG. 7, the mask member 3 is disposed at a predetermined position on the semiconductor substrate 1. The mask member 3 can obtain transmitted light having a light intensity suitable for heat treatment of the first transmittance (that is, the pFET (particularly, the SD region A3)) in a portion corresponding to the pFET formation region A2 (first specific portion). A first laser transmitting portion 3a-1 having a transmittance), and a second transmittance (that is, an nFET (especially SD region B3)) in a portion corresponding to an nFET formation region B2 (second specific portion). It is formed so as to have a second laser transmission portion 3a-2 having a transmittance that allows transmission light having a light intensity suitable for heat treatment.

  Then, as shown in FIG. 8, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3. As a result, the pFET is heat-treated at an appropriate temperature by the laser light 7 transmitted through the first laser transmitting portion 3a-1 of the mask member 3, and the nFET is subjected to the second laser transmitting portion 3a-2 of the mask member 3. Heat treatment is performed at an appropriate temperature by the transmitted laser beam 7. In this way, the nFET and pFET of the semiconductor substrate 1 are simultaneously heat-treated at appropriate temperatures (different temperatures) using the laser beam 7.

  According to the semiconductor device manufacturing method described above, in addition to the effects of the third embodiment, the nFET and the pFET in the CMOS transistor can be selectively heat-treated at a suitable temperature simultaneously by one laser irradiation.

Embodiment 5. FIG.
In the third embodiment, the pFET SD region A3 and the nFET SD region B3 are heat-treated at different temperatures, and the pFET (nFET) SD region A3 (B3) and the gate electrode A7 (B7) are subjected to heat treatment. Each was heat-treated at the same temperature. On the other hand, in this embodiment, the semiconductor device manufacturing method of the first and second embodiments is combined, so that the pFET SD region A3, the pFET gate electrode A7, the nFET SD region B3, and the nFET gate electrode B7. Are heat-treated at different temperatures. Hereinafter, this embodiment will be described in detail.

  First, as shown in FIG. 9, a CMOS transistor is manufactured up to a stage before heat treatment according to a normal CMOS process. That is, for example, an element isolation film 4 is formed on a semiconductor substrate (eg, Si substrate) 1 and a p-well B5, an n + SD region (impurity implantation region) B3, The gate insulating film B6 and the gate electrode B7 are formed, and the n-well A5, the p + SD region (impurity implantation region) A3, the gate insulating film A6, and the gate electrode A7 are formed in the formation region of the semiconductor substrate 1 where the pFET is formed. Form.

  Then, as shown in FIG. 9, a mask member 3s for selectively heat-treating the SD regions A3 and B3 of each FET at different temperatures is disposed at a predetermined position on the semiconductor substrate 1.

  The mask member 3n has a first transmittance (that is, a transmittance at which transmitted light having a light intensity suitable for the heat treatment of the SD region A3) corresponding to the SD region A3 (first specific portion) of the pFET Tb. The first laser transmitting portion 3a-1 having the above and the second transmittance (light intensity transmission suitable for the heat treatment of the SD region B3) in the portion (second specific portion) corresponding to the SD region B3 of the nFET It has a second laser transmission part 3a-2 having a transmittance (Ta from which light can be obtained) Ta, and is formed so as to have a laser reflection part 3b in a part (other part) corresponding to the gate electrodes A7 and B7 of each FET. Has been.

  Then, as shown in FIG. 10, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3s. As a result, the gate electrodes A7 and B7 of each FET are protected by the laser reflecting portion 3b of the mask member 3s and are not heat-treated, and the SD region A3 of the pFET is formed by the laser light 7 transmitted through the first laser transmitting portion 3a-1. The heat treatment is selectively activated at an appropriate temperature and activated, and the SD region B3 of the nFET is selectively activated at an appropriate temperature by the laser beam 7 transmitted through the laser transmitting portion 3a-2.

  Then, as shown in FIG. 11, next, in place of the mask member 3s, a mask member 3g for selectively heat-treating the gate electrodes A7 and B7 of each FET at different temperatures is disposed at a predetermined position on the semiconductor substrate 1. To do. The mask member 3g has a third transmittance (that is, a transmittance at which transmitted light having a light intensity suitable for heat treatment of the gate electrode A7 is obtained) in a portion corresponding to the gate electrode A7 (third specific portion). 1 and a portion corresponding to the gate electrode B7 (fourth specific portion) has a fourth transmittance (that is, transmitted light having a light intensity suitable for heat treatment of the gate electrode B7). The second laser transmitting portion 3a-2 having a transmittance) is formed, and the laser reflecting portion 3b is formed in a portion corresponding to the SD regions A3 and B3 (other portions) of each FET.

  Then, as shown in FIG. 11, the entire surface of the semiconductor substrate 1 is irradiated with the laser beam 7 through the mask member 3g. Thereby, each SD area | region A3, B3 is protected by the laser reflection part 3b of the mask member 3g, and is not heat-processed, and the gate electrode A7 of pFET permeate | transmitted the 1st laser transmission part 3a-1 of the mask member 3g. The nFET gate electrode B7 is selectively heat-treated at the appropriate temperature by the laser light 7 transmitted through the second laser transmitting portion 3a-2 of the mask member 3g. The In this manner, using the laser beam 7, the pFET SD region A3, the nFET SD region B3, the pFET gate electrode A7 and the pFET gate electrode B7 in the semiconductor substrate 1 are heat-treated at different temperatures (appropriate temperatures). Is done.

  In general, the diffusion rate of impurities in polysilicon is higher than the diffusion rate of impurities in silicon. Therefore, when the gate electrodes A7 and B7 are formed of polysilicon, the gate electrode A7 (B7) is appropriately heat-treated. And the temperature for appropriately heat-treating the SD region A3 (B3) are not the same. However, according to the manufacturing method of the semiconductor device according to this embodiment, each SD region A3, 3 is not only heat-treated at an appropriate temperature (different temperature), but also the gate electrode A7 (B7) and the SD region A3 ( Since B3) can also be heat-treated at an appropriate temperature (different temperature), the device performance of the semiconductor device can be further improved.

Embodiment 6 FIG.
In the fifth embodiment, the SD region A3 of the pFET and the SD region B3 of the nFET are thermally treated at different temperatures “simultaneously”, respectively, and the SD region A3 (B3) of the pFET (nFET) and the gate electrode A7 ( For B7), heat treatment was performed at different temperatures in “different steps”. On the other hand, in this embodiment, by applying the semiconductor device manufacturing method of the second embodiment, the pFET SD region A3, the pFET gate electrode A7, the nFET SD region B3, and the nFET gate electrode B7 are formed. Heat treatment is performed at different temperatures “simultaneously”. Hereinafter, this embodiment will be described in detail.

  First, as shown in FIG. 12, according to a normal CMOS process, a CMOS transistor is manufactured up to a stage before heat treatment. That is, for example, an element isolation film 4 is formed on a semiconductor substrate (eg, Si substrate) 1 and a p-well B5, an n + SD region (impurity implantation region) B3, The gate insulating film B6 and the gate electrode B7 are formed, and the n-well A5, the p + SD region (impurity implantation region) A3, the gate insulating film A6, and the gate electrode A7 are formed in the formation region of the semiconductor substrate 1 where the pFET is formed. Form.

  Then, as shown in FIG. 12, the mask member 3 is arranged at a predetermined position on the semiconductor substrate 1. This mask member 3 has a first transmittance (that is, a transmittance at which transmitted light having a light intensity suitable for the heat treatment of the SD region A3 is obtained) in a portion corresponding to the SD region A3 (first specific portion) of the pFET. The first laser transmitting portion 3a-1 has a second transmittance (that is, light intensity suitable for heat treatment of the SD region B3) in a portion corresponding to the SD region B3 (second specific portion) of the nFET. A second laser transmitting portion 3a-2 having a light transmittance), and a portion corresponding to the gate electrode A7 (third specific portion) of the pFET has a third transmittance (that is, the gate electrode A7). A third laser transmitting portion 3a-3 having a transmittance capable of obtaining a transmitted light having a light intensity suitable for heat treatment), and a fourth portion corresponding to the gate electrode A7 (fourth specific portion) of the nFET. Transmittance (that is, a transmittance that allows transmission of light having a light intensity suitable for heat treatment of the gate electrode A7) It is formed so as to have a laser transmitting section 3a-4 of 4.

  Then, as shown in FIG. 12, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3. Thereby, the SD region A3 of the pFET is heat-treated at an appropriate temperature by the laser light 7 transmitted through the first laser transmitting portion 3a-1 of the mask member 3, and the SD region B3 of the nFET is the second region of the mask member 3. The gate electrode A7 of the pFET is appropriately heat treated by the laser beam 7 transmitted through the third laser transmitting portion 3a-3 of the mask member 3. The nFET gate electrode B7 is heat-treated at an appropriate temperature by the laser beam 7 transmitted through the fourth laser transmitting portion 3a-4 of the mask member 3. In this way, using the laser beam 7, the SD region A3 of the pFET, the gate electrode A7 of the pFET, the SD region B3 of the nFET, and the gate electrode B7 of the nFET are simultaneously different at different temperatures (appropriate temperatures). Heat treated.

  According to the semiconductor device manufacturing method described above, in addition to the effects of the fifth embodiment, the pFET SD region A3, the pFET gate electrode A7, the nFET SD region B3, and the nFET gate electrode in the CMOS transistor. B7 can be heat-treated at different temperatures simultaneously by one laser irradiation.

Embodiment 7 FIG.
In the semiconductor device manufacturing method according to this embodiment, the semiconductor device manufacturing method of the first embodiment is applied to the SD (source drain) heat treatment process of the CMOS process, and the gate electrode of each FET is heat-treated. Instead, only the SD region of each FET is heat-treated at a predetermined temperature. Hereinafter, for example, a CMOS transistor equipped with two devices of nFET and pFET will be described as an example.

  First, as shown in FIG. 14, according to a normal CMOS process, a CMOS transistor is manufactured up to a stage before heat treatment. That is, for example, an element isolation film 4 is formed on a semiconductor substrate (for example, Si substrate) 1, and a p-well B5 and an n + SD region (impurity implantation region) B3 are formed in a formation region B2 where an nFET is formed in the semiconductor substrate 1. The gate insulating film B6 and the gate electrode B7 are formed, and the n-well A5, the p + SD region (impurity implantation region) A3, the gate insulating film A6, and the gate are formed in the formation region A2 in the semiconductor substrate 1 where the pFET is formed. Electrode A7 is formed.

  Then, as shown in FIG. 14, a mask member 3 for selectively heat-treating the SD regions A3 and B3 of each FET at the same temperature is disposed at a predetermined position on the semiconductor substrate 1. This mask member 3 has a laser transmitting portion 3a having a predetermined transmittance in a portion corresponding to the SD region A3, B3 (specific portion) of each FET, and gate electrodes A7, B7 (other portions) of each FET. Is formed so as to have a laser reflecting portion 3b in a portion corresponding to the above.

  Then, as shown in FIG. 15, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3. Thereby, the gate electrodes A7 and B7 of each FET are protected by the laser reflecting portion 3b of the mask member 3 and are not heat-treated, and only the SD regions A3 and B3 of each FET are transmitted through the laser transmitting portion 3a of the mask member 3. The laser beam 7 is selectively heat-treated at a predetermined temperature. In this way, using the laser beam 7, the gate electrodes A7 and B7 of each FET (and thus the gate insulating films A6 and B6) are not heat-treated, and only the SD regions A3 and B3 of each FET are heat-treated at a predetermined temperature. Is done.

  In the method of manufacturing the semiconductor device according to this embodiment, for example, the gate electrodes A7 and B7 of each FET in the CMOS transistor (and thus the gate insulating films A6 and B6) are not heat-treated, and only the SD regions A3 and B3 of each FET are processed. Suitable for heat treatment at the same predetermined temperature.

Embodiment 8 FIG.
The semiconductor device manufacturing method according to this embodiment combines the above-described semiconductor device manufacturing methods of the first and second embodiments, so that the pFET SD region and the nFET SD region in the CMOS transistor are heat-treated at different temperatures. In addition, the gate electrode of one of the pFET and the nFET (eg, pFET) is not heat-treated, and only the gate electrode of the other (eg, nFET) is heat-treated. Hereinafter, for example, a CMOS transistor equipped with two devices, nFET and pFET, will be described as an example.

  First, as shown in FIG. 16, a CMOS transistor is manufactured up to a stage before heat treatment according to a normal CMOS process. That is, for example, an element isolation film 4 is formed on a semiconductor substrate (for example, Si substrate) 1, and a p-well B5 and an n + SD region (impurity implantation region) B3 are formed in a formation region B2 where an nFET is formed in the semiconductor substrate 1. The gate insulating film B6 and the gate electrode B7 are formed, and the n-well A5, the p + SD region (impurity implantation region) A3, the gate insulating film A6, and the gate are formed in the formation region A2 in the semiconductor substrate 1 where the pFET is formed. Electrode A7 is formed.

  Then, as shown in FIG. 16, mask members 3 for selectively heat-treating the SD regions A3 and B3 of the FETs and the gate electrodes of the nFETs at different temperatures are arranged at predetermined positions on the semiconductor substrate 1. This mask member 3 has a first transmittance (that is, a transmittance at which transmitted light having a light intensity suitable for the heat treatment of the SD region A3 is obtained) in a portion corresponding to the SD region A3 (first specific portion) of the pFET. A first laser transmitting portion 3a-1 having a second transmittance (that is, a light intensity suitable for heat treatment of the SD region B3) in a portion corresponding to the SD region B3 (second specific portion) of the nFET. A second laser transmitting portion 3a-2 having a light transmittance), and a portion corresponding to the gate electrode B7 (third specific portion) of the nFET has a third transmittance (that is, the gate electrode B7). A third laser transmitting portion 3a-3 having a transmittance that allows transmission light having a light intensity suitable for heat treatment), and a laser reflecting portion 3b in a portion corresponding to the gate electrode A7 (other portion) of the pFET. It is formed to have.

  Then, as shown in FIG. 17, the entire surface of the semiconductor substrate 1 is irradiated with the laser light 7 through the mask member 3. As a result, the gate electrode A7 of the pFET is protected by the laser reflecting portion 3b of the mask member 3 and is not heat-treated, and the SD region A3 of the pFET passes through the first laser transmitting portion 3a-1 of the mask member 3. The nFET SD region B3 is heat-treated at an appropriate temperature by the laser light 7 that has passed through the second laser transmitting portion 3a-2 of the mask member 3, and the nFET gate electrode B7 is Then, heat treatment is performed at an appropriate temperature by the laser light 7 that has passed through the third laser transmitting portion 3a-3 of the mask member 3.

  In this way, the pFET gate electrode A7 (and hence the gate insulating film A6) is not heat-treated, and the pFET SD region A3, the nFET SD region B3, and the nFET gate electrode B7 are simultaneously at different temperatures (appropriate temperatures). Heat treated.

  In the method of manufacturing a semiconductor device according to this embodiment, for example, the SD region A3 of the pFET and the SD region B3 of the nFET in the CMOS transistor are heat-treated at different temperatures, respectively, and the gate electrode A7 of one of the pFET and nFET (for example, pFET) Is suitable for a case where only the other (for example, nFET) gate electrode B7 is heat-treated.

  In addition, according to the method of manufacturing a semiconductor device according to this embodiment, the pFET SD region A3, the nFET SD region B3, and the nFET gate electrode B7, for example, can be simultaneously subjected to appropriate temperatures (different temperatures) by one laser irradiation. Can be heat treated.

  The present invention is directed to, for example, a semiconductor integrated circuit product.

6 is a diagram showing a state in which a mask member 3 is arranged on a semiconductor substrate 1 in the method for manufacturing a semiconductor device according to the first embodiment. FIG. 6 is a diagram showing a state in which laser light 7 is irradiated to the entire surface of the semiconductor substrate 1 through a mask member 3 in the method for manufacturing a semiconductor device according to the first embodiment. FIG. FIG. 10 is a diagram showing a state in which laser light 7 is irradiated to the entire surface of the semiconductor substrate 1 through the mask member 3 in the method for manufacturing a semiconductor device according to the second embodiment. FIG. 10 is a diagram showing a state in which a mask member 3n is arranged on a semiconductor substrate 1 in a method for manufacturing a semiconductor device according to a third embodiment. FIG. 10 is a diagram showing a state in which laser light 7 is irradiated to the entire surface of the semiconductor substrate 1 through a mask member 3n in the method for manufacturing a semiconductor device according to the third embodiment. FIG. 10 is a diagram showing a state in which laser light 7 is irradiated to the entire surface of a semiconductor substrate 1 through a mask member 3p in the method for manufacturing a semiconductor device according to the third embodiment. FIG. 10 is a diagram showing a state in which a mask member 3 is arranged on a semiconductor substrate 1 in a method for manufacturing a semiconductor device according to a fourth embodiment. FIG. 10 is a diagram showing a state in which laser light 7 is irradiated to the entire surface of the semiconductor substrate 1 through the mask member 3 in the method for manufacturing a semiconductor device according to the fourth embodiment. FIG. 10 is a diagram showing a state in which a mask member 3s is arranged on a semiconductor substrate 1 in a method for manufacturing a semiconductor device according to a fifth embodiment. FIG. 10 is a diagram showing a state in which laser light 7 is irradiated on the entire surface of a semiconductor substrate 1 through a mask member 3s in a method for manufacturing a semiconductor device according to a fifth embodiment. FIG. 10 is a diagram showing a state in which laser light 7 is irradiated to the entire surface of the semiconductor substrate 1 through a mask member 3g in the method for manufacturing a semiconductor device according to the fifth embodiment. FIG. 10 is a diagram showing a state in which a mask member 3 is arranged on a semiconductor substrate 1 in a method for manufacturing a semiconductor device according to a sixth embodiment. FIG. 10 is a diagram showing a state in which a whole surface of a semiconductor substrate 1 is irradiated with a laser beam 7 through a mask member 3 in a method for manufacturing a semiconductor device according to a sixth embodiment. FIG. 10 is a diagram showing a state in which a mask member 3 is arranged on a semiconductor substrate 1 in a method for manufacturing a semiconductor device according to a seventh embodiment. FIG. 10 is a diagram showing a state in which laser light 7 is irradiated on the entire surface of a semiconductor substrate 1 through a mask member 3 in a method for manufacturing a semiconductor device according to a seventh embodiment. FIG. 10 is a diagram showing a state in which a mask member 3 is arranged on a semiconductor substrate 1 in a method for manufacturing a semiconductor device according to an eighth embodiment. FIG. 10 is a diagram showing a state in which laser light 7 is irradiated to the entire surface of a semiconductor substrate 1 through a mask member 3 in a method for manufacturing a semiconductor device according to an eighth embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 3, 3n, 3p, 3s, 3g Mask member, 3a Laser transmission part, 3a-1 1st laser transmission part, 3a-2 2nd laser transmission part, 3a-3 3rd laser transmission part 3a-4 4th laser transmitting part, 3b laser reflecting part, 7 laser light, B3, A3 SD region, A7, B7 gate electrode, A, B device, A2, B2 formation region, A3, B3 impurity implantation region.

Claims (10)

A method of manufacturing a semiconductor device in which each part of a semiconductor substrate is selectively heat-treated at different temperatures,
(A) a mask member having a laser transmitting portion having a predetermined transmittance at a portion corresponding to a specific portion of the semiconductor substrate and having a laser reflecting portion at a portion corresponding to the other portion of the semiconductor substrate; A step of placing on top;
(B) irradiating the semiconductor substrate with laser light through the mask member, and heat-treating only the specific portion of the semiconductor substrate with the laser light transmitted through the laser transmitting portion of the mask member;
A method for manufacturing a semiconductor device, comprising:   The method of manufacturing a semiconductor device according to claim 1, wherein the laser reflecting portion is configured by forming a metallic reflective film on the mask member.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the laser reflecting portion is configured by stacking two kinds of members having different refractive indexes so as to satisfy a condition of total reflection.   The method for manufacturing a semiconductor device according to claim 1, wherein the laser transmitting portion is configured by providing an opening in the mask member.   4. The method of manufacturing a semiconductor device according to claim 1, wherein the laser transmitting portion is configured by overlapping a plurality of members having different refractive indexes.   The said laser transmission part is formed by forming a metallic transmission film by a metal vapor deposition method or a sputtering method on a transparent member which becomes a base part. Semiconductor device manufacturing method. A method of manufacturing a semiconductor device in which each part of a semiconductor substrate is selectively heat-treated at different temperatures,
(A) A first laser transmitting portion having a first transmittance is provided in a portion corresponding to the first specific portion of the semiconductor substrate, and the first corresponding to the second specific portion of the semiconductor substrate is provided in the first specific portion. Disposing a mask member having a second laser transmission portion having a second transmittance different from the transmittance of the semiconductor substrate on the semiconductor substrate;
(B) The semiconductor substrate is irradiated with laser light through the mask member, and the first specific portion of the semiconductor substrate is heat-treated with the laser light transmitted through the first laser transmitting portion of the mask member. And heat-treating the second specific portion of the semiconductor substrate with the laser light transmitted through the second laser transmitting portion of the mask member;
A method for manufacturing a semiconductor device, comprising:   The method of manufacturing a semiconductor device according to claim 7, wherein the first or second laser transmitting portion is configured by providing an opening in the mask member.   9. The method of manufacturing a semiconductor device according to claim 7, wherein the first and / or second laser transmitting portion is configured by overlapping a plurality of members having different refractive indexes.   The said 1st and / or laser transmissive part is comprised by forming the metal permeable film by the metal vapor deposition method or the sputtering method on the transparent member used as a base, It is comprised. The manufacturing method of the semiconductor device as described in any one of Claims 1-3.

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