JP2008135502A - Chip resistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a chip resistor capable of fully protecting a resistive element as a functional element that will not degrade the electrical characteristics of the chip resistor, even if the upper surface electrode is sulfurized by sulfidizing gas, and that is suitable as a chip resistor of low resistance. <P>SOLUTION: A second upper surface electrode 32 is formed on the first upper-surface electrode 30, and a cover coat 92 is formed between the first and second upper-surface electrodes 30 and 32 below an end position of a protective film, in the direction of extending in between the electrodes. The first and second upper-surface electrodes 30 and 32 are both connected to the resistive element 80. The protective film 98 completely covers the flat regions of the resistive element. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a chip resistor, and more particularly to a chip resistor having anti-sulfur characteristics.

  A conventional chip resistor is formed, for example, with a configuration as shown in FIG. That is, the chip resistor 505 includes the insulating substrate 10, the electrode unit 20, the resistor 80, the cover coat 90, and the protective film 98, and the electrode unit 20 is paired on the left and right sides of the insulating substrate 10. The upper electrode 30, the side electrode 60, and the plating 70 are provided. This plating 70 is formed of two layers of nickel plating 72 and tin plating 74. Here, the end portion of the plating 70 is fixed in contact with the end portion of the protective film 98, and is generally formed so as not to expose the top electrode 30 that is easily corroded.

In addition, the applicant knows the following patent documents 1 to 4 as prior art documents.
JP 10-189303 A Japanese Patent Laid-Open No. 10-189302 JP-A-6-53003 JP 2006-245218 A

However, in the configuration of FIG. 8, the adhesive strength between the plating 70 in contact with the protective film 98 and the protective film 98 is generally low. Is formed. When this gap reaches the upper surface electrode 30, the upper surface electrode 30 generally formed of a silver-based thick film is used when the upper surface electrode is used in a corrosive atmosphere in which a large amount of sulfur gas (for example, hydrogen sulfide) is present. Silver contained in 30 reacts with the sulfide gas to produce silver sulfide (Ag ₂ S), which is an insulator, and the top electrode 30 is corroded. In other words, silver and sulfide react with sulfide gas, Ag ₂ S whiskers are formed, the upper electrode with the growth of the Ag ₂ S whiskers gone partially lost, fulfill sufficiently function as a conductor Disappear. That is, when the upper surface electrode 30 is disconnected, there is a possibility of causing a failure such as a change in the resistance value of the chip resistor.

  As described above, the end portion of the protective film 98 becomes a so-called sulfidation point, and the sulfurized gas enters from a slight gap between the protective film 98 and the plating 70 and gradually deepens the silver of the upper surface electrode 30 depending on the concentration and time. In an atmosphere where a large amount of sulfur gas exists, the silver on the top electrode may disappear and break in 1 to 3 years.

  Further, in order to prevent silver on the upper electrode 30 from diffusing into the resistor 80 when the resistor 80 is baked to deteriorate the characteristics of the chip resistor, a small amount of palladium may be contained in the upper electrode 30. However, it is not necessarily sufficient as a countermeasure against sulfidation of the upper surface electrode 30, and when the upper electrode 30 contains 20% by weight or more of palladium with respect to silver, the upper electrode 30 is hardly sulfided. The resistance value of the electrode 30 becomes high, which is not suitable for manufacturing a low-resistance chip resistor, and there is a problem that the usage is limited because palladium itself is expensive.

  In the chip resistors disclosed in Patent Document 1 and Patent Document 2, an undercoat and a middle coat are provided below the boundary position between the overcoat and the auxiliary upper surface electrode. Since they are not connected, the auxiliary upper surface electrode does not act to lower the resistance value of the entire upper surface electrode, and is not necessarily suitable for a low resistance chip resistor.

  In the chip resistor disclosed in Patent Document 3, the middle coat glass layer covers almost the entire surface of the upper surface electrode in addition to the resistance film layer, and is formed up to the vicinity of the upper surface edge of the alumina substrate. However, there is a possibility that the upper electrode is sulfided at the boundary position between the middle coat glass layer and the plating (nickel coating layer, solder coating layer).

  Further, in the chip resistor of Patent Document 4, in order to improve the corrosion resistance of the upper surface electrode, the second upper surface electrode is formed so as to overlap the end portion of the resistance film, and both ends of the cover coat are formed. The second upper surface electrode is configured to overlap with a portion overlapping the upper surface of the resistance film. However, since the cover coat does not cover the entire planar area of the resistor as the functional element, the resistance by the cover coat There is a problem that the body protection is not enough.

  Therefore, the present invention can sufficiently protect a resistor as a functional element without damaging the electrical characteristics of the chip resistor even when the upper surface electrode is sulfided with a sulfide gas, and a low-resistance chip. An object of the present invention is to provide a chip resistor suitable for a resistor.

  The present invention was created to solve the above problems. First, a chip resistor is an insulating substrate and a pair of electrode portions provided on the insulating substrate. An electrode section having a first upper surface electrode formed on both sides of the upper surface between the electrodes and a second upper surface electrode formed on the upper side of each first upper surface electrode and at least partially in contact with the first upper surface electrode And a resistor connected to the upper surfaces of the pair of first upper surface electrodes, a resistor connected to the lower surfaces of the pair of second upper surface electrodes, and a planar region of the resistor, and an end portion in the inter-electrode direction Is formed between the protective film formed on the upper surface of the second upper electrode and the first upper electrode and the upper second electrode on the lower side of the end position in the interelectrode direction of the protective film. And a coat.

  In the chip resistor having the first configuration, the sulfide gas enters from the sulfurization point which is the end position in the interelectrode direction of the protective film, the silver of the second upper surface electrode is sulfided, and the second upper surface electrode is temporarily formed. Even if a break occurs at a position below the sulfidation point, a cover coat is provided on the lower side of the second upper surface electrode, so that the first upper surface electrode can be prevented from being sulfidized by this cover coat. The electrical characteristics of the chip resistor are not deteriorated.

  Further, not only the first upper surface electrode but also the second upper surface electrode is connected to the resistor, and the first upper surface electrode and the second upper surface electrode are electrically connected in parallel to the resistor. The resistance value of the entire upper surface electrode composed of the first upper surface electrode and the second upper surface electrode can be reduced, which is suitable for a low-resistance chip resistor.

  Further, since the protective film covers the entire planar area of the resistor, the resistor, which is a functional element, can be sufficiently protected.

  Second, the chip resistor is an insulating substrate, a pair of electrode portions provided on the insulating substrate, and a first upper surface electrode formed on both sides of the upper surface of the insulating substrate in the inter-electrode direction; An electrode section formed on the first upper surface electrode and having a second upper surface electrode at least partially in contact with the first upper surface electrode and a third upper surface electrode formed on the second upper surface electrode And a resistor connected to the upper surfaces of the pair of first upper surface electrodes, a resistor connected to the lower surfaces of the pair of second upper surface electrodes, and a planar region of the resistor, and an end portion in the inter-electrode direction Is formed between the protective film formed on the upper surface of the third upper surface electrode and the first upper surface electrode and the second upper surface electrode on the upper side thereof, below the end position in the interelectrode direction of the protective film. Between the electrode of the protective film between the coat, the second upper surface electrode, and the third upper surface electrode above it And having a second cover coat the lower position of the end position of the direction.

  In the chip resistor having the second configuration, the sulfurized gas enters from the sulfurization point which is the end position in the interelectrode direction of the protective film, the silver of the third upper surface electrode is sulfided, and the third upper surface electrode is temporarily formed. Even if the disconnection occurs at a position below the sulfidation point, the second cover coat is provided on the lower side of the third upper surface electrode, so that the second upper surface electrode prevents the second upper surface electrode from sulfiding. The electrical characteristics of the chip resistor are not deteriorated.

  Further, not only the first upper surface electrode but also the second upper surface electrode is connected to the resistor, and the first upper surface electrode and the second upper surface electrode are electrically connected in parallel to the resistor. The resistance value of the entire upper surface electrode composed of the first upper surface electrode and the second upper surface electrode can be reduced, which is suitable for a low-resistance chip resistor.

  Further, since the protective film covers the entire planar area of the resistor, the resistor, which is a functional element, can be sufficiently protected.

  In the first and second configurations, the cover coat and / or the second cover coat is formed from at least one end of the first upper surface electrode to the other end in a direction perpendicular to the inter-electrode direction. It is preferred that

  Third, in the second configuration, the lower surface of the resistor-side end portion of the third upper surface electrode is in contact with the upper surface of the second upper surface electrode, and the opposite end portion of the third upper surface electrode is The lower surface is in contact with the upper surface of the second upper surface electrode. As a result, the first upper surface electrode, the second upper surface electrode, and the third upper surface electrode are electrically connected in parallel to the resistor. Therefore, the first upper surface electrode, the second upper surface electrode, and the third upper surface electrode are configured. The resistance value of the entire upper surface electrode composed of the electrodes can be reduced, which is suitable for a low-resistance chip resistor.

  Fourth, in the second configuration, the second cover coat includes a region below the end positions on both sides in the inter-electrode direction of the protective film, and at least a part of the upper surface of the resistor. The lower surface of the third upper surface electrode and the upper surface of the second upper surface electrode are in contact with each other on the end side in the inter-electrode direction of the insulating substrate. Therefore, since the second cover coat has a function of protecting the resistor as well as a function of countermeasures against sulfuration, one cover coat can perform two functions, and can be configured efficiently in manufacturing and the like.

  Fifth, in the second configuration, the second cover coat includes a region below the end positions on both sides in the inter-electrode direction of the protective film, and at least a part of the upper surface of the resistor. And the entire area of the third upper surface electrode is formed on the upper surface of the second cover coat, from one end to the other end in the inter-electrode direction of the insulating substrate. To do.

  Therefore, even if the third upper surface electrode is sulfurized, the second cover coat can prevent the second upper surface electrode from being sulfided. In particular, the second cover coat is formed from one end portion in the inter-electrode direction of the insulating substrate to the other. Thus, the second upper surface electrode can be sufficiently prevented from being sulfided.

  Sixth, in the fifth configuration, the thickness of the second cover coat is 1 μm to 5 μm, and the second upper surface electrode and the third upper surface electrode are electrically connected via the second cover coat. It is characterized in that it is possible to conduct electricity. Therefore, since the third upper surface electrode is also electrically connected to the second upper surface electrode through the cover coat, the third upper surface electrode can also function as the upper surface electrode, and the first upper surface electrode, the second upper surface electrode, and the third upper surface electrode can be functioned. The electrode is electrically connected in parallel to the resistor, and the resistance value of the entire upper surface electrode composed of the first upper surface electrode, the second upper surface electrode, and the third upper surface electrode can be reduced, Suitable for low-resistance chip resistors.

  The sixth configuration is shown in the form of an independent term as follows. That is, “a chip resistor, an insulating substrate, a pair of electrode portions provided on the insulating substrate, a first upper surface electrode formed on both sides of the upper surface of the insulating substrate in the inter-electrode direction, and each first upper surface. An electrode section having a second upper surface electrode formed on the upper side of the electrode and in contact with the first upper surface electrode; and a third upper surface electrode formed on the upper side of each second upper surface electrode; A resistor connected to the upper surface of the first upper surface electrode, connected to the lower surface of the pair of second upper surface electrodes, and covering the resistor, and an end in the inter-electrode direction is on the upper surface of the second upper surface electrode A protective coating formed, a cover coat formed between the first upper surface electrode and the second upper surface electrode above the first upper surface electrode, at a position below the end position in the inter-electrode direction of the protective film; a second upper surface electrode; Between the upper third electrode on the upper side and below the end position in the interelectrode direction of the protective film. The first region is formed from one end to the other end in the inter-electrode direction of the insulating substrate, including the region of the position and at least a portion of the upper surface of the resistor, and has a thickness of 1 μm to 5 μm. And the second upper surface electrode is electrically connected to the second upper surface electrode through the second cover coat. A chip resistor characterized by being possible. "

  Seventhly, in the fifth configuration, an insertion hole is provided at a position outside the end position of the protective film in the second cover coat in the inter-electrode direction, and the second upper surface is provided in the insertion hole. A connection portion for connecting the electrode and the third upper surface electrode is formed. Therefore, since the second upper surface electrode and the third upper surface electrode are sufficiently conducted through the connecting portion, the third upper surface electrode can function as the upper surface electrode. In addition, since the connection portion is formed at a position outside the end position of the protective film serving as the sulfurization point in the inter-electrode direction, even if the third upper surface electrode is sulfurized below the sulfurization point, the connection portion is sulfided. Can be prevented.

  In the seventh configuration, the insertion hole is provided by laser processing the second cover coat before the third upper surface electrode is formed, and the connection portion is an electrode paste for the third upper surface electrode when the third upper surface electrode is formed. It is preferable that the insertion hole is filled with an electrode paste to be printed and then fired.

  According to the chip resistor according to the present invention, the sulfurized gas enters from the sulfurization point which is the end position in the interelectrode direction of the protective film, and the uppermost surface electrode (that is, the second upper surface electrode or the third upper surface electrode). ) Is sulfurated and the uppermost upper surface electrode is disconnected at a position below the sulfurization point, a cover coat (or second cover coat) is provided below the upper surface electrode. Therefore, it is possible to prevent the first upper surface electrode (or the second upper surface electrode) on the lower side of the cover coat (or the second cover coat) from being sulfided, and the electrical characteristics of the chip resistor may be deteriorated. Absent.

  Further, not only the first upper surface electrode but also the second upper surface electrode is connected to the resistor, and the first upper surface electrode and the second upper surface electrode are electrically connected in parallel to the resistor. The resistance value of the entire upper surface electrode composed of the first upper surface electrode and the second upper surface electrode can be reduced, which is suitable for a low-resistance chip resistor.

  Further, since the protective film covers the entire planar area of the resistor, the resistor, which is a functional element, can be sufficiently protected.

  In the present invention, even when the upper surface electrode is sulfided by a sulfide gas, the electrical resistance of the chip resistor is not impaired, the resistor as the functional element can be sufficiently protected, and the low resistance chip resistor The purpose of providing a chip resistor suitable for a container was realized as follows.

  The chip resistor based on Example 1 of this invention is demonstrated using FIG. 1A is a cross-sectional view taken along the line AA in FIG. 1B, and the alternate long and short dash line in FIG. 1B indicates the first upper surface electrode 30, the second upper surface electrode 32, the resistor 80, and the cover. The outline of the outermost contour of the coat 92 is shown. In the drawings, the Y1-Y2 direction is a direction perpendicular to the X1-X2 direction, and the Z1-Z2 direction is a direction perpendicular to the X1-X2 direction and the Y1-Y2 direction.

  As shown in FIG. 1, the chip resistor 5 according to the present invention includes an insulating substrate 10, an electrode unit 20, a resistor 80, a cover coat 90, a cover coat 92, and a protective film 98. Yes.

  Here, the insulating substrate 10 is an insulator formed of alumina having a content rate of about 96%. The insulating substrate 10 has a substantially rectangular parallelepiped shape as a whole. In the example shown in FIG. 1, the insulating substrate 10 has a rectangular shape in plan view, but may have another shape, for example, a square shape.

  Further, as shown in FIG. 1, a total of a pair of electrode portions 20 are provided along the opposing side portions of the insulating substrate 10. Specifically, the electrode part 20 is provided along one short side (side in the Y1-Y2 direction) of the insulating substrate 10, and the electrode part 20 is provided along the other short side. Yes. In addition, although the electrode part 20 was formed along the short side, it may be formed along the long side.

  Here, as shown in FIG. 1, the electrode unit 20 includes a first upper surface electrode 30, a second upper surface electrode 32, a lower surface electrode 40, a side electrode 60, and a plating 70.

  A pair of first upper surface electrodes 30 are formed in both end regions in the longitudinal direction (X1-X2 direction (see FIG. 1)) of the upper surface of the insulating substrate 10 and have a substantially rectangular shape in plan view. That is, one first upper surface electrode 30 is formed to have a predetermined length from the end portion on the X1 side of the upper surface of the insulating substrate 10, and the other first upper surface electrode 30 is X2 on the upper surface of the insulating substrate 10. It is formed in a predetermined length from the side end. Specifically, the first upper surface electrode 30 is formed of a silver-based thick film (silver-based metal glaze thick film). Further, the width of the first upper surface electrode 30 in the Y1-Y2 direction (width direction) is slightly larger than the width of the resistor 80 in the Y1-Y2 direction, and is larger than the width of the insulating substrate 10 in the Y1-Y2 direction. Is also formed small. Further, a gap is formed between the upper surface electrode 30 and the end portion of the insulating substrate 10 in the Y1-Y2 direction. The width of the first upper surface electrode 30 in the Y1-Y2 direction may be the same as the width of the resistor 80 in the Y1-Y2 direction.

  The second upper surface electrode 32 is formed on the upper surface of the first upper surface electrode 30 and is formed on the upper surface of the first upper surface electrode 30 with the cover coat 92 interposed therebetween. That is, as will be described later, a cover coat 92 is formed so as to overlap the upper surface of the first upper surface electrode 30, and the second upper surface electrode overlaps the upper surface of the cover coat 92 and is substantially in the same plane area as the first upper surface electrode 30. 32 is formed. That is, as shown in FIG. 1B, the inner end of the second upper surface electrode 32 in the X1-X2 direction is formed slightly shorter than the first upper surface electrode 30, but both sides in the Y1-Y2 direction. And the outer end in the X1-X2 direction coincide with the first upper surface electrode 30. Thereby, the lower surface of the second upper surface electrode 32 and the upper surface of the first upper surface electrode 30 are in contact with each other on the outer side and the inner side in the X1-X2 direction with the cover coat 92 interposed therebetween. The electrodes 30 are connected to each other. The inner end of the second upper surface electrode 32 overlaps the resistor 80 from above. Thus, not only the first upper surface electrode 30 but also the second upper surface electrode 32 is connected to the resistor 80, and the first upper surface electrode 30 and the second upper surface electrode 32 are electrically connected to the resistor 80. Connected in parallel.

  Moreover, although the 2nd upper surface electrode 32 is formed of the silver-type thick film (silver-type metal glaze thick film), it is good also as what contained palladium. That is, by containing 7 wt% to 20 wt% of palladium with respect to the entire weight of the second upper surface electrode 32, the second upper surface electrode 32 can be made difficult to be sulfided. In addition, in the following Examples, content when palladium is contained is also the same.

  Further, as shown in FIG. 1, a pair of lower surface electrodes 40 are formed in both end regions in the longitudinal direction (X1-X2 direction (see FIG. 1)) of the lower surface of the insulating substrate 10, and are substantially rectangular in bottom view. It has a shape. That is, one lower surface electrode 40 is formed to have a predetermined length from the end portion on the X1 side of the lower surface of the insulating substrate 10, and the other lower surface electrode 40 is an end portion on the X2 side of the lower surface of the insulating substrate 10. To a predetermined length. The length of the lower surface electrode 40 (the length in the X1-X2 direction) is substantially the same as that of the first upper surface electrode 30, but the length of the lower surface electrode 40 is arbitrary. Further, the width of the lower surface electrode 40 in the Y1-Y2 direction is formed substantially the same as the width of the insulating substrate 10 in the Y1-Y2 direction. The lower surface electrode 40 is formed of a silver-based thick film (silver-based metal glaze thick film).

  The side electrode 60 has a cross section so as to cover a part of the second upper surface electrode 32, a part of the lower surface electrode 40, and the side surfaces of the insulating substrate 10 (that is, the side surface on the X1 side and the side surface on the X2 side). It is formed in a substantially U-shaped layer. The side electrodes 60 are provided at the end on the X1 side and the end on the X2 side, respectively.

  The plating 70 includes a nickel plating (Ni plating) 72 and a tin plating 74, and is provided in an end region on the X1 side and an end region on the X2 side, respectively. That is, the plating 70 is provided on the surface of the electrode portion for connecting the chip resistor, the inner layer is the nickel plating 72, and the outer layer is the tin plating 74.

  Here, the nickel plating 72 is formed so as to cover a part of the second upper surface electrode 32, the side surface electrode 60, and a part of the lower surface electrode 40. That is, the second upper surface electrode 32, the side surface electrode 60, and the lower surface electrode 40 are formed so as to cover the exposed portions. The nickel plating 72 is formed with a substantially uniform film thickness by electroplating. The nickel plating 72 is made of nickel and is formed to prevent solder erosion of internal electrodes such as the second upper surface electrode 32. In addition to nickel, this nickel plating may use copper plating.

  Further, the tin plating 74 is disposed with a substantially uniform film thickness so as to cover the surface of the nickel plating 72. Note that solder plating may be used in addition to tin plating.

  As shown in FIG. 1, the resistor 80 is basically provided on the upper surface of the insulating substrate 10, and both end portions in the X1-X2 direction are connected to the upper surface of the first upper surface electrode 30. ing. That is, the resistor 80 is formed in a strip shape in the longitudinal direction (inter-electrode direction or energization direction), and is formed in a substantially rectangular shape in plan view. The width of the resistor 80 in the Y1-Y2 direction is smaller than the width of the first upper surface electrode 30 in the Y1-Y2 direction. Further, the second upper surface electrode 32 is laminated on both ends of the resistor 80, and the resistor 80 is formed to be connected to the lower surface of the second upper surface electrode 32. Thereby, the resistor 80 is formed so as to connect between the pair of first upper surface electrodes 30 and the second upper surface electrodes 32. The resistor 80 is formed of a ruthenium oxide-based metal glaze thick film.

  Further, the cover coat 90 is formed on the upper surface of the resistor 80 and is formed to alleviate the thermal shock during trimming of the resistor 80. The cover coat 90 is made of a glass-based material, specifically, a lead borosilicate glass thick film.

  The cover coat 92 is provided between the first upper surface electrode 30 and the second upper surface electrode 32, and is formed in a band shape in the Y1-Y2 direction at a position below the boundary position between the protective film 98 and the plating 70. That is, the cover coat 92 has a width shorter than at least the lengths of the first upper surface electrode 30 and the second upper surface electrode 32 in the X1-X2 direction so as to straddle the boundary position between the protective film 98 and the plating 70 in a plan view. In the Y1-Y2 direction, the insulating substrate 10 is formed from one end to the other end. The cover coat 92 is formed from one end of the insulating substrate 10 to the other end in the Y1-Y2 direction. However, the present invention is not limited to this, and at least the first upper surface electrode 30 is formed. What is necessary is just to form from one edge part of the Y1-Y2 direction to the other edge part. The cover coat 92 is made of a glass-based material, specifically, a lead borosilicate glass thick film. The cover coat 92 has a thickness of 5 to 10 μm (preferably 7 to 8 μm). That is, since the cover coat 92 is formed simultaneously with the cover coat 90, the cover coat 92 has a thickness equivalent to that normally used for the cover coat 90. Even if the cover coat 92 is thin, it has a sufficient effect on sulfidation, so that it may have a thickness of about 1 to 5 μm.

  Further, as shown in FIG. 1, the protective film 98 is mainly provided so as to cover the cover coat 90 and the resistor 80. That is, the formation position of the protective film 98 will be described in more detail. In the Y1-Y2 direction, the protective film 98 is formed substantially the same as the width of the insulating substrate 10 (may be formed shorter than the width of the insulating substrate 10). Furthermore, the resistor 80 and a part of the second upper surface electrode 32 are provided so as to cover the X1-X2 direction. Thereby, the protective film 98 is formed so as to include the entire planar region of the resistor 80 in plan view. The protective film 98 is made of resin (epoxy, phenol, silicon, etc.). In addition, you may form with a borosilicate glass.

  The manufacturing method of the chip resistor 5 having the above configuration will be briefly described. First, a solid alumina substrate in which primary and secondary slits are formed on both the front and back surfaces (this alumina substrate has a plurality of chip resistors). And a bottom electrode is formed on the back surface (that is, the bottom surface) of the alumina substrate. That is, a paste for the lower surface electrode (for example, a silver-based paste such as silver-based metal glaze) is printed, dried and fired. In forming the lower surface electrode, the lower surface electrode is simultaneously formed for adjacent chip resistors. Furthermore, in the direction perpendicular to the inter-electrode direction, a bottom electrode is formed continuously in a strip shape.

  Next, a first upper surface electrode is formed on the front surface (that is, the upper surface) of the alumina substrate. That is, the top electrode paste is printed, dried and fired. The upper surface electrode paste in this case is a silver paste (for example, silver metal glaze), but may be a silver palladium paste. In addition, when it becomes a chip resistor, the upper surface electrode which adjoins mutually by the upper surface electrode of an adjacent chip resistor is formed in one printing area | region.

  Next, a resistor 80 is formed on the upper surface of the alumina substrate. That is, after the resistor paste of the resistor 80 is printed, it is dried and fired to form the resistor. The resistor paste is a ruthenium oxide paste (for example, ruthenium oxide metal glaze).

  Next, a lead borosilicate glass-based glass paste is printed and fired on the upper surface of the resistor 80 and the upper surface of the first upper surface electrode to form the cover coat 90 and the cover coat 92. That is, the cover coat 90 and the cover coat 92 are formed simultaneously.

  Next, a second upper surface electrode is formed on the upper surface of the first upper surface electrode. That is, the top electrode paste is printed, dried and fired. The upper surface electrode paste in this case is a silver paste (for example, silver metal glaze), but may be a silver palladium paste. In addition, when it becomes a chip resistor, the upper surface electrode which adjoins mutually by the upper surface electrode of an adjacent chip resistor is formed in one printing area | region.

  Next, a trimming groove is formed in the resistor 80 to adjust the resistance value. That is, a trimming groove is formed in the resistor 80 by laser trimming. This trimming may be performed before forming the second upper surface electrode.

  Next, a protective film is formed so as to cover at least the resistor 80 and the cover coat 90. That is, the resin paste is printed in a strip shape, dried and cured.

  Thereafter, primary division is performed along the primary slit. Next, side electrodes are formed on the strip substrate. That is, the side electrode paste is printed, dried and cured. Alternatively, the side electrode paste may be printed, dried, and fired. Further, the side electrode may be formed of a metal thin film by sputtering. Thereafter, secondary division is performed along the secondary slit. Next, nickel plating is formed, and then tin plating is formed.

  The usage state of the chip resistor 5 will be described. The chip resistor 5 is used by being mounted on a wiring board (or a printed board). In mounting on a wiring board, the chip resistor 5 is mounted on a land 102 formed on the wiring board 100 via a solder fillet 110 as shown in FIG.

  In the chip resistor 5 of the present embodiment, the sulfide gas enters from the end portion in the longitudinal direction of the protective film 98, that is, the sulfurization point P that is the boundary position between the protective film 98 and the plating 70, and the second upper surface electrode 32. Even if the silver is sulfided and the second upper surface electrode 32 is disconnected at a position below the sulfurization point P, the cover coat 92 is provided below the second upper surface electrode 32. The coating 92 can prevent the first upper surface electrode 30 from being sulfided, and the electrical characteristics of the chip resistor are not deteriorated.

  Further, not only the first upper surface electrode 30 but also the second upper surface electrode 32 is connected to the resistor 80, and the first upper surface electrode 30 and the second upper surface electrode 32 are electrically parallel to the resistor 80. Since they are connected, the resistance value of the entire upper surface electrode composed of the first upper surface electrode 30 and the second upper surface electrode 32 can be reduced, which is suitable for a low-resistance chip resistor.

  Further, since the second upper surface electrode 32 is provided and the protective film 98 is overlapped with the second upper surface electrode 32, the plating 70 can be formed up to the end position of the protective film 98. .

  In addition, since the protective film 98 covers the entire planar area of the resistor 80, the resistor 80, which is a functional element, can be sufficiently protected.

  Further, when palladium is contained in the second upper surface electrode 32, the second upper surface electrode 32 can be made difficult to be sulfided, and the anti-sulfurization measures can be further improved.

  Next, the chip resistor of Example 2 will be described. The chip resistor 105 according to the second embodiment has substantially the same configuration as the chip resistor 5 according to the first embodiment. However, in the chip resistor 105, not only the first upper surface electrode 30 and the second upper surface electrode 32 but also the first resistor. In addition to the cover coat 92 provided between the first upper face electrode 30 and the second upper face electrode 32, the cover coat 94 includes the second upper face electrode 32, the third upper face electrode 34, and the third upper face electrode 34. Is different between the two.

  That is, as shown in FIG. 3, the chip resistor 105 includes an insulating substrate 10, an electrode unit 20, a resistor 80, a cover coat 90, a cover coat 92, and a cover coat 94 (second cover coat). The protective film 98, the insulating substrate 10, the resistor 80, the cover coat 90, the cover coat 92, and the protective film 98 are configured in the same manner as the respective parts in the first embodiment. Description is omitted.

  In addition, as shown in FIG. 3, the electrode unit 20 includes a first upper surface electrode 30, a second upper surface electrode 32, a third upper surface electrode 34, a lower surface electrode 40, a side electrode 60, and a plating 70. The first upper surface electrode 30 and the second upper surface electrode 32 have the same configuration as the first upper surface electrode 30 and the second upper surface electrode 32 in the first embodiment.

  The third upper surface electrode 34 is formed on the upper side of the second upper surface electrode 32 and is formed on the upper surface of the second upper surface electrode 32 with the cover coat 94 interposed therebetween. That is, as will be described later, a cover coat 94 is formed on the upper surface of the second upper surface electrode 32, and the third upper surface electrode 34 overlaps the upper surface of the cover coat 94 and is substantially in the same plane area as the second upper surface electrode 32. Is formed. That is, as shown in FIG. 3, the inner end of the third upper surface electrode 34 in the X1-X2 direction is formed slightly shorter than the second upper surface electrode 32, but the end portions on both sides in the Y1-Y2 direction. Alternatively, the outer end in the X1-X2 direction coincides with the first upper surface electrode 30. Thus, the third upper surface electrode 34 and the second upper surface electrode 32 are connected to each other on the outer side and the inner side in the X1-X2 direction with the cover coat 94 interposed therebetween. Although the third upper surface electrode 34 is not connected to the resistor 80, the third upper surface electrode 34 is in a state of being connected to the connection portion of the second upper surface electrode 32 with the resistor 80. The first upper surface electrode 30, the second upper surface electrode 32, and the third upper surface electrode 34 can be said to be electrically connected in parallel to the resistor 80.

  Further, the lower surface electrode 40, the side surface electrode 60, and the plating 70 in the electrode unit 20 have the same configuration as that of the first embodiment, and thus detailed description thereof is omitted. Since the third upper surface electrode 34 is provided, the side surface electrode 60 is formed so as to cover a part of the upper surface of the third upper surface electrode 34 at the upper end, and the plating 70 is also formed. It is formed on the upper surface of the third upper surface electrode 34.

  Further, the cover coat 94 is provided between the second upper surface electrode 32 and the third upper surface electrode 34, and is formed in substantially the same plane area as the cover coat 92. That is, the cover coat 94 is formed in a band shape in the Y1-Y2 direction below the boundary position between the protective film 98 and the plating 70, and is formed so as to straddle the boundary position between the protective film 98 and the plating 70 in a plan view. In the −Y2 direction, the insulating substrate 10 is formed from one end to the other end. The cover coat 94 only needs to be formed from at least one end of the first upper surface electrode 30 in the Y1-Y2 direction to the other end. The cover coat 94 is made of a glass-based material, specifically, a lead borosilicate glass thick film. The cover coat 94 has a thickness of 5 to 10 [mu] m (preferably 7 to 8 [mu] m), similar to the thickness of the cover coat 92; It only needs to have a certain thickness.

  The manufacturing method of the chip resistor 105 having the above configuration is substantially the same as the manufacturing method of the chip resistor 5 of the first embodiment. However, after the formation of the second upper surface electrode, the cover coat 94 is formed, and the cover coat 94 is formed. After forming, the third upper surface electrode is formed and then trimming is performed. If the cover coat 90 is formed and the protective film 98 is not formed, trimming may be performed at an arbitrary stage.

  In forming the cover coat 94, a lead borosilicate glass-based glass paste is printed and fired, and in forming the third upper surface electrode, the upper surface electrode paste is printed, dried and fired. The upper surface electrode paste in this case is a silver paste (for example, silver metal glaze), but may be a silver palladium paste. In addition, when it becomes a chip resistor, the upper surface electrode which adjoins mutually by the upper surface electrode of an adjacent chip resistor is formed in one printing area | region. Since the manufacturing process other than the above is the same as that of the first embodiment, detailed description thereof is omitted.

  The usage state of the chip resistor 105 is the same as that of the chip resistor 5 of the first embodiment, and is used by being mounted on a wiring board.

  In the chip resistor 105 of the second embodiment, the sulfide gas enters from the end portion in the longitudinal direction of the protective film 98, that is, the sulfurization point P that is the boundary position between the protective film 98 and the plating 70, and the third upper surface electrode. Even if the silver of 34 is sulfided and the third upper surface electrode 34 is disconnected at a position below the sulfurization point P, the cover coat 94 is provided below the third upper surface electrode 34. The cover coat 94 can prevent the second upper surface electrode 32 and the first upper surface electrode 30 from being sulfided, and the electrical characteristics of the chip resistor are not deteriorated. In particular, since the three upper surface electrodes are provided, the first upper surface electrode 30 and the second upper surface electrode 32 may be sulfided even if the third upper surface electrode 34 is sulfided and disconnected. Since it is small, the change in the resistance value of the chip resistor due to the upper surface electrode (third upper surface electrode 34) being sulfided and broken can be suppressed to be extremely small. Even in comparison, the change in resistance value can be kept small.

  Even if the second upper surface electrode 32 is also sulfided for some reason, the first upper surface electrode 30 ensures continuity because the cover coat 92 is provided.

  Further, the first upper surface electrode 30 and the second upper surface electrode 32 are connected to the resistor 80, and the third upper surface electrode 34 is also connected to the second upper surface electrode 32 at the end on the resistor 80 side. The first upper surface electrode 30, the second upper surface electrode 32, and the third upper surface electrode 34 are electrically connected in parallel to the resistor 80, and the first upper surface electrode 30, the second upper surface electrode 32, The resistance value of the entire upper surface electrode including the third upper surface electrode 34 can be reduced, which is suitable for a low-resistance chip resistor.

  Further, since the third upper surface electrode 34 is provided and the protective film 98 is overlapped with the third upper surface electrode 34, the plating 70 can be formed up to the end position of the protective film 98. .

  In addition, since the protective film 98 covers the entire planar area of the resistor 80, the resistor 80, which is a functional element, can be sufficiently protected.

  Further, when palladium is contained in the third upper surface electrode 34, the third upper surface electrode 34 can be made difficult to be sulfided, and the anti-sulfurization measures can be further improved.

  Next, the chip resistor of Example 3 will be described. The chip resistor 205 of the third embodiment has substantially the same configuration as the chip resistor 105 of the second embodiment, except that the cover coat 90 and the cover coat 92 in the second embodiment are integrally formed.

  That is, as shown in FIG. 4, the cover coat 90 (second cover coat) is formed not only on the upper surface of the resistor 80 but also on the upper surface of the second upper surface electrode 32. Is formed from the position of the outer end of one cover coat 92 to the position of the outer end of the other cover coat 92 in the X1-X2 direction in plan view. The central portion is formed on the upper surface of the resistor 80.

  The cover coat 90 is formed from one end of the insulating substrate 10 to the other end in the Y1-Y2 direction. Accordingly, the end regions on both sides in the Y1-Y2 direction of the cover coat 90 are stacked on the cover coat 92 at the end portions in the X1-X2 direction, and are formed on the upper surface of the upper surface electrode 10 in the other regions. Will be. Thereby, the cover coat 90 is integrally formed in a region including a region below the end positions on both sides in the inter-electrode direction of the protective film 98 and at least a partial region of the upper surface of the resistor 80. . The width of the cover coat 90 in the Y1-Y2 direction is the same as the width of the second upper surface electrode 32. The cover coat 90 is formed on the upper surface of the second upper surface electrode 32 with the Y1- It is good also as what is formed from one edge part of the Y2 direction to the other edge part. The cover coat 90 is formed of a glass-based material, specifically, a lead borosilicate glass-based thick film.

  The cover coat 90 has a thickness of 5 to 10 μm (preferably 7 to 8 μm). That is, since the cover coat 90 is also formed on the upper surface of the resistor 80, the cover coat 90 has a thickness equivalent to that normally used for the cover coat formed on the upper surface of the resistor. Further, the thickness of the cover coat 92 is 5 to 10 μm (preferably 7 to 8 μm) as in the above embodiments. However, even if it is thin, it has a sufficient effect on sulfidation. Also good.

  The third upper surface electrode 34 is formed on the upper side of the second upper surface electrode 32, and is formed on the upper surface of the cover coat 90 on the inner side in the X1-X2 direction, and the cover coat 90 is provided. Therefore, the third upper surface electrode 34 is not connected to the second upper surface electrode 32 inside. On the other hand, the lower surface of the third upper surface electrode 34 is in contact with the upper surface of the second upper surface electrode 32 on the end side in the inter-electrode direction of the insulating substrate 10, and the second upper surface electrode 32 and the third upper surface electrode 34 are connected. ing.

  Since the configuration of the third embodiment other than the above is the same as that of the second embodiment, detailed description thereof is omitted.

  The manufacturing method of the chip resistor 205 having the above configuration is substantially the same as the manufacturing method of the chip resistor 105 of the second embodiment. However, when the cover coat 92 is formed, the cover coat 90 is not formed and the cover is not formed. Only the coat 92 is formed, and the cover coat 90 is formed after the second upper surface electrode is formed. After the cover coat 90 is formed, the third upper surface electrode is formed and then trimming is performed. If the cover coat 90 is formed and the protective film 98 is not formed, trimming may be performed at an arbitrary stage. The manufacturing process other than the above is the same as that of the second embodiment, and a detailed description thereof will be omitted.

  The usage state of the chip resistor 205 is the same as that of the chip resistor 5 of the first embodiment, and is used by being mounted on a wiring board.

  In the chip resistor 205 of the third embodiment, the sulfurized gas enters from the end portion in the longitudinal direction of the protective film 98, that is, the sulfurization point P that is the boundary position between the protective film 98 and the plating 70, and the third upper surface electrode. Even if the silver of 34 is sulfided and the third upper surface electrode 34 is disconnected at a position below the sulfurization point P, the cover coat 90 is provided below the third upper surface electrode 34. The cover coat 90 can prevent the second upper surface electrode 32 and the first upper surface electrode 30 from being sulfided, and the electrical characteristics of the chip resistor are not deteriorated. In particular, since the inner end portion of the third upper surface electrode 34 is not connected to the resistor 80 or the second upper surface electrode 32, the influence of the third upper surface electrode 34 on the resistance value of the electrode portion 20 is extremely small. Even if the third upper surface electrode 34 is sulfided and disconnected, the first upper surface electrode 30 and the second upper surface electrode 32 are less likely to be sulfided. ) Is sulfided and disconnected, the change in the resistance value of the chip resistor can be suppressed to a very small level, and the change in the resistance value can be suppressed to a smaller value than in the first and second embodiments.

  Even if the second upper surface electrode 32 is also sulfided for some reason, the first upper surface electrode 30 ensures continuity because the cover coat 92 is provided.

  Further, not only the first upper surface electrode 30 but also the second upper surface electrode 32 is connected to the resistor 80, and the first upper surface electrode 30 and the second upper surface electrode 32 are electrically parallel to the resistor 80. Since they are connected, the resistance value of the entire upper surface electrode composed of the first upper surface electrode 30 and the second upper surface electrode 32 can be reduced, which is suitable for a low-resistance chip resistor.

  Further, since the third upper surface electrode 34 is provided and the protective film 98 is overlapped with the third upper surface electrode 34, the plating 70 can be formed up to the end position of the protective film 98. .

  In addition, since the cover coat 90 has a function of protecting the resistor and a function of preventing sulfuration, the cover coat 90 can perform two functions with one cover coat, and can be configured efficiently in manufacturing and the like.

  In addition, since the protective film 98 covers the entire planar area of the resistor 80, the resistor 80, which is a functional element, can be sufficiently protected.

  Further, when palladium is contained in the third upper surface electrode 34, the third upper surface electrode 34 can be made difficult to be sulfided, and the anti-sulfurization measures can be further improved.

  Next, the chip resistor of Example 4 will be described. The chip resistor 305 of the fourth embodiment has substantially the same configuration as the chip resistor 205 of the third embodiment, except that the cover coat 90 is formed up to both ends of the insulating substrate 10.

  That is, the cover coat 90 (second cover coat) is formed from one end of the insulating substrate 10 to the other end in the X1-X2 direction, and the entire planar area above the insulating substrate 10 is formed. Covered with a cover coat 90. That is, the cover coat 90 includes a region below the end positions on both sides in the interelectrode direction of the protective film 98 and at least a part of the upper surface of the resistor 80 in the interelectrode direction of the insulating substrate 10. It is formed from one end to the other end. The width of the cover coat 90 in the Y1-Y2 direction is the same as the width of the second upper surface electrode 32. The cover coat 90 is formed on the upper surface of the second upper surface electrode 32 with the Y1- It is good also as what is formed from one edge part of the Y2 direction to the other edge part. The cover coat 90 is formed of a glass-based material, particularly a lead borosilicate glass-based thick film.

  The cover coat 90 is formed to be as thin as about 1 to 5 μm and prevents sulfidation of the second upper surface electrode 32 on the lower side of the cover coat 90, but between the second upper surface electrode 32 and the third upper surface electrode 34. It is designed to fulfill continuity. That is, by setting the thickness of the cover coat 90 to 1 to 5 μm, when the third upper surface electrode is baked, the silver of the second upper surface electrode and the silver of the third upper surface electrode are diffused into the cover coat 90 and the second The upper surface electrode 32 and the third upper surface electrode 34 are electrically connected through the cover coat 90. As described above, although the thickness of the cover coat 90 is 1 to 5 μm and the silver in the second upper surface electrode 32 and the silver in the third upper surface electrode 34 are diffused into the cover coat 90, conduction is achieved. The second upper surface electrode 32 is not sulfided through the cover coat 90. That is, even if silver diffused in the cover coat 90 is sulfided by the sulfide gas below the sulfidation point, no gap is formed in the cover coat 90 so that the sulfide gas enters, and the second upper surface electrode 32 is sulfided. There is nothing. In addition, since silver of the second upper surface electrode 32 and the third upper surface electrode 34 diffuses into the cover coat 90, conductivity is formed in the cover coat 90. Therefore, the second upper surface electrode 32 and the third upper electrode 32 in the cover coat 90 are formed. It can be said that only the portion between the upper surface electrodes 34 is conductive, and the upper portion of the resistor 80 in the cover coat 90 is not conductive.

  Since the points other than the above in the cover coat 90 are the same as those in the third embodiment, detailed description thereof is omitted.

  The third upper surface electrode 34 is formed in the same plane area as the second upper surface electrode 32 as in the second and third embodiments, but the cover coat 90 is formed as described above. Therefore, all regions of the third upper surface electrode 34 are formed on the upper surface of the cover coat 90. That is, the third upper surface electrode 34 is formed above the second upper surface electrode 32, but is not physically in contact with the second upper surface electrode 32.

  Since the configuration of the fourth embodiment other than the above is the same as that of the third embodiment, detailed description thereof is omitted.

  The manufacturing method of the chip resistor 305 having the above configuration is substantially the same as the manufacturing method of the chip resistor 205 of the third embodiment, but the cover coat 90 is formed from one end of the insulating substrate 10 in the X1-X2 direction. Form up to the other end. Further, when the third upper surface electrode is fired with the firing temperatures of the second upper surface electrode and the third upper surface electrode being substantially the same, the silver of the third upper surface electrode diffuses into the cover coat 90 and the silver of the second upper surface electrode. In the cover coat 90.

  The usage state of the chip resistor 305 is the same as that of the chip resistor 5 of the first embodiment, and is used by being mounted on a wiring board.

  In the chip resistor 305 of the fourth embodiment, the sulfide gas enters from the end portion in the longitudinal direction of the protective film 98, that is, the sulfurization point P that is the boundary position between the protective film 98 and the plating 70, and the third upper surface electrode. Even if the silver of 34 is sulfided and the third upper surface electrode 34 is disconnected at a position below the sulfurization point P, the cover coat 90 is provided below the third upper surface electrode 34. The cover coat 90 can prevent the second upper surface electrode 32 and the first upper surface electrode 30 from being sulfided, and the electrical characteristics of the chip resistor are not deteriorated. In particular, since the three upper surface electrodes are provided, the first upper surface electrode 30 and the second upper surface electrode 32 may be sulfided even if the third upper surface electrode 34 is sulfided and disconnected. Since it is small, the change in the resistance value of the chip resistor due to the upper surface electrode (third upper surface electrode 34) being sulfided and broken can be suppressed to be extremely small. Even in comparison, the change in resistance value can be kept small.

  Further, since the third upper surface electrode 34 is electrically connected to the second upper surface electrode 32 through the cover coat 90, the third upper surface electrode 34 can also function as an electrode.

  Even if the second upper surface electrode 32 is also sulfided for some reason, the first upper surface electrode 30 ensures continuity because the cover coat 92 is provided.

  Further, not only the first upper surface electrode 30 but also the second upper surface electrode 32 is connected to the resistor 80, and the third upper surface electrode 34 is also electrically connected to the second upper surface electrode 32 through the cover coat 90. The first upper surface electrode 30, the second upper surface electrode 32, and the third upper surface electrode 34 are electrically connected in parallel to the resistor 80, and the first upper surface electrode 30, the second upper surface electrode 32, The resistance value of the entire upper surface electrode composed of the three upper surface electrodes 34 can be reduced, which is suitable for a low-resistance chip resistor.

  Further, since the third upper surface electrode 34 is provided and the protective film 98 is overlapped with the third upper surface electrode 34, the plating 70 can be formed up to the end position of the protective film 98. .

  In addition, since the cover coat 90 has a function of protecting the resistor and a function of preventing sulfuration, the cover coat 90 can perform two functions with one cover coat, and can be configured efficiently in manufacturing and the like.

  In addition, since the protective film 98 covers the entire planar area of the resistor 80, the resistor 80, which is a functional element, can be sufficiently protected.

  Further, when palladium is contained in the third upper surface electrode 34, the third upper surface electrode 34 can be made difficult to be sulfided, and the anti-sulfurization measures can be further improved.

  In the above description, the cover coat 90 is configured as described above so that the second upper surface electrode 32 and the third upper surface electrode 34 are electrically connected. For example, the second upper surface electrode 32 and the third upper surface electrode 34 may not be electrically connected to each other by setting the thickness to be greater than 5 μm. In this case, the first upper surface electrode 30 and the second upper surface electrode 32 function as the upper surface electrode, but the third upper surface electrode 34 forms the plating 70 up to the end position of the protective film 98. Will help you to.

  Next, the chip resistor of Example 5 will be described. The chip resistor 405 of the fifth embodiment has substantially the same configuration as the chip resistor 305 of the fourth embodiment, but an insertion hole is provided on the end side of the cover coat 90 (second cover coat) below the sulfide point. The difference is that the third upper surface electrode is electrically connected to the second upper surface electrode through a connecting portion provided in the insertion hole.

  That is, as shown in FIG. 7, the groove portion 95 reaching the second upper surface electrode 32 by laser processing or the like on the end side in the X1-X2 direction from the sulfurization point P which is the end portion position of the protective film 98 in the cover coat 90. Forming an insertion hole in the cover coat 90 and filling the insertion hole with the electrode material of the third upper surface electrode to form the connection portion 36, thereby forming the third upper surface via the connection portion 36. The electrode 34 and the second upper surface electrode 32 are made conductive.

  Thus, as in the fourth embodiment, not only the second upper surface electrode 32 and the third upper surface electrode 34 are electrically connected by conducting the cover coat 90 itself, but also the connection portion 36 ensures the second. It becomes possible to conduct between the upper surface electrode 32 and the third upper surface electrode 34.

  Since the configuration of the fifth embodiment other than the above is the same as that of the fourth embodiment, detailed description thereof is omitted.

  The manufacturing method of the chip resistor 405 having the above configuration is substantially the same as the manufacturing method of the chip resistor 305 of the fourth embodiment. However, the end portion of the cover coat 90 in the X1-X2 direction is formed before the third upper surface electrode is formed. A groove portion 95 reaching the second upper surface electrode is formed by laser processing or the like on the side (on the end portion side from the position that becomes the boundary between the protective film 98 that is a sulfurization point and the plating 70). 6 and 7, two groove portions 95 are formed in parallel to the Y1-Y2 direction on one end side. The groove 95 may be formed in the Y1-Y2 direction from one end of the second upper surface electrode 32 to the other end, but from one end of the cover coat 90 to the other end. You may form to. In addition, the groove portions 95 may be formed in a straight line, or may be formed in a straight line at predetermined intervals.

  When the third upper surface electrode is formed, the upper surface electrode paste is printed to fill the groove portion 95 with the upper surface electrode paste, and the upper surface electrode paste filled in the groove portion 95 is baked to form the connection portion. 36 is formed.

  The usage state of the chip resistor 405 of the fifth embodiment is the same as that of the chip resistor of the fourth embodiment.

  Further, the function and effect of the chip resistor 405 of the fifth embodiment is the same as that of the fourth embodiment, and a connection portion 36 for connecting the second upper surface electrode 32 and the third upper surface electrode 34 is further provided. Thus, the second upper surface electrode 32 and the third upper surface electrode 34 can be reliably conducted, and the third upper surface electrode 34 can reliably function as the upper surface electrode. In addition, since the connection portion 36 is formed at a position outside the end position of the protective film 98 serving as a sulfurization point in the inter-electrode direction, even if the third upper surface electrode 34 is sulfided below the sulfurization point, the connection portion. It is possible to prevent 36 from being sulfided.

  In Example 5, since the connection between the second upper surface electrode 32 and the third upper surface electrode 34 is ensured by the connecting portion 36, the second upper surface electrode is made conductive by making the cover coat 90 itself conductive as in Example 4. It is not indispensable to conduct between 32 and the third upper surface electrode 34, and the thickness of the cover coat 90 is thicker than 1 to 5 μm (for example, thicker than 5 μm and 10 μm or less), and the cover coat 90 itself does not conduct. You may do it.

  In Examples 1 to 3, when the thickness of the cover coat is 1 to 5 μm, the upper upper electrode and the lower upper surface are disposed through the cover coat as in Examples 4 and 5. This makes it possible to prevent sulfurization of the lower upper surface electrode while conducting the electrode. However, in Examples 1 to 3 above, the upper surface electrode on the upper surface of the cover coat and the upper surface electrode on the lower surface of the cover coat are directly connected, so that the conduction through the cover coat is practically almost all. It can be said that there is nothing.

  Further, in the first embodiment, instead of the cover coat 90 and the cover coat 92, a cover coat formed from the end portion to the end portion of the insulating substrate 10 like the cover coat 90 in the fourth embodiment is used. A cover coat that enables conduction between the upper surface electrode 30 and the second upper surface electrode 32 may be formed on the upper surface of the first upper surface electrode 30 or the resistor 80. With this configuration, the second upper surface electrode 32 can be electrically connected to the first upper surface electrode 30 through the cover coat, and even if the second upper surface electrode 32 is sulfided, Sulfurization of the upper surface electrode 30 can be prevented.

It is a figure which shows the structure of the chip resistor based on Example 1 of this invention, (a) is the sectional drawing, (b) is a top view. It is sectional drawing which shows the use condition of the chip resistor based on Example 1 of this invention. It is sectional drawing which shows the structure of the chip resistor based on Example 2 of this invention. It is sectional drawing which shows the structure of the chip resistor based on Example 3 of this invention. It is sectional drawing which shows the structure of the chip resistor based on Example 4 of this invention. It is sectional drawing which shows the structure of the chip resistor based on Example 5 of this invention. It is a principal part enlarged view in FIG. It is sectional drawing which shows the structure of the conventional chip resistor.

Explanation of symbols

5, 105, 205, 305, 405, 505 Chip resistor 10 Insulating substrate 20 Electrode portion 30 First upper surface electrode 32 Second upper surface electrode 34 Third upper surface electrode 36 Connection portion 40 Lower surface electrode 60 Side electrode 70 Plating 80 Resistor 90 , 92, 94 Cover coat 95 Groove 98 Protective film

Claims (7)

A chip resistor,
An insulating substrate;
In a pair of electrode parts provided on an insulating substrate,
A first upper surface electrode formed on both sides of the upper surface of the insulating substrate in the inter-electrode direction;
An electrode portion having a second upper surface electrode formed on the upper surface of each first upper surface electrode and at least partially in contact with the first upper surface electrode;
A resistor connected to the upper surfaces of the pair of first upper surface electrodes and connected to the lower surfaces of the pair of second upper surface electrodes;
A protective film that covers the entire planar area of the resistor and has an end in the inter-electrode direction formed on the upper surface of the second upper surface electrode;
A cover coat formed at a position below the end position in the inter-electrode direction of the protective film between the first upper surface electrode and the second upper surface electrode on the upper surface electrode;
A chip resistor comprising: A chip resistor,
An insulating substrate;
In a pair of electrode parts provided on an insulating substrate,
A first upper surface electrode formed on both sides of the upper surface of the insulating substrate in the inter-electrode direction;
A second upper surface electrode formed on an upper side of each first upper surface electrode, at least part of which is in contact with the first upper surface electrode;
An electrode portion having a third upper surface electrode formed on the upper side of each second upper surface electrode;
A resistor connected to the upper surfaces of the pair of first upper surface electrodes and connected to the lower surfaces of the pair of second upper surface electrodes;
A protective film that covers the entire planar area of the resistor and has an end in the inter-electrode direction formed on the upper surface of the third upper surface electrode;
A cover coat formed at a position below the end position in the inter-electrode direction of the protective film between the first upper surface electrode and the second upper surface electrode on the upper surface electrode;
A chip resistor having a second cover coat at a position below the end position in the interelectrode direction of the protective film between the second upper surface electrode and the third upper surface electrode on the second upper surface electrode. The lower surface of the end portion on the resistor side of the third upper surface electrode is in contact with the upper surface of the second upper surface electrode, and the lower surface of the opposite end portion of the third upper surface electrode is in contact with the upper surface of the second upper surface electrode. The chip resistor according to claim 2. The second cover coat is integrally formed in a region including a region below the end positions on both sides in the inter-electrode direction of the protective film and at least a partial region of the upper surface of the resistor. 3. The chip resistor according to claim 2, wherein the lower surface of the electrode and the upper surface of the second upper surface electrode are in contact with each other on the end side in the inter-electrode direction of the insulating substrate. The second cover coat includes one end portion in the inter-electrode direction of the insulating substrate including a region below the end position on both sides in the inter-electrode direction of the protective film and at least a partial region of the upper surface of the resistor. 3. The chip resistor according to claim 2, wherein the entire region of the third upper surface electrode is formed on the upper surface of the second cover coat. 6. The thickness of the second cover coat is 1 μm to 5 μm, and the second upper surface electrode and the third upper surface electrode can be electrically connected via the second cover coat. Chip resistor described. An insertion hole is provided at a position outside the end portion of the protective film in the second cover coat in the direction between the electrodes, and a connection portion for connecting the second upper surface electrode and the third upper surface electrode is formed in the insertion hole. The chip resistor according to claim 5, wherein the chip resistor is formed.

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