JP2008130779A - Method for manufacturing capacitor incorporating multilayer printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a manufacturing method capable of easily forming a capacitor insulating layer and an interlayer insulating layer with a low dielectric constant only in respectively required places concerning the method for manufacturing a capacitor incorporating multilayer printed wiring board incorporating a capacitor composed of a lower electrode and an upper electrode. <P>SOLUTION: The capacitor incorporating multilayer printed wiring board manufacturing method includes the processes (A)-(E): (A) a process for forming the lower electrode 13 on a base material; (B) a process for selectively forming the capacitor insulating layer 17, composed of a high dielectric constant material, on the lower electrode 13; (C) a process for selectively forming a second insulating layer 21, composed of a low dielectric constant material, on a part other than the capacitor insulating layer 17 in the base material; (D) a process for polishing the surfaces of the capacitor insulating layer 17 and the second insulating layer 21; and (E) a process for forming the upper electrode 25 on the capacitor insulating layer 17 in response to the lower electrode. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a multilayer printed wiring board with a built-in capacitor in which a capacitor element is built.

  In a multilayer printed wiring board, there is a technique for incorporating a capacitor element for the purpose of high-density mounting of components (see Patent Document 1 or 2). In these multilayer printed wiring boards with built-in capacitors, the lower electrode and the upper electrode are arranged via the high dielectric layer as capacitor elements.

JP 2001-15928 A JP 2003-110214 A

  In the multilayer printed wiring board with a built-in capacitor described in Patent Document 1, the dielectric constant of the high dielectric layer acting as a dielectric of the capacitor element is the same over the entire surface of the same insulating layer. In this case, since the high dielectric layer exists up to an unnecessary part, when this multilayer printed wiring board is used for high frequency applications, problems such as deterioration of transmission characteristics may occur. Therefore, it is desirable that the high dielectric layer is formed only in necessary portions that are not formed over the entire surface.

  In the multilayer printed wiring board with a built-in capacitor described in Patent Document 2, a high dielectric layer is selectively formed on a lower electrode, and an interlayer insulating film having a low dielectric constant is further laminated thereon. Is polished to expose the high dielectric layer, so that the high dielectric layer is formed only in a necessary portion. This technique is intended to suppress insufficient adhesion and generation of gaps between a low dielectric constant interlayer dielectric film and a capacitor dielectric layer made of a high dielectric paste material.

  However, in this method, undulations and irregularities occur when the interlayer insulating layer is laminated. In the technique described in Patent Document 2, these waviness and unevenness are made flat by adjusting the conditions of lamination or lamination such as pressure conditions, temperature conditions, multi-stage press, etc. There is a problem that the condition adjustment is complicated.

  Therefore, an object of the present invention is to obtain a method for manufacturing a multilayer printed wiring board with a built-in capacitor, in which a capacitor insulating layer and an interlayer insulating film having a low dielectric constant can be easily formed only in necessary portions.

A first invention for solving the above-described problem is a method for manufacturing a multilayer printed wiring board with a built-in capacitor including the following steps (A) to (E).
(A) The process of forming a lower electrode in a base material.
(B) A step of selectively forming a capacitor insulating layer made of a high dielectric constant material with respect to the lower electrode.
(C) A step of selectively forming a second insulating layer made of a low dielectric constant material at a location excluding the capacitor insulating layer of the base material.
(D) A step of polishing the surfaces of the capacitor insulating layer and the second insulating layer.
(E) A step of forming an upper electrode on the capacitor insulating layer so as to correspond to the lower electrode.

  In a second aspect based on the first aspect, the step (B) includes a step of applying a high dielectric constant material using the first mask pattern.

  In a third aspect based on the first or second aspect, the step (C) includes a step of applying a low dielectric constant material using the second mask pattern.

  According to a fourth invention, in any one of the first to third inventions, the step (E) forms an upper electrode by etching a conductor layer formed by applying copper plating on the capacitor insulating layer. It includes a process.

  In a fifth invention according to any one of the first to third inventions, the step (E) includes a step of forming the upper electrode by applying a conductive paste material.

  According to the present invention, when manufacturing a multilayer printed wiring board with a built-in capacitor, it is possible to easily form the capacitor insulating layer and the second insulating layer only in necessary portions, respectively, and it is also easy to form the upper electrode. . And the multilayer printed wiring board with a built-in capacitor manufactured by this manufacturing method has a high-frequency electrical characteristic because a capacitor insulating layer made of a high dielectric constant material is formed only at a necessary portion.

  A method of manufacturing a multilayer printed wiring board with a built-in capacitor according to the present invention will be described with reference to the drawings. Specifically, FIG. 1 is a diagram illustrating a process of forming a lower electrode on a base material. FIG. 2 is a diagram showing a process of selectively forming a capacitor insulating layer made of a high dielectric constant material with respect to the lower electrode. FIG. 3 is a diagram showing a step of selectively forming the second insulating layer made of a low dielectric constant material at a location excluding the capacitor insulating layer of the base material. FIG. 4 is a diagram illustrating a process of polishing the surfaces of the capacitor insulating layer and the second insulating layer. FIG. 5 is a diagram showing a process of forming an upper electrode on the capacitor insulating layer corresponding to the lower electrode by copper plating. FIG. 6 is a diagram showing a process of forming the upper electrode on the capacitor insulating layer corresponding to the lower electrode by applying a conductive paste. In addition, all these drawings expand and show the cross section of the location of the capacitor | condenser element which consists of said lower electrode and an upper electrode.

(A) Step of Forming Lower Electrode on Base Material As shown in FIG. 1A-1, a laminated plate 11 configured by laminating copper foils 10 on both surfaces of a base material 12 is prepared. This laminated board 11 can use the commercial item for printed wiring board manufacture, for example, can use a glass epoxy copper sticking base material.

  Next, as shown in FIG. 1A-2, unnecessary portions of the copper foil 10 are removed by etching, and the lower electrode 13 is formed. In order to improve adhesion strength between the lower electrode 13 and a capacitor insulating layer described later, the surface of the lower electrode 13 may be roughened by performing micro-etching on the surface of the lower electrode 13. 1A-2 shows a state in which the lower electrode 13 is formed only on the upper surface of the base material 12. FIG. The lower electrode 13 can be formed on either the upper surface or the lower surface of the substrate 12 depending on the design specifications of the multilayer printed wiring board with a built-in capacitor to be manufactured.

(B) Step of selectively forming a capacitor insulating layer made of a high dielectric constant material on the lower electrode 13 As shown in FIG. Is applied onto the lower electrode 13 by the squeegee 16 using the first mask pattern 15 so that the thickness becomes 25 μm. The high dielectric constant material 14 contains a filler having a high dielectric constant such as barium titanate. For example, Inscoat H (trade name, manufactured by Nippon Paint Co., Ltd.) can be used. The viscosity of the high dielectric constant material 14 is preferably 30,000 to 40,000 mPa · s (25 ° C., 5.0 rpm). By setting the viscosity within this range, the liquid can be applied satisfactorily without dripping.

  As the first mask pattern 15, for example, a mesh screen can be used. The first mask pattern 15 is formed with a printed pattern in which the high dielectric constant material 14 is applied in substantially the same planar shape as the planar shape of the lower electrode 13 and is applied so as to completely cover the lower electrode 13. Keep it. By applying the high dielectric constant material 14 on the lower electrode 13 through the first mask pattern 15, the high dielectric constant material 14 is applied on the lower electrode 13 in substantially the same planar shape as the lower electrode 13. The

  Next, as shown in FIG. 2B-2, the high dielectric constant material 14 is heated and cured to form a capacitor insulating layer 17. The capacitor insulating layer 17 is selectively formed with respect to the lower electrode 13 by the steps shown in FIGS. 2B-1 and 2B-2.

(C) A step of selectively forming a second insulating layer made of a low dielectric constant material at a location excluding the capacitor insulating layer 17 of the substrate 12, as shown in FIG. 18 is applied on the base material 12 by the squeegee 20 using the second mask pattern 19 so that the thickness becomes (25 μm + thickness of the copper foil 10). As the low dielectric constant insulating material 18, a commercially available epoxy resin, polyolefin resin, or the like can be used. For example, an undercoat UC3000 (trade name, manufactured by Yamaei Chemical Co., Ltd.) can be used. Further, a low dielectric constant material is applied to the lower side of the base material 12 shown in FIG.

  As the second mask pattern 19 used here, for example, a mesh screen can be used in the same manner as the first mask pattern 15. A printed pattern is formed on the second mask pattern 19 such that the low dielectric constant material 18 is applied to the base 12 at locations other than the capacitor insulating layer 17. Further, this printed pattern is a pattern printed so that the low-current-conductivity material 18 covers about 0.1 mm in the planar direction with respect to the planar shape of the capacitor insulating layer 17. This is to eliminate a gap at the interface between the high dielectric constant material 14 and the low dielectric constant material 18.

  Next, as shown in FIG. 3C-2, the low dielectric constant material 18 coated on both surfaces of the base material 12 is heated and cured to form the second insulating layer 21. As a result, the second insulating layer 21 is selectively formed at a location excluding the capacitor insulating layer 17. When the second insulating layer 21 is formed, the protrusion 22 may occur at the boundary with the capacitor insulating layer 17. The convex portion 22 needs to be removed, and this removal will be described later.

(D) Polishing the surfaces of the capacitor insulating layer 17 and the second insulating layer 21 As shown in FIG. 4D, the surfaces of the capacitor insulating layer 17 and the second insulating layer 21 are polished with an abrasive 23, The convex portion 22 is removed, and the capacitor insulating layer 17 and the second insulating layer 21 are finished uniformly. Since the capacitor insulating layer 17 and the second insulating layer 21 have different hardnesses, the abrasive 23 is made of, for example, ceramic having a high surface hardness and low followability. Also, during polishing, it is desirable to change the polishing direction during polishing in order to reduce polishing variation and improve flatness.

  Subsequently, a hole is formed in the multilayer body obtained by the above process according to the design specifications of the multilayer printed wiring board with a built-in capacitor to be manufactured (not shown).

(E) A step of forming an upper electrode on the capacitor insulating layer 17 so as to correspond to the lower electrode 13.
As shown in FIG. 5E-1, a nickel or nickel alloy conductor layer (not shown) is formed on the surfaces of the capacitor insulating layer 17 and the second insulating layer 21 by electroless plating or sputtering. After the formation, a conductor layer 24 is further formed on the conductor layer by electrolytic copper plating. As a result, the conductor layer 24 is formed on the surface layer, and through-hole plating is performed on the holes (not shown).

  Next, as shown in FIG. 5E-2, unnecessary portions of the conductor layer 24 are removed by etching, and the upper electrode 25 is formed at a portion corresponding to the lower electrode 13. Through this step, a capacitor element is formed by the lower electrode 13 and the upper electrode 25. Further, other necessary signal wirings are formed by this etching (not shown).

  Next, if the multilayer printed wiring board with a built-in capacitor to be manufactured has a four-layer structure, thereafter, processing such as solder resist layer formation, character printing, and outer shape processing is performed on the multilayer printed wiring board. Finish the board.

  Moreover, in the process shown to (E) -1 of FIG. 5, it replaces with the process by the above-mentioned copper plating, and can also form the upper electrode 25 by apply | coating a conductive paste material. Specifically, as shown in (F) -1 of FIG. 6, the conductive paste material 27 has a thickness of 20 to 30 μm by the third mask pattern 26 with respect to the base material 12 on which the second insulating layer 21 is formed. Apply with a squeegee 28. As the conductive paste material 27, for example, S-5000 (trade name) manufactured by Nippon Paint Anticorrosion Coatings Co., Ltd. can be used.

  Next, as shown in FIG. 6F-2, the applied conductive paste material 27 is heated and cured to form the upper electrode 29. Then, the insulating layer 30 is formed by laminating and heating the prepreg, and further, the conductor layer 31 is formed by performing copper plating on the insulating layer 30.

(Example 1)
A multilayer printed wiring board with a built-in capacitor of Example 1 having a six-layer structure, in which an upper electrode was formed on the second layer and a lower electrode was formed on the third layer was manufactured. Specifically, the area of the upper electrode and the lower electrode was set to 900 mm ² , the insulation coat H (detailed above) having a dielectric constant ε _r = 32 was used as the high dielectric constant material, and the thickness was 25 μm.

(Example 2)
A multilayer printed wiring board with a built-in capacitor according to Example 2 was manufactured under the same conditions as in Example 1, except that the insulating coat H having a dielectric constant ε _r = 50 was used as the high dielectric constant material.

(Comparative example)
In Example 1, a multilayer printed wiring board of a comparative example was manufactured under the same conditions except that no capacitor element was formed.

  The resonance characteristics of the multilayer printed wiring boards with built-in capacitors of Examples 1 and 2 and the multilayer printed wiring board of the comparative example were measured. Specifically, S21 from 10 MHz to 1 GHz was measured from end to end of the electrodes of these printed wiring boards using a network analyzer (manufactured by Agilent Technologies, E5071B). This S21 is a transmission loss, and the greater this S21, the smaller the resonance.

(Noise characteristics)
LSI (SH7058S, manufactured by Renesas Technology Corp.) was mounted on these printed wiring boards, and radiated noise (between 100 and 300 MHz) was measured by a common mode noise measurement method according to IEC 61967-5 while operating at 20 MHz. This measurement method is an electromagnetic wave measurement method using a workbench Faraday cage proposed by IEC SC47A. In the present invention, Fuji Xerox Engineering's FC-1000 is used as a workbench Faraday gauge, and stocks are used as measurement software. EP6 / FC manufactured by Toyo Technica Co., Ltd. was used. The measurement results are shown in Table 1.

注１：絶縁層厚み８０μｍでの測定結果
注２：３２ｄＢμＶ以下は測定不能

Note 1: Measurement results with an insulating layer thickness of 80 μm Note 2: Measurement is not possible below 32 dBμV

The figure which shows the process of forming a lower electrode in a base material. The figure which shows the process of forming the capacitor | condenser insulating layer which consists of high dielectric constant materials selectively with respect to a lower electrode. The figure which shows the process of selectively forming the 2nd insulating layer which consists of low dielectric constant materials in the location except a capacitor | condenser insulating layer of a base material. The figure which shows the process of grind | polishing the surface of a capacitor | condenser insulating layer and a 2nd insulating layer. The figure which shows the process of forming an upper electrode by copper plating corresponding to a lower electrode on a capacitor | condenser insulating layer. The figure which shows the process of forming an upper electrode by application | coating of an electrically conductive paste on a capacitor | condenser insulating layer corresponding to a lower electrode.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Copper foil 11 Laminated board 12 Base material 13 Lower electrode 14 High dielectric constant material 15 1st mask pattern 16 Squeegee 17 Capacitor insulating layer 18 Low dielectric constant material 19 2nd mask pattern 20 Squeegee 21 2nd insulating layer 22 Convex part 23 Grinding Material 24 Conductor layer 25 Upper electrode 26 Third mask pattern 27 Conductive paste material 28 Squeegee 29 Upper electrode 30 Insulating layer 31 Conductor layer

Claims (5)

The manufacturing method of the multilayer printed wiring board with a built-in capacitor | condenser characterized by including the process of following (A)-(E).
(A) The process of forming a lower electrode in a base material.
(B) A step of selectively forming a capacitor insulating layer made of a high dielectric constant material with respect to the lower electrode.
(C) A step of selectively forming a second insulating layer made of a low dielectric constant material at a portion of the substrate excluding the capacitor insulating layer.
(D) A step of polishing the surfaces of the capacitor insulating layer and the second insulating layer.
(E) A step of forming an upper electrode on the capacitor insulating layer so as to correspond to the lower electrode. 2. The method of manufacturing a multilayer printed wiring board with a built-in capacitor according to claim 1, wherein the step (B) includes a step of applying the high dielectric constant material using a first mask pattern. The method of manufacturing a multilayer printed wiring board with a built-in capacitor according to claim 1, wherein the step (C) includes a step of applying the low dielectric constant material using a second mask pattern. 4. The method according to claim 1, wherein the step (E) includes a step of etching the conductor layer formed by performing copper plating on the capacitor insulating layer to form the upper electrode. 5. A method for producing a multilayer printed wiring board with a built-in capacitor. 4. The method of manufacturing a multilayer printed wiring board with a built-in capacitor according to claim 1, wherein the step (E) includes a step of forming the upper electrode by applying a conductive paste material.

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