JP2008125145A - Voltage step-up circuit and voltage step-down circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit capable of converting a low voltage and a large current, and a high voltage and a small current to each other without using an inductance. <P>SOLUTION: At charging, capacitors CB0 and CB1 are connected in series to a base voltage. At discharging, a serial circuit of the capacitors CB0 and CB1 is connected to a double voltage. Accordingly, the voltage of two times the base voltage can be efficiently acquired. On the contrary, when a predetermined power supply is connected to the double voltage, since a 1/2 voltage can be acquired for the base voltage side, this circuit can be used for the step-up and step-down of a voltage. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a step-up circuit and a step-down circuit. In particular, the present invention relates to a step-up circuit and a step-down circuit with improved conversion efficiency.

  In recent years, a booster circuit and a step-down circuit with improved performance have been demanded.

  For example, in a so-called hybrid car, a battery is used, which is about 1.2 V (nickel metal hydride) -3.7 V (lithium ion) per cell. On the other hand, in order to improve motor efficiency, the drive motor is driven with a voltage of several hundred volts.

  Therefore, in a hybrid car, it is a common practice to connect several stages of cells in series to create a power of several tens of volts and boost this to several hundred volts with a booster circuit. Therefore, the performance of the booster circuit used therein is extremely important.

  Also, for example, in recent years, processors used in personal computers have been increasing in voltage and current. However, an excessively low voltage and large current power supply device is complicated to handle such as a thick power cord. For this reason, a step-down circuit that steps down the power from the conventional power supply device in the vicinity of the processor to reduce the voltage and current is used. Therefore, the performance of this step-down circuit is extremely important.

Various techniques for improving the prior art document conversion efficiency have been proposed.

  For example, Patent Document 1 below discloses a technique for improving the efficiency of a booster circuit and a step-down circuit. A technique is disclosed in which a MOSFET is provided in parallel with a Schottky diode to eliminate the influence of a forward voltage drop of the Schottky diode.

  Further, for example, Patent Document 2 below discloses a DC-DC converter that discharges a surge voltage to the output side to improve operation efficiency.

Japanese Patent Laid-Open No. 2001-45745 JP 2006-203996 A

  Thus, many conventional booster circuits and step-down circuits mainly use inductance, and it has been difficult to achieve good efficiency in all operating states.

  An object of the present invention is to realize a mechanism capable of mutually converting a low voltage / large current and a high voltage / small current without using an inductance.

  (1) In order to solve the above-mentioned problem, the present invention connects the first capacitor, the second capacitor, and the first capacitor and the second capacitor in parallel at the time of charging, thereby providing a basic voltage. Is connected to the parallel circuit of the first capacitor and the second capacitor, and the first capacitor and the second capacitor are connected in series at the time of discharging, and the voltage is doubled. Is connected to a series circuit of the first capacitor and the second capacitor, and at the time of charging, the NC switch group is closed, the NO switch group is opened, and the first capacitor And a parallel circuit of the second capacitor and a basic voltage are connected, and at the time of discharging, the NC switch group is opened, the NO switch group is closed, and the first capacitor and the second capacitor are closed. The NC switch group includes an NC first switch that connects a first terminal of the first capacitor and a basic voltage, and the second capacitor. An NC second switch that connects the first terminal of the first capacitor and a basic voltage, and an NC third switch that connects the second terminal of the first capacitor and the ground. The NO switch group includes the first capacitor. And a NO first switch that connects the first terminal of the second capacitor and a double voltage, and a NO second switch that connects the first terminal of the second capacitor and the second terminal of the first capacitor. Is a booster circuit.

  Since the two capacitors are charged in parallel and discharged in series, a double booster circuit can be easily realized with a simple configuration.

  (2) In order to solve the above-described problem, the present invention provides a first plane booster circuit, a second plane booster circuit, a third plane booster circuit, and the first, second, and third planes. A control circuit for sequentially placing the booster circuits in the plane in a discharged state and the remaining booster circuits in the discharged state in a charged state, and the booster circuits in the first, second, and third planes are all in the first 1 capacitor, a second capacitor, and at the time of charging, the first capacitor and the second capacitor are connected in parallel, and a basic voltage is applied to the parallel circuit of the first capacitor and the second capacitor. NC switch group for connecting to the first capacitor, and the first capacitor and the second capacitor are connected in series at the time of discharging, and a double voltage is connected in series between the first capacitor and the second capacitor. NO to connect to the circuit The NC switch group includes an NC first switch that connects the first terminal of the first capacitor and the basic voltage, and an NC that connects the first terminal of the second capacitor and the basic voltage. An NC third switch connecting the second switch and the second terminal of the first capacitor to the ground, and the NO switch group connects the first terminal of the first capacitor and a double voltage. An NO first switch; an NO second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor; and the control circuit is a step-up circuit for a plane placed in a charged state The NC switch group is closed, the NO switch group is opened, the parallel circuit of the first capacitor and the second capacitor is connected to the basic voltage, and the step-up circuit in the plane placed in a discharged state NC Open the pitch groups, the NO closes switch group, a 3-plane booster circuit, characterized in that for connecting the series circuit and the voltage doubler with the first capacitor and the second capacitor.

  Since discharge is performed in order using three booster circuits, a smoother output voltage can be obtained.

  (3) Further, according to the present invention, in order to solve the above problem, in the three-plane booster circuit described in (2) above, the control circuit discharges a booster circuit to be newly placed in the discharge state when switching the discharge state. A three-plane booster circuit characterized in that after a predetermined overlap time has elapsed after being placed in the state, the booster circuit that has been in a discharged state is placed in a charged state.

  Since the outputs overlap, a smoother output can be obtained.

  (4) Further, in order to solve the above-described problem, the present invention sequentially sets the n booster circuits from the first plane to the nth plane and the booster circuits from the first to the nth plane into a discharge state. A control circuit that places the remaining booster circuit in a discharged state in a charged state, and each of the booster circuits in the first to n-th planes includes a first capacitor, a second capacitor, An NC switch group for connecting the first capacitor and the second capacitor in parallel, and connecting a basic voltage to a parallel circuit of the first capacitor and the second capacitor; A NO switch group for connecting the first capacitor and the second capacitor in series, and connecting a double voltage to a series circuit of the first capacitor and the second capacitor; , NC The switch group includes an NC first switch that connects a first terminal of the first capacitor and a basic voltage, an NC second switch that connects a first terminal of the second capacitor and a basic voltage, and the first switch An NC third switch connecting the second terminal of the capacitor and the ground, and the NO switch group includes an NO first switch connecting the first terminal of the first capacitor and a double voltage, and the second switch. A NO second switch connecting the first terminal of the capacitor and the second terminal of the first capacitor, and the control circuit closes the NC switch group in the booster circuit of the plane to be placed in a charged state. The NO switch group is opened, the parallel circuit of the first capacitor and the second capacitor is connected to the basic voltage, and the NC switch group in the booster circuit of the plane to be placed in a discharge state is opened, and the NO switch is opened. Close group, a n-plane booster circuit, characterized in that for connecting the series circuit and the double voltage of the first capacitor and the second capacitor. Here, n is a positive integer of 2 or more.

  Since discharge is performed in order using n booster circuits, a smoother output voltage can be obtained.

  (5) Further, according to the present invention, in order to solve the above problem, in the n-plane booster circuit described in (4), the control circuit discharges a booster circuit to be newly placed in the discharge state when switching the discharge state. The n-plane booster circuit is characterized in that after a predetermined overlap time has elapsed after being placed in a state, the booster circuit that has been in a discharged state is placed in a charged state.

  Since the outputs overlap, a smoother output can be obtained.

  (6) Further, in order to solve the above-described problem, the present invention connects n capacitors from the first to the nth in parallel with the n capacitors from the first to the nth at the time of charging. An NC switch group for connecting a basic voltage to the parallel circuit of the n capacitors from the first to the nth, and the n capacitors from the first to the nth in series at the time of discharging. , A NO switch group for connecting the n-fold voltage to a series circuit of n capacitors from the first to nth, and at the time of charging, the NC switch group is closed, the NO switch group is opened, A parallel circuit of first to nth capacitors is connected to a basic voltage, and at the time of discharging, the NC switch group is opened, the NO switch group is closed, and the series circuit of the first to nth capacitors and n Control to connect voltage doubler The NC switch group includes NC a1 to NC th an switches connecting the first terminals of the first to n th capacitors and a basic voltage, respectively, and the first to n th switches. NC first b1 to NC bn switches that connect the second terminal of the capacitor and the ground, respectively, and the NO switch group includes a NO first switch that connects the first terminal of the first capacitor and the n-fold voltage. And a NO second k switch connecting the first terminal of the k-th capacitor and the second terminal of the k-1 capacitor (k is an integer not less than 2 and not more than n). Circuit. Here, n is a positive integer of 2 or more.

  Since n capacitors are charged in parallel and discharged in series, an n-fold booster circuit can be easily realized with a simple configuration.

  (7) Further, in order to solve the above problem, the present invention connects the first capacitor, the second capacitor, and the first capacitor and the second capacitor in parallel at the time of discharging, An NC switch group for connecting a basic voltage to the parallel circuit of the first capacitor and the second capacitor, and at the time of charging, the first capacitor and the second capacitor are connected in series. A NO switch group for connecting a voltage doubler to a series circuit of the first capacitor and the second capacitor, and at the time of discharging, the NC switch group is closed, the NO switch group is opened, and the first switch is opened. A capacitor and a parallel circuit of the second capacitor and a basic voltage are connected, and at the time of charging, the NC switch group is opened, the NO switch group is closed, and the first capacitor and the second capacitor are closed. A series circuit of capacitors and a control circuit for connecting a double voltage, wherein the NC switch group includes an NC first switch connecting a first terminal of the first capacitor and a basic voltage, and the second capacitor. An NC second switch that connects the first terminal of the first capacitor and a basic voltage, and an NC third switch that connects the second terminal of the first capacitor and the ground. The NO switch group includes the first capacitor. And a NO first switch that connects the first terminal of the second capacitor and a double voltage, and a NO second switch that connects the first terminal of the second capacitor and the second terminal of the first capacitor. Is a step-down circuit.

  Since the two capacitors are charged in series and discharged in parallel, a ½ times step-down circuit can be easily realized with a simple configuration.

  (8) Further, in order to solve the above-described problem, the present invention provides a first plane step-down circuit, a second plane step-down circuit, a third plane step-down circuit, and the first, second, and third planes. And a control circuit that places a step-down voltage circuit in a plane in a discharged state and a remaining voltage step-down circuit in a discharged state in a charged state, and the step-down circuits in the first, second, and third planes are all in a first state. 1 capacitor, a second capacitor, and at the time of discharging, the first capacitor and the second capacitor are connected in parallel, and a basic voltage is applied to the parallel circuit of the first capacitor and the second capacitor. NC switch group for connecting to the first capacitor, and the first capacitor and the second capacitor are connected in series at the time of charging, and a double voltage is connected in series between the first capacitor and the second capacitor. N to connect to the circuit The NC switch group includes an NC first switch that connects a first terminal of the first capacitor and a basic voltage, and an NC that connects the first terminal of the second capacitor and the basic voltage. An NC third switch connecting the second switch and the second terminal of the first capacitor to the ground, and the NO switch group connects the first terminal of the first capacitor and a double voltage. An NO first switch; and a NO second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor, wherein the control circuit is a plane step-down circuit placed in a discharge state The NC switch group is closed, the NO switch group is opened, the parallel circuit of the first capacitor and the second capacitor is connected to the basic voltage, and the step-down circuit of the plane to be placed in a charged state, NC Open switch group, the NO closes switch group, a 3-plane step-down circuit, characterized by connecting a series circuit and twice the voltage of said first capacitor and the second capacitor.

  Since the three step-down circuits are used for discharging in order, a smoother output voltage can be obtained.

  (9) Further, according to the present invention, in order to solve the above-described problem, in the three-plane step-down circuit described in (8), the control circuit discharges a step-down circuit newly placed in the discharge state when switching the discharge state. A three-plane step-down circuit is characterized in that, after a predetermined overlap time has elapsed after being placed in a state, the step-down circuit that has been in a discharged state is placed in a charged state.

  Since the outputs overlap, a smoother output can be obtained.

  (10) Further, according to the present invention, in order to solve the above-described problem, the n step-down circuits from the first plane to the n-th plane and the step-down circuits from the first to the n-th plane are sequentially discharged. The remaining step-down circuits that are not in a discharged state include a control circuit that is placed in a charged state, and each of the step-down circuits in the first to n-th planes includes a first capacitor, a second capacitor, and a discharging circuit. Sometimes, the first capacitor and the second capacitor are connected in parallel, an NC switch group for connecting a basic voltage to a parallel circuit of the first capacitor and the second capacitor, and during charging A NO switch group for connecting the first capacitor and the second capacitor in series, and connecting a double voltage to a series circuit of the first capacitor and the second capacitor; Including, before The NC switch group includes an NC first switch that connects a first terminal of the first capacitor and a basic voltage, an NC second switch that connects a first terminal of the second capacitor and a basic voltage, and the first switch. An NC third switch connecting the second terminal of the capacitor and the ground, and the NO switch group includes a NO first switch connecting the first terminal of the first capacitor and a double voltage, and the first switch. A second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor, and the control circuit includes the NC switch group in the step-down circuit of the plane placed in a discharge state. Close, open the NO switch group, connect the basic voltage to the parallel circuit of the first capacitor and the second capacitor, open the NC switch group in the step-down circuit of the plane to be charged, and open the NO switch group Close the switch group, a n-plane step-down circuit, characterized by connecting a series circuit and twice the voltage of the first capacitor and the second capacitor. Here, n is a positive integer of 2 or more.

  Since discharging is performed sequentially using n step-down circuits, a smoother output voltage can be obtained.

  (11) Further, according to the present invention, in order to solve the above problem, in the n-plane step-down circuit according to (10), the control circuit discharges a step-down circuit to be newly placed in the discharge state when switching the discharge state. The n-plane step-down circuit is characterized in that after a predetermined overlap time has elapsed after being placed in a state, the step-down circuit that has been in a discharged state is placed in a charged state.

  Since the outputs overlap, a smoother output can be obtained.

  (12) Further, in order to solve the above-described problem, the present invention connects n capacitors from the first to the nth and the n capacitors from the first to the nth in parallel at the time of discharging. An NC switch group for connecting a basic voltage to the parallel circuit of the n capacitors from the first to the nth, and the n capacitors from the first to the nth in series at the time of charging. , A NO switch group for connecting an n-fold voltage to a series circuit of n capacitors from the first to nth, and at the time of discharging, the NC switch group is closed, the NO switch group is opened, A basic voltage is connected to a parallel circuit of first to n-th capacitors, and at the time of charging, the NC switch group is opened, the NO switch group is closed, and the series circuit of the first to n-th capacitors and n System to connect voltage doubler The NC switch group includes NC a1 to NC th an switches connecting the first terminals of the first to n th capacitors and a basic voltage, respectively, and the first to n th switches. NC first b1 to NC bn switches that connect the second terminal of the capacitor and the ground, respectively, and the NO switch group includes a NO first switch that connects the first terminal of the first capacitor and the n-fold voltage. And a NO second k switch connecting the first terminal of the k-th capacitor and the second terminal of the k-1 capacitor (k is an integer not less than 2 and not more than n). Circuit. Here, n is a positive integer of 2 or more.

  Since n capacitors are charged in parallel and discharged in series, an n-fold booster circuit can be easily realized with a simple configuration.

  (13) Further, in order to solve the above problem, the present invention uses a secondary battery in place of the capacitor in the booster circuit according to any one of (1) to (6) above. This is a characteristic booster circuit.

  Since not only a capacitor but also a secondary battery can store and discharge electric power, it can be used in the same manner as a capacitor.

  (14) Further, in order to solve the above problem, the present invention uses a secondary battery in place of the capacitor in the step-down circuit according to any one of (7) to (12) above. This is a characteristic step-down circuit.

  Since not only a capacitor but also a secondary battery can store and discharge electric power, it can be used in the same manner as a capacitor.

  (15) In order to solve the above problem, the present invention has a configuration in which n booster circuits described in (1) are connected in series, and one or more booster circuits in the booster circuit group. Includes a control circuit that performs a boost operation, and the control circuit maintains the NO first switch of the boost circuit that does not perform the boost operation in a closed state and maintains the NO second switch in an open state. The booster circuit is characterized in that all the NC switch groups are kept closed. Here, n is an integer of 2 or more.

  With such a configuration, the booster circuit that does not perform the boosting operation can be operated as a so-called through circuit, so that the boosting factor can be set flexibly.

  (16) Further, the present invention is the booster circuit according to any one of the above (1) to (5), wherein the second capacitor is removed.

  Since the original voltage of the second capacitor is present, the charging voltage of the second capacitor is not necessary, and it may be removed.

  (17) Further, the present invention is the booster circuit according to (6), wherein the nth capacitor is removed.

  Since the original basic voltage exists in the nth capacitor, the charging voltage of the nth capacitor is not necessary, and therefore, it may be removed.

  As described above, according to the present invention, it is possible to provide a circuit capable of efficient voltage step-up / step-down using a capacitor or a storage battery (secondary battery).

  Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

First Usage Mode FIG. 1 is an explanatory diagram showing a usage mode of the voltage multi-divide circuit 10 according to the present embodiment. The voltage multi-divide circuit 10 is supplied with electric power from the power supply 12 and outputs a boosted or stepped down voltage to the outside. The SW timing generation control circuit 14 for controlling the operation of the voltage multi-divide circuit 10 supplies a predetermined clock signal to the voltage multi-divide circuit 10. The voltage multi-divide circuit 10 and the SW timing generation control circuit 14 correspond to a preferred example of a booster circuit and a step-down circuit in the claims. In particular, the SW timing generation control circuit 14 corresponds to a preferred example of the control circuit in the claims.

Second Principle FIG. 2 is an explanatory diagram for explaining the relationship between the capacitor and the switch, which is also the basic principle of the voltage multi-divide circuit 10 of the present embodiment. As shown in this figure, in the circuit in which the switches SW1, SW2, and SW3 are connected to the capacitor C, the relationship of SW1 · SW2 = bar (SW3) is established. Here, bar means negation (inversion).

In this circuit, the discharge time t in the case of constant current load discharge of the battery C is
t = C · (E0−E1) / I
It is represented by Here, t is the required discharge time, and C is the capacitance of the battery C. I is a required discharge current, E0 is a charging voltage for charging the capacitor, and E1 is a voltage for discharging the capacitor C.

On the other hand, the discharge time t in the case of constant resistance load discharge is
t = -C.R.Ix (E1 / E0)
It is represented by Here, R is a load resistance to be connected.

  Although only the discharging time has been described above, the charging time of the battery C depends on the power source impedance.

  In this embodiment, boosting is realized by charging a plurality of capacitors in parallel and discharging them in series in the present embodiment by utilizing such properties of the capacitors. Conversely, stepping down is realized by charging a plurality of capacitors in series and discharging them in parallel.

Third component The main components used in the present embodiment will be described. There are three main components: C, SW, and drive circuit.

  C is a capacitor (capacitor) or a secondary battery (rechargeable battery). Various capacitors and secondary batteries are used according to the purpose and capacity. In the case of a small-capacity / low-voltage power supply, it is also preferable to use an electric double layer capacitor. In recent years, an extremely large capacity electric double layer capacitor has been obtained. Moreover, it is also suitable to utilize a nickel metal hydride rechargeable battery (secondary battery), a lithium ion rechargeable battery (secondary battery), etc. depending on a use. (Lead) storage battery may be used.

  SW is a switch that can be operated at high speed. Although a mechanical switch can be used, a semiconductor switch that can be easily highly integrated, such as a photo MOS relay, is generally preferable.

  A variety of conventionally known drive circuits can be used as the drive circuit for driving SW. For example, it is preferable to appropriately use a known drive circuit for driving a photo MOS relay.

Fourth Basic Components Operation FIG. 3 shows a basic circuit of the present embodiment. As shown in this figure, the basic circuit is composed of a capacitor C or a storage battery C and four SW1, SW2, SW3, SW4 connected to the C.

  SW1 and SW3 always take the same open / close state and form a group called Nopen. Nopen is a normally open, that is, a group of switches that are normally in an “open” state.

  SW2 and SW4 always take the same open / close state and form a group called Nclose. Nclose is a normally closed, that is, a group of switches that are normally in a “closed” state.

  The Nopen group and the Nclose group are driven in opposite phases. When the Nopen group is in the “open” state, the Nclose group is in the “closed” state. Conversely, when the Nopen group is in the “closed” state, the Nclose group is in the “open” state. In this way, the open state and the closed state are alternately repeated. A graph showing the state of the drive signal for driving the SW group in this way is also shown in FIG.

  As apparent from this graph, when the drive signal of the Nopen group is L and the switches SW1 and SW3 of the Nopen group are in the open state, the switches SW2 and SW4 of the Nclose group are in the closed state. In this state, an input voltage is applied to C, and C is charged.

  On the other hand, when the drive signal of the Nopen group is H and the switches SW1 and SW3 of the Nopen group are closed, the switches SW2 and SW4 of the Nclose group are open. In this state, C is connected to the output, and C is discharged.

  Although FIG. 3 shows an example in which C is one, by providing a plurality of C, a boosting operation and a step-down operation are possible.

  Note that the input voltage in FIG. 3 is the input voltage during the boosting operation. This boosting operation is called multi-voltage operation. Further, the voltage output in FIG. 3 is an output in the step-up operation (multi-voltage operation). The multi-voltage means a Multiply voltage, that is, an operation of multiplying the voltage, and is a preferable example of boosting.

  Although a control circuit for generating a drive signal is not shown, a circuit for outputting a signal that repeats ON / OFF alternately is widely known in the past as various power supply circuits and the like. Just do it.

5th Double Multi-Voltage Basic Circuit FIG. 4 shows an example (referred to as a double multi-voltage basic circuit) in which two C are used to boost the voltage to a double voltage. As shown in this figure, the double multi-voltage basic circuit includes two Cs. One is CB0 and CB1. The double multi-voltage basic circuit includes Nclose group switches SWNCa, SWNCb, and SWNCc. The double multi-voltage basic circuit includes two switches, a Nopen group switch SWNOa and SWNOb.

Operation First, each switch of the Nclose group is set to the “closed” state, and each switch of the Nopen group is set to the “open” state. In this state, two Cs are charged with a charging voltage of VCB. As the basic voltage input VCB, as shown in the figure, it is preferable to use a capacitor, a secondary battery or the like, but other power sources may be used.

  Next, each switch of the Nclose group is set to the “open” state, and each switch of the Nopen group is set to the “closed” state. In this state, the two Cs are directly connected, and the output voltage HVIO is output from both ends thereof. Since this voltage is twice that of the basic voltage input, it is called a double voltage output.

  Note that CB0 and CB1 are capacitors of the same capacity or rechargeable batteries.

  By repeating these two states, a voltage twice the basic voltage can be obtained.

Omission of CB0 In the double multi-voltage basic circuit of FIG. 4, the capacitor CB0 can be omitted except when used as a step-down circuit described below. This is because the charging voltage at the capacitor CB0 is not required because the original basic voltage exists. If omitted, the switch connecting the capacitor CB0 and the basic voltage must always be in the “closed” state.

Sixth 1/2 Divide Voltage Basic Circuit The circuit of FIG. 4 can also be used as a circuit that halves the voltage. This is shown in FIG. The circuit (1/2 divide voltage basic circuit) shown in FIG. 5 has a circuit configuration basically similar to that of FIG.

  In the circuit shown in FIG. 5, a basic voltage input is applied to the output of the circuit shown in FIG. 4, and a ½ voltage output is obtained from the input of the circuit of FIG. In other words, the switching operation of the circuit itself is exactly the same, but a different result that the voltage is halved is obtained.

Operation First, a basic voltage is applied to HVIO.

  Next, each switch of the Nclose group is set to the “open” state, and each switch of the Nopen group is set to the “closed” state. In this state, the charging voltage / HVIO (basic voltage) is applied to the two Cs “in series” to be charged.

  Next, each switch of the Nclose group is set to the “closed” state, and each switch of the Nopen group is set to the “open” state. In this state, the two Cs are connected in parallel, and a ½ voltage output VCB is output from both ends thereof. This is because CB0 and CB1 have the same capacity, so that the input voltage is divided and becomes 1/2.

  By repeating these two states, a voltage ½ times the basic voltage can be obtained.

  As described above, in the circuits shown in FIGS. 4 and 5, when a voltage is applied to the VCB side, twice the voltage is output to the HVIO, and when a voltage is applied to the HVIO side, a half of the voltage is output to the VCB side. Is obtained.

  Therefore, the voltage can be doubled and halved by a single circuit (the same control circuit that generates the drive signal), and a highly convenient circuit can be obtained. In particular, since no inductance is used, it is possible to provide a voltage booster circuit and a step-down circuit with improved efficiency.

7th 3rd plane configuration In FIG.4 and FIG.5 mentioned above, although the circuit which performs charge and discharge alternately was shown, if a plurality of circuits which perform this operation are prepared and charge / discharge is performed in order, smooth An output voltage will be obtained.

  FIG. 6 shows an example in which three basic circuits of FIGS. 4 and 5 are provided. This is called a three-plane configuration.

  As can be easily understood from FIG. 6, the circuit of FIG. 6 is a person who connected three sets of the circuit of FIG. 4 (FIG. 5) in parallel. And the control circuit which is not illustrated controls the switch of each circuit, and controls the charge state and the discharge state, respectively.

  A timing chart showing a specific control operation is shown in the lower part of FIG. In this timing chart, the change of the value (vertical axis) of the control signal for each of the three sets of circuits is drawn along the time axis (horizontal axis).

  First, the three basic circuits are called an A plane, a B plane, and a C plane, respectively. That is, a booster / buck circuit is configured with three phases.

  First, the A plane is set to the “discharge” state, and the B plane and the C plane are set to the “charge” state. Next, the B plane is set to the “discharge” state, and the C plane and the A plane are set to the “charge” state. Next, the C plane is set to the “discharge” state, and the A plane and the B plane are set to the “charge” state. This is repeated below.

  As a result, since any one of the planes is always in the output (discharge) state, the output voltage can be further stabilized. 4 and 5, this circuit can also be used as a booster circuit or a step-down circuit, but depending on which one is used, the ON / OFF state of the switch may be reversed even in the case of the same “discharge”. Needless to say.

  In the example of FIG. 6, an example of three phases is shown, but in order to realize two phases, it may be configured by two planes, and it is of course preferable to increase to four or more planes. However, if the number of planes increases, the control circuit to be controlled needs to be configured to output multiphase drive signals accordingly.

Since such a control circuit for outputting a multiphase signal has been conventionally used in various circuits such as a switching power supply, such a circuit may be used.

Omission of CB0 In the three-plane configuration of FIG. 6, as in the case of FIG. 4, the capacitor CB0 of each plane can be omitted unless used as a step-down circuit. This is because the charging voltage at the capacitor CB0 is unnecessary because the original basic voltage exists. If omitted, the switch connecting the capacitor CB0 and the basic voltage must always be in the “closed” state.

Eighth voltage 10 × multi-configuration In the circuits of FIG. 4 and FIG. 5, since two C are used, the voltage is either doubled or halved. On the other hand, if n Cs (n is an integer of 3 or more) are used, a circuit for increasing the voltage by n times or 1 / n times can be obtained.

  FIG. 7 shows a circuit that uses 10 C and multiplies the voltage by 10. As is apparent from this figure, this circuit includes two switches of an Nclose group for connecting 10 Cs in parallel and a Nopen group for connecting 10 Cs in series. Is provided. In FIG. 7, all the switches connected in the vertical direction are switches of the Nclose group, and all the switches connected in the horizontal direction are switches of the Nopen group.

  First, all the switches in the Nclose group are set to the “closed” state, and each switch in the Nopen group is set to the “open” state. In this state, 10 Cs are charged with a charging voltage of VCB. As the basic voltage input VCB, as shown in the figure, it is preferable to use a capacitor, a secondary battery or the like, but other power sources may be used.

  Next, all the switches in the Nclose group are set to the “open” state, and each switch in the Nopen group is set to the “closed” state. In this state, 10 Cs are directly connected, and the output voltage HVIO is output from both ends thereof. This voltage is ten times the basic voltage input. Therefore, the circuit shown in FIG. 7 is called a voltage 10 × multi-configuration.

  In addition, 10 C is a capacitor of the same capacity or a rechargeable battery.

  By repeating these two states, a voltage 10 times the basic voltage can be obtained. Since the two states are repeated, the control circuit for controlling these switches can be basically used as the control circuit of the double and ½ times circuits of FIGS. However, since the number of switches to be driven increases, a larger driving capability is required.

Omitting the 10th Capacitor In the voltage 10 × multi-configuration of FIG. 7 as well, the 10th capacitor closest to the basic voltage can be omitted except when used as a step-down circuit, as in FIG. . This is because the basic voltage exists in the basic voltage, so the charging voltage of the tenth capacitor is not required. If omitted, the switch connecting the tenth capacitor and the basic voltage must always be in the “closed” state.

Ninth Binary Multi-Voltage Configuration In FIG. 4 described above, the booster circuit for converting to a double voltage has been described. If this circuit is connected in multiple stages, boosting circuits of 4 times, 8 times, 16 times,... Can be obtained. An example of such a circuit is shown in FIG.

  The example shown in FIG. 8 shows a circuit that obtains a maximum 16-fold voltage by connecting four stages of the double multi-voltage basic circuit (FIG. 4). Note that a common control circuit can be used for the four-stage double multi-voltage basic circuit in FIG.

  If any one of the four stages of the double multi-voltage basic circuit is stopped, a circuit that boosts the voltage eight times can be obtained. Here, “stop” means that among the switches belonging to the remarkable Nopen group, the switches of the final output unit are fixed to the “closed” state, and all the switches belonging to the other Nopen groups are fixed to the “open” state. A state in which all the switches belonging to the Nclose group are fixed to the “closed” state.

  In this stopped state, the special circuit is neither a step-up nor a step-down and becomes a simple through circuit.

  Similarly, if one of the two stages is “stopped”, the circuit boosts the voltage four times.

  Thus, in order to be able to change the multiple of the boost, a new circuit for controlling the drive signal generated by the control circuit is required. This new circuit (not shown) will generally be a user-controlled switch that serves to lock the drive signal to a predetermined value. By operating such a switch by the user, the switch farm pair at any stage is fixed to “open” or “closed” and operates as a through circuit as described above.

  As described above, according to the circuit shown in FIG. 8, a boosting multiple can be selected by adjusting the number of boosting stages, and a highly convenient boosting circuit can be obtained.

Omission of CB0 In the binary multi-voltage configuration of FIG. 8, as in the case of FIG. 4, the capacitor CB0 at each stage can be omitted except when used as a step-down circuit. If omitted, the switch connecting the capacitor CB0 and the basic voltage (2 × previous voltage) must always be in the “closed” state.

Modification of the 10th 3rd Plane In the example of FIG. 6 described above, the configuration in which each of the 3 planes repeatedly discharges and charges in order has been shown. However, when switching repeatedly, the outputs are overlapped for a predetermined time. It is considered that a smoother output can be obtained.

  An example in which the outputs are overlapped for a predetermined time is shown in FIG. In the lower part of FIG. 9, a time chart showing the time change of the value of the drive signal is shown.

Operation First, the A plane is set to the output state, that is, the “discharge” state, and the B plane and the C plane are set to the “charge” state. This is the A plane discharge state.

  Next, while maintaining the A plane in the discharged state, the B plane is set to the “discharge” state, and the C plane is set to the “charge” state. This is an overlapping state, and there is a period during which the outputs of two planes are simultaneously output during switching.

  By changing the A plane from the overlap state to the “charge” state, only the B plane is output, that is, the “discharge” state. This is the B plane discharge state.

  Next, while maintaining the B plane in the discharged state, the C plane is set to the “discharge” state, and the A plane is set to the “charge” state. This is also an overlap state, and is the moment when the outputs of two planes (B plane and C plane) are output simultaneously.

  By setting the B plane to the “charge” state from this overlap state, only the C plane is output, that is, the “discharge” state. This is the C plane discharge state.

  In order to perform such an operation, a control circuit (not shown) needs to provide an overlap for each control signal when switching. This overlap is an overlap, and if there are many overlaps, the overlap time increases and a smoother output can be obtained. In this way, giving the drive signal a certain overlap time can be easily realized by adjusting the switching timing of each drive signal.

It is explanatory drawing which shows the utilization form of the voltage multi-divide circuit concerning this Embodiment. It is explanatory drawing explaining the relationship between the electrical storage device and switch which is also the basic principle of the voltage multi-divide circuit of this Embodiment. It is a figure which shows the basic circuit of this Embodiment. It is a circuit diagram showing an example (called a double multi-voltage basic circuit) in which two Cs are used to boost the voltage to a double voltage. FIG. 5 is a circuit diagram illustrating an example (1/2 divide voltage basic circuit) in which the circuit of FIG. 4 is used as a circuit that halves a voltage. FIG. 6 is a circuit diagram illustrating an example (referred to as a three-plane configuration) including three basic circuits of FIGS. 4 and 5. It is a circuit diagram which shows the circuit which uses 10 C and multiplies a voltage. FIG. 6 is a circuit diagram showing a circuit for obtaining a maximum 16-fold voltage by connecting four stages of a double-multi-voltage basic circuit (FIG. 4). FIG. 7 is a circuit diagram showing an example in which outputs are overlapped for a predetermined time in the three-plane configuration shown in FIG. 6.

Explanation of symbols

10 voltage multi-divide circuit 12 power supply 14 SW timing generation control C capacitor or secondary battery (rechargeable battery)

Claims (17)

A first capacitor;
A second capacitor;
An NC switch group for connecting the first capacitor and the second capacitor in parallel at the time of charging, and connecting a basic voltage to a parallel circuit of the first capacitor and the second capacitor;
NO switch group for connecting the first capacitor and the second capacitor in series at the time of discharging, and connecting a double voltage to a series circuit of the first capacitor and the second capacitor; ,
At the time of charging, the NC switch group is closed, the NO switch group is opened, a parallel circuit of the first capacitor and the second capacitor is connected to a basic voltage, and at the time of discharging, the NC switch group is opened, A control circuit for closing the NO switch group and connecting a double voltage to a series circuit of the first capacitor and the second capacitor;
Including
The NC switch group is:
An NC first switch connecting a first terminal of the first capacitor and a basic voltage;
An NC second switch connecting a first terminal of the second capacitor and a basic voltage;
An NC third switch connecting the second terminal of the first capacitor and the ground;
Including
The NO switch group includes:
A NO first switch connecting a first terminal of the first capacitor and a double voltage;
A NO second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor;
A booster circuit comprising: A booster circuit for the first plane;
A booster circuit for the second plane;
A booster circuit for the third plane;
A control circuit for sequentially placing the booster circuits of the first, second, and third planes in a discharged state, and placing the remaining booster circuits in a discharged state in a charged state;
Including
The boost circuits for the first, second, and third planes are all
A first capacitor;
A second capacitor;
An NC switch group for connecting the first capacitor and the second capacitor in parallel at the time of charging, and connecting a basic voltage to a parallel circuit of the first capacitor and the second capacitor;
NO switch group for connecting the first capacitor and the second capacitor in series at the time of discharging, and connecting a double voltage to a series circuit of the first capacitor and the second capacitor; ,
Including
The NC switch group is:
An NC first switch connecting a first terminal of the first capacitor and a basic voltage;
An NC second switch connecting a first terminal of the second capacitor and a basic voltage;
An NC third switch connecting the second terminal of the first capacitor and the ground;
Including
The NO switch group includes:
A NO first switch connecting a first terminal of the first capacitor and a double voltage;
A NO second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor;
Including
The control circuit includes:
Close the NC switch group, open the NO switch group, and connect the basic voltage and the parallel circuit of the first capacitor and the second capacitor in the booster circuit of the plane to be charged,
In the step-up circuit of the plane to be placed in a discharge state, the NC switch group is opened, the NO switch group is closed, and a double voltage is connected to the series circuit of the first capacitor and the second capacitor. 3-plane booster circuit. The three-plane booster circuit according to claim 2,
When switching the discharge state, the control circuit places the booster circuit that has been in the discharged state after the predetermined overlap time has elapsed after placing the booster circuit in the newly discharged state in the discharged state. A three-plane booster circuit. N booster circuits from the first plane to the nth plane;
A control circuit for sequentially placing the booster circuits from the first to nth planes in a discharged state, and placing the remaining booster circuits in a discharged state in a charged state;
Including
Any of the booster circuits in the first to n-th planes
A first capacitor;
A second capacitor;
An NC switch group for connecting the first capacitor and the second capacitor in parallel at the time of charging, and connecting a basic voltage to a parallel circuit of the first capacitor and the second capacitor;
NO switch group for connecting the first capacitor and the second capacitor in series at the time of discharging, and connecting a double voltage to a series circuit of the first capacitor and the second capacitor; ,
Including
The NC switch group is:
An NC first switch connecting a first terminal of the first capacitor and a basic voltage;
An NC second switch connecting a first terminal of the second capacitor and a basic voltage;
An NC third switch connecting the second terminal of the first capacitor and the ground;
Including
The NO switch group includes:
A NO first switch connecting a first terminal of the first capacitor and a double voltage;
A NO second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor;
Including
The control circuit includes:
Close the NC switch group, open the NO switch group, and connect the basic voltage and the parallel circuit of the first capacitor and the second capacitor in the booster circuit of the plane to be charged,
In the step-up circuit of the plane to be placed in a discharge state, the NC switch group is opened, the NO switch group is closed, and a double voltage is connected to the series circuit of the first capacitor and the second capacitor. An n-plane booster circuit. Here, n is a positive integer of 2 or more. The n-plane booster circuit according to claim 4,
When switching the discharge state, the control circuit places the booster circuit that has been in the discharged state after the predetermined overlap time has elapsed after placing the booster circuit in the newly discharged state in the discharged state. An n-plane booster circuit. N capacitors from first to nth;
A group of NC switches for connecting the first to n-th capacitors in parallel and charging a basic voltage with a parallel circuit of the first to n-th capacitors during charging;
A NO switch group for connecting the first to n-th capacitors in series and connecting an n-fold voltage to a series circuit of the first to n-th capacitors at the time of discharging; ,
At the time of charging, the NC switch group is closed, the NO switch group is opened, a parallel circuit of the first to nth capacitors is connected to a basic voltage, and at the time of discharging, the NC switch group is opened, and the NO switch is opened. A control circuit that closes the switch group and connects the series circuit of the first to n-th capacitors and the n-fold voltage;
Including
The NC switch group is:
NC thirty-first to NC th an switches connecting the first terminals of the first to nth capacitors and the basic voltage, respectively.
NC b1 to NC bn switches connecting the second terminals of the first to nth capacitors and the ground, respectively.
Including
The NO switch group includes:
A NO first switch connecting the first terminal of the first capacitor and the n-fold voltage;
A NO 2k switch connecting the first terminal of the kth capacitor and the second terminal of the k-1th capacitor (k is an integer of 2 or more and n or less);
A booster circuit comprising: Here, n is a positive integer of 2 or more. A first capacitor;
A second capacitor;
An NC switch group for connecting the first capacitor and the second capacitor in parallel at the time of discharging, and for connecting a basic voltage to a parallel circuit of the first capacitor and the second capacitor;
NO switch group for connecting the first capacitor and the second capacitor in series at the time of charging, and connecting a double voltage to a series circuit of the first capacitor and the second capacitor; ,
At the time of discharging, the NC switch group is closed, the NO switch group is opened, a parallel circuit of the first capacitor and the second capacitor and a basic voltage are connected, and at the time of charging, the NC switch group is opened, A control circuit for closing the NO switch group and connecting a double voltage to a series circuit of the first capacitor and the second capacitor;
Including
The NC switch group is:
An NC first switch connecting a first terminal of the first capacitor and a basic voltage;
An NC second switch connecting a first terminal of the second capacitor and a basic voltage;
An NC third switch connecting the second terminal of the first capacitor and the ground;
Including
The NO switch group includes:
A NO first switch connecting a first terminal of the first capacitor and a double voltage;
A NO second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor;
A step-down circuit comprising: A step-down circuit of the first plane;
A step-down circuit of the second plane;
A third plane step-down circuit;
A control circuit for sequentially placing the step-down circuits of the first, second, and third planes in a discharged state, and placing the remaining step-down circuits that are not in a discharged state in a charged state;
Including
The step-down circuits of the first, second, and third planes are all
A first capacitor;
A second capacitor;
An NC switch group for connecting the first capacitor and the second capacitor in parallel at the time of discharging, and for connecting a basic voltage to a parallel circuit of the first capacitor and the second capacitor;
NO switch group for connecting the first capacitor and the second capacitor in series at the time of charging, and connecting a double voltage to a series circuit of the first capacitor and the second capacitor; ,
Including
The NC switch group is:
An NC first switch connecting a first terminal of the first capacitor and a basic voltage;
An NC second switch connecting a first terminal of the second capacitor and a basic voltage;
An NC third switch connecting the second terminal of the first capacitor and the ground;
Including
The NO switch group includes:
A NO first switch connecting a first terminal of the first capacitor and a double voltage;
A NO second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor;
Including
The control circuit includes:
Close the NC switch group, open the NO switch group in the step-down circuit of the plane to be placed in a discharge state, connect the parallel circuit of the first capacitor and the second capacitor and a basic voltage,
In the step-down circuit of the plane to be charged, the NC switch group is opened, the NO switch group is closed, and a double voltage is connected to the series circuit of the first capacitor and the second capacitor. 3 plane step-down circuit. The three-plane step-down circuit according to claim 8,
When switching the discharge state, the control circuit places the step-down circuit to be newly placed in the discharge state into the discharge state, and then places the step-down circuit that has been in the discharged state into the charge state after a predetermined overlap time has elapsed. A three-plane voltage step-down circuit. N step-down circuits from the first plane to the n-th plane;
A control circuit for sequentially placing the step-down circuits from the first to the n-th plane in a discharged state, and placing the remaining step-down circuits not in the discharged state in a charged state;
Including
Each of the step-down circuits in the first to n-th planes has a first capacitor,
A second capacitor;
An NC switch group for connecting the first capacitor and the second capacitor in parallel at the time of discharging, and for connecting a basic voltage to a parallel circuit of the first capacitor and the second capacitor;
NO switch group for connecting the first capacitor and the second capacitor in series at the time of charging, and connecting a double voltage to a series circuit of the first capacitor and the second capacitor; ,
Including
The NC switch group is:
An NC first switch connecting a first terminal of the first capacitor and a basic voltage;
An NC second switch connecting a first terminal of the second capacitor and a basic voltage;
An NC third switch connecting the second terminal of the first capacitor and the ground;
Including
The NO switch group includes:
A NO first switch connecting a first terminal of the first capacitor and a double voltage;
A NO second switch connecting the first terminal of the second capacitor and the second terminal of the first capacitor;
Including
The control circuit includes:
Close the NC switch group, open the NO switch group in the step-down circuit of the plane to be placed in a discharge state, connect the parallel circuit of the first capacitor and the second capacitor and a basic voltage,
In the step-down circuit of the plane to be charged, the NC switch group is opened, the NO switch group is closed, and a double voltage is connected to the series circuit of the first capacitor and the second capacitor. N-plane step-down circuit. Here, n is a positive integer of 2 or more. The n-plane step-down circuit according to claim 10,
When switching the discharge state, the control circuit places the step-down circuit to be newly placed in the discharge state into the discharge state, and then places the step-down circuit that has been in the discharged state into the charge state after a predetermined overlap time has elapsed. An n-plane step-down circuit. N capacitors from first to nth;
A group of NC switches for connecting the first to n-th capacitors in parallel and connecting a basic voltage to a parallel circuit of the first to n-th capacitors at the time of discharging;
A NO switch group for connecting the first to n-th capacitors in series and connecting an n-fold voltage to a series circuit of the first to n-th capacitors during charging; ,
At the time of discharging, the NC switch group is closed, the NO switch group is opened, a parallel circuit of the first to nth capacitors is connected to a basic voltage, and at the time of charging, the NC switch group is opened and the NO switch group is opened. A control circuit that closes the switch group and connects the series circuit of the first to n-th capacitors and the n-fold voltage;
Including
The NC switch group is:
NC thirty-first to NC th an switches connecting the first terminals of the first to nth capacitors and the basic voltage, respectively.
NC b1 to NC bn switches connecting the second terminals of the first to nth capacitors and the ground, respectively.
Including
The NO switch group includes:
A NO first switch connecting the first terminal of the first capacitor and the n-fold voltage;
A NO 2k switch connecting the first terminal of the kth capacitor and the second terminal of the k-1th capacitor (k is an integer of 2 or more and n or less);
A step-down circuit comprising: Here, n is a positive integer of 2 or more. The booster circuit according to any one of claims 1 to 6, wherein
A step-up circuit using a secondary battery instead of the capacitor. The step-down circuit according to any one of claims 7 to 12,
A step-down circuit using a secondary battery instead of the capacitor. A configuration in which n booster circuits according to claim 1 are connected in series;
A control circuit that causes one or more booster circuits to perform a boost operation in the booster circuit group;
The control circuit maintains the NO first switch of the booster circuit that does not perform the boost operation in a closed state, maintains the NO second switch in an open state, and closes all the NC switch groups. A booster circuit characterized by maintaining. Here, n is an integer of 2 or more. In the booster circuit according to any one of claims 1 to 5,
A booster circuit, wherein the second capacitor is removed. The booster circuit according to claim 6, wherein
A booster circuit wherein the n capacitors are removed.

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