JP2008124188A - 電極構造体及びその製造方法、並びに電子デバイス - Google Patents

電極構造体及びその製造方法、並びに電子デバイス Download PDF

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Publication number
JP2008124188A
JP2008124188A JP2006305111A JP2006305111A JP2008124188A JP 2008124188 A JP2008124188 A JP 2008124188A JP 2006305111 A JP2006305111 A JP 2006305111A JP 2006305111 A JP2006305111 A JP 2006305111A JP 2008124188 A JP2008124188 A JP 2008124188A
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Japan
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wire
electrodes
electrode structure
fine
conductive
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JP2006305111A
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Japanese (ja)
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JP2008124188A5 (enrdf_load_stackoverflow
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Shinichiro Kondo
眞一郎 近藤
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Sony Corp
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Sony Corp
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Priority to JP2006305111A priority Critical patent/JP2008124188A/ja
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Publication of JP2008124188A5 publication Critical patent/JP2008124188A5/ja
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JP2006305111A 2006-11-10 2006-11-10 電極構造体及びその製造方法、並びに電子デバイス Pending JP2008124188A (ja)

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JP2006305111A JP2008124188A (ja) 2006-11-10 2006-11-10 電極構造体及びその製造方法、並びに電子デバイス

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JP2008124188A true JP2008124188A (ja) 2008-05-29
JP2008124188A5 JP2008124188A5 (enrdf_load_stackoverflow) 2009-12-03

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009272432A (ja) * 2008-05-07 2009-11-19 Japan Advanced Institute Of Science & Technology Hokuriku ギャップで分断された薄膜の製造方法、およびこれを用いたデバイスの製造方法
EP2221863A1 (en) * 2009-02-19 2010-08-25 Empire Technology Development LLC Integrated circuit nanowires
JP2014503982A (ja) * 2010-10-07 2014-02-13 ポステック アカデミー−インダストリー ファウンデーション 微細パターン形成方法、並びにそれを利用した微細チャネルトランジスタ及び微細チャネル発光トランジスタの形成方法
US11391685B2 (en) * 2016-11-10 2022-07-19 E Ink Holdings Inc. Sensitive device and method of forming the same
GB2610886A (en) * 2019-08-21 2023-03-22 Pragmatic Printing Ltd Resistor geometry
US11784227B2 (en) 2017-10-13 2023-10-10 Wayne State University Method for fabricating wafer scale/nano sub micron gap electrodes and arrays via photolithography
US12342609B2 (en) 2019-08-21 2025-06-24 Pragmatic Semiconductor Limited Electronic circuit comprising transistor and resistor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004530292A (ja) * 2001-03-09 2004-09-30 セイコーエプソン株式会社 パターン化処理方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004530292A (ja) * 2001-03-09 2004-09-30 セイコーエプソン株式会社 パターン化処理方法

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009272432A (ja) * 2008-05-07 2009-11-19 Japan Advanced Institute Of Science & Technology Hokuriku ギャップで分断された薄膜の製造方法、およびこれを用いたデバイスの製造方法
EP2221863A1 (en) * 2009-02-19 2010-08-25 Empire Technology Development LLC Integrated circuit nanowires
JP2010192876A (ja) * 2009-02-19 2010-09-02 Emprie Technology Development LLC ナノワイヤの製造方法及び集積回路
US8664539B2 (en) 2009-02-19 2014-03-04 Empire Technology Development Llc Integrated circuit nanowires
JP2014503982A (ja) * 2010-10-07 2014-02-13 ポステック アカデミー−インダストリー ファウンデーション 微細パターン形成方法、並びにそれを利用した微細チャネルトランジスタ及び微細チャネル発光トランジスタの形成方法
US11391685B2 (en) * 2016-11-10 2022-07-19 E Ink Holdings Inc. Sensitive device and method of forming the same
US11784227B2 (en) 2017-10-13 2023-10-10 Wayne State University Method for fabricating wafer scale/nano sub micron gap electrodes and arrays via photolithography
GB2610886A (en) * 2019-08-21 2023-03-22 Pragmatic Printing Ltd Resistor geometry
GB2610886B (en) * 2019-08-21 2023-09-13 Pragmatic Printing Ltd Resistor geometry
US12159898B2 (en) 2019-08-21 2024-12-03 Pragmatic Semiconductor Limited Resistor geometry
US12268014B2 (en) 2019-08-21 2025-04-01 Pragmatic Semiconductor Limited Resistors for integrated circuits
US12342609B2 (en) 2019-08-21 2025-06-24 Pragmatic Semiconductor Limited Electronic circuit comprising transistor and resistor

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