JP2008083217A - Liquid crystal device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal device capable of heating liquid crystal without raising the cost or increasing the size. <P>SOLUTION: The liquid crystal device 100, adopting an IPS system, has various thin film transistors formed on the element substrate 10 and also has pixel electrodes 9a and counter electrodes 9b as common electrodes formed. Further, a temperature sensor 5 and a heater control circuit 55 are formed on the element substrate 10, and a heater 58 is formed on the counter electrode 20. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a liquid crystal device capable of heating a liquid crystal when the environmental temperature is low.

In the liquid crystal device, when the environmental temperature is low, for example, the switching of the alignment state of the liquid crystal is delayed, so a temperature sensor and a heater are externally attached to the liquid crystal device, and based on the measurement result of the temperature sensor, When the environmental temperature is low, it has been proposed to heat the liquid crystal device with a heater (see, for example, Patent Document 1).
Japanese Patent Laid-Open No. 11-153785

  However, when a temperature sensor and a heater are externally attached to the liquid crystal device, there are problems that the cost increases and the size increases.

  In view of the above problems, an object of the present invention is to provide a liquid crystal device capable of heating a liquid crystal without causing an increase in cost and an increase in size.

  In order to solve the above problems, in the present invention, an element substrate on which a pixel switching element and a pixel electrode are formed, a counter substrate holding a liquid crystal layer between the element substrate, the element substrate, and the counter substrate A thin film forming a heater on one of the element substrate and the counter substrate, wherein the thin film is provided on one of the element substrate and the counter substrate. A temperature sensor and a temperature control circuit for controlling power supply to the heater based on a temperature detection result by the temperature sensor are formed on the element substrate.

  In the present invention, a heater is formed on one of the element substrate and the counter substrate, and a temperature sensor and a temperature control circuit are formed on the element substrate. And there is no need to add a heater. Therefore, the liquid crystal can be heated when the environmental temperature is low without increasing the cost and increasing the size.

  In the present invention, it is preferable that the counter electrode is formed on the element substrate, and the heater is formed on the counter substrate. In the case where the counter electrode is formed on the element substrate as in an IPS (In-Plane-Switching) mode liquid crystal device, a heater is formed on the counter substrate in order to control the orientation of the liquid crystal by a lateral electric field. There is an advantage that the potential of the heater does not disturb the alignment of the liquid crystal.

  In the present invention, the heater is preferably composed of a transparent conductive film. If comprised in this way, since display light is not blocked | interrupted with a heater, display light can be radiate | emitted with sufficient light quantity.

  In the present invention, it is preferable that the pixel switching element is a thin film transistor, and the temperature sensor and the temperature control circuit include one or more thin films among a plurality of thin films constituting the thin film transistor. If comprised in this way, a temperature sensor and a temperature control circuit can be comprised, without increasing the number of manufacturing processes.

In the present invention, the thin film transistor may employ a configuration in which an active layer is made of a polysilicon film. When a polysilicon film is formed on the element substrate, a temperature sensor with high sensitivity can be formed using the polysilicon film, and a temperature control circuit having an excellent operation speed can be configured. The liquid crystal device is used as a display unit of an electronic device such as a mobile phone or a mobile computer.

  Embodiments of the present invention will be described below. In the drawings to be referred to in the following description, the scales are different for each layer and each member so that each layer and each member have a size that can be recognized on the drawing.

[Embodiment 1]
(overall structure)
FIGS. 1A and 1B are a plan view of a liquid crystal device to which the present invention is applied, as viewed from the side of the counter substrate, together with each component formed thereon, and a cross-sectional view taken along line H1-H1 ′. .

  1A and 1B, a liquid crystal device 100 of the present embodiment is a transmissive active matrix liquid crystal device, and a sealing material 107 is provided on the element substrate 10 along the edge of the counter substrate 20. Is provided. A data line driving circuit 101 (peripheral circuit) and a mounting terminal 102 (signal input terminal) are provided along one side of the element substrate 10 in a region outside the sealing material 107, and two sides adjacent to the one side are provided. A scanning line driving circuit 104 (peripheral circuit) is formed along the line. On the remaining side of the element substrate 10, a plurality of wirings 105 are provided for connecting between the scanning line driving circuits 104 provided on both sides of the image display region 10a. In some cases, peripheral circuits such as a precharge circuit and an inspection circuit are provided.

  In at least two corners of the counter substrate 20, vertical conductive members 106 are formed for electrical conduction between the element substrate 10 and the counter substrate 20. The counter substrate 20 has substantially the same outline as the sealing material 107, and the counter substrate 20 is fixed to the element substrate 10 by the sealing material 107. The sealing material 107 is an adhesive made of a photo-curing resin, a thermosetting resin, or the like, and is mixed with a gap material such as glass fiber or glass beads for setting the distance between both substrates to a predetermined value. Between the element substrate 10 and the counter substrate 20, a liquid crystal layer 50 as an electro-optical material is sealed and held in a space surrounded by a sealing material 107. The liquid crystal layer 50 assumes a predetermined alignment state by an alignment film described later in a state where an electric field is not applied. The liquid crystal layer 50 is made of, for example, one or a mixture of several types of nematic liquid crystals. In addition, on the light incident side surface or the light emitting side of the counter substrate 20 and the element substrate 10, the type of the liquid crystal 50 to be used, that is, an operation mode such as a TN (twisted nematic) mode, an STN (super TN) mode, Depending on the normally white mode / normally black mode, a polarizing film, a retardation film, a polarizing plate, and the like are arranged in a predetermined direction.

  As will be described in detail later, pixel electrodes 9a are formed in a matrix on the element substrate 10. On the other hand, a frame 108 made of a light-shielding material is formed in the inner area of the sealing material 107 on the counter substrate 20, and the inner side is an image display area 10 a.

  In this embodiment, the liquid crystal device 100 drives the liquid crystal layer 50 in the IPS mode. For this reason, the element substrate 10 is also provided with a pixel electrode 9a and a counter electrode 9b (common electrode) facing the pixel electrode 9a via the liquid crystal layer 50, and the pixel electrode 9a is disposed between the pixel electrode 9a and the counter electrode 9b. The liquid crystal layer 50 is driven using the generated horizontal electric field. For this reason, the counter electrode 9 b is not formed on the counter substrate 20.

  In this embodiment, a temperature sensor 5 and a temperature control circuit 55 described later are formed on the element substrate 10 around the image display region 10a. In addition, a thin film constituting the planar heater 59 is formed on the entire surface of the counter substrate 20.

  The liquid crystal device 100 formed in this way can be used as a color display device for electronic devices such as a mobile computer, a cellular phone, and a liquid crystal television described later. In this case, the counter substrate 20 has a color filter 27 and an insulating material. A protective film 28 is formed. The liquid crystal device 100 is not limited to the transmissive type, and may be configured as a reflective type and a transflective type. In this case, for example, a light reflecting layer is formed on the element substrate 10. The liquid crystal device 100 can be used as an RGB light valve in a projection display device (liquid crystal projector). In this case, each color liquid crystal device 100 for RGB receives light of each color separated through RGB color separation dichroic mirrors as projection light, so that no color filter is formed. Further, if a microlens is formed on the counter substrate 20 so as to correspond to each pixel, the light collection efficiency of incident light on the pixel electrode 9a can be increased, so that bright display can be performed. Furthermore, a dichroic filter that produces RGB colors using the interference action of light may be formed by stacking multiple layers of interference layers having different refractive indexes on the counter substrate 20. According to the counter substrate with the dichroic filter, brighter color display can be performed.

(Configuration of element substrate 10)
The electrical configuration of the element substrate 10 used in the liquid crystal device 100 to which the present invention is applied will be described with reference to FIGS. 2A, 2B, and 2C are respectively an equivalent circuit diagram showing an electrical configuration of an image display region of an element substrate used in the liquid crystal device 100 to which the present invention is applied, and an inverter configured in a peripheral circuit. It is the equivalent circuit schematic of a circuit, and the block diagram of a temperature control mechanism. 3A and 3B are plan views of adjacent pixels on the element substrate used in the liquid crystal device 100 to which the present invention is applied, and the liquid crystal device cut at a position corresponding to the A1-A1 ′ line. It is sectional drawing when doing. 4A and 4B are plan views of the inverter circuit formed on the element substrate used in the liquid crystal device 100 to which the present invention is applied, and the element substrate is cut at a position corresponding to the BB ′ line. It is sectional drawing when doing.

  As shown in FIG. 2A, in the substrate 10, in the image display region 10a, a plurality of pixels 100a are formed in a matrix corresponding to the intersections of the scanning lines 3a and the data lines 6a extending in the direction intersecting each other. Has been. In each of the plurality of pixels 100 a, a pixel electrode 9 a and a pixel switching thin film transistor 30 (pixel switching element) for controlling the pixel electrode 9 a are formed. The pixel electrode 9 a is electrically connected to the drain of the thin film transistor 30. Connected. The data line 6 a is electrically connected to the source of the thin film transistor 30, and the scanning line 3 a is electrically connected to the gate of the thin film transistor 30.

  In the element substrate 10, each of the plurality of pixels 100 a is provided with a counter electrode 9 b that faces the pixel electrode 9 a through the liquid crystal layer 50 illustrated in FIG. Here, the counter electrode 9b is connected to a constant potential line 3b extending in parallel with the scanning line 3a, and functions as a common electrode. For this reason, when the image signal supplied from the data line 6a is supplied to each pixel at a predetermined timing by turning on the thin film transistor 30 for a certain period, the predetermined level written in the liquid crystal via the pixel electrode 9a. The pixel signal is held for a certain period with the counter electrode 9b. Here, in order to prevent the held pixel signal from leaking, a storage capacitor 70 (capacitor) may be added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode 9b. . The storage capacitor 70 holds the voltage of the pixel electrode 9a for a time that is, for example, three orders of magnitude longer than the time when the source voltage is applied. As a result, a charge retention characteristic is improved, and a liquid crystal device capable of performing display with a high contrast ratio can be realized.

  In this embodiment, a configuration in which a storage capacitor 70 is formed between the constant potential line 3b and the source of the thin film transistor 30 is employed. In configuring the storage capacitor 70, in addition to the configuration using the constant potential line 3b, a configuration using a capacitance line or a configuration using the preceding scanning line 3a can be adopted.

  As shown in FIG. 3A, on the element substrate 10, a comb-like pixel electrode 9a (a region surrounded by a dotted line) and a comb-like common electrode 9b (a dotted line are enclosed) for each pixel. And a data line 6a (indicated by a one-dot chain line), a scanning line 3a (indicated by a solid line), and a constant potential line 3b (indicated by a solid line) are formed along the vertical and horizontal boundary boundary regions of each pixel. ing.

  As shown in FIG. 3B, the base of the element substrate 10 is composed of a transparent substrate 10b such as a quartz substrate or a heat resistant glass plate, and the base of the counter substrate 20 is a transparent substrate such as a quartz substrate or a heat resistant glass plate. 20b. A pixel electrode 9 a and a counter electrode 9 b are formed on the element substrate 10, and an alignment film 16 made of a polyimide film or the like that has been subjected to a predetermined alignment process such as a rubbing process is formed thereon. The pixel electrode 9a and the counter electrode 9b are made of a transparent conductive film such as an ITO (Indium Tin Oxide) film. The alignment film 16 is formed by performing a rubbing process on an organic film such as a polyimide film.

  In the element substrate 10, a base protective film 12 made of a silicon oxide film or the like is formed on the surface of the transparent substrate 10b, and on the surface side, a thin film transistor 30 is formed at a position corresponding to the pixel electrode 9a. . The thin film transistor 30 is an LDD in which a channel formation region 1a ′, a low concentration source region 1b, a high concentration source region 1d, a low concentration drain region 1c, and a high concentration drain region 1e are formed on an island-shaped semiconductor film 1a. Lightly Doped Drain) structure. For this reason, since the electric field strength at the drain end of the thin film transistor 30 is relaxed, the off-leakage current level is low and the steep jump of the current level is also eliminated.

In this embodiment, the semiconductor film 1a is a polysilicon film that has been polycrystallized by laser annealing or lamp annealing after an amorphous silicon film is formed on the element substrate 10. The low-concentration source region 1b and the low-concentration drain region are low-concentration N-type impurity ions (with a dose of about 0.1 × 10 ¹³ / cm ² to about 10 × 10 ¹³ / cm ^{2) using} the scanning line 3a as a mask. The high-concentration source region 1d and the high-concentration drain region 1e are formed from about 0.1 × 10 ¹⁵ / cm ² to about 10 × 10 ¹⁵ using a resist mask. This is a semiconductor region formed by introducing high-concentration N-type impurity ions (phosphorus ions) at a dose of / cm ² .

  Interlayer insulating films 4 and 7 made of a silicon oxide film or the like are formed on the upper layer side of the thin film transistor 30. A data line 6 a is formed on the surface of the interlayer insulating film 4, and the data line 6 a is electrically connected to the high concentration source region 1 d through a contact hole 4 b formed in the interlayer insulating film 4. A pixel electrode 9 a made of an ITO film is formed on the surface of the interlayer insulating film 7. The pixel electrode 9 a is electrically connected to the drain electrode 6 b through a contact hole 7 a formed in the interlayer insulating film 7, and the drain electrode 6 b is a contact hole formed in the interlayer insulating film 4 and the gate insulating film 2. 4a is electrically connected to the high concentration drain region 1e.

  A constant potential line in the same layer as the scanning line 3a is provided to the extended portion 1f (lower electrode) from the high-concentration drain region 1e via an insulating film (dielectric film) formed simultaneously with the gate insulating film 2. The storage capacitor 70 is configured by facing 3b as an upper electrode.

  A common electrode 9b made of an ITO film is also formed on the surface of the interlayer insulating film 7, and the common electrode 9b is electrically connected to the relay electrode 6c through a contact hole 7b formed in the interlayer insulating film 7, The relay electrode 6 c is electrically connected to the constant potential line 3 b through a contact hole 4 c formed in the interlayer insulating film 4.

(Configuration of peripheral circuit)
Referring again to FIG. 1A, in the liquid crystal device 100 of the present embodiment, the periphery of the data line driving circuit 101 and the scanning line driving circuit 104 is utilized by utilizing the peripheral area of the image display area 10a on the surface side of the element substrate 10. A circuit is formed. In such a data line driving circuit 101 and a scanning line driving circuit 104, as shown in FIG. 2B, an inverter circuit or the like is constituted by a P-channel thin film transistor 80 and an N-channel thin film transistor 90. The configuration of such a peripheral circuit will be described with reference to FIGS. 4 (a) and 4 (b).

  4A and 4B, the thin film transistors constituting the peripheral circuit are configured as complementary thin film transistors including a P-channel thin film transistor 80 and an N-channel thin film transistor 90. The thin film transistors 80 and 90 are formed by using a part of the manufacturing process of the thin film transistor 30. The semiconductor films 1 h and 1 m constituting the thin film transistors 80 and 90 are the semiconductor films 1 a constituting the thin film transistor 30. And a polysilicon film formed simultaneously.

Here, the N-channel thin film transistor 90 includes an N-type high-concentration source region 1p and a high-concentration drain region 1n on both sides of the channel formation region 1m ′, and the high-concentration source region 1p and the high-concentration drain region 1n are When forming the high concentration source region 1d and the high concentration drain region 1e of the thin film transistor 30, the gate electrode 3e is used as a mask and the dose amount is about 0.1 × 10 ¹⁵ / cm ² to about 10 × 10 ¹⁵ / cm ² . And a semiconductor region into which high-concentration N-type impurity ions are introduced.

The P-channel type thin film transistor 80 includes a P-type high concentration source region 1 i and a high concentration drain region 1 j on both sides of the channel formation region 1 h ′, and the high concentration source region 1 i and the high concentration drain region 1 j are formed of a gate electrode. This is a semiconductor region into which high-concentration P-type impurity ions (boron ions) are introduced at a dose of about 0.1 × 10 ¹⁵ / cm ² to about 10 × 10 ¹⁵ / cm ^{2 using} 3e as a mask.

  In the thin film transistors 80 and 90 configured as described above, the high potential line 6e and the low potential line 6g are connected to the high concentration source regions of the semiconductor films 1h and 1m via the contact holes 4e and 4f of the interlayer insulating film 4 and the gate insulating film 2, respectively. 1i and 1p are electrically connected. The input wiring 6h is connected to the common gate electrode 3e, and the output wiring 6f is connected to the semiconductor films 1h and 1m via the contact holes 4g and 4f of the interlayer insulating film 4 and the gate insulating film 2. The concentration drain regions 1j and 1n are electrically connected to each other.

(Configuration of temperature control mechanism)
5A, 5B, and 5C are equivalent circuit diagrams of a temperature sensor configured in the liquid crystal device of the present embodiment, a cross-sectional view illustrating a configuration example thereof, and a relationship between an output from the temperature sensor and temperature. It is a graph which shows.

  As shown in FIGS. 1A, 1 </ b> B, 2 </ b> C, and 3 </ b> B, in the liquid crystal device 100 of the present embodiment, a heater 58 is formed on the counter substrate 20. A temperature sensor 5 is formed using the peripheral area of the image display area 10a, and a temperature control circuit 55 that controls power supply to the heater 58 based on the detection result of the temperature sensor 5.

  As shown in FIG. 3B, the heater 58 is formed in a planar shape by an ITO film on the surface of the counter substrate 20 (surface facing the element substrate 10), and the color filter 27 and the heater 58 are formed on the surface of the heater 58. An insulating protective film 28 is formed.

  The temperature control circuit 55 includes a thin film transistor 56 formed simultaneously with the thin film transistors 30, 80, and 90 described with reference to FIGS. 3 and 4 on the element substrate 10. A corresponding gate voltage is applied to the gate to control power supply to the heater 58. Here, the heater 59 on the counter substrate 20 side and the temperature control circuit 55 on the element substrate 10 side are electrically connected via the vertical conduction member 106 shown in FIGS. .

  In configuring the temperature sensor 5, in this embodiment, as shown in FIGS. 5A and 5B, the first thermal element 51 a and the second thermal element 52 a are connected in series on the element substrate 10. In addition, a drive potential line 6 i and a ground line 6 j are connected to both ends of the temperature sensor 5. An output line 6k is drawn from the connection point between the first thermal element 51a and the second thermal element 52a.

  Here, the first thermal element 51a is configured as a thermal resistance element in which a low-concentration N-type impurity is introduced into the semiconductor film 1r made of a polysilicon film, and the second thermal element 52a is formed of a polysilicon film. The semiconductor film 1s is configured as a thermal resistance element in which a high-concentration N-type impurity is introduced.

  The first thermosensitive element 51a and the second thermosensitive element 52a are formed by using the manufacturing process of the thin film transistors 30, 80, and 90. That is, the first thermal element 51a is a semiconductor region formed simultaneously with the low concentration source region 1b and the low concentration drain region 1c of the N-channel type thin film transistor 30 shown in FIG. 3B. Reference numeral 52a denotes a semiconductor region formed simultaneously with the high concentration source regions 1d and 1p and the high concentration drain regions 1e and 1n of the N channel type thin film transistors 30 and 90 shown in FIG.

  In the temperature sensor 5, the driving potential line 6 i is electrically connected to one end of the first thermal element 51 a through the contact hole 4 j of the interlayer insulating film 4 and the gate insulating film 2, and the ground line 6 j is connected to the interlayer insulation. Electrical connection is made to one end of the second thermal element 52a via the contact hole 4k of the film 4 and the gate insulating film 2, and the output line 6k connects the contact hole 4m of the interlayer insulating film 4 and the gate insulating film 2 to each other. Through the other end of the first thermal element 51a and the other end of the second thermal element 52a. In this embodiment, the first thermal element 51a has a width (length / length) ratio (W / L) of 0.5, whereas the second thermal element 52a has a width dimension. The ratio (W / L) represented by / length is set to 20.

In the temperature sensor 5 configured as described above, the first thermal element 51a and the second thermal element 52a are composed of polysilicon films having different impurity concentrations, and therefore have different temperature-electric characteristics. More specifically, when the temperature rises, the first thermosensitive element 51a made of the low-concentration N-type polysilicon film has a large resistance change, whereas the first thermosensitive element 51a made of the high-concentration N-type polysilicon film. The second thermal element 52a has a small resistance change. Further, the input voltage Vin applied to the temperature sensor 5 by the drive potential line 6i is divided and output to the output line 6k by the resistance values of the first thermal element 51a and the second thermal element 52a. Therefore, as shown in FIG. 5C, when the temperature is 0 °, the ratio of the input voltage Vin applied to the temperature sensor 5 by the drive potential line 6i and the output voltage Vout detected by the output line 6k ( Vin / Vout) is 25.5%, but as the temperature of the liquid crystal device 100 rises, the ratio (Vin / Vout) rises, and between the temperature and the ratio (Vin / Vout). Is, for example, the following equation y = 0.016x + 0.25559
There is a linear correlation approximated by Therefore, if the ratio (Vin / Vout) is detected, the temperature of the liquid crystal device 100 can be detected, and if the temperature control circuit 55 controls the heater 58 based on the result, the heater can be used when the environmental temperature is low. The liquid crystal layer 50 is heated by 58, and the orientation of the liquid crystal is switched to improve the speed.

(Main effects of this form)
As described above, in this embodiment, the heater 58 is formed on the counter substrate 20, and the temperature sensor 5 and the temperature control circuit 50 are formed on the element substrate 10. And there is no need to add a heater. Therefore, the liquid crystal can be heated when the environmental temperature is low without increasing the cost and increasing the size.

  The counter electrode 9 b is formed on the element substrate 20, and the heater 58 is formed on the counter substrate 20. For this reason, even if the heater 58 is formed on the counter substrate 20, there is an advantage that the potential of the heater 58 does not disturb the alignment of the liquid crystal.

  Furthermore, since the heater 58 is composed of an ITO film (transparent conductive film), the display light is not blocked by the heater 58, so that the display light can be emitted with a sufficient amount of light.

  Moreover, since the temperature sensor 5 and the temperature control circuit 50 are configured by one or more thin films among the plurality of thin films constituting the thin film transistor 30, the temperature sensor 5 and the temperature control circuit are not increased without increasing the number of manufacturing steps. 50 can be configured.

  Further, when the first and second thermal elements 51a and 52a are energized at both ends of the temperature sensor 50 in which the first thermal element 51a and the second thermal element 52a are connected in series, the first and second thermal elements 51a and 52a have temperature-electric characteristics. Because of the difference, the ratio of the resistance values (electrical characteristics) of the first thermosensitive element 51a and the second thermosensitive element 52a changes depending on the temperature, and a signal corresponding to the ratio is the first thermosensitive element 51a and the second thermosensitive element 52a. Is output from the connection point with the thermal element 52a. Therefore, even if the size and film thickness of the first thermal element 51a and the second thermal element 52a vary due to the influence of manufacturing the first thermal element 51a and the second thermal element 52a, the first If the size ratio between the thermal element 51a and the second thermal element 52a is constant, the resistance ratio does not vary, so that the temperature can be measured accurately. Even when the size ratio of the first thermal element 51a and the second thermal element 52a varies, the temperature can be accurately measured with a simple correction.

[Variation 1 of Embodiment 1]
In the above embodiment, when the first thermal element 51a and the second thermal element 52a are configured by the thermal resistance element, the first thermal element 51a is configured by the low-concentration N-type polysilicon film, and the second The thermal element 52a is composed of a high-concentration N-type polysilicon film. However, the first thermal element 51a is composed of a high-concentration N-type polysilicon film and the second thermal element 52a is composed of a low-concentration N-type polysilicon film. You may comprise. When a P-channel type thin film transistor having an LDD structure is formed on the element substrate 10, one of the first thermal element 51a and the second thermal element 52a is formed of a low-concentration P-type polysilicon film. The other may be formed of a high-concentration P-type polysilicon film. Moreover, in the said form, although the 1st heat sensitive element 51a and the 2nd heat sensitive element 52a were comprised with the polysilicon film from which the same conductivity type differs in impurity concentration, the 1st heat sensitive element 51a and the 2nd heat sensitive element One of 52a may be composed of a polysilicon film doped with P-type impurities, and the other may be composed of a polysilicon film doped with N-type impurities.

[Embodiment 2]
6 (a), 6 (b), and 6 (c) are equivalent circuit diagrams of a temperature sensor used in the liquid crystal device according to Embodiment 2 of the present invention, a cross-sectional view showing a configuration example thereof, and the temperature sensor. It is a graph which shows the relationship between an output and temperature. The basic configuration of the present embodiment and the third embodiment described later is the same as that of the first embodiment, and only the configuration of the temperature sensor is different. Therefore, description of common parts is omitted.

  In this embodiment, when configuring the temperature sensor 5, as shown in FIGS. 6A and 6B, on the element substrate 10, the first thermal element 51b and the second thermal element 52b are connected in series. In addition, both ends of the temperature sensor 5 are connected to a drive potential line 6i and a ground line 6j. Further, at both ends of the temperature sensor 5, an output line 6k is drawn from a connection point between the first thermal element 51b and the second thermal element 52b.

  As in the first embodiment, the first thermal element 51b is configured as a thermal resistance element in which a low concentration N-type impurity is introduced into a semiconductor film 1r made of a polysilicon film. On the other hand, the second thermal element 52b is configured as an N-type thermal transistor element using the semiconductor film 1t made of a polysilicon film as an active layer.

  Here, the first thermal element 51b and the second thermal element 52b are formed by using the manufacturing process of the thin film transistors 30, 80, and 90. That is, the first thermal element 51b is a semiconductor region formed simultaneously with the low concentration source region 1b and the low concentration drain region 1c of the N-channel type thin film transistor 30 shown in FIG. The second thermal element 52b is a thin film transistor formed simultaneously with the N-channel type thin film transistors 30 and 90 shown in FIGS. 3B and 4B, and on both sides of the channel formation region 1t ′, FIG. The high-concentration source regions 1v and the high-concentration drain regions 1u formed simultaneously with the high-concentration source regions 1d and 1p and the high-concentration drain regions 1e and 1n of the thin film transistors 30 and 90 shown in FIG. Yes.

  In the temperature sensor 5, the drive potential line 6i is electrically connected to one end of the first thermal element 51b via the contact hole 4j of the interlayer insulating film 4 and the gate insulating film 2, and the ground line 6j is interlayer insulating. Electrical connection is made to the high-concentration source region 1v of the second thermal element 52b through the contact hole 4k of the film 4 and the gate insulating film 2, and the output line 6k is a contact hole 4m of the interlayer insulating film 4 and the gate insulating film 2. And is electrically connected to the other part of the first thermal element 51b and the high-concentration drain region 1u of the second thermal element 52b. In the present embodiment, the first thermal element 51b has a ratio (W / L) expressed by the width dimension / length dimension of 0.5, whereas the channel formation region of the second thermal element 52b. In 1t ′, the ratio (W / L) represented by the width dimension / length dimension is set to 1. A gate voltage for turning on the second thermal element 52b is applied to the gate electrode 3g of the second thermal element 52b.

In the temperature sensor 5 configured as described above, the first thermal element 51b is composed of a low-concentration N-type polysilicon film, and the second thermal element 52b includes a channel formation region 1t ′ composed of a polysilicon film. Since the thin film transistor is used, the temperature-electric characteristics are different. More specifically, the first thermal element 51b has a large resistance change, while the second thermal element 51b has a small resistance change. Therefore, as shown in FIG. 6C, when the temperature is 0 °, the ratio of the input voltage Vin applied by the drive potential line 6i to the temperature sensor 5 and the output voltage Vout detected by the output line 6k ( (Vin / Vout) is 4.27%, but as the temperature rises, the ratio (Vin / Vout) rises between the temperature and the ratio (Vin / Vout). For example, the following formula y = 0.126x + 4.2912
There is a linear correlation approximated by Therefore, the temperature of the liquid crystal device 100 can be detected by detecting the ratio (Vin / Vout).

[Modification of Embodiment 2]
In the second embodiment, the first thermal element 51b is configured by a thermal resistance element, and the second thermal element 52ba is configured by a thermal transistor element. However, the first thermal element 51b is configured by a thermal transistor element. The second heat sensitive element 52ba may be constituted by a heat sensitive resistance element. In the above embodiment, the heat-sensitive transistor element is formed of an N-channel thin film transistor. However, the heat-sensitive transistor element may be formed of a P-channel thin film transistor. Further, the heat-sensitive transistor element may be composed of an N channel type or P channel type LDD thin film transistor instead of the self-aligned structure.

[Embodiment 3]
FIGS. 7A and 7B are an equivalent circuit diagram of a temperature sensor configured in the liquid crystal device according to Embodiment 3 of the present invention, and a cross-sectional view illustrating an example of the configuration.

  In this embodiment, when the temperature sensor 5 is configured, as shown in FIGS. 7A and 7B, the first thermal element 51c and the second thermal element 52c are connected in series, and the temperature sensor The driving potential line 6i and the ground line 6j are connected to both ends of the line 5. Further, at both ends of the temperature sensor 5, an output line 6k is drawn from a connection point between the first thermal element 51c and the second thermal element 52c.

  Here, the first thermal element 51c is configured as a P-type thermal transistor element using the semiconductor film 1w made of a polysilicon film as an active layer. In contrast, the second thermal element 52c is configured as an N-type thermal transistor element using the semiconductor film 1t made of a polysilicon film as an active layer.

  The first heat sensitive element 51c and the second heat sensitive element 52c are formed by using the manufacturing process of the thin film transistors 30, 80, and 90. That is, the first thermosensitive element 51c is a thin film transistor formed at the same time as the thin film transistor 80 shown in FIGS. 3B and 4B, and on both sides of the channel formation region 1w ′, as shown in FIG. The high-concentration source region 1x and the high-concentration drain region 1y formed simultaneously with the high-concentration source region 1i and the high-concentration drain region 1j of the P-channel type thin film transistor 80 shown in FIG. The second thermal element 52c is a thin film transistor formed simultaneously with the N channel type thin film transistors 30 and 90 shown in FIGS. 3B and 4B, and on both sides of the channel formation region 1t ′, FIG. The high-concentration source regions 1v and the high-concentration drain regions 1u formed simultaneously with the high-concentration source regions 1d and 1p and the high-concentration drain regions 1e and 1n of the thin film transistors 30 and 90 shown in FIG. Yes.

  In the temperature sensor 5, the driving potential line 6i is electrically connected to the high concentration source region 1x of the first thermal element 51c through the contact hole 4j of the interlayer insulating film 4 and the gate insulating film 2, and the ground line 6j is connected to the interlayer sensor 6c. The high-concentration source region 1v of the second thermal element 52c is electrically connected through the contact hole 4k of the insulating film 4 and the gate insulating film 2, and the output line 6k is a contact hole of the interlayer insulating film 4 and the gate insulating film 2. The high-concentration drain region 1y of the first thermal element 51c and the high-concentration drain region 1u of the second thermal element 52c are electrically connected via 4m. A gate voltage that turns on the first thermal element 51c and the second thermal element 52c is applied to the gate electrodes 3f and 3g of the first thermal element 51c and the second thermal element 52c.

  In the temperature sensor 5 configured as described above, the first heat sensitive element 51c and the second heat sensitive element 52c are composed of thin film transistors including channel forming regions 1w ′ and 1t ′ made of polysilicon films. The type is different. For this reason, the first thermal element 51c and the second thermal element 52c have different temperature-electric characteristics. Therefore, the ratio (Vin / Vout) between the input voltage Vin applied to the temperature sensor 5 by the drive potential line 6i and the output voltage Vout detected by the output line 6k is linear as the temperature rises. Change. Therefore, the temperature of the liquid crystal device 100 can be detected by detecting the ratio (Vin / Vout).

[Modification of Embodiment 3]
In the third embodiment, the first thermal element 51c is configured by a P-channel thin film transistor (thermal transistor element), and the second thermal element 52c is configured by an N-channel thin film transistor (thermal transistor element). However, the first thermal element 51c may be configured by an N-channel type thin film transistor (thermal transistor element), and the second thermal element 52c may be configured by a P-channel type thin film transistor (thermal transistor element). Good. In the above embodiment, the first thermal element 51c and the second thermal element 52c are configured by self-aligned thin film transistors (thermal transistor elements), but thin film transistors having an LDD structure may be used.

[Embodiment 4]
In the first embodiment, the example in which both the pixel electrode 9a and the counter electrode 9b are formed on the element substrate 10 has been described. However, as described below with reference to FIGS. 8 and 9, the pixel electrode 9a is disposed on the element substrate. The present invention may be applied to a liquid crystal device in which the counter electrode 9 b is formed on the counter substrate 20.

  8A and 8B are plan views of the liquid crystal device 100 according to the fourth embodiment of the present invention as viewed from the side of the counter substrate together with the components formed thereon, and H2-H2 thereof. It is a cross-sectional view. 9A and 9B are a plan view of adjacent pixels in the element substrate used in the liquid crystal device 100 according to Embodiment 4 of the present invention, and a cross-sectional view of the main part thereof. (B) shows the connection structure for the pixel and the heater. Since the basic configuration of the present embodiment is the same as that of the first embodiment, common portions are denoted by the same reference numerals and description thereof is omitted.

  8A and 8B, in the liquid crystal device 100 of this embodiment, the element substrate 10 and the counter substrate 20 are bonded to each other with the sealant 107 as in Embodiment 1, and the liquid crystal layer 50 is held therebetween. ing. Further, at least one corner portion of the counter substrate 20 is formed with a vertical conductive material 106 for electrical conduction between the element substrate 10 and the counter substrate 20. On the counter substrate 20, a frame 108 made of a light-shielding material is formed in an inner region of the sealing material 107, and the inner side is an image display region 10 a.

  In this embodiment, as shown in FIGS. 8B, 9A, and 9B, a pixel electrode 9a made of an ITO film is formed on the element substrate 10, and an opposing substrate 20 made of an ITO film is formed on the counter substrate 20. An electrode 21 is formed. In the counter substrate 20, a color filter 27 and a protective layer 28 are formed on the lower layer side of the counter electrode 21, and an alignment film 26 is formed on the upper layer side of the counter electrode 21.

  The base of the element substrate 10 is made of a transparent substrate 10b such as a quartz substrate or a heat-resistant glass plate, and a base protective film 12 made of a silicon oxide film or the like is formed on the surface of the transparent substrate 10b. An N-channel thin film transistor 30 (pixel switching element) is formed at a position adjacent to each pixel electrode 9a. Also in this embodiment, as in Embodiment 1, the thin film transistor 30 includes a channel formation region 1a ′, a low concentration source region 1b, a high concentration source region 1d, a low concentration drain region 1c, and an island-shaped semiconductor film 1a. It has an LDD structure in which a high concentration drain region 1e is formed. Interlayer insulating films 4 and 7 made of a silicon oxide film are formed on the upper layer side of the thin film transistor 30, and a pixel electrode 9 a made of an ITO film is formed on the surface of the interlayer insulating film 7. The pixel electrode 9 a is electrically connected to the drain electrode 6 b through a contact hole 7 a formed in the interlayer insulating film 7, and the drain electrode 6 b is a contact hole formed in the interlayer insulating film 4 and the gate insulating film 2. It is electrically connected to the high concentration drain region 1e through 4a. An alignment film 16 made of a polyimide film is formed on the surface side of the pixel electrode 9a.

  Further, the extension portion 1f (lower electrode) extending from the high-concentration drain region 1e is fixed in the same layer as the scanning line 3a through an insulating film (dielectric film) formed simultaneously with the gate insulating film 2. The storage capacitor 70 is configured by the potential line 3b facing as an upper electrode.

  In the liquid crystal device 100 of the present embodiment, as in the first embodiment, the data line driving circuit 101, the scanning line driving circuit 104, and the like are utilized using the peripheral area of the image display area 10a on the surface side of the element substrate 10. Peripheral circuits are formed. In such a data line driving circuit 101 and scanning line driving circuit 104, as described with reference to FIGS. 2B, 4A, and 4B, a P-channel thin film transistor 80 and an N-channel thin film transistor are used. The thin film transistor 90 constitutes an inverter circuit or the like.

  In the liquid crystal device 100 of this embodiment, the element substrate 10 has a planar heater 59 made of an ITO film between the transparent substrate 10 b and the base protective film 12. Further, the element substrate 10 is formed with the temperature sensor 5 and the temperature control circuit 55 that controls the power supply to the heater 58 based on the detection result of the temperature sensor 5 using the peripheral region of the image display region 10a. Has been. Since the configurations of the temperature sensor 5 and the temperature control circuit 55 are the same as those in the first embodiment, description thereof will be omitted.

  Here, the heater 59 is formed on the lower layer side of the base protective film 12, while the temperature control circuit 55 is formed on the upper layer of the base protective film 12. For this reason, in this embodiment, the temperature control circuit 55 and the heater 59 are electrically connected to each other through the base protective film 12 and the contact hole 12a that penetrates the gate insulating film 2 and the interlayer insulating film 4. It has been broken.

  As described above, in this embodiment, since the heater 59, the temperature sensor 5, and the temperature control circuit 50 are formed on the element substrate 10, it is not necessary to externally attach the temperature sensor and the heater to the liquid crystal device 100. Therefore, the liquid crystal can be heated when the environmental temperature is low without increasing the cost and increasing the size.

  In this embodiment, the heater 59 is formed on the element substrate 20 but is formed on the lower layer side of the base protective film 12. For this reason, the potential of the heater 59 does not disturb the alignment of the liquid crystal.

[Other embodiments]
In the first embodiment, the liquid crystal device adopting the IPS mode is described as an example in which both the pixel electrode 9a and the counter electrode 9b are formed on the element substrate 10, but the FFS in which the counter electrode is formed on the entire lower layer side of the pixel electrode 9a. The present invention may be applied to a (Fringe-Field Switching) mode liquid crystal device. Also in this case, if the heater is formed on the counter substrate 20, there is an advantage that the potential of the heater does not disturb the alignment of the liquid crystal.

  When both the pixel electrode 9a and the counter electrode 9b are formed on the element substrate 10, a heater may be formed on the element substrate 10. In this case, as in the fourth embodiment, on the lower layer side of the base protective film. If the heater is formed, the potential of the heater 59 does not disturb the alignment of the liquid crystal.

  Further, when the pixel electrode 9a is formed on the element substrate 10 and the counter electrode is formed on the counter substrate as in the fourth embodiment, the heater may be formed on the counter substrate 20. In this case, the upper layer of the heater If a thick insulating film is formed on the side, the potential of the heater can be prevented from disturbing the alignment of the liquid crystal.

  Furthermore, in the above-described embodiment, the polysilicon film is used as the semiconductor film. However, the present invention may be applied to the element substrate 10 using an amorphous silicon film.

[Application to electronic devices]
10A and 10B are an explanatory diagram of a mobile personal computer as an example of an electronic apparatus using the liquid crystal device according to the present invention, and an explanatory diagram of a mobile phone, respectively. The liquid crystal device of this embodiment can be used for the personal computer 180 and the mobile phone 190 shown in FIGS. That is, the personal computer 180 shown in FIG. 10A has a main body 182 provided with a keyboard 181 and a display unit 183. The display unit 183 includes the liquid crystal device 100 described above. As shown in FIG. 10B, the mobile phone 190 includes a plurality of operation buttons 191 and a display unit including the liquid crystal device 100 described above.

(A), (b) is the top view which looked at the liquid crystal device to which this invention is applied from the opposite substrate side with each component formed on it, and its HH 'sectional drawing, respectively. (A), (b), (c) is an equivalent circuit diagram showing the electrical configuration of the image display area of the element substrate used in the liquid crystal device to which the present invention is applied, and the equivalent of the inverter circuit configured in the peripheral circuit. It is a circuit diagram and a block diagram of a temperature control mechanism. (A), (b) is a plan view of adjacent pixels in the element substrate used in the liquid crystal device to which the present invention is applied, and when the liquid crystal device is cut at a position corresponding to the A1-A1 ′ line. It is sectional drawing. (A), (b) is a plan view of the inverter circuit formed on the element substrate used in the liquid crystal device to which the present invention is applied, and when the element substrate is cut at a position corresponding to the BB ′ line. It is sectional drawing. (A), (b), and (c) are each an equivalent circuit diagram of a temperature sensor configured in the liquid crystal device according to the first embodiment of the present invention, a cross-sectional view illustrating an example of the configuration, and an output from the temperature sensor. It is a graph which shows the relationship between temperature. (A), (b), and (c) are each an equivalent circuit diagram of a temperature sensor configured in the liquid crystal device according to Embodiment 2 of the present invention, a cross-sectional view showing an example of the configuration, and an output from this temperature sensor. It is a graph which shows the relationship between temperature. (A), (b) is the equivalent circuit schematic of the temperature sensor comprised in the liquid crystal device which concerns on Embodiment 3 of this invention, respectively, and sectional drawing which shows the structural example. (A), (b) is the top view which looked at the liquid crystal device based on Embodiment 4 of this invention from the opposing board | substrate side with each component formed on it, and its H2-H2 'sectional drawing, respectively. It is. (A), (b) is the top view of the pixel which mutually adjoins in the element substrate used for the liquid crystal device which concerns on Embodiment 4 of this invention, and sectional drawing of the principal part. (A), (b) is explanatory drawing which shows the mobile personal computer as one Embodiment of the electronic device using the liquid crystal device based on this invention, respectively, and explanatory drawing of a mobile telephone.

Explanation of symbols

1a, 1h, 1m, 1r, 1s, 1t, 1w,... Semiconductor film (polysilicon film), 2. Gate insulating film, 3a, Scan line, 3b, Constant potential line, 3e, 3f, 3g,. Gate electrode, 5 ... Temperature sensor, 6a ... Data line, 9a ... Pixel electrode, 9b, 21 ... Counter electrode, 10 ... Element substrate, 30, 80, 90 ... Thin film transistor, 51a, 51b, 51c ... First heat sensitive element, 52a, 52b, 52c, second heat sensitive element, 55, heater control circuit, 58, 59, heater, 100, liquid crystal device

Claims (5)

An element substrate on which a pixel switching element and a pixel electrode are formed, a counter substrate holding a liquid crystal layer between the element substrate, and one of the element substrate and the counter substrate. In a liquid crystal device having a counter electrode facing the pixel electrode,
A thin film constituting a heater is formed on one of the element substrate and the counter substrate,
A temperature sensor and a temperature control circuit that controls power supply to the heater based on a temperature detection result by the temperature sensor are formed on the element substrate. The counter electrode is formed on the element substrate,
The liquid crystal device according to claim 1, wherein the heater is formed on the counter substrate.   The liquid crystal device according to claim 1, wherein the heater is made of a transparent conductive film. The pixel switching element is a thin film transistor,
4. The liquid crystal according to claim 1, wherein the temperature sensor and the temperature control circuit are configured by one or more thin films among a plurality of thin films constituting the thin film transistor. 5. apparatus.   5. The liquid crystal device according to claim 4, wherein the thin film transistor has an active layer made of a polysilicon film.

Images