JP2008083085A - Image display device and driving method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image display device capable of saving power consumption. <P>SOLUTION: The image display device comprises a pixel array part 1 and a peripheral circuit part for driving the pixel array part. The peripheral circuit part includes a controller 12 for switching between a normal mode and a power save mode, setting the power supply Vcc to a normal potential in the normal mode to make a drive transistor Tr2 operate in the saturated area, supplying an output current corresponding to an input signal to a light-emitting element OLED as a constant current source. The controller sets the power supply Vcc, in the power save mode, to a potential lower than that in the normal potential, also having a γ-correction circuit 11 for compressing an input signal to a video signal by changing over the γ-characteristic specifying the relation between the video signal and the input signal, thereby making the drive transistor Tr2 operate in the saturated area also at the lower power supply potential to supply the output current corresponding to the input signal compressed as the constant current source to the light-emitting element OLED. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an active matrix type image display apparatus using a light emitting element such as an organic EL device as a pixel, and a driving method thereof. More specifically, the present invention relates to a technique for reducing power consumption of such an image display apparatus.

An active matrix type image display device using a light emitting element as a pixel is described in Patent Documents 1 to 5 below. The conventional image display devices described in these patent documents basically include a pixel array section and a peripheral circuit section that drives the pixel array section. The pixel array unit includes a row-shaped scanning line, a column-shaped signal line, and pixels arranged in a matrix at a portion where each scanning line and each signal line intersect. The peripheral circuit unit includes a scanner that sequentially supplies a control signal to each scanning line to perform line sequential scanning of the pixel array unit, and a driver that supplies an input signal corresponding to the video signal to each signal line in accordance with the line sequential scanning. Is included. Each pixel includes at least a sampling transistor, a drive transistor and a light emitting element connected in series between a power supply and ground. The sampling transistor conducts in response to the control signal supplied from the scanning line and samples the input signal supplied from the signal line. The drive transistor supplies an output current corresponding to the sampled input signal to the light emitting element. The light emitting element emits light with a luminance corresponding to the video signal by the output current supplied from the drive transistor, thereby displaying an image on the pixel array portion.
JP 2003-255856 A JP 2003-271095 A JP 2004-133240 A JP 2004-029791 A JP 2004-093682 A

  A light emitting element such as an organic EL device is a current light emitting type, and a gradation of light emission luminance is obtained by controlling an amount of output current flowing through the organic EL device. Organic EL devices show deterioration over time and characteristic changes due to temperature. Even if the current-voltage characteristics (IV characteristics) of organic EL devices change due to deterioration over time or changes in ambient temperature, the drive transistor always operates in the saturation region in order to maintain a constant light emission luminance. A steady current is supplied to the EL device.

  By the way, a panel of an image display apparatus using a conventional organic EL device as a pixel can be switched between a normal mode and a power saving mode (save mode) for the purpose of saving power consumption. In order to reduce the power consumption of the panel, when the panel is not used, the panel operation is set to the power saving mode so that the screen brightness of the panel is lowered. In general, an image display device using an organic EL device as a pixel controls the screen brightness by adjusting the light emission period of a light emitting element occupying one frame or one field. The longer the light emission period, the higher the screen brightness. In the power saving mode, the light emission period is shortened compared to the normal mode, thereby lowering the screen brightness and thereby saving power consumption.

  However, this conventional power saving mode only shortens the light emission period, and the power supply voltage for driving the panel is fixed at the same level as in the normal mode in the power saving mode. Therefore, the effect of saving power consumption is limited, merely reducing the light emission period and reducing the amount of current, and the power consumption accompanying the operation of the panel is not much different between the normal mode and the power saving mode. When such an active matrix image display apparatus is used for mobile applications, further reduction in power consumption is required, which is a problem to be solved.

  SUMMARY OF THE INVENTION In view of the above-described problems of the conventional technology, an object of the present invention is to provide an image display apparatus and a driving method thereof that can further save power consumption. In order to achieve this purpose, the following measures were taken. That is, the present invention includes a pixel array section and a peripheral circuit section that drives the pixel array section. The pixel array section includes row-shaped scanning lines, column-shaped signal lines, and scanning lines and signal lines that intersect. The peripheral circuit section includes a scanner that sequentially supplies a control signal to each scanning line to perform line sequential scanning, and an input signal corresponding to the video signal for line sequential scanning. And each pixel includes at least a sampling transistor, a drive transistor connected in series between a power source and ground, and a light emitting element, and the sampling transistor includes the driver. The drive transistor conducts in response to a control signal supplied from the scanning line and samples the input signal supplied from the signal line, and the drive transistor outputs an output current corresponding to the sampled input signal. In the image display device, the light emitting element emits light with a luminance corresponding to the video signal by the output current supplied from the drive transistor, and thus displays an image on the pixel array unit. The peripheral circuit section has a controller for switching between the normal mode and the power saving mode. In the normal mode, the power supply is set to a normal potential, so that the drive transistor is operated in a saturation region and the input is used as a constant current source. While supplying the output current according to the signal, the power supply is set to a potential lower than the normal potential in the power saving mode, and the γ characteristic that defines the relationship between the video signal and the input signal is switched and input to the video signal. Γ correction circuit for compressing the signal, so that the drive transistor is operated in the saturation region even at the low power supply potential, and it corresponds to the input signal compressed as a constant current source It characterized in that it was set to supply a power current. In some cases, the controller controls the period during which the light emitting element emits light in each frame or field to the same time width in the normal mode and the power saving mode.

  According to the present invention, when the normal mode is switched to the power saving mode, the power supply voltage supplied to the panel constituting the image display device is lowered as compared with the normal mode. However, if the power supply voltage is kept low, the drive transistor enters the linear region on the high gradation side, and gradation collapse occurs in white display. Therefore, the present invention switches the γ characteristic that defines the relationship between the video signal and the input signal in the power saving mode, and compresses the input signal with respect to the video signal. In other words, the dynamic range of the input signal is lowered in the power saving mode compared to the normal mode. Thereby, even if the power supply voltage is lowered in the power saving mode, the drive transistor can operate in the saturation region, and the power supply voltage of the panel can be lowered without causing gradation collapse. Further, by compressing the range of the input signal, the drive current is also reduced, which is also effective in saving power consumption.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing a general configuration of an active matrix image display apparatus. As shown in the figure, the image display device has a pixel array unit 1 and a peripheral circuit unit for driving the pixel array unit 1 as a basic configuration. The pixel array unit 1 includes row-like scanning lines WS, column-like signal lines SL, and pixels 2 arranged in a matrix at portions where each scanning line WS and each signal line SL intersect. In the illustrated example, three primary colors of RGB are assigned to each pixel, and multicolor display is possible. However, the present invention is not limited to this, and can also be applied to a single color display device. On the other hand, the peripheral circuit unit performs a line sequential scanning, and a signal is supplied to each scanning line WS sequentially, and a signal is supplied to each signal line SL in accordance with the line sequential scanning. The driver 3 is included. This example includes another scanning line DS for controlling the light emission period of each pixel 2 in addition to the scanning line WS for controlling line-sequential sampling of video signals. In this relationship, the peripheral circuit section includes a drive scanner 5 that sequentially supplies control signals to the scanning lines DS.

  FIG. 2 is a schematic circuit diagram illustrating a specific configuration example of the pixel 2 included in the image display device illustrated in FIG. 1. As shown in the figure, the pixel 2 includes at least a sampling transistor Tr1, a drive transistor Tr2 and a light emitting element OLED connected in series between a power supply Vcc and a ground GND. This example further includes a switching transistor Tr3 inserted between the drive transistor Tr2 and the light emitting element OLED. Further, a pixel capacitor Cs is provided.

  The drive transistor Tr2 is a P-channel type, the source S is connected to the power supply Vcc, the drain D is connected to the switching transistor Tr3, and the gate G is connected to one end of the pixel capacitor Cs. The other end of the pixel capacitor Cs is connected to the power supply Vcc. The switching transistor Tr3 is an N-channel type, and one end is connected to the drive transistor Tr2 as described above, and the other end is connected to the anode A of the light emitting element OLED. The light emitting element OLED is a two-terminal type, for example, composed of an organic EL device, and the anode side is connected to the switching transistor Tr3 as described above, while the cathode K is connected to the ground GND. Note that the gate of the switching transistor Tr3 is connected to the scanning line DS. The sampling transistor Tr1 is interposed between the signal line SL and the gate of the drive transistor Tr2. The gate G of the sampling transistor Tr1 is connected to the scanning line WS. The configuration of the pixel 2 described above is merely an example, and the present invention is basically applicable to all pixel circuits including the sampling transistor Tr1, the drive transistor Tr2, and the light emitting element OLED.

  The sampling transistor Tr1 conducts according to a control signal supplied from the write scanner 4 via the scanning line WS, and samples the input signal supplied from the signal driver 3 via the signal line SL. The sampled input signal is held in the pixel capacitor Cs. The drive transistor Tr2 supplies an output current corresponding to the sampled input signal to the light emitting element OLED. Specifically, the input signal held in the pixel capacitor Cs is applied to the gate G of the drive transistor Tr2 as the gate voltage Vgs, and the drain current Ids flows from the source S to the drain D of the drive transistor Tr2 accordingly. . This drain current Ids is an output current. The light emitting element OLED emits light with the luminance corresponding to the video signal by the output current (drain current Ids) supplied from the drive transistor Tr2, and displays an image on the pixel array unit 1. Note that the switching transistor Tr3 interposed between the anode A of the light emitting element OLED and the drain D of the drive transistor Tr2 conducts according to a control signal supplied from the drive scanner 5 via the scanning line DS, and the drive transistor Tr2 Are connected directly to the anode A of the light emitting element OLED to form an output current path. When the switching transistor Tr3 is in the on state, the output current (drain current Ids) actually flows through the light emitting element OLED and emits light. The switching transistor Tr3 adjusts the screen luminance of the pixel array unit 1 by controlling the light emission period.

The drive transistor Tr2 functions as a constant current source when operating in the saturation region and supplies an output current (drain current Ids) corresponding to the input signal (gate voltage Vgs), while operating in the saturation region when operating in the linear region. The output current is lower than when doing so. Specifically, the operating characteristic in the saturation region of the drive transistor Tr2 is expressed by the following characteristic equation.
Ids = (1/2) μ (W / L) Cox (Vgs−Vth) ²
In this transistor characteristic equation, Ids represents a drain current flowing between the source and the drain, and in the pixel 2, as described above, is an output current supplied to the light emitting element OLED. Vgs represents a gate voltage applied to the gate with reference to the source, and the pixel 2 is an input signal held in the capacitor Cs as described above. Vth is the threshold voltage of the transistor. Further, μ represents the mobility of the semiconductor thin film constituting the channel of the transistor. In addition, W represents the channel width, L represents the channel length, and Cox represents the gate capacitance. As is apparent from this transistor characteristic equation, when the drive transistor Tr2 operates in the saturation region, it supplies a drain current Ids corresponding to the gate voltage Vgs. That is, assuming that the mobility μ, the threshold voltage Vth, the channel width W, the channel length L, etc. are all the same in each pixel 2, the drain current Ids is determined only by the gate voltage Vgs, and the output current corresponding to the input signal (Vgs). The light emitting element OLED can emit light with (Ids). As is apparent from the above transistor characteristic equation, the drain current Ids does not depend on the voltage (drain voltage Vds) between the drain D and the source S of the drive transistor Tr2. In the illustrated example, the potential of the source S of the drive transistor Tr2 is fixed at Vcc. Therefore, in the illustrated example, the drain current Ids does not depend on the potential of the drain D. In other words, the drive transistor Tr2 can supply a constant output current Ids when operating in the saturation region as shown in the above-described characteristic formula, as long as Vgs is constant without depending on the potential of the drain D. It can be seen that it functions as a current source.

  However, when the power supply potential Vcc is low, the drive transistor Tr2 does not necessarily operate in the saturation region, and may operate in a so-called linear region. At this time, the above characteristic equation does not hold, and the drain current Ids depends on not only the gate voltage Vgs but also the drain voltage Vds. In the linear region, the drain current Ids decreases as the drain voltage Vds decreases. When the gate voltage Vgs is constant, the drain current Ids is smaller in the linear region than in the saturation region.

  FIG. 3 is a timing chart for explaining the operation of the image display apparatus shown in FIGS. This example includes a normal mode and a power saving mode (save mode), and saves power consumption by appropriately switching between the normal mode and the save mode in accordance with the usage state of the panel. This timing chart shows the waveforms of the control signals WS and DS and the gate potential of the drive transistor Trd with the time axis aligned.

  First, the normal mode will be described. At timing T1, the control signal WS changes from low level to high level, and the sampling transistor Tr1 is turned on. At this timing T1, the control signal DS is at a low level, and the switching transistor Tr3 is off. When the sampling transistor Tr1 is turned on at timing T1, the input signal Vsig is sampled from the signal line SL and written into the pixel capacitor Cs. As a result, the potential of the gate G of the drive transistor Tr2 becomes the potential Vsig of the new input signal as shown in the timing chart.

  Thereafter, at timing T2, the control signal DS rises to a high level, and the switching transistor Tr3 is turned on. Thus, a current path is formed in which the drive transistor Tr2, the switching transistor Tr3, and the light emitting element OLED are connected in series from the power supply Vcc to the ground GND, and the light emitting element OLED starts to emit light.

  Thereafter, at timing T3, the control signal DS is switched to the low level, the switching transistor Tr3 is turned off, and the light emission of the light emitting element OLED is stopped. The light emission period from timing T2 to T3 is set relatively long in the normal mode, and the screen brightness is high. Thereafter, at the timing T4, the field ends and the process proceeds to the next field. As is apparent from the timing chart, the ratio of the light emission periods T2-T3 occupying one field (1f) is relatively long.

  Next, the operation in the save mode will be described. Basically, the save mode operation is the same as the normal mode. The difference is that the timing T3 ′ defining the end of the light emission period is advanced compared to the end T3 of the light emission period in the normal mode. As a result, the light emission period T2-T3 'in the save mode is shortened, and the drive current amount is reduced accordingly, so that there is a power saving effect to some extent. In addition, since the ratio of the light emission period in one field is shortened, the screen luminance is darkened as much.

  Although the driving method shown in FIG. 3 saves power consumption to some extent by switching between the normal mode and the save mode, the power supply voltage Vcc does not change between the normal mode and the save mode. Therefore, the power saving effect is insufficient. Therefore, the present invention lowers the power supply voltage of the panel when switching from the normal mode to the power saving mode, thereby simultaneously reducing the drive current amount required for light emission and the panel operating voltage, thereby further reducing the power consumption of the panel. Has achieved. In this case, the light emission period itself does not need to be switched between the normal mode and the save mode, and the operation sequence is not complicated.

  However, simply lowering the power supply voltage is a problem because gradation collapse occurs on the high gradation white display side. First, the gradation collapse phenomenon will be described with reference to FIG. FIG. 4 is a graph showing the Vds-Ids characteristic of the drive transistor Tr2 shown in FIG. The horizontal axis represents the drain voltage Vds (unit V), and the vertical axis represents the drain current Ids (unit μA). As a parameter, the gate voltage Vgs is set at 3 levels. That is, the gate voltage Vgs has a high level white display IV characteristic, an intermediate gray display IV characteristic with Vgs, and a black gray display IV characteristic with low Vgs.

  The graph of FIG. 4 shows the case where the power supply potential Vcc is set to 10 V in the normal mode, for example. As apparent from the graph, in the normal mode, the drive transistor Tr2 basically operates in the saturation region, and the drain current Ids supplies the drain current Ids determined by the gate voltage Vgs without depending on Vds.

  The graph of FIG. 4 also shows the IV characteristics of the light emitting element OLED in addition to the Ids-Vds characteristics of the drive transistor Tr2. The curve connecting the diamond dots is the IV characteristic under the normal mode, and the curve connecting the square dots is the IV characteristic under the save mode. As is clear from the graph, in the save mode, the power supply voltage Vcc is lowered from 10 V in the normal mode to 8 V, so that the IV characteristic under the save mode is generally on the left side compared with the IV characteristic under the normal mode. Has shifted to.

  In the graph of FIG. 4, the point where the IV characteristic of the drive transistor Tr2 and the IV characteristic of the light emitting element OLED intersect is a so-called operating point, and is represented by a white circle. In the normal mode, the operating points are all in the saturation region where Vds = 4V or more regardless of the level of Vgs. However, when the IV mode of the light emitting element OLED shifts to the left side when the save mode is entered, the operating point is still in the saturation region in black gray display or gray display, but the operating point falls from the saturation region to the linear region in white display. End up. As a result, when the power supply potential Vcc is switched from 10 V to 8 V in accordance with the save mode, there is a problem that the brightness of white display is lowered.

  Since the power consumption in the save mode is reduced, the panel power supply voltage Vcc cannot be simply lowered. If Vcc is simply lowered, as shown in the graph of FIG. 4, the operating point for white display enters the linear region, and the γ characteristic on the white gradation side changes. As a result, the operating point of white gradation changes, and the drive transistor is driven in a linear region, resulting in a decrease in luminance. In the gray to black gradation, the drive transistor Tr2 operates in the saturation region, so the luminance does not decrease. That is, if the power supply voltage Vcc is simply lowered, the white display is destroyed. As a result, the brightness and chromaticity of the panel change, which is not practical.

  FIG. 5 is a block diagram showing the overall configuration of the image display apparatus according to the present invention. For easy understanding, portions corresponding to those of the image display apparatus according to the reference example shown in FIG. 2 are denoted by corresponding reference numerals. In the image display device according to the present invention, when the normal mode is switched to the save mode, not only the power supply voltage Vcc is simply lowered, but also the γ characteristic indicating the relationship between the video signal and the input signal is switched. The input signal range is compressed. By compressing this input signal, the drive transistor is driven in the saturation region at all gray levels from white to black even if the power supply voltage is lowered. Thereby, the power supply voltage can be lowered without causing gradation collapse.

  As shown in the figure, the present image display device basically includes a pixel array unit 1 and a peripheral circuit unit for driving the pixel array unit 1. The light scanner 4 and the drive scanner 5 in the peripheral circuit section are integrated on the panel P together with the pixel array 1 section. On the other hand, the signal driver 3 is externally attached to the panel P. However, the present invention is not limited to this.

  The pixel array unit 1 includes row-like scanning lines WS, column-like signal lines SL, and pixels 2 arranged in a matrix at portions where each scanning line WS and each signal line SL intersect. As described above, the peripheral circuit section supplies the control signal to each scanning line WS in order to perform the line sequential scanning, and supplies the input signal corresponding to the video signal to each signal line SL in accordance with the line sequential scanning. And a signal driver 3 that performs The present embodiment includes a drive scanner 5 in addition to the light scanner 4, and performs lighting / light-out control of each pixel 2 via another scanning line DS arranged in parallel with the scanning line WS.

  Each pixel 2 includes at least a sampling transistor Tr1, a drive transistor Tr2 connected in series between the power supply Vcc and the ground GND, and a light emitting element OLED. In addition to this, the present embodiment includes a pixel capacitor Cs and a switching transistor Tr3.

  The sampling transistor Tr1 conducts in response to the control signal WS supplied from the scanning line WS and samples the input signal supplied from the signal line SL. The sampled input signal is held in the pixel capacitor Cs as the gate voltage Vgs. The drive transistor Tr2 supplies an output current Ids corresponding to the sampled input signal to the light emitting element OLED. The light emitting element OLED emits light with luminance according to the video signal by the output current supplied from the drive transistor Tr2, and thereby displays an image on the pixel array unit 1. The switching transistor Tr3 is turned on in response to the control signal DS output from the drive scanner 5, and the light emission period is controlled by connecting the drive transistor Tr2 and the light emitting element OLED.

  As a feature of the present invention, the peripheral circuit section includes a controller 12, and can switch between a normal mode and a save mode (power saving mode). The peripheral circuit section including the controller 12 sets the power supply Vcc to a normal potential (for example, 10 V) in the normal mode, thereby causing the drive transistor Tr2 to operate in the saturation region, and an input signal (gate voltage Vgs) as a constant current source. The output current Ids according to the above is supplied. On the other hand, in the power saving mode, the peripheral circuit unit sets the power supply Vcc to a potential (for example, 8V) lower than a normal potential (for example, 10V), and the relationship between the video signal (video signal) and the input signal (gate voltage Vgs). A γ correction circuit 11 that compresses an input signal with respect to a video signal by switching a prescribed γ characteristic is provided. With this configuration, the peripheral circuit unit of the image display apparatus operates the drive transistor Tr2 in the saturation region even at a low power supply potential, and supplies an output current corresponding to the compressed input signal as a constant current source.

  As shown in the figure, the controller 12 outputs a mode signal to the γ correction circuit 11 so that the γ characteristic is switched between the normal mode and the save mode. The γ correction circuit 11 includes γ curve tables 1 and 2 that are different for the normal mode and the save mode, and performs gamma correction by switching the table for each mode. In other words, an externally input video signal is converted into an input signal according to the γ table and supplied to the signal driver 3 side. The γ correction circuit 11 has a DAC (digital / analog conversion function) and an S / H (sample hold) function in addition to a γ correction function.

  The controller 12 also controls the signal driver 3, the write scanner 4 and the drive scanner 5. Under the control of the controller 12, the signal driver 3, the write scanner 4, and the drive scanner 5 are synchronized with each other and display an image corresponding to the video signal on the pixel array unit 1. The controller 12 can control the drive scanner 5 to switch the light emission period between the normal mode and the save mode. However, in the present invention, it is not always necessary to switch the light emission period between the normal mode and the save mode. In order to simplify the operation sequence, the period during which the light emitting element emits light in each frame or field is changed between the normal mode and the save mode (power saving mode). May be controlled to the same time width.

  FIG. 6 is a graph for explaining the operation of the image display apparatus according to the present invention. In order to facilitate understanding, the same notation as the graph shown in FIG. 4 is used. The difference is that the input signal is compressed with respect to the video signal by switching the γ characteristic in the save mode. As a result, the gate voltage Vgs input to the gate of the drive transistor decreases as a whole, so that the IV characteristic of the drive transistor Tr2 has an overall level-down shape, and the output current Ids decreases. For this reason, even when the power supply voltage in the save mode is lowered from 10 V to 8 V, the operating points are all in the saturation region from white display to black gray display. As described above, the present invention totally compresses Vgs so that the drive transistor Tr2 operates in the saturation region when Vcc is lowered to reduce power consumption in the save mode. At that time, halftone gradation is uniformly compressed so as to eliminate gradation collapse. Thereby, the current value in each gradation can be lowered from white display to black gray display. Further, by changing the γ table in the save mode, the drive transistors of all the pixels can be driven in the saturation region with the Vcc power supply voltage lowered, and chromaticity change in white gradation does not occur.

  FIG. 7 is a graph comparing the normal mode and the save mode performed in the image display apparatus according to the present invention. (A) shows the relationship between the input signal Vsig and the output current Ids in the normal mode. In the normal mode, the video signal (video signal) is converted into the input signal Vsig using the normal γ table 1. In this case, no compression is applied. Accordingly, a large output current Ids can be obtained with respect to the white gradation input signal Vsig.

  (B) shows the relationship between the input signal Vsig and the output current Ids when Vcc is simply lowered in the normal mode. As described above, when Vcc is simply lowered, the drive transistor Tr2 operates in a linear region on the white display side, so that a large output current Ids cannot be obtained. In other words, the brightness is lowered on the white display side and the image quality is disturbed.

  (C) shows the relationship between the input signal Vsig and the output signal Ids in the save mode. In the save mode, since the video signal is converted into the input signal Vsig using the γ table 2, the dynamic range of Vsig is compressed. Therefore, a large output current Ids cannot be obtained even in white display.

  (D) shows a case where Vcc is lowered in the save mode. Since the range of the input signal Vsig is compressed in advance, even when the power supply voltage Vcc is lowered, the drive transistor Tr2 can perform a saturation region operation in all gradations from black display to white display. Therefore, there is no gradation collapse on the white display side.

  The image display apparatus according to the present invention switches between the state (A) and the state shown in (D) in an actual operation, thereby saving power consumption and preventing image quality deterioration. In save mode, by converting the γ table, it is possible to reduce the current of white gradation, and at the same time, to reduce Vcc without causing gradation collapse, and more effective in reducing panel power consumption in save mode. Can be done.

  FIG. 8 is a schematic circuit diagram illustrating another configuration example of the pixel circuit. In order to facilitate understanding, portions corresponding to those of the previous pixel circuit shown in FIG. The difference from the pixel circuit shown in FIG. 2 is that the drive transistor Tr2 is an N-channel type. In this case, the N-channel drive transistor Tr2 has a drain D connected to the power supply potential Vcc, a source S connected to the anode A of the light emitting element OLED via the switching transistor Tr3, and a gate G connected to the sampling transistor Tr1. is doing. A pixel capacitor Cs that holds an input signal sampled by the sampling transistor Tr1 is connected between the gate G and the source S of the drive transistor Tr2. Even in such a configuration, the drive transistor Tr2 basically operates in the saturation region, and causes the drain current Ids to flow through the light emitting element OLED in accordance with the input signal (gate voltage Vgs) held in the pixel capacitor Cs. When the drain current Ids flows, the source potential rises, but the gate potential also rises accordingly by the bootstrap operation. Therefore, the gate voltage Vgs held in the pixel capacitor Cs is kept constant by the bootstrap operation, and the drain current Ids can flow to the light emitting element OLED according to the input signal (gate voltage Vgs) held in the pixel capacitor Cs. . In this way, even in a bootstrap type circuit in which the drive transistor has N-channel characteristics, low power consumption can be measured by switching the power supply voltage Vcc and switching the γ correction processing between the normal mode and the save mode according to the present invention. Is possible.

  Further, the present invention can be similarly applied to a pixel circuit having a function of correcting variation in the threshold voltage Vth of the drive transistor. FIG. 9 is a circuit diagram showing an embodiment of a pixel circuit having a function of correcting variations in the threshold voltage Vth of the drive transistor. For easy understanding, the same reference numerals are used for the portions corresponding to the previous embodiment shown in FIG. As shown in the figure, this pixel circuit includes five transistors Tr1 to Tr5, two pixel capacitors Cs1 and Cs2, and one light emitting element OLED. All of the five transistors Tr1 to Tr5 are P-channel type. The pixel circuit includes switching transistors Tr4 and Tr5 for correcting a threshold voltage Vth in addition to a sampling transistor Tr1, a drive transistor Tr2, and a switching transistor Tr3 for light emission control, which are basic transistor elements. These transistors Tr4 and Tr5 are controlled by the correction scanner 7 through the scanning line AZ, detect Vth of the drive transistor Tr2 in advance of sampling of the video signal in advance, and supply a corresponding voltage to the pixel capacitor Cs1. Holding this cancels Vth of the drive transistor Tr2. Therefore, even if the Vth of the drive transistor Tr2 varies from pixel to pixel, the influence can be canceled.

  Further, the present invention can be similarly applied to a pixel circuit having a function of correcting both of the threshold voltage Vth and the mobility μ of the drive transistor. FIG. 10 is a circuit diagram showing an embodiment of a pixel circuit having a function of correcting variations in the threshold voltage Vth and mobility μ of the drive transistor. The pixel circuit 2 includes five thin film transistors Tr1 to Tr5, one capacitor element (pixel capacitor) Cs, and one light emitting element OLED. The transistors Tr1, Tr2, Tr4 and Tr5 are N-channel polysilicon TFTs. Only the transistor Tr3 is a P-channel type polysilicon TFT. One capacitive element Cs constitutes a pixel capacitance of the pixel circuit 2. The light emitting element OLED is, for example, a diode type organic EL element having an anode and a cathode. However, the present invention is not limited to this, and the light emitting element generally includes all devices that emit light by current drive.

  The drive transistor Tr2 which is the center of the pixel circuit 2 has its gate G connected to one end of the pixel capacitor Cs and its source S connected to the other end of the pixel capacitor Cs. The gate G of the drive transistor Tr2 is connected to another reference potential Vss1 through the switching transistor Tr4. The drain of the drive transistor Tr2 is connected to the power supply Vcc via the switching transistor Tr3. The gate of the switching transistor Tr4 is connected to the scanning line AZ1. The gate of the switching transistor Tr3 is connected to the scanning line DS. The anode of the light emitting element OLED is connected to the source S of the drive transistor Tr2, and the cathode is grounded. This ground potential may be represented by Vcath. Further, the switching transistor Tr5 is interposed between the source S of the drive transistor Tr2 and the predetermined reference potential Vss2. The gate of this transistor Tr5 is connected to the scanning line AZ2. On the other hand, the sampling transistor Tr1 is connected between the signal line SL and the gate G of the drive transistor Tr2. The gate of the sampling transistor Tr1 is connected to the scanning line WS.

  In such a configuration, the sampling transistor Tr1 conducts in response to the control signal WS supplied from the scanning line WS during a predetermined sampling period, and samples the video signal Vsig supplied from the signal line SL into the pixel capacitor Cs. The pixel capacitor Cs applies an input voltage Vgs between the gate G and the source S of the drive transistor in accordance with the sampled video signal Vsig. The drive transistor Tr2 supplies an output current Ids corresponding to the input voltage Vgs to the light emitting element OLED during a predetermined light emission period. This output current (drain current) Ids is dependent on the carrier mobility μ and the threshold voltage Vth in the channel region of the drive transistor Tr2. The light emitting element OLED emits light with luminance according to the video signal Vsig by the output current Ids supplied from the drive transistor Tr2.

  As a feature of the present embodiment, the pixel circuit 2 includes correction means including switching transistors Tr3 to Tr4. In order to cancel the dependency of the output current Ids on the carrier mobility μ, the pixel circuit 2 is preliminarily arranged at the head of the light emission period. The input voltage Vgs held in the capacitor Cs is corrected. Specifically, the correction means (Tr3 to Tr4) operate in a part of the sampling period according to the control signals WS and DS supplied from the scanning lines WS and DS, and the video signal Vsig is sampled. Thus, the output current Ids is taken out from the drive transistor Tr2, and negatively fed back to the pixel capacitor Cs to correct the input voltage Vgs. Further, the correction means (Tr3 to Tr4) detects the threshold voltage Vth of the drive transistor Tr2 in advance of the sampling period in order to cancel the dependence of the output current Ids on the threshold voltage Vth, and detects the detected threshold voltage Vth. Is added to the input voltage Vgs.

  In the case of this embodiment, the drive transistor Tr2 is an N-channel transistor, and the drain is connected to the power supply Vcc side, while the source S is connected to the light emitting element OLED side. In this case, the correction unit described above takes out the output current Ids from the drive transistor Tr2 at the beginning of the light emission period that overlaps the latter part of the sampling period, and negatively feeds back to the pixel capacitor Cs side. At this time, the correcting means causes the output current Ids extracted from the source S side of the drive transistor Tr2 at the beginning of the light emission period to flow into the capacitance of the light emitting element OLED. Specifically, the light emitting element OLED is composed of a diode type light emitting element having an anode and a cathode, and the anode side is connected to the source S of the drive transistor Tr2, and the cathode side is grounded. With this configuration, the correction means (Tr3 to Tr4) sets the anode / cathode of the light emitting element OLED in a reverse bias state in advance, and the output current Ids extracted from the source S side of the drive transistor Tr2 is the light emitting element OLED. This diode-type light emitting element OLED functions as a capacitive element. Note that this correction means can adjust the time width t for extracting the output current Ids from the drive transistor Tr2 within the sampling period, thereby optimizing the negative feedback amount of the output current Ids with respect to the pixel capacitor Cs.

It is a block diagram which shows the general structure of an image display apparatus. It is a circuit diagram which shows the circuit structure of the pixel contained in an image display apparatus. 3 is a timing chart for explaining operations of the image display apparatus shown in FIGS. 1 and 2. It is a graph with which it uses for description of this invention. 1 is a block diagram showing an overall configuration of an image display device according to the present invention. It is a graph with which it uses for operation | movement description of the image display apparatus concerning this invention shown in FIG. It is a graph similarly provided for operation | movement description. It is a circuit diagram which shows the Example of the pixel integrated in the image display apparatus concerning this invention. FIG. 6 is a circuit diagram showing another embodiment of a pixel incorporated in the image display device according to the present invention. It is a circuit diagram which shows another Example of the pixel similarly similarly incorporated in the image display apparatus concerning this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Pixel array part, 2 ... Pixel, 3 ... Signal driver, 4 ... Write scanner, 5 ... Drive scanner, 11 ... γ correction circuit, 12 ... Controller, Tr1 ... Sampling transistor, Tr2 ... Drive transistor, Tr3 ... Switching transistor, OLED ... Light emitting element, Cs ... Pixel capacitance, P ... Panel

Claims (3)

It consists of a pixel array part and a peripheral circuit part that drives it,
The pixel array unit includes a row-shaped scanning line, a column-shaped signal line, and pixels arranged in a matrix at a portion where each scanning line and each signal line intersect,
The peripheral circuit unit includes a scanner that sequentially supplies a control signal to each scanning line for performing line sequential scanning, and a driver that supplies an input signal corresponding to the video signal to each signal line in accordance with the line sequential scanning,
Each pixel includes at least a sampling transistor, a drive transistor connected in series between a power source and ground, and a light emitting element,
The sampling transistor conducts according to a control signal supplied from the scanning line and samples an input signal supplied from the signal line,
The drive transistor supplies an output current corresponding to the sampled input signal to the light emitting element,
The light emitting element emits light with a luminance according to the video signal by an output current supplied from the drive transistor, and thus displays an image on the pixel array unit.
The peripheral circuit unit has a controller for switching between a normal mode and a power saving mode,
While in normal mode, the power supply is set to a normal potential, so that the drive transistor operates in a saturation region to supply an output current corresponding to the input signal as a constant current source,
In the power saving mode, the power supply is set to a potential lower than a normal potential, and a γ correction circuit that compresses the input signal with respect to the video signal by switching a γ characteristic that defines the relationship between the video signal and the input signal, Accordingly, an image display apparatus characterized in that the drive transistor is operated in a saturation region even when the power supply potential is low, and an output current corresponding to an input signal compressed as a constant current source is supplied.   The image display apparatus according to claim 1, wherein the controller controls a period during which the light emitting element emits light in each frame or field to have the same time width in the normal mode and the power saving mode. The pixel array unit includes a pixel array unit and a peripheral circuit unit that drives the pixel array unit, and the pixel array unit is arranged in a matrix in a row-shaped scanning line, a column-shaped signal line, and a portion where each scanning line and each signal line intersect. The peripheral circuit unit includes a scanner that sequentially supplies a control signal to each scanning line in order to perform line sequential scanning, and each signal line that matches an input signal corresponding to a video signal with the line sequential scanning. Each pixel includes at least a sampling transistor, a drive transistor connected in series between a power source and a ground, and a light emitting element, and a driving method of an image display device,
In response to the control signal supplied from the scanning line, the sampling transistor is turned on to sample the input signal supplied from the signal line,
The drive transistor supplies an output current corresponding to the sampled input signal to the light emitting element;
When the output current supplied from the drive transistor causes the light emitting element to emit light with a luminance corresponding to the video signal, and thus displaying an image on the pixel array unit,
Switch between normal mode and power saving mode,
In the normal mode, the power supply is set to a normal potential, so that the drive transistor is operated in a saturation region and an output current corresponding to the input signal is supplied to the light emitting element as a constant current source,
In power saving mode, the power supply is set to a potential lower than the normal potential, and the input signal is compressed with respect to the video signal by switching the γ characteristic that defines the relationship between the video signal and the input signal. However, a drive method for an image display device, wherein the drive transistor is operated in a saturation region and an output current corresponding to an input signal compressed as a constant current source is supplied to the light emitting element.

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