JP2008060378A - Multilayer capacitor array - Google Patents

Multilayer capacitor array Download PDF

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JP2008060378A
JP2008060378A JP2006236177A JP2006236177A JP2008060378A JP 2008060378 A JP2008060378 A JP 2008060378A JP 2006236177 A JP2006236177 A JP 2006236177A JP 2006236177 A JP2006236177 A JP 2006236177A JP 2008060378 A JP2008060378 A JP 2008060378A
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pattern
internal electrode
capacitor array
multilayer capacitor
patterns
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JP4853187B2 (en
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Takashi Aoki
崇 青木
Taketaka Yoshida
武尊 吉田
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TDK Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To obtain a high-quality multilayer capacitor array by reducing, with electrostatic capacitance maintained, a portion in which there is no internal electrode by extending a first internal electrode. <P>SOLUTION: In the multilayer capacitor array 10, the pattern 27b of an internal electrode 26A and the pattern 27c of an internal electrode 26B which are positioned vertically adjacent to each other partially overlap each other. The overlapping portions do not contribute to electrostatic capacitance. This makes it possible to reduce, with electrostatic capacitance maintained, a portion in which there is no internal electrode by extending the pattern 27b and the pattern 27c, in such a manner that a portion which does not contribute to electrostatic capacitance is formed. Thus, deterioration in quality caused by a crack caused by a difference in the thickness of a multilayer body 20 is significantly suppressed, and a high-quality multilayer capacitor array 10 is implemented. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、積層コンデンサアレイに関するものである。   The present invention relates to a multilayer capacitor array.

従来、この技術の分野における積層コンデンサアレイは、例えば、下記特許文献１に開示されている。この公報に記載の積層コンデンサアレイは、誘電体層と内部電極とが交互に積層された構造を有しており、誘電体層となるセラミックグリーン上に、内部電極となるべき導電性ペーストを複数領域に分けて塗布することにより形成される。
特開平１１−２６２９１号公報 Conventionally, a multilayer capacitor array in the field of this technology is disclosed, for example, in Patent Document 1 below. The multilayer capacitor array described in this publication has a structure in which dielectric layers and internal electrodes are alternately stacked, and a plurality of conductive pastes to be internal electrodes are formed on ceramic green serving as a dielectric layer. It is formed by coating in areas.
JP-A-11-26291

しかしながら、前述した従来の積層コンデンサアレイには、次のような課題が存在している。すなわち、内部電極が重なっている部分と、内部電極がない部分との間の厚み差が大きく、このような大きな厚み差に起因してクラック（割れ、欠け等を含む）が生じやすくなっており、クラック等による品質低下が招かれるという問題があった。   However, the conventional multilayer capacitor array described above has the following problems. That is, the thickness difference between the portion where the internal electrode overlaps and the portion where there is no internal electrode is large, and cracks (including cracks, chips, etc.) are likely to occur due to such a large thickness difference. There has been a problem that quality degradation is caused by cracks and the like.

そこで、本発明は、上述の課題を解決するためになされたもので、高品質の積層コンデンサアレイを提供することを目的とする。   Accordingly, the present invention has been made to solve the above-described problems, and an object thereof is to provide a high-quality multilayer capacitor array.

本発明に係る積層コンデンサアレイは、複数の誘電体層が積層された積層体中に、複数段に亘って内部電極が形成された積層コンデンサアレイであって、同一段の内部電極は、第１の極性に接続される第１の内部電極と、第２の極性に接続される第２の内部電極を含む複数の面積の異なる内部電極によって構成され、且つ、第１及び第２の内部電極それぞれは積層体の対向する一対の側面のうちのいずれかに引き出されており、上下に隣り合って位置する第１の内部電極は、その一部が互いに重なり合っている。   A multilayer capacitor array according to the present invention is a multilayer capacitor array in which internal electrodes are formed over a plurality of stages in a multilayer body in which a plurality of dielectric layers are laminated. A first internal electrode connected to the polarity of the second internal electrode and a plurality of internal electrodes having different areas including the second internal electrode connected to the second polarity, and each of the first and second internal electrodes Is drawn out to one of a pair of opposing side surfaces of the laminated body, and the first internal electrodes located adjacent to each other in the vertical direction partially overlap each other.

この積層コンデンサアレイでは、上下に隣り合って位置する第１の内部電極は、その一部が互いに重なり合っており、この重なり合っている部分は静電容量に寄与しない。そのため、静電容量に寄与しない部分が形成されるようにして第１の内部電極を拡張させることで、静電容量を保持したまま、内部電極がない部分を縮小することができる。それにより、積層体の厚み差に起因するクラックによる品質低下が有意に抑制され、高品質の積層コンデンサアレイが実現される。   In this multilayer capacitor array, the first internal electrodes positioned adjacent to each other in the vertical direction partially overlap each other, and the overlapping part does not contribute to the capacitance. Therefore, by expanding the first internal electrode so that a portion that does not contribute to the capacitance is formed, the portion without the internal electrode can be reduced while maintaining the capacitance. As a result, quality deterioration due to cracks due to the thickness difference of the multilayer body is significantly suppressed, and a high-quality multilayer capacitor array is realized.

本発明によれば、高品質の積層コンデンサアレイが提供される。   According to the present invention, a high-quality multilayer capacitor array is provided.

以下、添付図面を参照して本発明を実施するにあたり最良と思われる形態について詳細に説明する。なお、同一又は同等の要素については同一の符号を付し、説明が重複する場合にはその説明を省略する。
（第１実施形態） DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments that are considered to be the best in carrying out the invention will be described in detail with reference to the accompanying drawings. In addition, the same code | symbol is attached | subjected about the same or equivalent element, and the description is abbreviate | omitted when description overlaps.
(First embodiment)

図１は、本発明の第１実施形態に係る積層コンデンサアレイ１０を示した斜視図であり、図２はその積層コンデンサアレイ１０の分解図、図３は図１に示した積層コンデンサアレイ１０のＩＩＩ−ＩＩＩ線断面図である。   1 is a perspective view showing a multilayer capacitor array 10 according to a first embodiment of the present invention, FIG. 2 is an exploded view of the multilayer capacitor array 10, and FIG. 3 is a diagram of the multilayer capacitor array 10 shown in FIG. It is III-III sectional view taken on the line.

図１〜３に示すように、積層コンデンサアレイ１０は、４端子型のコンデンサアレイであって、積層体２０とその積層体２０の側面に形成された外部電極３０Ａ〜３０Ｄとで構成されている。   As shown in FIGS. 1 to 3, the multilayer capacitor array 10 is a four-terminal capacitor array, and includes a multilayer body 20 and external electrodes 30 </ b> A to 30 </ b> D formed on the side surfaces of the multilayer body 20. .

積層体２０は、図２に示すように、誘電体層２４の上に異なるパターンの内部電極２６Ａ，２６Ｂが形成された２種類の複合層２２Ａ，２２Ｂが交互に複数積層されたものを、その上下から誘電体層２８，２８で挟んで構成されている。そのため、図３の断面図に示すように、積層体２０は、誘電体層２４が複数積層されており、複数段に亘って内部電極２６Ａ，２６Ｂが形成されている。   As shown in FIG. 2, the laminated body 20 is obtained by alternately laminating two types of composite layers 22A and 22B in which internal electrodes 26A and 26B having different patterns are formed on a dielectric layer 24. The dielectric layer 28 is sandwiched from above and below. Therefore, as shown in the cross-sectional view of FIG. 3, the stacked body 20 includes a plurality of dielectric layers 24 stacked, and the internal electrodes 26A and 26B are formed over a plurality of stages.

図４（ａ）及び（ｂ）は、２種類の複合層２２Ａ，２２Ｂの内部電極を示した図であり、図４（ｃ）は、それらの複合層２２Ａ，２２Ｂを重ね合わせた状態を示した図である。図４（ｃ）から明らかなように、複合層２２Ａの内部電極２６Ａと複合層２２Ｂの内部電極２６Ｂとは、その大部分において互いに重なり合うように、誘電体層２４上の略同一寸法の領域にそれぞれ形成されている。   4 (a) and 4 (b) are diagrams showing internal electrodes of two types of composite layers 22A and 22B, and FIG. 4 (c) shows a state in which the composite layers 22A and 22B are overlapped. It is a figure. As is apparent from FIG. 4C, the internal electrode 26A of the composite layer 22A and the internal electrode 26B of the composite layer 22B are located in a region of substantially the same size on the dielectric layer 24 so as to overlap each other in most part. Each is formed.

図４（ａ）に示すように、複合層２２Ａに形成された内部電極２６Ａは、面積の異なるパターン２７ａ及びパターン２７ｂによって構成されている。パターン２７ａ及びパターン２７ｂは、略同一の幅を有する矩形状パターンであって、パターン２７ａのほうがパターン２７ｂに比べて面積が小さくなっている。そして、これらのパターン２７ａ及びパターン２７ｂが、幅方向に細く延びる非電極パターン領域２９Ａを介して隣り合って形成されている。ここで、一方のパターン２７ｂは、積層体２０の側面２０ａに対応する側のグリーン端部２４ａまで引き出されており、また、他方のパターン２７ａは、積層体２０の側面２０ｂに対応する側のグリーン端部２４ｂまで引き出されて、対応する外部電極３０Ｂ，３０Ｃに接続される。   As shown in FIG. 4A, the internal electrode 26A formed on the composite layer 22A is composed of a pattern 27a and a pattern 27b having different areas. The pattern 27a and the pattern 27b are rectangular patterns having substantially the same width, and the area of the pattern 27a is smaller than that of the pattern 27b. These patterns 27a and 27b are formed adjacent to each other via a non-electrode pattern region 29A extending narrowly in the width direction. Here, one pattern 27b is drawn to the green end 24a on the side corresponding to the side surface 20a of the stacked body 20, and the other pattern 27a is the green on the side corresponding to the side surface 20b of the stacked body 20. It is pulled out to the end 24b and connected to the corresponding external electrodes 30B and 30C.

図４（ｂ）に示すように、複合層２２Ｂに形成された内部電極２６Ｂは、面積の異なるパターン２７ｃ及びパターン２７ｄによって構成されている。パターン２７ｃ及びパターン２７ｄは、略同一の幅を有する矩形状パターンであって、パターン２７ｃ及びパターン２７ｃの寸法はそれぞれ内部電極２６Ａのパターン２７ｂ及びパターン２７ａに対応している。すなわち、パターン２７ｄのほうがパターン２７ｃに比べて面積が小さくなっている。そして、これらのパターン２７ｃ及びパターン２７ｄもやはり幅方向に細く延びる非電極パターン領域２９Ｂを介して隣り合って形成されている。ここで、一方のパターン２７ｃは、積層体２０の側面２０ａに対応する側のグリーン端部２４ａまで引き出されており、また、他方のパターン２７ｄは、積層体２０の側面２０ｂに対応する側のグリーン端部２４ｂまで引き出されて、対応する外部電極３０Ａ，３０Ｄに接続される。   As shown in FIG. 4B, the internal electrode 26B formed on the composite layer 22B is composed of a pattern 27c and a pattern 27d having different areas. The pattern 27c and the pattern 27d are rectangular patterns having substantially the same width, and the dimensions of the pattern 27c and the pattern 27c correspond to the pattern 27b and the pattern 27a of the internal electrode 26A, respectively. That is, the area of the pattern 27d is smaller than that of the pattern 27c. The patterns 27c and 27d are also formed adjacent to each other via a non-electrode pattern region 29B that extends narrowly in the width direction. Here, one pattern 27c is drawn to the green end 24a on the side corresponding to the side surface 20a of the stacked body 20, and the other pattern 27d is the green on the side corresponding to the side surface 20b of the stacked body 20. It is pulled out to the end 24b and connected to the corresponding external electrodes 30A, 30D.

なお、複合層２２Ａの非電極パターン領域２９Ａは、複合層２２Ｂの内部電極２６Ｂのパターン２７ｃの対応領域に形成されており、且つ、複合層２２Ｂの非電極パターン領域２９Ｂは、複合層２２Ａの内部電極２６Ａのパターン２７ｂの対応領域に形成されているため、図４（ｃ）に示すとおり、内部電極２６Ａの面積が大きい方のパターン２７ｂの一部と内部電極２６Ｂの面積が大きい方のパターン２７ｃの一部とが互いに重なり合って、重畳領域Ａ１が形成されている。   The non-electrode pattern region 29A of the composite layer 22A is formed in a region corresponding to the pattern 27c of the internal electrode 26B of the composite layer 22B, and the non-electrode pattern region 29B of the composite layer 22B is the interior of the composite layer 22A. Since it is formed in the region corresponding to the pattern 27b of the electrode 26A, as shown in FIG. 4C, a part of the pattern 27b having a larger area of the internal electrode 26A and a pattern 27c having a larger area of the internal electrode 26B. Are overlapped with each other to form an overlapping region A1.

図１に戻って、外部電極３０Ａ〜３０Ｄは積層体２０の対向する側面２０ａ，２０ｂに１対ずつ形成されており、各外部電極３０Ａ〜３０Ｄは積層体２０の積層方向に延びている。そして、外部電極３０Ａ〜３０Ｄに電圧を印加する際には、上下方向において対面する、パターン２７ａとパターン２７ｃ及びパターン２７ｂとパターン２７ｄの間に電荷がたまるように、外部電極３０Ａと外部電極３０Ｂとが同極性（例えば、＋極）となり、外部電極３０Ｃと外部電極３０Ｄとが逆の同極性（例えば、−極）となるようにする。   Returning to FIG. 1, the external electrodes 30 </ b> A to 30 </ b> D are formed in pairs on the opposite side surfaces 20 a and 20 b of the stacked body 20, and the external electrodes 30 </ b> A to 30 </ b> D extend in the stacking direction of the stacked body 20. When a voltage is applied to the external electrodes 30A to 30D, the external electrode 30A and the external electrode 30B are arranged so that charges are accumulated between the patterns 27a and 27c and the patterns 27b and 27d facing each other in the vertical direction. Have the same polarity (for example, + pole), and the external electrode 30C and the external electrode 30D have the opposite polarity (for example, -pole).

すると、図３の断面図に示すように、上下に重なり合う内部電極２６Ａと内部電極２６Ｂのうち、パターン２７ｂとパターン２７ｃとが重なった重畳領域Ａ１に相当する部分では、パターン２７ｂとパターン２７ｃとが同極性（例えば、−極）となるために電荷はたまらず、この部分は静電容量に寄与しない。すなわち、この場合、−極が本発明における第１の極性、＋極が本発明における第２の極性であり、パターン２７ｂ，２７ｃが本発明における第１の内部電極、パターン２７ａ，２７ｄが本発明における第２の内部電極となる。なお、第１の極性と第２の極性とは、適宜交換することもできる。   Then, as shown in the cross-sectional view of FIG. 3, in the portion corresponding to the overlapping area A1 where the pattern 27b and the pattern 27c overlap among the internal electrode 26A and the internal electrode 26B that overlap vertically, the pattern 27b and the pattern 27c Since it has the same polarity (for example, negative polarity), the electric charge is not accumulated, and this portion does not contribute to the capacitance. That is, in this case, the negative pole is the first polarity in the present invention, the positive pole is the second polarity in the present invention, the patterns 27b and 27c are the first internal electrodes in the present invention, and the patterns 27a and 27d are the present invention. The second internal electrode in FIG. Note that the first polarity and the second polarity can be appropriately exchanged.

また、この図３の断面図から明らかなように、積層体２０における内部電極２６Ａ，２６Ｂは、面方向（図における左右方向）において外縁部以外は隈無く存在している。すなわち、積層体２０においては、静電容量に寄与しない部分が形成されるようにしてパターン２７ｂ，２７ｃ（第１の内部電極）を拡張させ、面方向において内部電極２６Ａ，２６Ｂがない部分がなくなるようにしている。それにより、内部電極がない部分が存在する従来の積層体に比べて、積層体２０は、面方向における厚み差が有意に抑制されている。   As is clear from the cross-sectional view of FIG. 3, the internal electrodes 26A and 26B in the laminate 20 are present in the plane direction (left and right direction in the drawing) except for the outer edge portion. That is, in the stacked body 20, the patterns 27b and 27c (first internal electrodes) are expanded so that portions that do not contribute to the capacitance are formed, and there are no portions where the internal electrodes 26A and 26B are not present in the surface direction. I am doing so. Thereby, compared with the conventional laminated body in which the part which does not have an internal electrode exists, as for the laminated body 20, the thickness difference in a surface direction is suppressed significantly.

従って、上述した積層コンデンサアレイ１０においては、静電容量を保持したまま、内部電極がない部分の縮小が実現されており、積層体２０の厚み差に起因するクラックによる品質低下が有意に抑制されることにより品質向上が実現されている。   Therefore, in the multilayer capacitor array 10 described above, the reduction of the portion without the internal electrode is realized while maintaining the capacitance, and the deterioration in quality due to the crack due to the thickness difference of the multilayer body 20 is significantly suppressed. As a result, quality is improved.

なお、内部電極２６Ａ，２６Ｂのパターン２７ａ〜２７ｄの電極引き出し方向は、積層体２０の対向する側面２０ａ，２０ｂに引き出す態様であれば、上述したものに限らず、例えば図５に示すような態様であってもよい。すなわち、内部電極２６Ａの２つのパターン２７ａ，２７ｂを両方とも側面２０ｂ側のグリーン端部２４ｂまで引き出し、内部電極２６Ｂの２つのパターン２７ｃ，２７ｄを両方とも側面２０ａ側のグリーン端部２４ａまで引き出すようにしてもよい。
（第２実施形態） Note that the electrode lead-out directions of the patterns 27a to 27d of the internal electrodes 26A and 26B are not limited to those described above as long as they are drawn to the opposite side surfaces 20a and 20b of the multilayer body 20, and for example, as shown in FIG. It may be. That is, the two patterns 27a and 27b of the internal electrode 26A are both drawn to the green end 24b on the side surface 20b, and the two patterns 27c and 27d of the internal electrode 26B are both drawn to the green end 24a on the side 20a. It may be.
(Second Embodiment)

次に、本発明の第２実施形態について説明する。図６は、本発明の第２実施形態に係る積層コンデンサアレイ４０を示した斜視図であり、図７はその積層コンデンサアレイ４０の分解図、図８は図６に示した積層コンデンサアレイ４０のＶＩＩＩ−ＶＩＩＩ線断面図である。   Next, a second embodiment of the present invention will be described. 6 is a perspective view showing the multilayer capacitor array 40 according to the second embodiment of the present invention, FIG. 7 is an exploded view of the multilayer capacitor array 40, and FIG. 8 is a diagram of the multilayer capacitor array 40 shown in FIG. It is a VIII-VIII line sectional view.

図６〜８に示すように、積層コンデンサアレイ４０は、６端子型のコンデンサアレイであって、積層体５０とその積層体５０の側面に形成された外部電極６０Ａ〜６０Ｆとで構成されている。   As shown in FIGS. 6 to 8, the multilayer capacitor array 40 is a six-terminal capacitor array, and includes a multilayer body 50 and external electrodes 60 </ b> A to 60 </ b> F formed on the side surfaces of the multilayer body 50. .

積層体５０は、図７に示すように、誘電体層５４の上に異なる内部電極５６Ａ，５６Ｂが形成された２種類の複合層５２Ａ，５２Ｂが交互に複数積層されたものを、その上下から誘電体層５８，５８で挟んで焼成して得られたものである。そのため、図８の断面図に示すように、積層体５０は、誘電体層５４が複数積層されており、複数段に亘って内部電極５６Ａ，５６Ｂが形成されている。   As shown in FIG. 7, the laminated body 50 is obtained by alternately stacking two types of composite layers 52A and 52B in which different internal electrodes 56A and 56B are formed on a dielectric layer 54. The dielectric layers 58 and 58 are obtained by firing. Therefore, as shown in the cross-sectional view of FIG. 8, the multilayer body 50 includes a plurality of dielectric layers 54, and the internal electrodes 56A and 56B are formed over a plurality of stages.

図９（ａ）及び（ｂ）は、２種類の複合層５２Ａ，５２Ｂの内部電極を示した図であり、図９（ｃ）は、それらの複合層５２Ａ，５２Ｂを重ね合わせた状態を示した図である。図９（ｃ）から明らかなように、複合層５２Ａの内部電極５６Ａと複合層５２Ｂの内部電極５６Ｂとは、その大部分において互いに重なり合うように、誘電体層５４上の略同一寸法の領域にそれぞれ形成されている。   FIGS. 9A and 9B are diagrams showing internal electrodes of two types of composite layers 52A and 52B, and FIG. 9C shows a state in which the composite layers 52A and 52B are overlapped. It is a figure. As is apparent from FIG. 9C, the internal electrode 56A of the composite layer 52A and the internal electrode 56B of the composite layer 52B are located in a region of substantially the same dimension on the dielectric layer 54 so as to overlap each other in most part. Each is formed.

図９（ａ）に示すように、複合層５２Ａに形成された内部電極５６Ａは、面積の異なるパターン５７ａ、パターン５７ｂ及びパターン５７ｃによって構成されている。パターン５７ａ、パターン５７ｂ及びパターン５７ｃは、略同一の幅を有する矩形状パターンであって、パターン５７ａのほうがパターン５７ｂ及びパターン５７ｃに比べて面積が小さくなっている。そして、これらのパターン５７ａ、パターン５７ｂ及びパターン５７ｃそれぞれは、幅方向に細く延びる２つの非電極パターン領域５９Ａ，５９Ｂを介して隣り合って形成されている。ここで、中間に位置するパターン５７ｂは、積層体５０の側面５０ａに対応する側のグリーン端部５４ａまで引き出されており、また、両側のパターン５７ａ，５７ｃは、積層体５０の側面５０ｂに対応する側のグリーン端部５４ｂまで引き出されて、対応する外部電極６０Ｂ，６０Ｄ，６０Ｆに接続される。   As shown in FIG. 9A, the internal electrode 56A formed in the composite layer 52A is composed of patterns 57a, 57b, and 57c having different areas. The patterns 57a, 57b and 57c are rectangular patterns having substantially the same width, and the area of the pattern 57a is smaller than that of the patterns 57b and 57c. Each of these patterns 57a, 57b, and 57c is formed adjacent to each other via two non-electrode pattern regions 59A and 59B that extend narrowly in the width direction. Here, the pattern 57b located in the middle is drawn out to the green end portion 54a on the side corresponding to the side surface 50a of the stacked body 50, and the patterns 57a and 57c on both sides correspond to the side surface 50b of the stacked body 50. To the green end portion 54b on the side to be connected to the corresponding external electrodes 60B, 60D, 60F.

図９（ｂ）に示すように、複合層５２Ｂに形成された内部電極５６Ｂは、面積の異なるパターン５７ｄ、パターン５７ｅ及びパターン５７ｆによって構成されている。パターン５７ｄ、パターン５７ｅ及びパターン５７ｆは、略同一の幅を有する矩形状パターンであって、パターン５７ｄ、パターン５７ｅ及びパターン５７ｆの順に面積が次第に小さくなっている。すなわち、パターン５７ｄの面積が最も大きく、パターン５７ｆの面積が最も小さくなっている。そして、これらのパターン５７ｄ、パターン５７ｅ及びパターン５７ｆもやはり幅方向に細く延びる２つの非電極パターン領域５９Ｃ，５９Ｄを介して隣り合って形成されている。ここで、中間に位置するパターン５７ｅは、積層体５０の側面５０ｂに対応する側のグリーン端部５４ｂまで引き出されており、また、両側のパターン５７ｄ，５７ｆは、積層体５０の側面５０ａに対応する側のグリーン端部５４ａまで引き出されて、対応する外部電極６０Ａ，６０Ｃ，６０Ｅに接続される。   As shown in FIG. 9B, the internal electrode 56B formed in the composite layer 52B is composed of patterns 57d, 57e, and 57f having different areas. The pattern 57d, the pattern 57e, and the pattern 57f are rectangular patterns having substantially the same width, and the area gradually decreases in the order of the pattern 57d, the pattern 57e, and the pattern 57f. That is, the area of the pattern 57d is the largest and the area of the pattern 57f is the smallest. The patterns 57d, 57e, and 57f are also formed adjacent to each other via two non-electrode pattern regions 59C and 59D that extend narrowly in the width direction. Here, the pattern 57e located in the middle is drawn to the green end portion 54b on the side corresponding to the side surface 50b of the stacked body 50, and the patterns 57d and 57f on both sides correspond to the side surface 50a of the stacked body 50. The green end portion 54a is pulled out and connected to the corresponding external electrodes 60A, 60C, 60E.

なお、複合層５２Ａの非電極パターン領域５９Ａ，５９Ｂはいずれも、複合層５２Ｂの内部電極５６Ｂの形成領域に形成されており、且つ、複合層５２Ｂの非電極パターン領域５９Ｃ，５９Ｄは、複合層５２Ａの内部電極５６Ａの形成領域に形成されているため、図９（ｃ）に示すとおり、内部電極５６Ａの中間のパターン５７ｂの一部と内部電極５６Ｂの最も面積の大きいパターン５７ｄの一部とが互いに重なり合って重畳領域Ａ２が形成されており、内部電極５６Ａのパターン５７ｃの一部と内部電極５６Ｂの中間のパターン５７ｅの一部とが互いに重なり合って重畳領域Ａ３が形成されている。   The non-electrode pattern regions 59A and 59B of the composite layer 52A are both formed in the formation region of the internal electrode 56B of the composite layer 52B, and the non-electrode pattern regions 59C and 59D of the composite layer 52B are composite layers. As shown in FIG. 9C, a part of the intermediate pattern 57b of the internal electrode 56A and a part of the pattern 57d having the largest area of the internal electrode 56B are formed. Are overlapped with each other to form an overlapping region A2, and a part of the pattern 57c of the internal electrode 56A and a part of the intermediate pattern 57e of the internal electrode 56B are overlapped with each other to form an overlapping region A3.

図６に戻って、外部電極６０Ａ〜６０Ｆは積層体５０の対向する側面５０ａ，５０ｂに３つずつ形成されており、各外部電極６０Ａ〜６０Ｆは積層体５０の積層方向に延びている。そして、外部電極６０Ａ〜６０Ｆに電圧を印加する際には、上下方向において対面する、パターン５７ａとパターン５７ｄ、パターン５７ｂとパターン５７ｅ及びパターン５７ｃとパターン５７ｆの間に電荷がたまるように、側面５０ａ側の外部電極６０Ａ〜６０Ｃが同極性（例えば、−極）となり、側面５０ｂ側の外部電極６０Ｄ〜６０Ｆが逆の同極性（例えば、＋極）となるようにする。   Returning to FIG. 6, three external electrodes 60 </ b> A to 60 </ b> F are formed on opposite side surfaces 50 a and 50 b of the stacked body 50, and each external electrode 60 </ b> A to 60 </ b> F extends in the stacking direction of the stacked body 50. When a voltage is applied to the external electrodes 60A to 60F, the side surface 50a so that charges are accumulated between the pattern 57a and the pattern 57d, the pattern 57b and the pattern 57e, and the pattern 57c and the pattern 57f facing each other in the vertical direction. The external electrodes 60A to 60C on the side have the same polarity (for example, negative polarity), and the external electrodes 60D to 60F on the side surface 50b side have the same polarity (for example, positive polarity).

すると、図８の断面図に示すように、上下に重なり合う内部電極５６Ａと内部電極５６Ｂのうち、パターン５７ｂとパターン５７ｄとが重なった重畳領域Ａ２に相当する部分では、パターン５７ｂとパターン５７ｄとが同極性（例えば、−極）となるために電荷はたまらず、この部分は静電容量に寄与しない。同様に、上下に重なり合う内部電極５６Ａと内部電極５６Ｂのうち、パターン５７ｃとパターン５７ｅとが重なった重畳領域Ａ３に相当する部分では、パターン５７ｃとパターン５７ｅとが同極性（例えば、＋極）となるために電荷はたまらず、この部分も静電容量に寄与しない。すなわち、この場合、−極が本発明における第１の極性、＋極が本発明における第２の極性であり、パターン５７ｂ，５７ｄ，５７ｆが本発明における第１の内部電極、パターン５７ａ，５７ｃ，５７ｅが本発明における第２の内部電極となる。若しくは、＋極が本発明における第１の極性、−極が本発明における第２の極性であり、パターン５７ａ，５７ｃ，５７ｅが本発明における第１の内部電極、パターン５７ｂ，５７ｄ，５７ｆが本発明における第２の内部電極としてもよい。   Then, as shown in the sectional view of FIG. 8, in the internal electrode 56A and the internal electrode 56B that overlap vertically, in the portion corresponding to the overlapping region A2 where the pattern 57b and the pattern 57d overlap, the pattern 57b and the pattern 57d Since it has the same polarity (for example, negative polarity), the electric charge is not accumulated, and this portion does not contribute to the capacitance. Similarly, the pattern 57c and the pattern 57e have the same polarity (for example, + pole) in the portion corresponding to the overlapping region A3 where the pattern 57c and the pattern 57e overlap among the internal electrodes 56A and 56B that overlap vertically. Therefore, the electric charge is not accumulated, and this portion does not contribute to the capacitance. That is, in this case, the negative pole is the first polarity in the present invention, the positive pole is the second polarity in the present invention, and the patterns 57b, 57d, and 57f are the first internal electrodes in the present invention, the patterns 57a, 57c, 57e is the second internal electrode in the present invention. Alternatively, the positive pole is the first polarity in the present invention, the negative pole is the second polarity in the present invention, the patterns 57a, 57c, and 57e are the first internal electrodes in the present invention, and the patterns 57b, 57d, and 57f are the main polarities. It is good also as a 2nd internal electrode in invention.

また、この図８の断面図から明らかなように、積層体５０における内部電極５６Ａ，５６Ｂも、第１実施形態に係る内部電極２６Ａ，２６Ｂ同様、面方向（図における左右方向）において外縁部以外は隈無く存在している。すなわち、積層体５０においては、静電容量に寄与しない部分が形成されるようにしてパターン５７ｂ，５７ｄやパターン５７ｃ，５７ｅ（第１の内部電極）を拡張させ、面方向において内部電極５６Ａ，５６Ｂがない部分がなくなるようにしている。それにより、内部電極がない部分が存在する従来の積層体に比べて、積層体５０は、面方向における厚み差が有意に抑制されている。   Further, as is apparent from the cross-sectional view of FIG. 8, the internal electrodes 56A and 56B in the multilayer body 50 are also other than the outer edge portions in the surface direction (left and right direction in the drawing), like the internal electrodes 26A and 26B according to the first embodiment. Exist without hesitation. That is, in the stacked body 50, the patterns 57b and 57d and the patterns 57c and 57e (first internal electrodes) are expanded so that portions that do not contribute to the capacitance are formed, and the internal electrodes 56A and 56B in the surface direction. The part where there is no is gone. Thereby, compared with the conventional laminated body in which the part which does not have an internal electrode exists, as for the laminated body 50, the thickness difference in a surface direction is suppressed significantly.

従って、上述した積層コンデンサアレイ４０においては、第１実施形態に係る積層コンデンサアレイ１０同様、静電容量を保持したまま、内部電極がない部分の縮小が実現されており、積層体５０の厚み差に起因するクラックによる品質低下が有意に抑制されることにより品質向上が実現されている。   Therefore, in the multilayer capacitor array 40 described above, as in the multilayer capacitor array 10 according to the first embodiment, the reduction of the portion without the internal electrode is realized while maintaining the capacitance, and the thickness difference of the multilayer body 50 is realized. The quality improvement is realized by significantly suppressing the deterioration of the quality due to the cracks caused by.

なお、内部電極５６Ａ，５６Ｂのパターン５７ａ〜５７ｆの電極引き出し方向は、積層体５０の対向する側面５０ａ，５０ｂに引き出す態様であれば、上述したものに限らず、例えば図１０に示すような態様であってもよい。すなわち、内部電極５６Ａの３つのパターン５７ａ〜５７ｃをいずれも側面５０ｂ側のグリーン端部５４ｂまで引き出し、内部電極２６Ｂの３つのパターン５７ｄ〜５７ｆをいずれも側面５０ａ側のグリーン端部５４ａまで引き出すようにしてもよい。   Note that the electrode drawing directions of the patterns 57a to 57f of the internal electrodes 56A and 56B are not limited to those described above as long as they are drawn to the opposite side surfaces 50a and 50b of the multilayer body 50. For example, a mode as shown in FIG. It may be. That is, the three patterns 57a to 57c of the internal electrode 56A are all drawn to the green end 54b on the side surface 50b, and the three patterns 57d to 57f of the internal electrode 26B are all drawn to the green end 54a on the side 50a. It may be.

本発明は上記実施形態に限定されるものではなく、様々な変形が可能である。例えば、積層コンデンサアレイの端子数や積層数は、必要に応じて増減させてもよい。   The present invention is not limited to the above embodiment, and various modifications are possible. For example, the number of terminals and the number of layers of the multilayer capacitor array may be increased or decreased as necessary.

本発明の第１実施形態に係る積層コンデンサアレイを示した概略斜視図である。1 is a schematic perspective view showing a multilayer capacitor array according to a first embodiment of the present invention. 図１に示した積層コンデンサアレイの分解図である。FIG. 2 is an exploded view of the multilayer capacitor array shown in FIG. 1. 図１に示した積層コンデンサアレイのＩＩＩ−ＩＩＩ線断面図である。FIG. 3 is a cross-sectional view of the multilayer capacitor array shown in FIG. 1 taken along the line III-III. （ａ）及び（ｂ）は２種類の複合層の内部電極を示した図であり、（ｃ）はそれらの複合層を重ね合わせた状態を示した図である(A) And (b) is the figure which showed the internal electrode of two types of composite layers, (c) is the figure which showed the state which accumulated those composite layers. 図１とは異なる態様の積層コンデンサアレイを示した分解図である。FIG. 2 is an exploded view showing a multilayer capacitor array having a mode different from that of FIG. 1. 本発明の第２実施形態に係る積層コンデンサアレイを示した概略斜視図である。It is the schematic perspective view which showed the multilayer capacitor array which concerns on 2nd Embodiment of this invention. 図６に示した積層コンデンサアレイの分解図である。FIG. 7 is an exploded view of the multilayer capacitor array shown in FIG. 6. 図６に示した積層コンデンサアレイのＶＩＩＩ−ＶＩＩＩ線断面図である。FIG. 7 is a cross-sectional view of the multilayer capacitor array shown in FIG. 6 taken along line VIII-VIII. （ａ）及び（ｂ）は２種類の複合層の内部電極を示した図であり、（ｃ）はそれらの複合層を重ね合わせた状態を示した図である(A) And (b) is the figure which showed the internal electrode of two types of composite layers, (c) is the figure which showed the state which accumulated those composite layers. 図６とは異なる態様の積層コンデンサアレイを示した分解図である。FIG. 7 is an exploded view showing a multilayer capacitor array having a mode different from that of FIG. 6.

符号の説明Explanation of symbols

１０，４０…積層コンデンサアレイ、２０，５０…積層体、２０ａ，２０ｂ，５０ａ，５０ｂ…側面、２４，５４…誘電体層、２６Ａ，２６Ｂ，５６Ａ，５６Ｂ…内部電極、２７ａ〜２７ｄ，５７ａ〜５７ｆ…パターン、３０Ａ〜３０Ｄ，６０Ａ〜６０Ｆ…外部電極、Ａ１〜Ａ３…重畳領域。   DESCRIPTION OF SYMBOLS 10,40 ... Multilayer capacitor array, 20, 50 ... Multilayer body, 20a, 20b, 50a, 50b ... Side surface, 24, 54 ... Dielectric layer, 26A, 26B, 56A, 56B ... Internal electrode, 27a-27d, 57a- 57f ... pattern, 30A-30D, 60A-60F ... external electrode, A1-A3 ... overlapping region.

Claims (1)

複数の誘電体層が積層された積層体中に、複数段に亘って内部電極が形成された積層コンデンサアレイであって、
同一段の前記内部電極は、第１の極性に接続される第１の内部電極と、第２の極性に接続される第２の内部電極を含む複数の面積の異なる内部電極によって構成され、且つ、前記第１及び第２の内部電極それぞれは前記積層体の対向する一対の側面のうちのいずれかに引き出されており、
上下に隣り合って位置する前記第１の内部電極は、その一部が互いに重なり合っている、積層コンデンサアレイ。 A multilayer capacitor array in which internal electrodes are formed over a plurality of stages in a multilayer body in which a plurality of dielectric layers are laminated,
The internal electrodes of the same stage are constituted by a plurality of internal electrodes having different areas including a first internal electrode connected to the first polarity and a second internal electrode connected to the second polarity, and Each of the first and second internal electrodes is led out to one of a pair of opposing side surfaces of the laminate,
The multilayer capacitor array, wherein the first internal electrodes located adjacent to each other in the vertical direction overlap each other.
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