JP2008042039A - Semiconductor device - Google Patents
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- JP2008042039A JP2008042039A JP2006216324A JP2006216324A JP2008042039A JP 2008042039 A JP2008042039 A JP 2008042039A JP 2006216324 A JP2006216324 A JP 2006216324A JP 2006216324 A JP2006216324 A JP 2006216324A JP 2008042039 A JP2008042039 A JP 2008042039A
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Abstract
Description
本発明は、パワー半導体モジュール,スイッチングICなどを対象とする半導体装置に関する。 The present invention relates to a semiconductor device intended for a power semiconductor module, a switching IC and the like.
昨今ではパワー半導体モジュールの小型,大容量化が進み、これに伴いパワー半導体モジュールに搭載するパワー半導体チップ(例えば、IGBT(Insulated Gate Bipolar Transistor))は高い電流密度で通電使用されることから、その放熱対策が重要課題となっている。
すなわち、IGBTなどのパワー半導体デバイスでは、半導体チップの接合部温度Tjに上限保証温度が規定されているのに対して、放熱用ベース(銅ベース板)に絶縁基板を介して半導体チップをマウントした片面冷却方式では、半導体チップの上面側がパッケージ内に充填した封止樹脂で封止されているのでチップ上面側からの放熱は殆ど期待できない。このために半導体チップの小型,大電流化に伴い発熱密度が増大すると、半導体チップの上面電極に接続する配線リードとしてアルミワイヤをボンディングした在来の配線構造では、チップの接合部温度を上限保証温度以下に抑えることが困難となるほか、アルミワイヤのジュール発熱も加わってワイヤ溶断のおそれもあってパワーサイクル耐量の低下が懸念される。
In recent years, power semiconductor modules have been reduced in size and capacity, and power semiconductor chips (for example, IGBTs (Insulated Gate Bipolar Transistors)) mounted on power semiconductor modules are used with high current density. Heat dissipation measures are an important issue.
That is, in a power semiconductor device such as an IGBT, the upper limit guaranteed temperature is prescribed for the junction temperature Tj of the semiconductor chip, whereas the semiconductor chip is mounted on the heat dissipation base (copper base plate) via the insulating substrate. In the single-sided cooling method, since the upper surface side of the semiconductor chip is sealed with a sealing resin filled in the package, almost no heat dissipation from the chip upper surface side can be expected. For this reason, when the heat generation density increases as the semiconductor chip becomes smaller and the current increases, the upper limit of the chip junction temperature is guaranteed in the conventional wiring structure in which an aluminum wire is bonded as the wiring lead connected to the upper electrode of the semiconductor chip. In addition to being difficult to keep below the temperature, there is a concern that the power cycle resistance may be reduced due to the possibility of wire fusing due to the Joule heat generation of the aluminum wire.
一方、半導体チップの上面からの放熱性を高めるための手段として、前記のアルミワイヤに代えてストラップ状の金属箔,あるいはリードフレームを半導体チップの上面主電極にろう付け(通常ははんだ付け)し、この金属箔,リードフレームを伝熱経路として半導体チップの発生熱をチップ上面側から絶縁基板に放熱させるようにしたモジュール構造が知られている(例えば、特許文献1参照)。 On the other hand, as a means for improving the heat radiation from the upper surface of the semiconductor chip, a strap-like metal foil or lead frame is brazed (usually soldered) to the upper main electrode of the semiconductor chip instead of the aluminum wire. A module structure is known in which heat generated by a semiconductor chip is radiated from an upper surface side of a chip to an insulating substrate using the metal foil and the lead frame as a heat transfer path (see, for example, Patent Document 1).
次に、IGBTモジュールを例に、前記特許文献1に開示されているモジュール組立構造を図7に示す。図において、1は放熱用銅ベース、2はセラミックス基板2aの表,裏両面に導体パターン2b,2cを形成して銅ベース1の上に搭載した絶縁基板(例えば、Direct Copper Bonding基板)、3は絶縁基板2の導体パターン2bにマウントした半導体チップ(IGBT)、4は半導体チップ3の上面電極(エミッタ電極)と絶縁基板2の導体パターン2aとの間に跨がって接続した配線リード(両端にブロック状の接合脚部を形成した導体片)、5は外囲樹脂ケース、6は銅ベース1に伝熱結合した放熱フィン付きのヒートシンクであり、銅ベース1/絶縁基板2,絶縁基板2/半導体チップ3,半導体チップ3/配線リード4,配線リード4/絶縁基板2の間がリフロー法により半田接合(ろう付け)されている。なお、半導体チップ3を湿気,塵などから保護するために、外囲樹脂ケース5の内部にはシリコーンゲルなどを充填して封止している。
Next, the module assembly structure disclosed in
上記のように、配線部材にヒートスプレッダの機能を持たせた配線リード4を採用することにより、この配線リード4を伝熱経路として半導体チップ3の発生熱を上面側からも絶縁基板2に効率よく放熱することができる。これにより、半導体チップ表面の温度勾配が小さくなり、温度サイクルなどの外的ストレスを受けて半田接合部に疲労破壊,クラックなどのダメージ発生を抑えて半導体装置の長期信頼性が向上する。
ところで、図7に示した従来構造の半導体装置では、半導体チップに接続する配線部材として異形の導体片で作られた配線リード4を採用しているが、このような異形形状の配線リード部品を製作するには量産加工性の面でコスト高となる。
かかる点、半導体チップ3の上面と絶縁基板2のとの間に跨がって接続するする配線部材を、ヒートスプレッダの機能を持たせて半導体チップ2の上面主電極面に接合した板状の電極板と、該電極板と絶縁基板との間に接続する箔状導体片(リードフレーム)との2部品に分けて製作すれば前記した異形の単体部品と比べて部品製造コストの大幅な低減が可能である。
Incidentally, in the semiconductor device having the conventional structure shown in FIG. 7, the wiring lead 4 made of a deformed conductor piece is employed as a wiring member connected to the semiconductor chip. Manufacturing is expensive in terms of mass production processability.
In this respect, a plate-like electrode in which a wiring member connected across the upper surface of the
しかしながら、前記のように配線部材を2部品に分けた上で、リフロー法により各部品を一括してろう付けする場合には、その接合工程で配線部品間にずれが生じないように位置決め確保を要するほか、リフロー法ではモジュールの仮組立体を高温雰囲気炉に搬入して接合を行うことから、配線部材の熱変形に起因する残留歪みがろう付け接合部に生じ、特に半導体チップとの間の接合面に残留歪みが集中すると半導体装置の信頼性が低下するといった問題がある。 However, when the wiring member is divided into two parts as described above and each part is brazed together by the reflow method, it is necessary to ensure positioning so that no deviation occurs between the wiring parts in the joining process. In addition, in the reflow method, the module temporary assembly is carried into a high-temperature atmosphere furnace to perform bonding, so that residual strain due to thermal deformation of the wiring member occurs in the brazed joint, particularly between the semiconductor chip and When residual strain concentrates on the joint surface, there is a problem that the reliability of the semiconductor device is lowered.
本発明は上記の点に鑑みなされたものであり、前記のように配線部材を二つの部品に分けて半導体チップと絶縁基板の間に接合する際に、配線部材の接合部に集中する残留歪みを低減して高い信頼性が確保できるように配線,接合構造を改良し、併せてその配線構造を有効に生かして放熱性の高いモジュールを構築した半導体装置を提供することを目的とする。 The present invention has been made in view of the above points. As described above, when the wiring member is divided into two parts and bonded between the semiconductor chip and the insulating substrate, the residual strain concentrated on the bonding portion of the wiring member. It is an object of the present invention to provide a semiconductor device in which a wiring and a junction structure are improved so that high reliability can be ensured and a module with high heat dissipation is constructed by effectively utilizing the wiring structure.
上記目的を達成するために、本発明によれば、半導体チップの主面にヒートスプレッダとして機能する電極板をろう付けした上で、該電極板に配線部材としてのリードフレームを接合した半導体装置において、
第1の発明では、半導体チップの主面にろう付けした電極板の周縁一部をチップとの接合面域から側方に延在させ、該延長部に前記リードフレームの接合端部を重ね合わせて融接接合し(請求項1)、具体的には次記のような態様で構成する。
(1)前記電極板の周縁から側方に張り出した延長部を複数の条片に分岐し、各分岐条片ごとにリードフレームの接合端部との間をスポット融接する(請求項2)。
(2)前記した電極板の延長部に、リードフレームとの重ね合わせ位置を決める位置決め段部を形成する(請求項3)。
In order to achieve the above object, according to the present invention, in a semiconductor device in which an electrode plate functioning as a heat spreader is brazed to the main surface of a semiconductor chip, and then a lead frame as a wiring member is joined to the electrode plate.
In the first invention, a part of the periphery of the electrode plate brazed to the main surface of the semiconductor chip is extended laterally from the bonding surface area with the chip, and the bonding end portion of the lead frame is overlaid on the extension portion. (1), specifically, in the following manner.
(1) An extended portion projecting laterally from the periphery of the electrode plate is branched into a plurality of strips, and spot fusion is performed between each branch strip and a joining end portion of a lead frame.
(2) A positioning step portion for determining an overlapping position with the lead frame is formed on the extension portion of the electrode plate.
また、本発明の第2の発明では、半導体チップの主面にヒートスプレッダとして機能する電極板をろう付けした上で、該電極板に配線部材としてのリードフレームを接合した半導体装置において、
前記電極板の端面を露出して半導体チップおよびリードフレームの周域を樹脂封止し、かつリードフレームの一端を封止樹脂から外方に引出してモジュールの単位ユニットを構成した上で、該単位ユニットに対し、電極板端面に絶縁層を介して冷却体を伝熱的に組み付ける(請求項4)。
In the second invention of the present invention, in the semiconductor device in which an electrode plate functioning as a heat spreader is brazed to the main surface of the semiconductor chip, and then a lead frame as a wiring member is joined to the electrode plate.
A unit unit of the module is formed by exposing the end face of the electrode plate to resin-enclose the periphery of the semiconductor chip and the lead frame, and pulling out one end of the lead frame from the sealing resin to the outside. A cooling body is assembled to the unit in a heat transfer manner via an insulating layer on the end face of the electrode plate.
また、前記した単位ユニットの複数基を並置し、かつ各単位ユニットに共用の冷却体を組合せた上で、単位ユニットから引出したリードフレームを相互接続して所定回路のモジュールを構築する(請求項5)。
ここで、前記の冷却体は、冷媒を流す液冷式、ないし放熱フィンを備えた風冷式の冷却体で構成する(請求項6)。
Further, a plurality of the unit units described above are juxtaposed, and a common cooling body is combined with each unit unit, and then a lead frame drawn out from the unit unit is interconnected to construct a module of a predetermined circuit. 5).
Here, the cooling body is constituted by a liquid cooling type in which a refrigerant flows or an air cooling type cooling body provided with heat radiation fins (Claim 6).
上記した第1の発明による配線構造では、電極板とリードフレームとの間が融接されてない非接合の状態で半導体チップの主面に電極板をリフロー法でろう接し、その後に電極板の延長部とリードフレームとの間が室温状態で局所加熱により融接される。したがって、半導体チップの主面に電極板を接合するろう接工程では、電極板はリードフレームに拘束されることなしに自由に熱変形できるので半導体チップとの接合部に残留歪みが集中するのを低減できる。また、電極板の延長部とリードフレームとの間の融接は、室温での局所加熱により行うのでろう接合(リフロー法)のように電極板が大きな熱変形の影響を受けることがなく、これにより接合部への残留歪みの集中を低く抑えることができて配線の信頼性が向上する。 In the wiring structure according to the first invention described above, the electrode plate is brazed to the main surface of the semiconductor chip by the reflow method in a non-bonded state where the electrode plate and the lead frame are not fused, and then the electrode plate The extension portion and the lead frame are fused together by local heating at room temperature. Therefore, in the brazing process of joining the electrode plate to the main surface of the semiconductor chip, the electrode plate can be freely thermally deformed without being constrained by the lead frame, so that residual strain concentrates on the joint portion with the semiconductor chip. Can be reduced. In addition, fusion welding between the extension of the electrode plate and the lead frame is performed by local heating at room temperature, so that the electrode plate is not affected by large thermal deformation as in brazing (reflow method). As a result, the concentration of residual strain at the junction can be kept low, and the reliability of the wiring is improved.
この場合に、電極板の周縁から側方に張り出す延長部を複数の条片に分けて分岐形成することにより、個々に分岐して延在する条片の断面積が小さく、その伝熱抵抗が大きくなるので、リードフレームとのスポット融接地点から分岐条片を経て半導体チップとの接合部(ろう付け)に加わる伝熱量が低く抑えられ、これにより接合済みのろう付け部が再溶融するなどして劣化するおそれもない。 In this case, by dividing the extension part that protrudes laterally from the periphery of the electrode plate into a plurality of strips, the cross-sectional area of the strips that branch and extend individually is small, and the heat transfer resistance Therefore, the amount of heat transfer applied to the joint part (brazing) with the semiconductor chip through the branch strip from the spot fusion ground point with the lead frame is kept low, thereby remelting the joined brazed part. There is no risk of deterioration.
また、あらかじめ電極板の分岐条片に位置決め段部を形成しておくことで、リードフレームを所定の位置に重ね合わせて歩留よく融接を行うことができる。
一方、第2の発明によるモジュール組立構造によれば、前記の配線構造を生かして単位ユニットの封止樹脂から外方に露出させた電極板の端面に冷却体を組み付けるようにしたことにより、放熱性を大幅に向上できる。また、複数基のモジュール単位ユニットを並置して共用の冷却体と組合せた上で、各ユニットから引出したリードフレームを相互接続して所定の回路を構成することで、放熱性に優れた半導体モジュールをコンパクトに構築できる。
Further, by forming the positioning step portion on the branch strip of the electrode plate in advance, the lead frame can be superposed at a predetermined position and fusion welding can be performed with a high yield.
On the other hand, according to the module assembly structure of the second invention, the cooling body is assembled to the end face of the electrode plate exposed to the outside from the sealing resin of the unit unit by making use of the wiring structure described above. Can greatly improve performance. In addition, a plurality of module unit units are juxtaposed and combined with a common cooling body, and then a lead frame drawn from each unit is interconnected to form a predetermined circuit, thereby providing a semiconductor module with excellent heat dissipation Can be built compactly.
以下、本発明の実施の形態を図1〜図6に示す実施例に基づいて説明する。なお、実施例の図中で図7に対応する部材には同じ符号を付してその説明は省略する。 Hereinafter, embodiments of the present invention will be described based on examples shown in FIGS. In addition, in the figure of an Example, the same code | symbol is attached | subjected to the member corresponding to FIG. 7, and the description is abbreviate | omitted.
図1は本発明の請求項1に係わる実施例の組立構造図で、絶縁基板2の導体パターンにマウントした半導体チップ3の上面電極(エミッタ)3aに接続する配線部材がCu,もしくはCu合金で作られた電極板7とリードフレーム8との2部品に分けて半導体チップ3と絶縁基板2の導体パターンとの間を配線されている。
ここで、電極板7はヒートスプレッダの機能を持たせて半導体チップ3の上面電極3aに重ねてろう接合(例えば半田付け)し、その接合面域から左右側方に張り出した延長部をリードフレーム8に接合端部に重ね合わせてレーザ溶接法,電子ビーム溶接法などにより局所加熱して融接接合しており、9はろう接合部(半田接合部)、10はスポット融接部を表している。
FIG. 1 is an assembly structure diagram of an embodiment according to
Here, the
ここで、図示構造のモジュール組立工程では部品間の接合を次記のように二段階に分け行う。すなわち、金属ベース1の上に絶縁基板2,半導体チップ3,電極板7およびリードフレーム8を搭載して図示のような位置に仮組立した状態でリフロー炉(雰囲気加熱炉)に搬入し、電極板7/リードフレーム8間の接合部を除いて金属ベース1/絶縁基板2,絶縁基板2/半導体チップ3,半導体チップ/電極板7,絶縁基板2/リードフレーム8の間をろう付け(リフロー半田付け)する。その後に、リフロー炉から取り出しモジュール組立体を次の融接工程に移し、室温状態で電極板7とリードフレーム8との重ね合わせ部にレーザビーム,電子ビームなどを照射し、局所的に高温加熱して融接接合する。
Here, in the module assembling process of the illustrated structure, the parts are joined in two stages as described below. That is, the
このように、配線部品間の接合をろう接とスポット融接とに分けてモジュールを組立てることにより、リフロー工程での配線部材の熱変形による接合部への残留歪みの集中化を低減し、また電極板/リードフレーム間のスポット融接に伴うろう接合部の再溶融を回避して配線構造の信頼性を向上できる。 In this way, by assembling the module by dividing the joining between wiring components into brazing and spot fusion, the concentration of residual strain at the joint due to thermal deformation of the wiring member in the reflow process is reduced, and The reliability of the wiring structure can be improved by avoiding remelting of the brazed joint due to spot fusion between the electrode plate / lead frame.
次に、本発明の請求項2,3に対応する実施例を図2(a),(b)で説明する。この実施例では、半導体チップ3の上面電極3aにろう接合した電極板7の周縁から左右側方に張り出した延長部を複数条に枝分かれした分岐条片7aで形成し、かつ各分岐条片7aごとにリードフレーム8との重ね合わせ位置を規定する突起状の位置決め段部7bが形成されている。
Next, an embodiment corresponding to
一方、リードフレーム8は電極板7との接合部分が額縁状をなしており、この額縁状の接合部分を前記した電極板7の位置決め段部7bに嵌め合わせて位置決め保持させる。そして、電極板7/リードフレーム8間をスポット融接する工程では、前記の各分岐条片ごとにリードフレーム8との重ね合わせ部をレーザ溶接法などによりスポット融接する。
このように電極板7の延長部を複数条に分けて分岐条片7aを形成しておくことにより、各分岐条片7bの断面積が小さくなってスポット融接部10から半導体チップとの間のろう接合部9に至る伝熱経路の熱抵抗が増加する。これにより、スポット融接地点の局所加熱によって半導体チップ3とのろう接合部9が高温になって再溶融するのを防ぐことができる。また、電極板7の延長部に前記の位置決め段部7bを形成しておくことにより、組立工程で電極板7とリードフレーム8の配線部品を所定位置に位置決めすることができる。
On the other hand, the
Thus, by dividing the extended portion of the
次に、前記の配線構造を巧みに生かして構築した本発明の請求項4〜6によるモジュール組立構造を図3〜図6で説明する。
まず、半導体装置のモジュールを構築する単位ユニットの構造を図3に示す。すなわち、半導体チップ(IGBT)3の両主面(エミッタ,コレクタ)にそれぞれ電極板7を接合(ろう付け)し、さらにこの電極板7の延長部に外部導出端子となるリードフレーム8を接合(スポット融接)した上で、電極板7の端面を外方に露出させるようにして半導体チップ3,電極板7,リードフレーム8の周域を封止樹脂11で封止し、さらに封止樹脂11の凹部底面に露出している電極板7の端面に絶縁シート12を被着して単位ユニット13を構成する。また、リードフレーム8の一端は封止樹脂11から側方に引出しておき、封止樹脂11の四隅コーナー部には後記の冷却体を組み付ける際に用いる締結ボルトのボルト通し穴11aを開口しておく。
Next, a module assembly structure according to claims 4 to 6 of the present invention constructed by skillfully utilizing the wiring structure will be described with reference to FIGS.
First, the structure of a unit unit for constructing a module of a semiconductor device is shown in FIG. That is, the
なお、前記の絶縁シート12は、後記のようにユニットに冷却体を組み付けた状態で電極板7と冷却体との間を電気的に絶縁しつつ半導体チップ3の発生熱を冷却体に伝熱させるためのもので、熱伝導性の高いエンジニアリングプラスチック,無機フィラー含有のプラスチック材,セラミック材などを選択して使用できる。
そして、前記の単位ユニット13に対し、図4で示すようにユニット13を挟んで上下に冷却体14を組み付け、さらに伝熱体15をユニット13の凹部に嵌入してその底面に露呈している電極板7の端面に絶縁シート12を介して重ね合わせた上で、ボルト16により締結して一体に組み立てる。なお、図示の冷却体14は冷媒通路14aを形成した液冷式の冷却体である。
The insulating
Then, as shown in FIG. 4, the cooling
上記の構成により、半導体チップ3の発熱は電極板7,絶縁シート12,伝熱体15を経て冷却体14に伝熱し、冷却通路14aに通流する冷媒と熱交換して系外に効率よく除熱される。
次に、複数基の単位ユニット13に冷却体14を組合せて構築したモジュールの構成例を図5,図6に示す。ここで、図5の構成では複数基の単位ユニット13を同一面上に並置し、かつこれらユニットを挟んで上下に共有の液冷式冷却体14を組み付けた上で、各単位ユニット13から側方に引き出したリードフレームの相互間を接続して所定の半導体回路(例えば3相インバータ回路)を形成している。
With the above configuration, the heat generated in the
Next, FIG. 5 and FIG. 6 show a configuration example of a module constructed by combining the cooling
一方、図6の構成では、方形状ブロックになる液冷式冷却体17の周囲を囲んで4枚の液冷式冷却体14を図示のように組み合わせて配置し、冷却体14と17との間に図3に示した単位ユニット13の複数基を並置した上で、図5で述べたと同様に各単位ユニット13の間を相互接続して所定の半導体回路を形成する。さらに、冷却体14の外周面には放熱フィン14bを付設しておき、この組立体に風胴18,および風胴19に冷却風を送り込む冷却ファン(不図示)を組み合わせて半導体装置のモジュールを構築している。
On the other hand, in the configuration of FIG. 6, four liquid-cooled
図5,図6の構成により、複数基の単位ユニット13を組合せて放熱性に優れた半導体モジュールをコンパクトに構築できる。
5 and 6, a plurality of
2 絶縁基板
3 半導体チップ
7 電極板
7a 分岐条片
7b 位置決め段部
8 リードフレーム
9 ろう接合部
10 スポット融接部
11 封止樹脂
12 絶縁シート
13 モジュール単位ユニット
14,17 冷却体
14a 冷媒通路
14b 放熱フィン
2 Insulating
Claims (6)
半導体チップの主面にろう付けした電極板の周縁一部をチップとの接合面域から側方に延在させ、該延長部に前記リードフレームの接合端部を重ね合わせて融接接合したことを特徴とする半導体装置。 In a semiconductor device in which a lead frame as a wiring member is joined to the electrode plate after brazing an electrode plate functioning as a heat spreader to the main surface of the semiconductor chip,
A part of the periphery of the electrode plate brazed to the main surface of the semiconductor chip is extended laterally from the bonding surface area with the chip, and the bonding end portion of the lead frame is overlapped with the extension portion and fusion bonded. A semiconductor device characterized by the above.
前記電極板の端面を露出して半導体チップおよびリードフレームの周域を樹脂封止し、かつリードフレームの一端を封止樹脂から外方に引出してモジュールの単位ユニットを構成した上で、該単位ユニットの電極板端面に絶縁層を介して冷却体を伝熱的に組み付けたことを特徴とする半導体装置。 In a semiconductor device in which a lead frame as a wiring member is joined to the electrode plate after brazing an electrode plate functioning as a heat spreader to the main surface of the semiconductor chip,
A unit unit of the module is formed by exposing the end face of the electrode plate to resin-enclose the periphery of the semiconductor chip and the lead frame, and pulling out one end of the lead frame from the sealing resin to the outside. A semiconductor device, wherein a cooling body is assembled in a heat transfer manner to an end face of an electrode plate of a unit via an insulating layer.
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WO2024042784A1 (en) * | 2022-08-23 | 2024-02-29 | Towa株式会社 | Method for producing semiconductor component and apparatus for producing semiconductor component |
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