JP2008034506A - Substrate for integrated circuit package and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To arrange preliminary solder different in kind on each mounting line on a substrate for an integrated circuit package, and to provide a method for preventing the increase of a manufacturing cost due to the arrangement. <P>SOLUTION: The substrate for the integrated circuit package includes in the external layer: a pattern which is common regardless of the kinds of preliminary solder, and where bump joint pads 4 are arrayed; a recognition mark pad 5 for recognizing the mounting region of a semiconductor integrated circuit chip; and sub-recognition mark pads 6 formed in the neighborhood of the recognition mark pad 5. The preliminary solder is arranged in the bump joint pads 4. The substrate for the integrated circuit package is manufactured by arranging the preliminary solder in the sub-recognition mark pads 6 when the first kind of preliminary solder is arranged, and without arranging the preliminary solder in the sub-recognition mark pads 6 when the second kind of preliminary solder is arranged. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  The present invention relates to a substrate substrate for an integrated circuit package in which a plurality of types of preliminary solder for mounting a semiconductor integrated circuit chip on a flip chip is formed, and a manufacturing method thereof.

  Conventionally, as in Patent Document 1 to Patent Document 3, the preliminary solder 2 formed for flip-chip mounting of the semiconductor integrated circuit chip on the substrate board 1 for integrated circuit package is made of a Pb-Sn solder material. Widely used. However, when Pb flows out into the soil, Pb is dissolved by acid rain and may adversely affect the environment. From the viewpoint of environmental problems, it has been required to use a solder material that does not contain Pb as a main component. Therefore, as disclosed in Patent Document 4, for example, a solder material in which Ag (silver) is added to Sn (tin) has begun to be used as a solder material that replaces the Pb—Sn solder material. The melting point of the solder is, for example, It is relatively high at 200 ° C. Sn-Bi solder material is also used, and Sn-57% Bi has a low melting point of 139 ° C. Alternatively, Sn-5% Sb can be used. In addition, a Pb—Sn solder material may still be used. Since these solder materials have different melting points, when using each solder, the heating conditions for mounting the semiconductor integrated circuit chip must be changed according to the melting point of each solder. In this way, various types of solder are used, and different types of spare solder 2 are required for each mounting line. Furthermore, the type of the preliminary solder 2 used by the mounting line varies depending on the number of products to be mounted. Therefore, even if the substrate substrate 1 for the integrated circuit package has the same wiring pattern 3 used for the same electronic device, the type of the preliminary solder 2 is changed according to the characteristics of the mounting line on which the semiconductor integrated circuit chip is mounted. It was necessary to manufacture a substrate board 1 for an integrated circuit package in which different types of preliminary solder 2 were installed for each line.

The known literature is described below.
JP-A-7-201870 JP 2002-134538 A JP 2003-163232 A JP-A-11-330678

  Thus, after manufacturing the integrated circuit package substrate substrate 1 in which different types of preliminary solder 2 are installed for each mounting line, it is determined which type of solder is used for a certain integrated circuit package substrate substrate 1. In some cases, it could not be easily determined by visual observation. Therefore, conventionally, for each type of spare solder 2 to be installed, the integrated circuit package substrate substrate 1 is manufactured with a different product name, and the product name is checked against a comparison table prepared in advance, whereby the installed spare solder 2 is used. Different types of substrate substrates 1 for integrated circuit packages have been discriminated. Therefore, in order to manufacture the substrate board 1 for the integrated circuit package having a different product name, the wiring pattern 3 and the solder resist 10 for forming the substrate pattern 1 for the integrated circuit package are formed for each type of the preliminary solder 2 to be installed. It was necessary to produce a complete original film. For this reason, there is a problem that the manufacturing cost increases for each type of the preliminary solder 2.

In order to solve this problem, the present invention provides a first substrate substrate for an integrated circuit package in which a first type of preliminary solder is disposed on a bump bonding pad for solder bumps of a semiconductor integrated circuit chip, and a second type. In the manufacturing method of the second integrated circuit package substrate substrate in which the preliminary solder is placed on the bump bonding pad, the solder paste is applied to the bump bonding pad and the sub-recognition mark pad of the first integrated circuit package substrate substrate. A first screen mask on which a printing pattern for printing is formed, and a printing pattern in which the solder paste is printed on the bump bonding pad of the second integrated circuit package substrate substrate and not printed on the sub-recognition mark pad A first step of forming a second screen mask formed with an outer layer surface of the printed wiring board A pattern in which the bump bonding pads are arranged in an array; a recognition mark pad; a second step of forming the sub-recognition mark pad in the vicinity of the recognition mark pad; and the first screen mask. The solder paste for the first type of preliminary solder is printed on the printed wiring board, and the second screen mask is used to print the solder paste for the second type of preliminary solder on the printed wiring. A third step of printing on a board; and forming the preliminary solder by heating, melting, cooling and solidifying the solder paste to form the first and second integrated circuit package substrate substrates And determining whether or not the preliminary solder is placed on the sub-recognition mark pad, thereby determining the first integrated circuit package substrate. It is a manufacturing method of the substrate the substrate for an integrated circuit package and having a fifth step of determining that over preparative substrate said second integrated circuit substrate board package.

  The present invention also provides a pattern in which bump bonding pads are arranged in an array on the outer layer, regardless of the type of spare solder, a recognition mark pad in a mounting area of a semiconductor integrated circuit chip, and the recognition mark pad. A sub-recognition mark pad formed near the sub-recognition mark pad when the first-type pre-solder is installed. A substrate substrate for an integrated circuit package, wherein the preliminary solder is installed, and when the second type of preliminary solder is installed, the preliminary solder is not installed on the sub-recognition mark pad.

  The substrate board 1 for an integrated circuit package of the present invention changes the product name of a printed wiring board by creating a common printed wiring board for a plurality of types of preliminary solder 2 even if the number of types of preliminary solder 2 increases. In addition, the manufacturing cost of the printed wiring board is reduced by not manufacturing the original film set for forming the wiring pattern 3 and the solder resist 10 for each product name, and the sub-recognition mark pad of the substrate board 1 for the integrated circuit package Thus, there is an effect that the type of the preliminary solder 2 can be easily discriminated without using the preliminary solder 2 to 6. Further, when the mounting department receives the integrated circuit package substrate 1 of the present invention and mounts the semiconductor integrated circuit chip thereon, the type of the preliminary solder 2 can be easily discriminated, and appropriate mounting conditions without error. There is an effect that the mounting work can be performed.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 is a diagram showing a manufacturing procedure of an integrated circuit package substrate 1 according to the present embodiment, and FIG. 2 is a block diagram of an apparatus for discriminating the type of preliminary solder 2 in a shipping inspection process.

  The semiconductor integrated circuit chip mounted on the substrate 1 for integrated circuit package of the present invention has, for example, an outer shape of 20 mm □ and input / output pads arranged on an area with a pitch of about 0.2 mm, and solder bumps are provided on the input / output pads. The formed semiconductor integrated circuit chip is used. A copper wiring pattern 3 having a thickness of 10 μm to 50 μm is formed on the outer layer of the substrate board 1 for an integrated circuit package of the present invention, and a 0.2 mm pitch matched to a solder bump of a semiconductor integrated circuit chip to be flip-chip mounted thereon. A bump bonding pad 4 is formed, and a recognition mark pad 5 and a first sub-recognition mark pad 6 are formed. A printed wiring board in which the wiring pattern 3 and the recognition mark pad 5 and the first sub-recognition mark pad 6 are formed in a common pattern regardless of the type of spare solder to be installed on the printed wiring board is created. Preliminary solder 2 is placed on the bump bonding pad 4. The first sub-recognition mark pad 6 is provided with the pre-solder 2 in the substrate substrate 1 for the integrated circuit package in which the Sn-Ag-Cu pre-solder 2 of lead-free solder is provided. It is not installed on the substrate board 1 for the integrated circuit package on which the Sn-based preliminary solder 2 is installed. Further, in the integrated circuit package substrate 1 on which the Sn—Bi-based preliminary solder 2 is installed, the preliminary solder 2 is installed on the second sub-recognition mark pad 6 formed in advance. . In this manner, the integrated circuit package substrate board 1 having the first and second sub-recognition mark pads 6 in which the installation patterns are distinguished depending on the type of the preliminary solder 2 is manufactured.

(Method for Manufacturing Substrate Substrate for Integrated Circuit Package with Pre-Solder) FIG. 1 shows a method for manufacturing the substrate substrate 1 for integrated circuit package with pre-solder used in this embodiment.
(Step 1) A metal mask or an organic resin screen mask 8 used for printing the solder paste 7 in the manufacturing process of the integrated circuit package substrate 1 is made to correspond to a plurality of types of preliminary solder 2 and Create and prepare types. Those screen masks 8 are used to manufacture the first integrated circuit package substrate substrate 1 on which the first type of preliminary solder 2 is placed, and to solder paste 7 to the bump bonding pads 4 and the sub-recognition mark pads 6. A first screen mask 8 on which a printing pattern for printing is formed is created. Then, for manufacturing the second integrated circuit package substrate substrate 1 on which the second kind of preliminary solder 2 is installed, the solder paste 7 is printed on the bump bonding pad 4 to the sub-recognition mark pad 6. Creates a second screen mask 8 on which a printing pattern not to be printed is formed.

  (Step 2) A common printed wiring board is created for the plurality of preliminary solders 2 of the first type and the second type. The printed wiring board may be any printed wiring board having a bump bonding pad 4 formed on the surface thereof for flip chip mounting of a semiconductor integrated circuit chip having a 0.2 mm pitch pad with a bare chip. In one embodiment of this printed wiring board, a build-up layer is provided on the front and back of a glass epoxy core substrate, and the general thickness is about 0.5 to 2 mm, for example, 1.6 mm. Further, the outer shape of the printed wiring board of the present embodiment is 10 mm to 200 mm, for example, 100 mm □. As shown in FIG. 3 or 4, a copper wiring pattern 3 for transmitting an electrical signal is formed on the outer layer surface of the printed wiring board, and a pattern in which bump bonding pads 4 are arranged in an array at a pitch of 0.2 mm is formed. A row of chip component bonding pads 11 such as chip capacitors and chip resistors arranged so as to surround the array pattern is formed, and a recognition mark pad 5 is formed in a region surrounded by the chip component bonding pads 11. The auxiliary recognition mark pad 6 is formed in the vicinity of the recognition mark pad. The recognition mark pad 5 is used by the electronic component mounting apparatus to detect the semiconductor integrated circuit chip as a reference position when mounting the semiconductor integrated circuit chip on the substrate board 1 for the integrated circuit package. Next, the solder resist 10 is printed on the wiring pattern 3 of the printed wiring board.

  As described above, by creating a common printed wiring board for a plurality of types of preliminary solder 2, even if the number of types of preliminary solder 2 increases, the printed wiring board product names are changed and wiring patterns 3 and There is an effect that it is not necessary to manufacture a complete original film for forming the solder resist 10.

(Step 3) For the first integrated circuit package substrate 1 on which the first type of preliminary solder 2 is installed, the bump bonding pad of the printed wiring board produced in Step 2 is formed with the first screen mask 8. 4. The first type solder paste 7 is printed to a thickness of 20 to 60 μm on the chip component bonding pad 11 and the sub recognition mark pad 6. For the substrate board 1 for the second integrated circuit package on which the second kind of preliminary solder 2 is installed, the second screen mask 8 is used to form the bump bonding pads 4 of the printed wiring board produced in step 2 and chip components. The second type solder paste 7 is printed on the bonding pad 11 and the solder paste is not printed on the sub-recognition mark pad 6.
(Step 4) Next, the printed wiring board is put into a reflow furnace and heated to melt the solder paste 7, and then the printed wiring board is taken out of the reflow furnace and cooled to solidify the solder, thereby bonding the bumps. The substrate board 1 for an integrated circuit package in which the preliminary solder 2 having a height of 20 to 60 μm is formed on the pad 4 and the chip component bonding pad 11 is obtained.

  (Step 5) In the shipping inspection step, the preliminary solder 2 discriminating device shown in FIG. 2 reads the integrated circuit package substrate substrate 1 installed on the substrate installation table 12 with the substrate substrate recognition camera 13. Next, the image recognition means 14 calculates the read image to determine whether or not the auxiliary solder 2 is installed on the sub-recognition mark pad 6. In the determination process, the substrate board 1 for integrated circuit package in which the preliminary solder 2 is installed on the sub-recognition mark pad 6 is determined as the first type, and the preliminary solder 2 is installed on the sub-recognition mark pad 6. The substrate substrate 1 for an integrated circuit package that does not exist is determined as the second type. As a result, the type of the spare solder 2 can be easily discriminated with or without the spare solder 2 on the sub-recognition mark pad 6. Therefore, there is an effect that it is possible to prevent mixing of different types of solder when the integrated circuit package substrate board 1 is shipped.

  In this way, the present invention uses a substrate substrate 1 for integrated circuit packages having a plurality of types of preliminary solder 2 to be installed on it, by creating a common printed wiring board. Then, in accordance with the type of solder paste 7 to be printed on the bump bonding pad 4 of the printed wiring board, the printing pattern of the solder paste 7 of the screen mask 8 is formed in the vicinity of the recognition mark pad 5. It was made different by changing the presence or absence of printing of the solder paste 7 on the top. Thus, the type of the preliminary solder 2 can be determined by observing the appearance of the preliminary solder on the sub-recognition mark pad 5 of the substrate board 1 for the integrated circuit package. Therefore, when a plurality of types of preliminary solder 2 are installed, it is not necessary to create a printed wiring board having a different product name for each type of the preliminary solder 2, and the wiring pattern 3 and the solder resist 10 are formed by increasing the product name. The increase in the production amount of original film set of was eliminated. Thereby, there is an effect of reducing the manufacturing cost of the substrate board 1 for the integrated circuit package whose type differs depending on the type of the preliminary solder.

  Further, the substrate board 1 for integrated circuit package of the present invention is formed by forming the sub-recognition mark pad 5 in the vicinity of the recognition mark pad 5 at the mounting position of the semiconductor integrated circuit chip on the wiring pattern 7 of the outer layer. The division that receives the substrate board 1 for integrated circuit package and mounts the semiconductor integrated circuit chip thereon observes the vicinity of the recognition mark pad 5 with the substrate board recognition camera 13 so that the preliminary soldering can be easily performed. There is an effect that the two types can be distinguished. The semiconductor integrated circuit chip mounting apparatus observes the recognition mark pad 5 with the substrate substrate recognition camera 13 in order to determine the mounting position of the semiconductor integrated circuit chip on the integrated circuit package substrate substrate 1. At this time, since the sub-recognition mark pad 6 is in the vicinity thereof, it can be observed at the same time. Then, by determining the presence or absence of the spare solder 2 on the sub-recognition mark pad 6, the semiconductor integrated circuit chip mounting apparatus can easily obtain information on the type of the spare solder. Accordingly, the semiconductor integrated circuit chip mounting apparatus can perform mounting work under appropriate mounting conditions without error in accordance with the type of the preliminary solder 2 installed on the substrate board 1 for the integrated circuit package. is there.

  Further, as a method of forming the preliminary solder 2 on the substrate board 1 for the integrated circuit package, in addition to the manufacturing method of forming the preliminary solder 2 by printing the solder paste 7 and melting and solidifying the solder paste 7, the preliminary solder 2 is plated by a solder material. 2 can also be formed. The sub-recognition mark pad 6 can also be formed in a region other than the region for measuring the position of the recognition mark pad 5 in the region of the recognition mark pad 5.

  FIG. 3 is a plan view of a part of the wiring pattern 3 on the outer layer of the printed wiring board forming the substrate board 1 for the integrated circuit package according to the first embodiment. In FIG. 3, a pattern in which bump bonding pads 4 are arranged in an array at a pitch of 0.2 mm on a part of a wiring pattern 3 of copper foil having a thickness of 10 μm, and a chip capacitor arranged so as to surround the array pattern Of the chip component bonding pads 11 for mounting the chip, the recognition mark pad 5 having a size of 0.05 mm to 2 mm in the region surrounded by the chip component bonding pad 11, and the size of 0 in the vicinity thereof. A printed wiring board on which sub-recognition mark pads 6 having a size of 0.05 mm to 2 mm are formed is prepared.

  In parallel with the production of the printed wiring board, a screen mask 8 (referred to as screen mask A) for printing the Sn—Ag—Cu-based solder paste 7 is produced with a metal mask, and the print pattern is shown in FIG. A pattern for printing the solder paste 7 on the bump bonding pad 4, the chip component bonding pad 11, and the sub-recognition mark pad 6 is formed. Further, a screen mask 8 (referred to as a screen mask B) for printing the Pb—Sn solder paste 7 is formed using a metal mask, and the printed pattern is the bump bonding pad 4 and the chip component bonding pad 11 of FIG. The solder paste 7 is printed on the sub-recognition mark pad 6, and a pattern on which the solder paste 7 is not printed is formed.

  Next, the solder paste 7 is printed on the printed wiring board. Here, when printing the Sn-Ag-Cu-based solder paste 7, the solder paste 7 is printed on the sub-recognition mark pad 6 by printing the solder paste 7 on the printed wiring board using the screen mask A. . When printing the solder paste 7 of Pb—Sn eutectic solder, the solder paste 7 is not printed on the sub-recognition mark pad 6 by printing the solder paste 7 on the printed wiring board using the screen mask B. . In this manner, the presence or absence of printing of the solder paste 7 on the sub-recognition mark pad 6 varies depending on the type of the preliminary solder 2.

  Next, the printed wiring board on which the solder paste 7 is printed in this manner is placed in a reflow furnace and heated to melt the solder paste 7. Here, the printed wiring board on which the Sn—Ag—Cu solder paste 7 is printed is heated to about 210 ° C. to melt the solder paste 7. On the other hand, the printed wiring board on which the solder paste 7 of Pb—Sn eutectic solder is printed is heated to a temperature of 183 ° C. or higher, for example, about 200 ° C., which is the melting point of the eutectic solder, thereby melting the solder paste 7. Next, the printed circuit board is taken out of the reflow furnace and cooled to solidify the solder, thereby forming the pre-solder 2 having a height of 20 to 60 μm on the bump bonding pad 4 and the chip component bonding pad 11. A substrate substrate for package 1 is obtained.

  Next, the preliminary solder 2 discriminating device shown in FIG. 2 uses the substrate substrate recognition camera 13 to observe the recognition mark pad 5 of the integrated circuit package substrate substrate 1 shown in FIG. The sub-recognition mark pad 6 is observed. In the printed wiring board on which the Sn-Ag-Cu solder paste 7 is printed, the solder paste 7 printed on the sub-recognition mark pad 6 forms the preliminary solder 2 having a curved surface. The image of the sub-recognition mark pad 6 is darkened by being bent. By raising the threshold level for reading the image signal of the substrate substrate recognition camera 13, it is determined that there is no image of the sub recognition mark pad 6. Since the printed wiring board on which the solder paste 7 of Pb—Sn eutectic solder is printed does not have the preliminary solder 2 on the sub-recognition mark pad 6, the image of the sub-recognition mark pad 6 is clearly observed. The image of the pad 6 is recognized. In any solder type, the image of the recognition mark pad 5 is recognized. In this way, the image recognition unit 14 compares the pattern of the presence / absence of the image pattern of the sub-recognition mark pad 6 adjacent to the recognition mark pad 5 with the comparison image pattern stored in advance, and matches the pattern. The type data of the spare solder 2 stored in correspondence with the comparison image pattern is read, and the type of the spare solder 2 is determined.

  FIG. 4 is a plan view of a part of the wiring pattern 3 on the outer layer of the substrate board 1 for an integrated circuit package according to the second embodiment. In FIG. 4, a pattern in which bump bonding pads 4 are arranged in an array at a pitch of 0.2 mm on a part of a wiring pattern 3 of a copper foil having a thickness of 20 μm, and a chip capacitor arranged so as to surround the array pattern. The sub-recognition mark pad 6 has a size of 0.2 mm to 2 mm in the region surrounded by the chip-component bond pad 11 and the recognition mark pad 5. An integrated copper foil pattern is formed. Next, a transparent solder resist 10 such as an epoxy resin or a polyimide resin having a size of 0.1 mm to 2 mm is printed on a part of the copper foil pattern on the printed wiring board, and the part is recognized. A printed wiring board is created in which the portion where the transparent solder resist 10 is not printed is used as the secondary recognition mark pad 6.

  Next, in the same manner as in Example 1, in parallel with the production of the printed wiring board, the screen mask A for printing the Sn—Ag—Cu-based solder paste 7 was used as the bump bonding pad 4 and the chip in FIG. The solder paste 7 is formed in a pattern to be printed on the component bonding pads 11 and the sub-recognition mark pads 6. Then, the screen mask B for printing the Pb—Sn solder paste 7 is printed on the bump bonding pad 4 and the chip component bonding pad 11 in FIG. 4, and the sub-recognition mark pad 6 is soldered. The paste 7 is formed in a pattern that is not printed.

  Next, in the same manner as in Example 1, the printed wiring board on which the solder paste 7 is printed is placed in a reflow furnace and heated to melt the solder paste 7, and then the printed wiring board is taken out of the reflow furnace and cooled. By solidifying the solder, the substrate board 1 for an integrated circuit package in which the preliminary solder 2 having a height of 20 to 60 μm is formed on the bump bonding pad 4 and the chip component bonding pad 11 is obtained.

  Next, the discriminating apparatus for the preliminary solder 2 shown in FIG. 2 observes the recognition mark pad 5 of the substrate board 1 for the integrated circuit package shown in FIG. At this time, the recognition mark pad 5 is observed through the transparent solder resist 10, but the auxiliary solder mark 2 having a curved surface is provided on the sub-recognition mark pad 6 in a region not covered with the transparent solder resist 10. Since it is formed, the image becomes dark and it is determined that there is no image of the sub-recognition mark pad 6, and only the image of the recognition mark pad 5 is observed. Since the printed wiring board on which the solder paste 7 of Pb—Sn eutectic solder is printed does not have the spare solder 2 on the sub-recognition mark pad 6, both the image of the sub-recognition mark pad 6 and the recognition mark pad 5 are clear. Observed as an image of an integral copper foil pattern. In this manner, the image recognition means 14 compares patterns having different shapes in the shape of the image of the recognition mark pad 5 with a comparison image pattern stored in advance, and corresponds to the matched comparison image pattern. The type data of the spare solder 2 stored in advance is read out, and the type of the spare solder 2 is determined.

  The sub-recognition mark pad 6 is not limited to the above-described embodiment, and the sub-recognition mark pad 6 can be embedded in the center of the pattern of the recognition mark pad 5 with a predetermined gap. . Further, the illumination optical system of the substrate substrate recognition camera 13 of the semiconductor integrated circuit chip mounting apparatus is illuminated with the sub-recognition mark pad 6 with diffused light, so that the substrate substrate recognition camera 13 is related to the curved surface of the preliminary solder 2. It is also possible to install an optical system that ensures the brightness of the read image of the preliminary solder 2 and discriminates the presence or absence of the preliminary solder 2 based on the hue. In this case, the recognition mark pad 5 itself can be used as the sub-recognition mark pad 6. In this case, when the preliminary solder 2 is installed on the recognition mark pad 5, there is a possibility that the preliminary solder 2 protrudes around the recognition mark pad 5. A pattern of the recognition mark pad 5 in which the periphery of the recognition mark pad 5 is covered with a solder resist so that the preliminary solder 2 does not protrude may be formed as the sub-recognition mark pad 6.

  By forming the sub-recognition mark pad 6 in the vicinity of the recognition mark pad 5 in this way, when the mounting apparatus observes the recognition mark pad 5 with the substrate substrate recognition camera 13, the sub-recognition mark pad 6. The substrate board 1 for an integrated circuit package can be obtained, which has the effect of allowing the preliminary solder 2 to be observed and easily determining the type of the preliminary solder 2 depending on whether or not the preliminary solder 2 is placed thereon.

It is a figure which shows the manufacture procedure of the substrate board 1 for integrated circuit packages of this invention. It is a block diagram of the apparatus which discriminate | determines the kind of the preliminary | backup solder 2 at a shipment inspection process. FIG. 3 is a plan view showing a portion of a wiring pattern 3 on the outer layer of the substrate board 1 for integrated circuit package according to the first embodiment. FIG. 6 is a plan view showing a portion of an outer layer wiring pattern 3 of an integrated circuit package substrate 1 according to a second embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Substrate substrate 2 for integrated circuit packages 2 ... Preliminary solder 3 ... Wiring pattern 4 ... Bump bonding pad 5 ... Recognition mark pad 6 ... Sub recognition mark pad 7 Solder paste 8 Screen mask 10 Solder resist 11 Chip component bonding pad 12 Substrate installation table 13 Substrate substrate recognition camera 14 Image recognition means

Claims (2)

  A first integrated circuit package substrate substrate in which a first type of preliminary solder is disposed on a bump bonding pad for solder bumps of a semiconductor integrated circuit chip, and a second type of preliminary solder is disposed on a bump bonding pad. In the method of manufacturing a substrate substrate for an integrated circuit package, a first screen on which a printing pattern for printing a solder paste on the bump bonding pad and the sub-recognition mark pad of the substrate substrate for the first integrated circuit package is formed. A mask and a second screen mask on which the solder paste is printed on the bump bonding pads of the second integrated circuit package substrate substrate and a printing pattern not printed on the sub-recognition mark pads are formed. In the first step, the bump bonding pads are arranged in an array on the outer layer surface of the printed wiring board. The first type of preliminary pattern, a second step of forming and forming the sub-recognition mark pad in the vicinity of the recognition mark pad, and the first screen mask. A third step of printing the solder paste for solder on the printed wiring board and printing the solder paste for the second kind of preliminary solder on the printed wiring board by the second screen mask. A fourth step of manufacturing the first and second integrated circuit package substrate substrates by forming the preliminary solder by heating, melting, cooling and solidifying the solder paste; The first integrated circuit package substrate substrate and the second integrated circuit package are determined by determining whether or not the preliminary solder is placed on the sub-recognition mark pad. A method of fabricating an integrated circuit substrate board package, characterized in that it comprises a fifth step of discriminating the substrate board di.   A common pattern of bump bonding pads arranged in an array on the outer layer regardless of the type of spare solder, a recognition mark pad in the mounting area of the semiconductor integrated circuit chip, and a sub-pattern formed in the vicinity of the recognition mark pad A recognition mark pad, the spare solder placed on the bump bonding pad, and the spare solder placed on the sub-recognition mark pad when the first type of spare solder is placed. A substrate substrate for an integrated circuit package, wherein the preliminary solder is not installed on the sub-recognition mark pad when the second type of preliminary solder is installed.

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