JP2008029524A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game machine capable of increasing the diversity of a game, wherein the game machine which outputs the plurality of sounds can adjust and generate the sounds matching to the displayed images and being comfortable for the players to listen to. <P>SOLUTION: The game machine 1 includes the image control means which controls the images to be displayed on the image display means, the plurality of channels which sends out the sound information memorized by the sound information storage means to the sound output means, and the sound control means to control the volume of the sounds output from the sound output means of the respective channel. The sound control means, when it sends out the plurality of pieces of sound information to the sound output means through the plurality of channels, and on the condition that the image control means changes its displayed images, controls the volume of the sound suitable for the changed displayed image to be louder than the volume of the other sound. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a gaming machine.

  A plurality of reels each having a plurality of symbols drawn on each peripheral surface, and a symbol display area that is provided in correspondence with each reel and displays a part of the symbols drawn on the peripheral surface of each reel. All reels rotate based on the player's input of game value such as medals and the operation of the start lever (hereinafter referred to as “start operation”), and the player operates the stop button (hereinafter referred to as “stop”). A gaming machine (so-called “pachi-slot”) is known in which each reel is stopped on the basis of “operation” and a symbol game is displayed until the symbols are stopped and displayed in the symbol display area. Such a gaming machine gives a game value to a player when a predetermined symbol combination is stopped and displayed in the symbol display area.

  At present, based on the player's starting operation, one or more roles are randomly drawn from a group of roles that are configured in advance in the gaming machine (hereinafter referred to as “internal lottery”). A gaming machine that performs reel stop control based on a winning combination (hereinafter referred to as an “internal winning combination”) and a player's stop operation has become mainstream.

Furthermore, the gaming machine includes devices such as a liquid crystal display device, a lamp, and a speaker, and improves the interest of the player by performing various effects accompanying the game. For example, when a bonus combination is determined as an internal winning combination, an image indicating that the bonus combination is determined as an internal winning combination is displayed on the liquid crystal display device, and a sound indicating that the bonus combination is determined as an internal winning combination is displayed. There is known a gaming machine that notifies a player that a bonus combination has been determined as an internal winning combination by outputting from a speaker (for example, Patent Document 1). Also, such a gaming machine includes a plurality of channels for outputting sounds, and outputs a plurality of sounds simultaneously through these channels.
JP 2000-354 A

  However, in a gaming machine that produces effects using images and sounds as described above, if a plurality of sounds are output via a plurality of channels, these sounds will overlap, so that a sound suitable for the image to be displayed will be played. In some cases, it was not possible for the person to listen.

  The present invention has been made in view of the above problems, and is a gaming machine that outputs a plurality of sounds, and outputs a sound suitable for a displayed image so that the player can listen to the game. The purpose is to provide a gaming machine that enhances the interest of a person.

  In order to solve the above problems, a gaming machine according to the present invention includes a plurality of reels (for example, reels 3L, 3C, and 3R described later) each having a plurality of symbols arranged on the circumferential surface, and the circumferential surface of the reel. Among a plurality of symbols arranged in the symbol, symbol display means for displaying a part of the symbols (for example, symbol display areas 4L, 4C, 4R described later) and start operation detection means for detecting a start operation by the player (for example, The symbol changing means for changing the symbol displayed on the symbol display means by rotating the reel based on the start switch 6S) described later and the start operation detecting means being detected by the start operation detecting means. (For example, stepping motors 49L, 49C, 49R described later) and a winning combination for determining a winning combination from a plurality of winning combinations based on the start operation detected by the start operation detecting means. Determination means (for example, a main CPU 31 described later), stop operation detecting means for detecting a stop operation by a player (for example, a stop switch 7S described later), and the winning combination determined by the winning combination determining means and the stop Based on the fact that the stop operation is detected by the operation detection means, stop control means (for example, a main control which will be described later) stops the change of the symbol displayed on the symbol display means by stopping the rotation of the reel. CPU 31), image information storage means (for example, image ROM 79 described later) for storing a plurality of image information, and image display means (for example, described later) for displaying an image based on the image information stored by the image information storage means. Liquid crystal display device 5) and an image based on the image information stored in the image information storage means as the game progresses. Image control means (for example, an image control microcomputer 72 described later) to be displayed on the image display means while switching, sound information storage means (for example, a sound source ROM 97 described later) for storing a plurality of sound information, and the sound information storage Sound output means for outputting sound based on the sound information stored by the means (for example, speakers 21L and 21R, which will be described later), and sound information stored by the sound information storage means for sending the sound information to the sound output means Sound control means (for example, a sound / lamp control microcomputer 92 and a sound source IC 95 described later) for controlling the volume of sound output from the sound output means for each channel and the image display means. Each image information stored in the image information storage means and the sound suitable for the display image to be associated with the sound suitable for the display image. Relation information storage means (for example, a program ROM 94 to be described later) for storing correspondence information with sound information indicating the sound information, and the sound control means outputs a plurality of sound information via the plurality of channels as the sound output. And when the image control means switches the display image, the sound suitable for the display image after the switching is based on the correspondence information stored in the relation information storage means. It is characterized in that control is performed to increase the volume of the sound volume higher than that of other sounds.

  With this configuration, in the gaming machine of the present invention, the image information storage unit stores a plurality of pieces of image information, and the image display unit displays an image based on the image information stored by the image information storage unit. An image based on each image information stored in the image information storage means is displayed on the image display means while switching as the game progresses, and the sound information storage means stores a plurality of sound information, The sound output means outputs a sound based on the sound information stored in the sound information storage means, and the sound control means has a plurality of channels for sending the sound information stored in the sound information storage means to the sound output means. Then, by controlling the volume of the sound output from the sound output means for each channel, the related information storage means associates the display image displayed by the image display means with the sound suitable for the display image. Because the stores correspondence information between the sound information indicating each image information and the appropriate sound stored by the image information storage unit. At this time, the sound control means stores in the related information storage means on condition that the image control means switches the display image when a plurality of sound information is sent to the sound output means via a plurality of channels. Based on the corresponding correspondence information, control is performed to make the volume of the sound suitable for the display image after switching higher than the volume of other sounds.

  Therefore, according to the gaming machine, even when a plurality of sounds are output, the sound volume suitable for the display image after the switching becomes larger than the sound volume of other sounds when the display image is switched. Therefore, the player can hear a sound suitable for the display image, and can improve the interest.

  Further, in the gaming machine according to the present invention, when the sound control unit sends a plurality of pieces of sound information to the sound output unit via the plurality of channels, the image control unit switches the display image. On the condition, based on the correspondence relationship information stored in the relationship information storage means, it performs cross-fade control for fading in sound suitable for the display image after switching and fading out other sound. To do.

  Therefore, according to the gaming machine, the sound suitable for the display image after switching is faded in by the cross fade, so that it is possible to realize an interesting sound production full of realism and to hear the sound suitable for the display image. It can improve the interest of the player.

  Further, in the gaming machine according to the present invention, when the sound control unit sends a plurality of pieces of sound information to the sound output unit via the plurality of channels, the image control unit switches the display image. Based on the above, based on the correspondence information stored in the relationship information storage means, control is performed to mute a sound different from the sound suitable for the display image after switching.

  Therefore, according to the gaming machine, the sound volume suitable for the display image can be made larger than the sound volume of other sounds only by the control for muting the sound different from the sound suitable for the display image after switching. The control burden can be reduced.

  Therefore, according to the gaming machine, even when a plurality of sounds are output, the sound volume suitable for the display image after the switching becomes larger than the sound volume of other sounds when the display image is switched. Therefore, the player can hear a sound suitable for the display image, and can improve the interest.

  The gaming machine of the present invention will be specifically described below with reference to the drawings. In the following embodiment, as a gaming machine of the present invention, a gaming machine having three rotating reels that variably display symbols, in addition to coins, medals, tokens, etc., a card given to a player A description will be given using a game machine capable of playing using a game value such as a so-called pachislot machine. Further, in the following embodiments, a pachislot gaming machine will be described as an example, but the gaming machine of the present invention is not limited, and a pachinko machine or a slot machine may be used.

  First, an overview of the gaming machine according to the present embodiment will be described with reference to FIG. FIG. 1 is a perspective view of the gaming machine 1 according to the present embodiment.

  As shown in FIG. 1, the gaming machine 1 includes a cabinet 1a that houses reels 3L, 3C, and 3R, a main control circuit 60 (see FIG. 3) described later, and the like, and a front surface that is attached to the cabinet 1a so as to be openable and closable. And a door 1b.

  A panel display portion 2a and a liquid crystal display portion 2b as substantially vertical surfaces are formed in front of the center portion of the front door 1b. Three reels 3L, 3C, and 3R are rotatably provided in a horizontal row inside the front of the central portion of the cabinet 1a (the back of the liquid crystal display portion 2b). On the three reels 3L, 3C, 3R, a symbol row composed of a plurality of types of symbols is drawn on each outer peripheral surface. The symbols of the reels 3L, 3C, 3R can be seen through the symbol display areas 4L, 4C, 4R. Each reel 3L, 3C, 3R is controlled by a main control circuit 60 (see FIG. 3), which will be described later, so as to rotate at a constant speed (for example, 80 revolutions / minute), and within the symbol display areas 4L, 4C, 4R. The symbols drawn on the reels 3L, 3C, 3R vary as the reels rotate. The symbol display areas 4L, 4C, and 4R constitute the symbol display means of the present invention.

  A substantially horizontal pedestal 10 is formed below the panel display 2a and the liquid crystal display 2b. On the left side of the pedestal 10, a 1-BET button 11, a 2-BET button 12, and a maximum BET button 13 for betting credited medals by a push button operation are provided. The 1-BET button 11 is inserted with one of the credited medals by a single pressing operation. The 2-BET button 12 is inserted with two of the credited medals by a single pressing operation. The maximum BET button 13 is a single push operation, and three of the credited medals {that is, the maximum number that can be inserted in a unit game (hereinafter referred to as “maximum number of inserted sheets”)} Is inserted. By operating these BET buttons 11, 12, and 13, a later-described winning line is activated (hereinafter, the activated winning line is referred to as an activated line).

  On the right side of the pedestal portion 10, a medal slot 22 is provided. In accordance with the medal inserted into the medal slot 22, a pay line described later is activated.

  A C / P button 14 is provided on the left side of the front surface of the pedestal 10 to switch between credit (Credit) / payout (Pay) of medals acquired by the player in the game. The payout mode or the credit mode is switched by the player's operation on the C / P button 14. In the credit mode, when a winning is established, medals for the number of payouts corresponding to the winning are credited. Further, in the payout mode, when a winning is established, medals corresponding to the payout are paid out from the medal payout exit 15 at the lower front, and the medals paid out from the medal payout exit 15 are sent to the medal receiving unit 16. Can be stored.

  Speakers 21 </ b> L and 21 </ b> R are provided on the left and right above the medal receiving portion 16. The speakers 21L and 21R output game sounds such as performance sounds and notification sounds according to the game situation.

  A start lever 6 is provided on the right side of the C / P button 14. The start lever 6 rotates the reels 3L, 3C, and 3R by the player's start operation, and starts changing the symbols displayed in the symbol display areas 4L, 4C, and 4R.

  Three stop buttons 7L, 7C, and 7R for stopping the rotation of the three reels 3L, 3C, and 3R by the player's stop operation are located on the right side of the start lever 6 at the center of the front surface of the pedestal 10, respectively. Is provided. Here, when the three reels 3L, 3C, and 3R are rotating, the first stop of the rotation of the reels is referred to as a first stop, which is performed after the first stop and the two reels are rotated. The second stop of the rotation of the reel that is performed when the operation is performed is referred to as the second stop, which is performed after the second stop, and is performed last when the rotation of the remaining one reel is performed. Stopping the rotation of the reel is referred to as a third stop.

  A volume control knob 300 is provided on the front surface of the pedestal 10 on the right side of the stop buttons 7L, 7C, 7R. The player can adjust the volume of the sound output from the speakers 21L and 21R using the volume control knob 300.

  An LED 101 and a lamp 102 are provided on the upper portion of the front door 1b. The LED 101 and the lamp 102 emit light in a light emission pattern according to the game situation, and effects and notifications are performed.

  The panel display unit 2 a includes a WIN lamp 17, BET lamps 9 a to 9 c, a payout number display unit 18, and a credit display unit 19.

  The WIN lamp 17 notifies the player that the symbol combination related to the operation of the bonus can be displayed (for example, a BB1 carryover state described later) by lighting. The 1-BET lamp 9a, the 2-BET lamp 9b, and the maximum BET lamp 9c are turned on in accordance with the number of medals inserted in order to play a unit game (that is, the inserted number). The 1-BET lamp 9a is turned on when the 1-BET button 11 is operated or when one medal is inserted into the medal slot. The 2-BET lamp 9b is turned on when the 2-BET button 12 is operated or when two medals are inserted into the medal slot. The maximum BET lamp 9c is turned on when the maximum BET button 13 is operated or when three medals are inserted.

  The payout number display unit 18 and the credit display unit 19 are each composed of a 7-segment LED, and display the payout number of medals at the time of winning and the number of stored medals.

  The liquid crystal display unit 2b is disposed on the front side of the reels 3L, 3C, and 3R when viewed from the front side, displays an image, and is drawn on the reels 3L, 3C, and 3R in the symbol display areas 4L, 4C, and 4R. The displayed design is displayed transparently. The transmittance in the symbol display areas 4L, 4C, 4R can be changed.

  The liquid crystal display unit 2b has an effect display area 23, a frame image having a predetermined shape so as to surround the symbol display areas 4L, 4C, and 4R, and a background image constituting a predetermined image or a background in the image at the time of the effect. Display images that contain.

  In each of the symbol display areas 4L, 4C, and 4R, one symbol is displayed in each of the upper, middle, and lower stages in each of the vertically long symbol display areas 4L, 4C, and 4R and arranged on the peripheral surface of the corresponding reel. Three symbols are displayed. That is, the symbol display areas 4L, 4C, and 4R have a function as a so-called display window (hereinafter, the symbol display area may be referred to as a “display window”).

  The symbol display areas 4L, 4C, and 4R are provided with five pay lines that connect any one of the upper, middle, and lower stages in each of the symbol display areas 4L, 4C, and 4R described above. Specifically, a top line 8b, a center line 8c, a bottom line 8d, a cross-up line 8a, and a cross-down line 8e are provided. When the rotation of the reels 3L, 3C, and 3R is stopped, the gaming machine 1 determines success or failure of winning based on the symbols displayed along the activated winning lines 8a to 8e.

  The center line 8c is a line formed by connecting the middle areas of the symbol display areas 4L, 4C, and 4R. The top line 8b is a line formed by connecting the upper regions of the symbol display regions 4L, 4C, and 4R. The bottom line 8d is a line formed by connecting the lower regions of the symbol display regions 4L, 4C, and 4R. The cross-up line 8a is a line formed by connecting the lower part of the left symbol display area 4L, the middle part of the middle symbol display area 4C, and the upper part of the right symbol display area 4R. The cross down line 8e is a line formed by connecting the upper part of the left symbol display area 4L, the middle part of the middle symbol display area 4C, and the lower part of the right symbol display area 4R.

  The effect display area 23 is a display area excluding the symbol display areas 4L, 4C, and 4R in the liquid crystal display unit 2b. This effect display area 23 displays a predetermined image and produces an effect. In addition, not only the effect display area 23 but also the entire liquid crystal display unit 2b including the symbol display areas 4L, 4C, and 4R can display a predetermined image and perform an effect.

  Next, with reference to FIG. 2, the symbol sequence arranged on the reels 3L, 3C, 3R will be described. FIG. 2 is a diagram illustrating an arrangement of symbols drawn on the reels 3L, 3C, and 3R of the gaming machine 1 according to the present embodiment.

  A reel sheet is mounted on the outer peripheral surface of each reel 3L, 3C, 3R, and a symbol row in which 21 types of symbols are arranged on the reel sheet is drawn. Specifically, a symbol row composed of red 7, blue 7, plum, battleship, missile, chase game, cherry, replay symbol and blank (no symbol is drawn) is drawn.

  For each symbol, a code number “00 to 20” for specifying the position of each symbol is determined in advance and stored as a data table in the ROM 32 of the main control circuit 60 described later with reference to FIG. .

  Next, with reference to FIG. 3, the circuit configuration of the gaming machine 1 including a peripheral device (actuator) electrically connected to the main control circuit 60, the sub control circuit 61, the main control circuit 60 or the sub control circuit 61 will be described. To do. FIG. 3 is a diagram showing a circuit configuration of the gaming machine 1.

  The main control circuit 60 includes a microcomputer 30 disposed on a circuit board as a main component, and is added to a circuit for random number sampling. The microcomputer 30 includes a main CPU 31, a ROM 32 and a RAM 33.

  The main CPU 31 is connected to a clock pulse generation circuit 34, a frequency divider 35, a random number generator 36, and a sampling circuit 37. The main CPU 31 of this embodiment constitutes a winning combination determining unit and a stop control unit of the present invention.

  The clock pulse generation circuit 34 and the frequency divider 35 generate a reference clock pulse. The random number generator 36 generates a random number in the range of “0 to 65535”. The sampling circuit 37 extracts (samples) one random number value from the random number generated by the random number generator 36.

  Further, in the gaming machine 1, the random value extracted in the unit game is stored in a random value storage area of the RAM 33 described later. Then, based on the random value stored in the random value storage area of the RAM 33 for each unit game, an internal winning combination is determined in an internal lottery process (see FIG. 20) described later.

  In addition, as a means for random number sampling, you may make it the structure which performs random number sampling within the microcomputer 30, ie, on the operation program of the main CPU31. In that case, the random number generator 36 and the sampling circuit 37 can be omitted, or can be left as a backup for the random number sampling operation.

  The ROM 32 of the microcomputer 30 has a program (for example, see FIGS. 17 to 27 described later), various tables (for example, see FIG. 2 and FIGS. 5 to 9 described later), and a sub control circuit 61 in the processing of the main CPU 31. Various control commands (commands) and the like for transmitting to are stored.

  Various information obtained by the processing of the main CPU 31 is set in the RAM 33. For example, information specifying the extracted random number value, gaming state, number of payouts, bonus carryover information, etc. is set. These pieces of information are transmitted to the sub-control circuit 61 by the aforementioned command.

  In the circuit of FIG. 3, the main actuators whose operation is controlled by a control signal from the microcomputer 30 are BET lamps 9a, 9b, 9c, a WIN lamp 17, a payout number display unit 18, a credit display unit 19, and a hopper 40. There are stepping motors 49L, 49C, 49R and the like. The exchange of signals between these actuators and the main CPU 31 is performed via the I / O port 38.

  In addition, each circuit for controlling the operation of each actuator described above is connected to the output unit of the microcomputer 30 in response to a control signal output from the main CPU 31. Each circuit includes a motor drive circuit 39, a lamp drive circuit 45, a display unit drive circuit 48, and a hopper drive circuit 41.

  The lamp driving circuit 45 controls the drive of the BET lamps 9a, 9b, 9c and the WIN lamp 17. Thereby, the BET lamps 9a, 9b, 9c and the WIN lamp 17 are turned on and off.

  The display unit drive circuit 48 drives and controls the payout number display unit 18 and the credit display unit 19. As a result, various information (such as the number of credits) is displayed on the payout number display unit 18 and the credit display unit 19.

  The hopper drive circuit 41 drives and controls the hopper 40. Thereby, the medal accommodated in the hopper 40 is paid out.

  The motor drive circuit 39 drives and controls the stepping motors 49L, 49C, 49R. As a result, the reels 3L, 3C, and 3R are rotated and stopped. Note that the stepping motors 49L, 49C, 49R of the present embodiment constitute the symbol changing means of the present invention.

  Also, each switch and each circuit for generating an input signal that triggers outputting a control signal to each circuit and each actuator described above are connected to the input section of the microcomputer 30. Each switch and each circuit includes a start switch 6S, stop switches 7LS, 7CS, 7RS, 1-BET switch 11S, 2-BET switch 12S, maximum BET switch 13S, C / P switch 14S, medal sensor 22S, reel position detection There are a circuit 50 and a payout completion signal circuit 51. Note that the stop switches 7LS, 7CS, and 7RS are collectively referred to as a stop switch 7S.

  The start switch 6S detects a player's start operation with respect to the start lever 6, and outputs a start signal instructing the start of the unit game to the microcomputer 30. At this time, in order to perform automatic stop, the microcomputer 30 sets an automatic stop timer based on the input start signal and measures a predetermined time (for example, 40 seconds).

  This automatic stop means that when a stop signal from the stop switch 7LS, 7CS, 7RS is not detected within a predetermined time counted based on the input start signal, the microcomputer 30 This means that the reels 3L, 3C, and 3R are controlled to stop by outputting a control signal to the motor drive control circuit 39 without being based on the player's stop operation. Further, when the microcomputer 30 performs this automatic stop, the reels 3L, 3C, 3R are arranged so that the combination of symbols stopped on the active line is the most unfavorable aspect for the player, that is, loses. Command to stop the rotation of. Note that the start switch 6S of the present embodiment constitutes a start operation detecting means of the present invention.

  The stop switches 7LS, 7CS, and 7RS detect the player's stop operation on the stop buttons 7L, 7C, and 7R, respectively, and stop the rotation of the reels 3L, 3C, and 3R corresponding to the detected stop buttons 7L, 7C, and 7R. A stop signal to be commanded is output to the microcomputer 30. Note that the stop switch 7S of the present embodiment constitutes a stop operation detecting means of the present invention.

  The BET switches 11S to 13S detect a player's insertion operation for each BET button, and output a signal instructing insertion of one, two, or three medals from the credited medals to the microcomputer 30. .

  The C / P switch 14S detects a player's switching operation on the C / P button 14, and outputs a signal for switching the credit mode or the payout mode to the microcomputer 30. When the credit mode is switched to the payout mode, a signal for instructing the payout of medals credited to the gaming machine 1 is output to the microcomputer 30.

  The medal sensor 22S detects medals inserted into the medal insertion slot 22 by the player's insertion operation, and outputs a signal indicating that a medal has been inserted to the microcomputer 30.

  The reel detection circuit 50 detects a pulse signal from the reel rotation sensor and generates a signal for detecting the position of the symbol on each reel 3L, 3C, 3R.

  The payout completion signal circuit 51 indicates that the payout of medals is completed when the number of medals detected by the medal detection unit 40S (that is, the number of medals paid out from the hopper 40) reaches the designated number. For generating a signal.

  The sub-control circuit 61 performs various processes such as determination and execution of effect contents based on various commands output from the main control circuit 60 such as a start command described later. The sub control circuit 61 does not input commands, information, or the like to the main control circuit 60, and communication is performed in one direction from the main control circuit 60 to the sub control circuit 61.

  The main actuators whose operation is controlled by a control signal from the sub control circuit 61 include the liquid crystal display device 5, the speakers 21L and 21R, the LED 101, and the lamp 102. The sub-control circuit 61 determines and displays an image displayed on the liquid crystal display device 5 based on the determined content of the effect, determines and outputs the lighting pattern of the LED 101 and the lamp 102, and the effect sound output from the speakers 21L and 21R. Control of sound and sound effects and output. In addition, a volume control knob 300 is connected to the sub-control circuit 61, and the player can adjust the volume of the sound output from the speakers 21L and 21R by operating the volume control knob 300.

  Details of the configuration of the sub control circuit 61 in the present embodiment will be described later.

  In the gaming machine 1, when a signal for starting a unit game is output from the start switch 6S by a player's operation on the start lever 6 on condition that a medal is inserted, a control signal is output to the motor drive circuit 39, and stepping is performed. The rotation of the reels 3L, 3C, 3R is started by drive control of the motors 49L, 49C, 49R (for example, excitation to each phase). At this time, the number of pulses output to the stepping motors 49L, 49C, 49R is counted, and the counted value is set in a predetermined area of the RAM 33 as a pulse counter. In the gaming machine 1, when the “16” pulse is output, the reels 3L, 3C, and 3R move by one symbol. The number of symbols moved is counted, and the counted value is set in a predetermined area of the RAM 33 as a symbol counter. That is, every time the pulse counter counts “16”, the symbol counter is updated by “1”.

  A reel index is obtained from the reels 3L, 3C, and 3R for each rotation and is output to the main CPU 31 via the reel position detection circuit 50. With the output of the reel index, the pulse counter and the symbol counter set in the RAM 33 are cleared to “0”. In this way, the symbol position within one rotation range is specified for each reel 3L, 3C, 3R.

  Here, in the ROM 32, a symbol arrangement table (see FIG. 2) is stored in the ROM 32 in order to associate the rotational positions of the reels 3L, 3C, and 3R with the symbols drawn on the outer peripheral surface of the reel. ing. In this symbol arrangement table, the code numbers from “00” to “20”, which are sequentially given for each fixed rotation pitch of each of the reels 3L, 3C, and 3R, with the position where the reel index is output as a reference, A symbol code for identifying the type of symbol provided corresponding to each code number is associated.

  When a start signal is output from the start switch 6S, a random number value is extracted by the random number generator 36 and the sampling circuit 37. In the gaming machine 1, when the random value is extracted, it is stored in the random value storage area of the RAM 33. Then, an internal winning combination is determined based on the random value stored in the random value storage area.

  After the reels 3L, 3C, and 3R have reached constant speed rotation, when a stop signal is output from the stop switches 7LS, 7CS, and 7RS by a stop operation, based on the output stop signal and the determined internal winning combination, A control signal for stopping and controlling the reels 3L, 3C, 3R is output to the motor drive circuit 39. The motor drive circuit 39 drives and controls the stepping motors 49L, 49C, 49R, and stops the rotation of the reels 3L, 3C, 3R.

  In addition, when the predetermined time has elapsed after the reels 3L, 3C, and 3R have reached constant speed rotation and the automatic stop timer becomes “0”, the automatic stop is performed. Therefore, the reels 3L, 3L, A control signal for stopping and controlling 3C and 3R is output to the motor drive circuit 39.

  When the rotation of all the reels 3L, 3C, 3R is stopped, the display combination search process is performed based on the combination of symbols displayed along the effective line. The search for the display combination is performed based on the symbol combination table (see FIG. 5) stored in the ROM 32. In this symbol combination table, a symbol combination related to a display combination and a corresponding payout are set.

  When it is determined by the display combination search that a combination of symbols related to winning is displayed, a control signal is output to the hopper driving circuit 41 and the hopper 40 is driven to pay out medals. At this time, the medal detection unit 40S counts the number of medals to be paid out from the hopper 40, and when the count value reaches the designated number, the payout completion signal circuit 51 outputs a signal indicating completion of the medal payout. The Thereby, a control signal is output to the hopper drive circuit 41, and the drive of the hopper 40 is stopped.

  When the credit mode is switched by the C / P switch 14S, if it is determined that the winning symbol combination is displayed, the payout amount corresponding to the winning symbol combination is stored in the credit of the RAM 33. Add to the number counter. Further, a control signal is output to the display unit driving circuit 48 and the value of the credit number counter is displayed on the credit display unit 19. Here, there is a case where a medal payout or a credit performed when a combination of symbols related to winning is displayed is simply referred to as “payout”.

  Next, the circuit configuration of the sub control circuit 61 will be described with reference to FIG. FIG. 4 is a diagram showing a circuit configuration of the sub control circuit of the gaming machine 1.

  As shown in FIG. 4, the sub control circuit 61 includes an image control circuit 70 and a sound / lamp control circuit 90. The image control circuit 70 controls the liquid crystal display device 5. The sound / lamp control circuit 90 controls sound output from the speakers 21L and 21R and lighting of the LED 101 and the lamp 102. Note that the speakers 21L and 21R of the present embodiment constitute sound output means of the present invention.

  The image control circuit 70 includes a serial port 71, an image control microcomputer 72, a program ROM 73, a work RAM 74, a calendar IC 75, an image control IC 76, an image ROM 79, and a video RAM 80.

  The serial port 71 receives a command output from the main control circuit 60. The serial port 71 outputs a command generated by the image control microcomputer 72 to the sound / lamp control circuit 90.

  The image control microcomputer 72 performs display control of the liquid crystal display device 5 based on a program stored in the program ROM 73. Specifically, the image control microcomputer 72 receives a command indicating a gaming state, an internal winning combination, and the like from the main control circuit 60, and data related to date and time (hereinafter referred to as “date and time data”) from the calendar IC 75. Is stored in the work RAM 74. The image control microcomputer 72 executes the program while referring to the game state identifier, winning combination identifier, date / time data, and the like stored in the work RAM 74, whereby the liquid crystal display device 5, the speakers 21L and 21R, the LED 101, the lamp 102, and the like. The stage identifier, the production identifier, and the production data that define the production contents are determined. The stage identifier, the effect identifier, and the effect data will be described later.

  In addition, the image control microcomputer 72 outputs a control command to the sound / lamp control circuit 90 via the serial port 71 based on the effect data and the like. In particular, in the present embodiment, the image control microcomputer 72 displays the image on the liquid crystal display device 5 on the basis of the effect data, and includes the effect data in order to cause the speakers 21L and 21R to output sounds suitable for the displayed image. A control command is transmitted to the sound / lamp control microcomputer 92. Note that the image control microcomputer 72 of the present embodiment constitutes the image control means of the present invention, and the liquid crystal display device 5 constitutes the image display means of the present invention.

  Furthermore, the image control microcomputer 72 executes a random number acquisition program stored in the program ROM 73, and is used when determining a stage identifier, an effect identifier, and the like in a start command reception process (see FIG. 31) described later. Get a random value. However, when a random number generator and a sampling circuit are provided in the sub-control circuit 61 as in the main control circuit 60, this processing is not necessary.

  The program ROM 73 stores programs such as an image control program executed by the image control microcomputer 72 and various tables.

  The work RAM 74 is used as temporary work storage means when the image control microcomputer 72 executes each program. For example, the work RAM 74 stores information such as a command transmitted from the main control circuit 60, an in-game identifier, a stage identifier, an effect identifier, a gaming state identifier, a winning combination identifier, a carryover combination identifier, a display combination identifier, and the like.

  The calendar IC 75 stores date / time data input from an operation unit (not shown) of the gaming machine. The image control microcomputer 72 executes various effects using the date / time data. Note that the data stored in the aforementioned work RAM 74 and calendar IC 75 is data to be backed up.

  The image control IC 76 (hereinafter also referred to as VDP) includes a control RAM 77 that stores image data, date / time data, and the like transmitted from the image control microcomputer 72.

  The image control IC 76 performs display control for the liquid crystal display device 5. When receiving an image display command or the like from the image control microcomputer 72, the image control IC 76 reads image data stored in the image ROM 79 in order to display an image on the liquid crystal display device 5.

  The image control IC 76 sequentially superimposes the image data read from the image ROM 79 from the background image located at the rear to the image located at the front, and stores the data in the video RAM 80 described later, thereby synthesizing the image data, and the liquid crystal display device 5. To supply. As a result, an image is displayed on the liquid crystal display device 5.

  The control RAM 77 is used as temporary storage means when the image control microcomputer 72 executes the image control program. Various variables such as a VDP counter are assigned to the control RAM 77. This VDP counter is incremented based on a clock signal transmitted from the image control IC 76 to the image control microcomputer 72, and from the timing when the bank control instruction described later is sent from the image control microcomputer 72 to the image control IC 76 last time. Used to determine whether 1/30 seconds or more have elapsed.

  The image ROM 79 stores image data constituting an image displayed on the liquid crystal display device 5. Note that the image ROM 79 of this embodiment constitutes image information storage means of the present invention.

  The video RAM 80 is used as a temporary storage unit when the image control IC 76 generates a display image from the image data. The video RAM 80 is composed of two frame buffers, a write image data area for storing image data transferred from the image control IC 76 and a display image data area for storing image data displayed on the liquid crystal display device 5. Yes. These frame buffers are alternately switched by the image control IC 76 (that is, the banks are switched), whereby image data is sequentially supplied to the liquid crystal display device 5.

  The sound / lamp control circuit 90 includes a serial port 91, a sound / lamp control microcomputer 92, a work RAM 93, a program ROM 94, a sound source IC 95, a power amplifier 96, and a sound source ROM 97.

  The serial port 91 receives a command generated by the image control microcomputer 72 based on the effect data and the like via the serial port 71.

  The sound / lamp control microcomputer 92 controls the lighting of the LED 101 and the lamp 102 and the output sound of the speakers 21L and 21R based on the program stored in the program ROM 94. Specifically, the sound / lamp control microcomputer 92 receives a command from the image control circuit 70 and stores it in the work RAM 93. The sound / lamp control microcomputer 92 executes the program stored in the program ROM 94 based on the information stored in the work RAM 93 to control the sound source IC 95 and the lighting of the LED 101 and the lamp 102.

  The program ROM 94 stores programs executed by the sound / lamp control microcomputer 92 and various tables. In the present embodiment, in particular, a phrase number determination table (see FIG. 14) described later is stored. The program ROM 94 of this embodiment constitutes related information storage means of the present invention.

  When the sound / lamp control microcomputer 92 receives a control command based on the effect data from the image control microcomputer 72, the sound / lamp control microcomputer 92 refers to a phrase number determination table and designates a corresponding phrase number described later. When the sound / lamp control microcomputer 92 designates a phrase number, the sound / lamp control microcomputer 92 transmits information indicating the designated phrase number (hereinafter referred to as “designated phrase number information”) to the sound source IC 95. The phrase number determination table is stored in the program ROM 73, the image control microcomputer 72 refers to the phrase number determination table and designates the phrase number, and the designated phrase number information is stored in the sound / lamp control microcomputer and the sound source IC 95. It is good also as transmitting. In this case, the image control microcomputer 72 constitutes a part of the sound control means of the present invention, and the program ROM 73 constitutes the related information storage means of the present invention.

  The sound source IC 95 has a plurality of channels for sending sound source data stored in a sound source ROM 97 to be described later, and acquires sound source data from the sound source ROM 97 based on designated phrase number information transmitted from the sound / lamp control microcomputer 92. At the same time, the sound is transmitted to the speakers 21L and 21R through a predetermined channel to reproduce and output the sound. The sound source data sent from the sound source IC 95 is amplified by the power amplifier 96 and then output to the speakers 21L and 21R. The sound source IC 95 controls the sound volume level when outputting sound by numerical values. This numerical value is referred to as a volume value. For example, the volume value in the mute state is “0”, and the volume value in the maximum volume state is “256”.

  The sound source ROM 97 stores a plurality of sound source data and request data. The sound source data is data that is the basis of BGM and sound effects output from the speakers 21L and 21R, and is encoded and stored in a predetermined format. A phrase number is assigned to the sound source data and request data. However, the sound source data having the same phrase number as the phrase number assigned to the request data is not necessarily stored in the sound source ROM 97, but the request data whose request value described later is “designated channel output request” has a phrase Sound source data having the same phrase number as the number is stored in the sound source ROM 97. Therefore, the phrase number includes a phrase number given to both the sound source data and the request data, and a phrase number given only to the request data.

  The request data is data used for control when the sound source IC 95 sends sound source data from the channel. That is, the sound source IC 95 performs control related to the sound output from the speakers 21L and 21R by sending the sound source data through the channel based on the request data. In the present embodiment, the request data is stored in a table format (request data table described later (see FIG. 15)).

  Request data includes phrase number, request value (content), target channel number, loop playback / 1 shot playback flag, immediate playback / chain playback flag, phrase volume value, fade type, fade target value, fade time (milliseconds), etc. Information. The phrase number of the request data corresponds to the phrase number specified by the sound / lamp control microcomputer 92 and the phrase number assigned to the sound source data. The sound source data having the same phrase number as the request data is controlled based on the request data.

  The request value indicates a request (control) content that the sound / lamp control microcomputer 92 causes the sound source IC 95 to perform. For example, “designated channel mute request”, “designated channel output request”, and “designated channel fade control request”. , “Designated channel volume control request”, “designated channel master volume control request”, “master volume control request”, “designated channel filter control request”, and the like. The “designated channel mute request” is a request for muteing the sound output from the channel indicated by the target channel number. The “designated channel output request” is a request for outputting sound from the channel indicated by the target channel number based on the sound source data indicated by the corresponding phrase number. The “designated channel fade control request” is a request for performing fade-in / fade-out control on the sound output from or output from the channel indicated by the target channel number. The “designated channel volume control request” is a request for controlling the volume of the sound source data specified by the phrase number. The “designated channel master volume control request” is a request for controlling the volume of the sound output from the channel indicated by the target channel number. The “master volume control request” is a request for controlling the volume of sound output from all channels based on the player operating the volume knob 300. The “designated channel filter control request” is a request for applying filter control to the sound output from the channel indicated by the target channel number. The filter control is used to adjust the brightness of the sound, and the deeper the filter control, the darker the sound.

  The target channel number is a number indicating the channel that is the target of the request (control).

  The loop playback / one-shot playback flag is a flag set in the request data whose request value is “designated channel output request”, and the sound source data indicated by the corresponding phrase number is looped (repeatedly) played back, or It is a flag for identifying whether one shot (only once) is reproduced.

  The immediate playback / chain playback flag is a flag set in the request data whose request value is “designated channel output request”, and whether the sound source data indicated by the corresponding phrase number is played back immediately or the chain (target channel) This is a flag for identifying whether or not the sound being played back is finished by the channel indicated by the number.

  The phrase volume value is a value indicating the volume set in the request data whose request value is “designated channel output request” or the like, and the volume value of the sound output from the target channel is output as the phrase volume value. To be controlled.

  The fade type, fade target value, and fade time (milliseconds) are items set for request data whose request value is “specified channel fade control request”. The fade type is “fade in” or “fade out”. Is an item for identifying whether or not “Fade in” is to gradually increase (clarify) the volume level, and “fade out” is to gradually decrease (decrease) the volume level. In addition, “Fade In” and “Fade Out” are combined to reduce the volume level of one sound source data and increase the volume level of the other sound source data to reverse both volume levels. That's it. The fade target value indicates the volume value when the sound source IC 95 ends the fade control, and the fade time indicates the time until the sound source IC 95 reaches the fade target value. The sound source IC 95 calculates a volume value to be displaced per unit time (for example, 8 milliseconds) using the fade time and the fade target value.

  When the sound / lamp control microcomputer 92 receives a command related to sound control from the image control microcomputer 72, the sound / lamp control microcomputer 92 designates a phrase number in accordance with the command and transmits designated phrase number information to the sound source IC 95. The sound source IC 95 acquires request data from the request data table based on the designated phrase number information. At this time, if sound source data having the same phrase number is stored in the sound source ROM 97, the sound source data is read. When the sound source IC 95 reads sound source data, the sound source IC 95 reproduces the sound source data based on request data having the same phrase number. When the sound source IC 95 reads only request data, the sound source IC 95 controls the sound source data being reproduced based on the request data.

  The sound source IC 95 has a “performance flag”, “performance time”, “performance elapsed time”, “fade state”, “information about sound source data being played”, “information about sound source data to be played next time” for each channel, It manages channel parameter information such as “current playback control data”, “next playback control data”, “phrase volume value”, and the like, and is used when controlling sound output based on request data. The “performance flag” is a flag for determining whether sound source data is transmitted from the corresponding channel. “Performance time” indicates the performance time of the sound source data transmitted from the corresponding channel. For example, for a 20-second song, information indicating 20 seconds is set. “Performance elapsed time” indicates the elapsed time from the start of output of sound source data transmitted from the corresponding channel. “Fade state” is whether or not fade control is performed on the sound source data transmitted from the corresponding channel, and if fade control is being performed, it is fade-in control or fade-out control. It is the information which shows. The “fade state” includes “fade type”, “fade target value” and “fade time (milliseconds)” set in the request data whose request value is “specified channel fade control request”, and fade control. Includes information indicating “fade elapsed time”, which is an elapsed time since the start of the operation. “Information relating to sound source data being played” is information indicating the phrase number, request value, etc. of the sound source data transmitted from the corresponding channel. “Information on sound source data to be played next time” is information indicating a phrase number, a request value, and the like of sound source data to be transmitted next from the corresponding channel. “Current playback control data” is information indicating whether playback of sound source data transmitted from a corresponding channel is one-shot playback or loop playback. “Next playback control data” is information indicating whether playback of sound source data to be sent next time from the corresponding channel is one-shot playback or loop playback. “Phrase volume value” is information indicating the volume value of the sound source data transmitted from the corresponding channel.

  Note that the sound / lamp control microcomputer 92 and the sound source IC 95 of this embodiment constitute sound control means of the present invention. The sound source ROM 97 of this embodiment constitutes sound information storage means of the present invention.

  Next, with reference to FIG. 5, the display combination and the payout associated with the displayed combination of symbols will be described. FIG. 5 is a diagram showing an example of the symbol combination table of the gaming machine 1 in the present embodiment.

  The symbol combination table defines the display combination related to the combination of symbols displayed along the active line and the number of payouts for the display combination for each inserted number of medals. However, in the present embodiment, since the number of inserted medals necessary for a unit game is determined to be 3, the case where the number of inserted medals is 1 or 2 is not defined.

  As the display combination of the gaming machine 1, cherry 1, cherry 2, plum, missile, special small combination, replay 1, replay 2, BB1, BB2, and RB are set, each represented by 8-bit data. For example, the data indicating RB is “00000100”. Note that BB1, BB2, and RB have the same data as cherry 1, cherry 2, and plum, respectively, but these 8-bit data are internal winning combinations that are different areas on the RAM 33, as will be described later. Since they are stored in the storage area 1 and the internal winning combination storage area 2, respectively, they are not confused. Specifically, data indicating BB1, BB2, and RB is stored in the internal winning combination storing area 2, and data indicating cherry 1, cherry 2, and plum is stored in the internal winning combination storing area 1.

  As shown in FIG. 5, the cherry 1 is established by displaying “cherry-ANY-ANY” along the active line. At this time, when the inserted number is 3, two medals are paid out. “ANY” represents that any symbol may be used.

  Cherry 2 is established when “battleship-ANY-ANY” is displayed along the active line. At this time, when the inserted number is 3, two medals are paid out.

  A plum is formed by displaying “Plum-Plum-Plum” along the active line. At this time, if the inserted number is 3, nine medals are paid out.

  A missile is established when “missile-missile-missile” is displayed along the active line. At this time, when the inserted number is 3, 5 medals are paid out.

  The special small role is established by displaying “blank-blank-blue 7” along the active line. At this time, when the inserted number is 3, 5 medals are paid out.

  Replay 1 is established by displaying “Replay-Replay-Replay” along the active line. Thereby, the re-game is performed in the next unit game. That is, the same number of medals as the number of coins inserted in the unit game in which replay is established are automatically inserted in the next unit game without being based on the player's insertion operation. Thereby, the player can perform the next unit game without consuming medals. Here, the above-mentioned medal payout and re-game are examples of giving game value.

  Replay 2 is established by displaying “Plum-Replay-Replay” along the active line. Thereby, the re-game is performed in the next unit game. Further, after the next unit game, the game state shifts to the RT2 game state. The RT2 gaming state is a gaming state in which the probability that the replay 1 is determined as an internal winning combination is higher than that in the general gaming state.

  BB1 is established by displaying “red 7-red 7-red 7” along the active line. Thereafter, the BB1 operation state is set. When the gaming machine 1 enters the BB1 operating state, the gaming machine 1 continuously operates the RB gaming state until the number of paid-out medals exceeds 460. In the RB gaming state in the present embodiment, all the combinations of Cherry 1, Cherry 2, Plum, Missile, and Special Small Role related to the payout of medals are determined as internal winning combinations, and from the combination of symbols related to the combination with a high payout number The pull-in control is performed so that the symbols are preferentially displayed in the symbol display areas 4L, 4C, and 4R. In addition, the RB gaming state is terminated when the number of unit games performed in the RB gaming state reaches two times or when the number of winnings reaches two times. However, even before the end condition for the RB gaming state is satisfied, when the BB1 operation state is ended because the number of paid-out medals exceeds 460, the RB gaming state is ended accordingly.

  BB2 is established by displaying “blue 7-blue 7-blue 7” along the active line. Thereafter, the BB2 operation state is set. When the gaming machine 1 enters the BB2 operating state, the gaming machine 1 continuously operates the RB gaming state until the payout number of medals exceeds 460. Similarly to the case of the BB1 operating state, when the BB2 operating state is ended because the number of medals paid out exceeds 460, the RB gaming state is ended accordingly.

  RB is established when “tracking game-tracking game-tracking game” is displayed along the active line. Thereafter, the RB operation state is established.

  In addition, when a symbol combination other than the symbol combination related to Cherry 1, Cherry 2, Plum, Missile, Special Play, Replay 1, Replay 2, BB1, BB2, or RB is displayed along the active line, To establish.

  Next, a lottery count determination table used when determining an internal winning combination in an internal lottery process (see FIG. 20) described later will be described with reference to FIG. FIG. 6 is a diagram illustrating an example of the lottery count determination table of the gaming machine 1 in the present embodiment.

  The lottery count determination table defines the number of lotteries corresponding to each gaming state. Specifically, the lottery count determination table defines “10” as the number of lotteries when the gaming state is the general gaming state, the RT1 gaming state, or the RT2 gaming state, and when the gaming state is the RB gaming state. “5” is defined as the number of times.

  Next, an internal lottery table used when determining an internal winning combination in an internal lottery process (see FIG. 20) described later will be described with reference to FIG. FIG. 7A is a diagram illustrating an example of the internal lottery table for the general gaming state of the gaming machine 1 in the present embodiment. FIG. 7 (2) is a diagram showing an example of an internal lottery table for RB gaming state of the gaming machine 1 in the present embodiment. FIG. 7 (3) is a diagram showing an example of the internal lottery table for RT1 gaming state of the gaming machine 1 in the present embodiment. FIG. 7 (4) is a diagram showing an example of the RT2 gaming state internal lottery table of the gaming machine 1 in the present embodiment.

  The internal lottery table defines a winning number and a lower limit value and an upper limit value determined according to the number of medals inserted for each combination. For example, in the internal lottery table for the general gaming state, when the number of medals inserted is 3 for the winning number “8” corresponding to BB1, “18862” is defined as the lower limit value and “18937” is defined as the upper limit value. Is prescribed.

  That is, in the gaming machine 1, in an internal lottery process (see FIG. 20) described later, the random number value stored in the RAM 33 is within a range from a lower limit value to an upper limit value defined by the internal lottery table (hereinafter “winning range”). If it is within the winning range, the internal winning combination is determined based on the winning number corresponding to the winning range. Here, the winning number is a number that takes a value of “0-10”, and the values of “0-10” are lost, cherry 1, cherry 2, plum, missile, special small role, replay 1 respectively. , Replay 2, BB1, BB2, or RB.

  The internal lottery table for the RB gaming state is an internal lottery table used when the gaming state is the RB gaming state, and the winning range for the replay and various bonuses (BB1, BB2, RB) is not defined, and , Cherry 1, Cherry 2, Plum, Missile, and special small roles are defined as “0” to “65534”, and all small roles have a high probability of “65535/65536”. Is determined to be an internal winning role. Therefore, in this embodiment, the RB gaming state in which the internal lottery process is performed by the RB gaming state internal lottery table is advantageous to the player as compared to the general gaming state.

  The RT1 gaming state internal lottery table is an internal lottery table used when the gaming state is the RT1 gaming state, and the winning range corresponding to the replay 1 and the replay 2 is the replay 1 in the general gaming state internal lottery table. Each is defined wider than the winning range corresponding to Replay 2. That is, in the RT1 gaming state, the probability that Replay 1 and Replay 2 are determined as internal winning combinations is increased. Specifically, the probability that Replay 1 is determined to be an internal winning combination is increased from “about 1 / 7.3” to “about 1 / 1.2”, and Replay 2 is determined to be an internal winning combination. The probability increases from “1/16384” to “about 1/655”.

  The RT2 gaming state internal lottery table is an internal lottery table used when the gaming state is the RT2 gaming state, and the winning range corresponding to the replay 1 corresponds to the replay 1 in the general gaming state internal lottery table. It is defined wider than the range. That is, in the RT2 gaming state, the probability that the replay 1 is determined as an internal winning combination is increased.

  In the present embodiment, the internal lottery table for the general gaming state, the internal lottery table for the RB gaming state, the internal lottery table for the RT1 gaming state, and the internal lottery table for the RT2 gaming state require 3 medal insertions. Since it is determined that the number of medals is one or two, it is not specified.

  Next, an internal winning combination determination table used when determining an internal winning combination in an internal lottery process (see FIG. 20) described later will be described with reference to FIG. FIG. 8 is a diagram illustrating an example of the internal winning combination determination table of the gaming machine 1 in the present embodiment.

  The internal winning combination determination table defines an internal winning combination corresponding to the winning number, a bit pattern indicating the internal winning combination, and a storage area type for each gaming state. The storage area type is information indicating whether a bit pattern indicating an internal winning combination is stored in an internal winning combination storing area 1 or an internal winning combination storing area 2 described later. For example, in the internal winning combination determination table, when the gaming state is the general gaming state, the RB gaming state, the RT1 gaming state or the RT2 gaming state, and the winning number is “1”, cherry 1 is selected as the internal winning combination. In addition, “00000001” is defined as the bit pattern of the internal winning combination, and the storage area type “1” indicating that the bit pattern indicating the internal winning combination is the internal winning combination storage area 1 is defined. is doing.

  Next, with reference to FIG. 9, a bonus operation time table used when setting conditions for ending the BB1 operation state, the BB2 operation state, or the RB game state will be described. FIG. 9 is a diagram showing an example of the bonus operation time table of the gaming machine 1 in the present embodiment.

  The bonus operating time table defines an end condition for each gaming state of the BB1 operating state, the BB2 operating state, and the RB gaming state. Specifically, the bonus operation time table defines “460” for the value of the bonus end number counter as the end condition for the BB1 operation state, and “ 460 ”and“ 2 ”and“ 2 ”for the value of the possible number of games and the number of possible winnings, respectively, as the RB gaming state end condition. That is, in the gaming machine 1, the BB1 operation state is ended when the number of paid-out medals exceeds 460, and the BB2 operation state is ended when the number of paid-out medals exceeds 460, and further RB The game state is ended by playing the game twice or winning twice.

  Next, with reference to FIG. 10 (1), the internal winning combination storing area 1 for storing the internal winning combination information will be described. FIG. 10A is a diagram showing an example of the internal winning combination storing area 1 of the gaming machine 1 in the present embodiment.

  The internal winning combination storing area 1 is an 8-bit data area allocated on the RAM 33. The internal symbol combination storing area 1 indicates which combination is an internal symbol combination by storing “0” or “1” data in the “bit 0 to bit 6” area. For example, if the bit pattern of the internal winning combination storage area 1 is “00000010”, it indicates that the cherry 2 is an internal winning combination. If two or more types of internal winning combinations are determined, “1” is stored in the corresponding bits.

  Next, the internal symbol combination storing area 2 for storing the internal symbol combination information will be described with reference to FIG. FIG. 10 (2) is a diagram showing an example of the internal winning combination storing area 2 of the gaming machine 1 in the present embodiment.

  The internal winning combination storing area 2 is an 8-bit data area allocated on the RAM 33. The internal symbol combination storing area 2 indicates which combination is an internal symbol combination by storing “0” or “1” data in the “bit 0 to bit 2” area. For example, when the bit pattern of the internal winning combination storing area 2 is “00000010”, it indicates that BB2 is an internal winning combination. The internal winning combination storage area 1 or the internal winning combination storage area 2 is edited based on the storage area type described above.

  Next, a carryover combination storage area for storing carryover combination information will be described with reference to FIG. In addition, FIG. 10 (3) is a figure which shows the example of the carryover combination storage area | region of the gaming machine 1 in this embodiment.

  The carryover combination storage area is an 8-bit data area allocated on the RAM 33. The carryover combination storage area indicates whether it is in the BB1 carryover state, the BB2 carryover state, or the RB carryover state by storing “0” or “1” data in the “bit 0” to “bit 2” area. . That is, when the bit pattern of the carryover combination storage area is “00000010”, it indicates that the BB2 carryover state is set.

  Here, the BB1 carryover state means that when the internal winning combination is determined to be BB1 in the general gaming state, the BB1 is the internal until three red 7 symbols are displayed along the active line. A state that is carried over as a winning role. The BB2 carryover state means that when the internal winning combination is determined to be BB2 in the general gaming state, BB2 is used as an internal winning combination until three blue 7 symbols are displayed along the active line. A state that is carried over. Also, the RB carryover state means that in the general gaming state, when the internal winning combination is determined to be RB, the RB is displayed until “tracking game-tracking game-tracking game” is displayed along the active line. A state that is carried over as an internal winning combination.

  Next, the stage identifier lottery table will be described with reference to FIG. FIG. 11 is a diagram illustrating an example of the stage identifier lottery table of the gaming machine 1 in the present embodiment.

  The stage identifier lottery table is a table used when determining a stage identifier in a start command receiving process (see FIG. 31) described later. In the stage identifier lottery table, a range of random values corresponding to the stage identifier is defined for each internal winning combination, and the random number value determined in the process of step S261 in the start command reception process is any stage identifier. The stage identifier is determined depending on whether it belongs to the range of random values corresponding to.

  In the stage identifier lottery table, “deep sea”, “珊瑚”, “iceberg” and “inboard” are defined as stage identifiers. For example, in the stage identifier lottery table, if the internal winning combination is Cherry 1, the range of random numbers is defined as “0-15” corresponding to the stage identifier “Deep Sea”, and the stage identifier “珊瑚” is supported. The range of random numbers is defined as “16-103”, the range of random numbers is defined as “104-111” corresponding to the stage identifier “iceberg”, and the range of random numbers is defined as “inboard”. 112-127 ". Therefore, if the internal winning combination is Cherry 1 and a random value “10” is acquired, the stage identifier “Deep Sea” is determined.

  When the stage identifier is “Deep Sea”, an image with “Deep Sea” as a background is displayed on the liquid crystal display device 5, and when the stage identifier is “珊瑚”, “珊瑚” is displayed as a background on the liquid crystal display device 5. The image to be displayed is displayed. When the stage identifier is “iceberg”, an image with “iceberg” in the background is displayed on the liquid crystal display device 5. When the stage identifier is “inboard”, “inboard” is displayed on the liquid crystal display device 5. A background image is displayed.

  In the present embodiment, when “Deep Sea” is determined as the stage identifier and “Submarine Action” is determined as the effect identifier described later, it is displayed on the liquid crystal display device 5 as the game progresses. When the image is switched from an image having a deep sea background to an image having a ship interior, the sound outside the ship output from the speakers 21L and 21R fades out and the sound inside the ship fades in. In other words, a realistic effect is performed by performing cross-fade control so that a sound suitable for an image is output, so that the player's interest in the game can be improved.

  Next, an effect identifier lottery table will be described with reference to FIG. FIG. 12 (1) is a diagram showing an example of a general gaming state effect identifier lottery table of the gaming machine 1 in the present embodiment, and FIG. 12 (2) is a general game of the gaming machine 1 in the present embodiment. It is a figure which shows the example of the effect identifier lottery table for states (at the time of carryover).

  The effect identifier lottery table is a table used when determining an effect identifier in a process of receiving a start command described later (see FIG. 31). Various effects performed by the liquid crystal display device 5, the speakers 21L and 21R, the LED 101, the lamp 102, and the like are performed based on the stage identifier and the effect identifier.

  The effect identifier lottery table shown in FIG. 12 is selectively used depending on whether or not various bonuses with a game state of BB1, BB2, or RB are carried over. Specifically, when various bonuses are carried over, an effect identifier lottery table for a general gaming state (when carrying over) is used, and when various bonuses are not carried over, an effect identifier lottery table for a general gaming state. Is used.

  The effect identifier lottery table defines a range of random values corresponding to the effect identifier for each stage identifier. For example, in the general gaming state effect identifier lottery table shown in FIG. 12A, when the stage identifier is “deep sea”, the range of random numbers is set to “0 to 42” corresponding to the effect identifier “normal”. The range of random numbers is defined as “43-75” corresponding to the production identifier “frame production”, the range of random numbers is defined as “76-118” corresponding to the production identifier “submarine action”, Corresponding to the identifier “jellyfish effect”, the range of random numbers is defined as “119 to 119”, and corresponding to the effect identifier “drum can drop effect” is defined as the range of random numbers “120 to 120”. Corresponding to “Friendship production”, the range of random numbers is defined as “121 to 127”. Therefore, for example, when the stage identifier is “Deep Sea” and the random value “108” is acquired, the production identifier “submarine action” is determined.

  Next, the effect data determination table will be described with reference to FIG. FIG. 13 is a diagram illustrating an example of the effect data determination table of the gaming machine 1 in the present embodiment.

  The effect data determination table is based on the stage identifier, the effect identifier, and the progress stage of the game, which are determined in a start command reception process (see FIG. 31) described later, and the liquid crystal display device 5, speakers 21L, 21R, LED 101, and lamp. It is a table used when various production data performed by 102 etc. are determined.

  Specifically, in the effect data determination table, as shown in FIG. 13, for each combination of the stage identifier and the effect identifier, the start operation, the first stop, the second stop, the third stop, and the display role Production data is defined for each game stage at the time of confirmation. In the effect data determination table shown in FIG. 13, illustration is omitted for the case where the stage identifiers are “珊瑚” and “iceberg”.

  For example, for the combination of the stage identifier “Deep Sea” and the production identifier “Normal”, “Deep Sea-Normal A” is defined as “Production Data (Start)” at the start operation. “Deep sea-normal B” is defined as “effect data (first stop)”. Further, “Deep Sea-Normal C” is defined as “Production data (second stop)” at the time of the second stop, and “Deep Sea-Normal” as the “effect data (third stop)” at the time of the third stop. D "is defined. Furthermore, “Deep Sea-Normal E” is defined as “effect data (display)” when the display combination is determined.

  In the present embodiment, “Deep Sea-Submarine Action A” is defined as “Production Data (Start)” at the start operation for the combination of the stage identifier “Deep Sea” and the production identifier “Submarine Action”. “Deep sea-submarine action B” is defined as “effect data (first stop)” at the time of the first stop. In addition, “Deep Sea-Submarine Action C” is defined as “production data (second stop)” at the time of the second stop, and “inboard— Submarine action D ”is defined. Furthermore, “inboard-submarine action E” is defined as “effect data (display)” when the display combination is determined.

  The production data “Deep Sea-Submarine Action A”, “Deep Sea-Submarine Action B”, and “Deep Sea-Submarine Action C” are the appearance of the submarine when the submarine performs an action in the deep sea (ie, the ship when the submarine performs an action). This is effect data for causing the liquid crystal display device 5 to display an image indicating the outside). On the other hand, “inboard-submarine action D” and “inboard-submarine action E” display liquid crystal images showing the interior of the submarine when the submarine performs an action in the deep sea (that is, the state of the inboard when the submarine performs an action). This is effect data to be displayed on the device 5.

  Therefore, when “inboard-submarine action D” is determined as effect data, the image displayed on the liquid crystal display device 5 is switched from the image outside the ship to the image inside the ship. Along with this, on the condition that the image displayed on the liquid crystal display device 5 is switched from the image with the background outside the ship to the image with the background on the ship, a sound suitable for the image switched from the speakers 21L and 21R is output. The In other words, the presence of the harmonious presence of the image and the sound is performed, so that the player's interest in the game can be improved.

  Next, the phrase number determination table will be described with reference to FIG. FIG. 14 is a diagram illustrating an example of the phrase number determination table of the gaming machine 1 in the present embodiment.

  The phrase number determination table defines the phrase number corresponding to the production data. The phrase number determination table is a table that is referred to when determining a phrase number in order to perform control related to sound when the sound / lamp control microcomputer 92 receives a control command including effect data from the image control microcomputer 72.

  The phrase number determination table associates the effect data and the phrase number in order to output sounds suitable for the image displayed on the liquid crystal display device 5 from the speakers 21L and 21R. Since the image control microcomputer 72 performs an effect of displaying an image on the liquid crystal display device 5 based on the effect data, the image data is displayed on the liquid crystal display device 5 by associating the effect data with the phrase number by the phrase number determination table. Sound suitable for the image to be output can be output from the speakers 21L and 21R.

  The phrase number determination table shown in FIG. 14 defines the phrase numbers “100” to “120” in correspondence with the production data “Deep sea-submarine action A”, and the production data “inboard-submarine action D”. Phrase numbers “130” to “140” are defined. The phrase numbers “100” to “150” will be described later.

  In the present embodiment, as described above, the effect data determination table determines “Deep Sea-Submarine Action A” as start effect data for the combination of the stage identifier “Deep Sea” and the effect identifier “Submarine Action”. Accordingly, it is defined that “inboard-submarine action D” is determined as the third stop effect data. Further, in the present embodiment, on the condition that the production data “inboard-submarine action D” is determined and an image based on the production data “inboard-submarine action D” is displayed, the production data “Deep Sea-submarine action” until then. Sound suitable for the image displayed based on the “action A” to the production data “Deep sea-submarine action C” fades out, and sound suitable for the image displayed based on “inboard-submarine action D” fades in.

  Therefore, the phrase number determination table in the present embodiment is displayed based on the production data “Deep sea-submarine action A” when the sound / lamp control microcomputer 92 receives a control command including the production data “inboard-submarine action D”. The effect data and phrase number are related so that the sound suitable for the displayed image can be faded out and the sound suitable for the displayed image can be faded in based on the effect data “inboard-submarine action D”. It is prescribed.

  Next, the request data table will be described with reference to FIG. FIG. 15 is a diagram illustrating an example of a request data table of the gaming machine 1 in the present embodiment.

  The request data table is a collection of a plurality of request data in a table format. In particular, in the request data table shown in FIG. 15, when “deep sea” is determined as the stage identifier and “submarine action” is determined as the performance identifier, the crossfade control when switching from the performance related to the outboard to the performance related to the inboard is performed. The request data for is shown. Hereinafter, crossfade control by the sound / lamp control microcomputer 92 and the sound source IC 95 will be described with reference to FIGS.

  First, when the image control microcomputer 72 determines “deep sea-submarine action A” as effect data, a control command including the effect data is transmitted from the image control microcomputer 72 to the sound / lamp control microcomputer 92. When the sound / lamp control microcomputer 92 receives the command, it designates phrase numbers “100”, “110”, and “120” with reference to the phrase number determination table (see FIG. 14), and sequentially specifies designated phrase number information. Is transmitted to the sound source IC 95. The sound source IC 95 sequentially reads request data from the request data table based on the phrase number information.

  The sound source IC 95 reads the sound source data having the phrase number “100” from the sound source ROM 97 suitable for the deep sea image and the request data having the phrase number “100” based on the designated phrase number information indicating the phrase number “100”. Then, based on the read request data, the sound source data is transmitted from the channel “01” and output with the phrase sound volume value “256” (indicated by a solid line 100 in FIG. 16).

  Next, based on the designated phrase number information indicating the phrase number “110”, the tone generator IC 95 has the phrase number “110” from the tone generator ROM 97 and the request data having the phrase number “110” and the tone generator data suitable for the inboard image. And the sound source data is transmitted from the channel “02” based on the read request data and is output with the phrase volume value “256” (indicated by the broken line 110 in FIG. 16).

  Next, as soon as the sound source IC 95 performs control based on the request data having the phrase number “110”, it reads the request data having the phrase number “120” and transmits the phrase number “110” transmitted from the channel “02”. Is controlled to reduce the phrase volume value to “0” during “1 millisecond” (indicated by a broken line 120 in FIG. 16). That is, the sound source IC 95 outputs the sound source data having the phrase number “110” at a phrase volume value “256” for a short time so that the player cannot hear it, and then sets the phrase volume value to “0”. Control.

  Next, when the image control microcomputer 72 determines “inboard-submarine action D” as effect data, a control command including the effect data is transmitted from the image control microcomputer 72 to the sound / lamp control microcomputer 92. When the sound / lamp control microcomputer 92 receives a command based on the effect data “inboard-submarine action D” transmitted from the image control microcomputer 72, the sound / lamp control microcomputer 92 refers to the phrase number determination table to change the phrase numbers “130” and “140”. The designated phrase number information is sequentially transmitted to the sound source IC 95. The sound source IC 95 sequentially reads request data from the request data table based on the phrase number information.

  When the sound source IC 95 reads the request data having the phrase number “130”, the sound source data having the phrase number “100” transmitted from the channel “01” is set to the phrase volume value during “100 milliseconds”. Fade out control for decreasing from “256” to “0” is performed (indicated by a solid line 130 in FIG. 16).

  Next, the sound source IC 95 reads the request data having the phrase number “140”, and the sound source data having the phrase number “110” transmitted from the channel “02” is stored in the phrase volume for “10 milliseconds”. Fade-in control for increasing the value from “0” to “256” is performed (indicated by a broken line 140 in FIG. 16). In other words, the sound source IC 95 uses the request data having the phrase number “130” and the phrase number “140” and the sound suitable for the deep sea image output via the channel “01” and the channel “02”. Crossfade the sound that is appropriate for the inboard image being output.

  As described above, the phrase number determination table described above defines the phrase numbers “100”, “110”, and “120” in correspondence with the production data “Deep sea-submarine action A”, so that the sound / lamp control microcomputer 92 In addition, when a control command including the production data “Deep Sea-Submarine Action A” is received, the sound source data suitable for “Deep Sea-Submarine Action A” and the sound source data suitable for “Inboard-Submarine Action D” are sent to different channels. To the speakers 21L and 21R. Also, the phrase number determination table defines the phrase numbers “130” and “140” in correspondence with the production data “inboard-submarine action D”. When a control command based on “Action D” is received, a sound suitable for “Deep Sea—Submarine Action A” is faded out, and a crossfade control is performed to fade in a sound suitable for “Inboard—Submarine Action D”.

  In other words, the phrase number determination table shows the relationship information between the image displayed on the liquid crystal display device 5 based on the effect data and the sound source data indicating the sound suitable for the displayed image via the effect data and the phrase number. It prescribes.

  In the present embodiment, by combining the request data having the phrase number “110” and the request data having the phrase number “120”, the sound source data having the phrase number “110” is transmitted from the channel “02”. The control for outputting at the volume value “0” is performed. However, the control may be performed by setting “requested channel output request” as the request value and setting “0” as the phrase volume value. Further, the request value of the request data having the phrase number “120” is set as “specified channel mute request” or “specified channel master volume control request”, and the sound source data having the phrase number “110” is transmitted from the channel “02” to the phrase volume. It is good also as outputting by the value "0".

  Next, the control operation of the main CPU 31 of the main control circuit 60 will be described with reference to the flowcharts shown in FIGS.

  First, with reference to FIG. 17, the reset interrupt process by the main CPU 31 of the main control circuit 60 will be described. FIG. 17 is a diagram showing a flowchart of reset interrupt processing by the main CPU 31 performed by the main control circuit 60 of the present embodiment. Further, the main CPU 31 generates a reset interrupt when power is turned on and a voltage is applied to the reset terminal, and the reset interrupt process stored in the ROM 32 is sequentially performed based on the occurrence of the interrupt. It is configured as follows.

  First, when the power is turned on, the main CPU 31 performs initialization (step S1).

  Next, the main CPU 31 clears the designated RAM area at the end of the game (step S2). Specifically, the main CPU 31 erases data in the writable area in the RAM 33 used for the previous unit game, writes parameters necessary for the current unit game in the writable area in the RAM 33, Specify the start address to the sequence program.

  Next, the main CPU 31 performs a bonus operation monitoring process which will be described later with reference to FIG. 18 (step S3). This bonus operation monitoring process is a process for generating an RB gaming state when the BB1 operating state or the BB2 operating state is not the RB gaming state.

  Next, the main CPU 31 performs a medal acceptance / start check process which will be described later with reference to FIG. 19 (step S4). In the medal acceptance / start check process, the main CPU 31 updates the insertion number counter by checking the medal sensor 22S and the BET switches 11S, 12S, and 13S, and checks the input of the start switch 6S.

  Next, when determining that the start switch 6S is turned on, the main CPU 31 extracts a random number value for determining an internal winning combination (step S5). Specifically, the main CPU 31 extracts one random value from the range of “0 to 65535” by the random number generator 36 and the sampling circuit 37 and stores the extracted random value in the random value storage area of the RAM 33 described above. .

  Next, the main CPU 31 performs a gaming state monitoring process (step S6). In this gaming state monitoring process, the main CPU 31 identifies a gaming state in the current unit game based on the BB1 operating flag, the BB2 operating flag, the RB operating flag, the RT1 operating flag, or the RT2 operating flag. A state identifier is set in the RAM 33.

  Next, the main CPU 31 performs an internal lottery process which will be described later with reference to FIG. 20 (step S7). In this internal lottery process, the main CPU 31 uses the aforementioned lottery count determination table (see FIG. 6), internal lottery table (see FIG. 7), and internal winning combination determination table (see FIG. 8) based on the gaming state. Refer to determine internal winning combination.

  Next, the main CPU 31 transmits a start command to the sub control circuit 61 (step S8). The start command includes, for example, information such as a gaming state, an internal winning combination, and a random value.

  Next, the main CPU 31 determines whether 4.1 seconds have elapsed since the start of the previous rotation of the reels 3L, 3C, 3R (step S9). When determining that 4.1 seconds have not elapsed, the main CPU 31 performs a wait process (step S10). In this wait process, the main CPU 31 performs a standby process without performing subsequent processes until 4.1 seconds have elapsed since the start of rotation of the reels 3L, 3C, and 3R.

  The main CPU 31 sets a game monitoring timer in the RAM 33 when it is determined that 4.1 seconds have elapsed in the process of step S9 or when a wait process is performed in the process of step S10 (step S10). S11). The main CPU 31 counts the above-mentioned 4.1 seconds by the set game monitoring timer, sets the automatic stop timer to perform the above-described automatic stop, and sets a predetermined time (for example, 40 seconds). Start timing.

  Next, the main CPU 31 requests the start of rotation of all reels (step S12). For example, the main CPU 31 performs processing such as turning on a rotation start request flag set in the RAM 33. When the start of rotation of all reels is requested, rotation start processing and acceleration control processing of the reels 3L, 3C, and 3R are performed.

  Next, the main CPU 31 performs a reel stop control process which will be described later with reference to FIG. 21 (step S13). In the reel stop control process, the main CPU 31 stops the rotation of the reels 3L, 3C, and 3R based on a stop signal output from the stop switches 7LS, 7CS, and 7RS by the player's stop operation.

  Next, when all the rotations of the reels 3L, 3C, and 3R are stopped, the main CPU 31 determines the display combination based on the displayed symbol combination and determines the number of medals to be paid out (step S14). . In the process of step S14, the main CPU 31 determines the display combination based on the code number of the symbol displayed along the active line and the symbol combination table (see FIG. 5). Further, the main CPU 31 sets a display combination identifier for identifying the display combination and information on the number of payouts corresponding to the display combination in the RAM 33.

  Next, the main CPU 31 transmits a display combination command to the sub control circuit 61 (step S15). The display combination command includes information on a display combination identifier that identifies a display combination established on the active line, such as a replay display combination.

  Next, the main CPU 31 performs medal payout processing (step S16). In this medal payout process, the main CPU 31 updates the credit counter set in the RAM 33 based on the payout number information in the credit mode. When the credit counter is updated, the credit counter 19 displays the value of the credit counter. In the payout mode, the main CPU 31 controls the hopper 40 by the hopper drive circuit 41 based on the payout number information to pay out medals. Further, if the display combination is replay, the main CPU 31 turns on the replay operating flag.

  Next, when the BB1 operating flag or the BB2 operating flag set in the RAM 33 is on, the main CPU 31 subtracts the number of medals paid out in the process of step S16 from the bonus end number counter (step S17). .

  Next, the main CPU 31 determines whether or not the BB1 operating flag, BB2 operating flag or RB operating flag set in the RAM 33 is on (step S18). At this time, the main CPU 31 determines that the BB1 operating flag, the BB2 operating flag, or the RB operating flag is not on, that is, the BB1 operating flag, the BB2 operating flag, and the RB operating flag are all off. If it is determined that there is, the process proceeds to a bonus operation check process (step S20) which will be described later with reference to FIG.

  On the other hand, when the main CPU 31 determines in the process of step S18 that the BB1 operating flag, the BB2 operating flag, or the RB operating flag is on, a bonus end check process (described later with reference to FIG. 22) Step S19) is performed.

  Next, when the main CPU 31 determines in the process of step S18 that the BB1 operating flag, the BB2 operating flag or the RB operating flag is not on, or performs a bonus end check process in the process of step S19. If it does, a bonus operation check process is performed (step S20).

  Next, the main CPU 31 performs a replay operation check process which will be described later with reference to FIG. 24 (step S21). In this replay operation check process, when the display combination is Replay 1, the main CPU 31 performs a process for enabling a game without inserting a new medal in the next unit game, and the display combination is Replay 2. In some cases, in addition to the processing when the display combination is Replay 1, processing for shifting the gaming state to the RT2 gaming state is performed.

  Next, the main CPU 31 performs RT end check processing described later with reference to FIG. 25 (step S22). In this RT end check process, when the gaming state is the RT1 gaming state or the RT2 gaming state, the main CPU 31 performs a process of subtracting “1” from the value of the RT gaming number counter, and the subtraction result, the RT gaming number When the value of the counter becomes “0”, processing for ending the RT1 gaming state or the RT2 gaming state is performed. When this process ends, the main CPU 31 proceeds to the process of step S2.

  As described above, the main CPU 31 executes the process from step S2 to step S22 as the process in the unit game, and when the process in step S22 ends, the main CPU 31 proceeds to the process in step S2 to execute the process in the next unit game. .

  Next, the bonus operation monitoring process will be described with reference to FIG. FIG. 18 is a flowchart of the bonus operation monitoring process performed by the main control circuit 60 of the present embodiment.

  First, the main CPU 31 determines whether or not the BB1 operating flag or the BB2 operating flag is on (step S51). At this time, when the main CPU 31 determines that the BB1 operating flag or the BB2 operating flag is not on, the main CPU 31 ends the bonus operation monitoring process.

  Next, when the main CPU 31 determines in the process of step S51 that the BB1 operating flag or the BB2 operating flag is on, it then determines whether or not the RB operating flag is on (step S52). ). At this time, when the main CPU 31 determines that the RB operating flag is on, the main CPU 31 ends the bonus operation monitoring process.

  On the other hand, when the main CPU 31 determines in the process of step S52 that the RB operating flag is not on, the main CPU 31 then refers to the bonus operating table (see FIG. 9) and performs the RB operating process (step S53). . Specifically, the main CPU 31 refers to the bonus operating time table, sets “2” in the possible game number counter, sets “2” in the possible winning number counter, and turns on the RB operating flag. . After completing this process, the main CPU 31 ends the bonus operation monitoring process.

  That is, the main CPU 31 always generates the RB gaming state in the BB1 operating state or the BB2 operating state by the bonus operation monitoring process. For example, in the previous unit game, the BB1 operation state or the BB2 operation state is determined even when the RB gaming state is ended when either the game possible number counter or the winning number counter becomes “0”. If so, the RB gaming state is generated again. When the main CPU 31 ends the bonus operation monitoring process, the main CPU 31 proceeds to the process of step S4 in FIG.

  Next, with reference to FIG. 19, the medal acceptance / start check process will be described. FIG. 19 is a flowchart of a medal acceptance / start check process performed by the main control circuit 60 of the present embodiment.

  First, the main CPU 31 determines whether or not the value of the automatic insertion counter is “0” (step S61). At this time, when the main CPU 31 determines that the value of the automatic insertion counter is not “0”, the main CPU 31 proceeds to the processing of step S63. On the other hand, when the main CPU 31 determines that the value of the automatic insertion counter is “0”, the main CPU 31 then permits the reception of medals (step S62), and proceeds to the processing of step S65. Here, the automatic insertion counter is data for identifying whether or not a replay has been established in the previous unit game.

  Next, when the main CPU 31 determines in the process of step S61 that the value of the automatic insertion counter is not “0”, the main CPU 31 copies the automatic insertion counter to the insertion number counter (step S63) and transmits a bet command. (Step S64). Here, the insertion number counter is data for counting the number of insertions. The automatic insertion counter identifies whether or not the symbol combination related to Replay 1 or Replay 2 was displayed in the symbol display areas 4L, 4C, and 4R in the previous unit game, and the medal insertion in the previous unit game. This is data for specifying the number of sheets. The bet command includes data on the number of inserted coins.

  Next, the main CPU 31 determines whether or not the acceptance of medals is permitted after the process of step S62 or the process of step S64 (step S65). At this time, when the main CPU 31 determines that the acceptance of medals is not permitted, the main CPU 31 proceeds to the process of step S73. On the other hand, when determining that the acceptance of medals is permitted, the main CPU 31 then determines whether or not it is an insertion process (step S66). Specifically, when the bet switches 11S, 12S, and 13S are on, the main CPU 31 adds to the inserted number counter based on the types of the bet switches 11S, 12S, and 13S, the inserted number counter, and the credit counter. Calculate the value. Here, the credit counter is data for counting the number of credited medals.

  When the main CPU 31 determines in the process of step S66 that it is not the input process, the main CPU 31 proceeds to the process of step S73. On the other hand, when the main CPU 31 determines that it is the insertion process, the main CPU 31 updates the insertion number counter (step S67) and transmits a bet command (step S68). The main CPU 31 updates the credit counter instead of the inserted number counter when the addition of the inserted number counter is prohibited in the process of step S67.

  Next, the main CPU 31 determines whether or not the RB operation flag is on (step S69). At this time, when the main CPU 31 determines that the RB operating flag is on, the main CPU 31 proceeds to the processing of step S71. On the other hand, when the main CPU 31 determines that the RB operation flag is not on, it next determines whether or not the insertion number counter is “3” (step S70).

  When the main CPU 31 determines in the process of step S70 that the insertion number counter is not “3”, the main CPU 31 proceeds to the process of step S73. Next, when the main CPU 31 determines in the process of step S70 that the insertion number counter is “3”, or in the process of step S69, determines that the RB operation flag is on, the insertion number counter Is prohibited (step S71).

  Next, the main CPU 31 determines whether or not the insertion number counter is “1” or more (step S72). At this time, when the main CPU 31 determines that the insertion number counter is not “1” or more, the main CPU 31 proceeds to the process of step S65, whereas when it determines that the insertion number counter is “1” or more, the main CPU 31 proceeds to step S73. Transition to processing.

  Next, when the main CPU 31 determines that the acceptance of medals is not permitted in the process of step S65, and determines that it is not the insertion process in the process of step S66, the inserted number counter is “3” in the process of step S70. When it is determined that it is not “”, or when it is determined in the process of step S72 that the inserted number counter is “1” or more, it is then determined whether or not the start switch 6S is on (step S73).

  When the main CPU 31 determines in the process of step S73 that the start switch 6S is not on, the main CPU 31 proceeds to the process of step S65. On the other hand, when it is determined that the start switch 6S is on, the medal acceptance is prohibited (step S74), and the medal acceptance / start check process is terminated. When the main CPU 31 finishes the medal acceptance / start check process, the main CPU 31 proceeds to the process of step S5 in FIG.

  Next, an internal lottery process will be described with reference to FIG. FIG. 20 is a diagram showing a flowchart of an internal lottery process performed by the main control circuit 60 of the present embodiment. The internal lottery process is a process that is executed when called in the process of step S7 of the reset interrupt process by the main CPU 31 described above.

  First, the main CPU 31 determines an internal lottery table with reference to the game state identifier (step S31).

  Next, the main CPU 31 refers to the lottery count determination table (see FIG. 6) and determines the lottery count based on the gaming state (step S32). Specifically, the main CPU 31 determines “10” as the number of lotteries when it is determined that the game state identifier for identifying the game state is the general game state, the RT1 game state, or the RT2 game state. When it is determined that the player is in the RB gaming state, “5” is determined as the number of lotteries.

  Next, the main CPU 31 determines whether or not the carryover combination storage area is “00000000” (step S33). That is, the main CPU 31 determines whether the BB1 carryover state, the BB2 carryover state, or the RB carryover state. When the main CPU 31 determines that the carryover combination storage area is “00000000”, that is, when it is determined that the game state is not the BB1 carryover state, the BB2 carryover state, or the RB carryover state, the main CPU 31 proceeds to the process of step S35. Transition.

  On the other hand, when the main CPU 31 determines in the process of step S33 that the carryover combination storage area is not “00000000”, that is, the BB1 carryover state, the BB2 carryover state, or the RB carryover state, It is changed to “7” (step S34). By changing the number of lotteries to “7”, the main CPU 31 again determines BB1, BB2, or RB as an internal winning combination in the subsequent processing, regardless of the BB1 carryover state, the BB2 carryover state, or the RB carryover state. Avoid doing that. When this process ends, the main CPU 31 proceeds to the process of step S35.

  Next, the main CPU 31 sets the same value as the number of lotteries in the winning number (step S35). Next, the main CPU 31 refers to the internal lottery table (see FIG. 7) determined in step S31, and the lower limit at which the random number value stored in the random value storage area of the RAM 33 is determined based on the winning number and the inserted number counter. It is determined whether or not it is greater than or equal to a value and less than or equal to an upper limit (step S36). At this time, when the main CPU 31 determines that the random number value is not lower than the lower limit value and lower than the upper limit value, the main CPU 31 proceeds to the process of step S39.

  On the other hand, when the main CPU 31 determines in the process of step S36 that the random number value is not less than the lower limit value and not more than the upper limit value, the main CPU 31 then refers to the internal winning combination determination table (see FIG. 8) and based on the winning number. The internal winning combination and storage area type are determined (step S37).

  Next, the main CPU 31 edits the internal winning combination storing area according to the determined internal winning combination and storage area type (step S38). Specifically, the main CPU 31 selects either the internal winning combination storing area 1 or the internal winning combination storing area 2 according to the determined storage area type, and sets “1” to an appropriate bit corresponding to the determined internal winning combination. "Is set. Depending on the setting of the winning range of the internal lottery table, the process may be executed a plurality of times in the unit game. In this case, the main CPU 31 sets “1” to the corresponding bit as needed.

  Next, when the main CPU 31 determines in the process of step S36 that the random number value is not less than the lower limit value and not less than the upper limit value or when the process of step S38 is completed, “1” is subtracted from the number of lotteries. (Step S39).

  Next, the main CPU 31 determines whether or not the number of lotteries is “0” (step S40). When the main CPU 31 determines that the number of lotteries is “0”, the main CPU 31 proceeds to the process of step S41.

  On the other hand, when the main CPU 31 determines in the process of step S40 that the number of lotteries is not “0”, the main CPU 31 proceeds to the process of step S36. Thereafter, the main CPU 31 repeats the processing from step S36 to step S40 (hereinafter referred to as “repetition processing”) until the number of lotteries becomes “0”.

  Next, the main CPU 31 stores the logical sum of the internal winning combination storage area 2 and the carryover combination storage area in the carryover combination storage area (step S41). Next, the main CPU 31 stores the logical sum of the internal symbol combination storing area 2 and the carryover combination storing area in the internal symbol combination storing area 2 (step S42). When this process ends, the main CPU 31 ends the internal lottery process and proceeds to the process of step S8 in FIG.

  Here, the main CPU 31 performs a lottery of an internal winning combination by executing the above-described repetitive processing. Specifically, the main CPU 31 determines a winning number by sequentially determining which winning range of the internal lottery table the random number value of the RAM 33 is, and determines the winning combination corresponding to the winning number as an internal winning combination. And

  On the other hand, when the main CPU 31 determines that the random number value stored in the random number value storage area of the RAM 33 does not fall within any winning range of the internal lottery table, the main CPU 31 executes the processes of steps S37 and S38. The process will be repeated without doing so. In this case, since the internal winning combination is not determined in the repetitive processing, the player is out of the internal lottery.

  Next, the reel stop control process will be described with reference to FIG. FIG. 21 is a flowchart of the reel stop control process performed by the main control circuit 60 of this embodiment.

  First, the main CPU 31 determines whether or not a valid stop switch has been turned on (step S81). Specifically, the main CPU 31 determines whether stop switches 7LS, 7CS, and 7RS corresponding to the rotating reels 3L, 3C, and 3R are turned on based on a stop operation by the player. At this time, when the main CPU 31 determines that a valid stop switch is not turned on, it executes the process of step S81 again. That is, the main CPU 31 repeats the process of step S81 until a valid stop switch is turned on. The main CPU 31 determines whether or not a valid stop switch has been turned on and determines whether or not a predetermined time (for example, 30 seconds) has elapsed since the start switch 6S was turned on. It may be (for so-called automatic stop).

  On the other hand, when the main CPU 31 determines in step S81 that the effective stop switch is turned on, the main CPU 31 invalidates the pressing operation of the stop button and determines the number of sliding symbols based on the internal winning combination ( Step S82).

  Next, the main CPU 31 determines a planned stop position based on the determined number of sliding symbols and the current symbol position (step S83).

  Next, the main CPU 31 transmits a reel stop command to the sub control circuit 61 (step S84). The reel stop command includes data indicating the type of the stopped reel.

  Next, the main CPU 31 determines whether or not all reels are stopped (step S85). At this time, when the main CPU 31 determines that all the reels are not stopped, the main CPU 31 proceeds to the process of step S81. That is, the main CPU 31 repeats the processing from step S81 to step S85 until it is determined that all reels have stopped.

  On the other hand, when the main CPU 31 determines in the process of step S85 that all the reels have stopped, the main CPU 31 ends the reel stop control process, and proceeds to the process of step S14 in FIG.

  Next, the bonus end check process will be described with reference to FIG. FIG. 22 is a flowchart of the bonus end check process performed by the main control circuit 60 of the present embodiment.

  First, the main CPU 31 determines whether or not a winning is achieved (step S91). At this time, if the main CPU 31 determines that no winning has been established, the main CPU 31 proceeds to the processing of step S97. Here, winning means that a combination of symbols related to small roles such as cherry 1, cherry 2, plum, missile, special small role is displayed, and medals are paid out.

  On the other hand, when the main CPU 31 determines in the process of step S91 that a winning has been established, the main CPU 31 determines whether or not the bonus end number counter is “0” (step S92). At this time, when the main CPU 31 determines that the bonus end number counter is not “0”, the main CPU 31 proceeds to the process of step S95.

  On the other hand, when the main CPU 31 determines in the process of step S92 that the bonus end number counter is “0”, the main CPU 31 performs an RB end process (step S93). Specifically, the main CPU 31 turns off the RB operating flag and performs processing such as setting a command indicating the end of the RB gaming state.

  Next, the main CPU 31 performs processing at the end of BB (step S94). Specifically, the main CPU 31 turns off the BB1 operating flag or the BB2 operating flag. When this process ends, the main CPU 31 proceeds to the process of step S101.

  On the other hand, when the main CPU 31 determines in the process of step S92 that the bonus end number counter is not “0”, the main CPU 31 subtracts “1” from the winning possible number counter (step S95).

  Next, the main CPU 31 determines whether or not the possible winning number counter obtained by subtracting “1” in the process of step S95 is “0” (step S96). At this time, when the main CPU 31 determines that the winning possible number counter is “0”, the main CPU 31 proceeds to the processing of step S99. On the other hand, when the main CPU 31 determines that the winning possible number counter is not “0”, the main CPU 31 proceeds to the process of step S97.

  Next, when the main CPU 31 determines that a winning is not established in the process of step S91 or when it is determined that the winning possible number counter is not “0” in the process of step S96, the possible game number counter Then, “1” is subtracted from (Step S97).

  Next, the main CPU 31 determines whether or not the possible game number counter obtained by subtracting “1” in the process of step S97 is “0” (step S98). At this time, when the main CPU 31 determines that the possible game number counter is not “0”, the main CPU 31 ends the bonus end check process and proceeds to the process of step S20 in FIG. On the other hand, when the main CPU 31 determines that the possible game number counter is “0”, the main CPU 31 proceeds to the process of step S99.

  Next, when the main CPU 31 determines in the process of step S96 that the possible winning number counter is “0” or in the process of step S98, it determines that the possible game number counter is “0”. , RB end time processing is performed (step S99). Specifically, the main CPU 31 turns off the RB operating flag and performs predetermined processing such as setting a command indicating the end of the RB gaming state.

  Next, the main CPU 31 determines whether or not the BB1 operating flag or the BB2 operating flag is on (step S100). At this time, when the main CPU 31 determines that the BB1 operating flag or the BB2 operating flag is on, the main CPU 31 ends the bonus end check process and proceeds to the process of step S20 in FIG. On the other hand, when the main CPU 31 determines that the BB1 operating flag or the BB2 operating flag is not on, the main CPU 31 proceeds to the process of step S101.

  Next, when the main CPU 31 finishes the processing at the end of the BB in the processing of step S94, or determines that the BB1 operating flag or the BB2 operating flag is not on in the processing of step S100, the RT1 operating flag Is turned on (step S101).

  Next, the main CPU 31 sets “100” in the RT game number counter (step S102). When this process is finished, the main CPU 31 ends the bonus end check process, and proceeds to the process of step S20 in FIG.

  Next, the bonus operation check process will be described with reference to FIG. FIG. 23 is a view showing a flowchart of the bonus operation check process performed in the main control circuit 60 of the present embodiment.

  First, the main CPU 31 determines whether or not the display combination is BB1 (step S111). At this time, when the main CPU 31 determines that the display combination is not BB1, the process shifts to step S113.

  On the other hand, when the main CPU 31 determines that the display combination is BB1 in the process of step S111, the main CPU 31 performs the BB1 operation process based on the bonus operation table (step S112). Specifically, the main CPU 31 refers to the bonus operating time table, sets “460” in the bonus end number counter, and turns on the BB1 operating flag. When this process is finished, the main CPU 31 proceeds to the process of step S117.

  When determining that the display combination is not BB1 in the process of step S111, the main CPU 31 then determines whether or not the display combination is BB2 (step S113). At this time, when the main CPU 31 determines that the display combination is not BB2, the process shifts to step S115.

  On the other hand, when the main CPU 31 determines in step S113 that the display combination is BB2, the main CPU 31 performs BB2 operation processing based on the bonus operation time table (step S114). Specifically, the main CPU 31 refers to the bonus operating time table, sets “460” in the bonus end number counter, and turns on the BB2 operating flag. When this process is finished, the main CPU 31 proceeds to the process of step S117.

  When determining that the display combination is not BB2 in the process of step S113, the main CPU 31 then determines whether or not the display combination is RB (step S115). At this time, if the main CPU 31 determines that the display combination is not RB, the main CPU 31 ends the bonus operation check process and proceeds to the process of step S21 in FIG.

  On the other hand, when the main CPU 31 determines in step S115 that the display combination is RB, the main CPU 31 performs RB operation processing based on the bonus operation table (step S116). Specifically, the main CPU 31 refers to the bonus operation time table, sets “2” in the possible winning number counter, sets “2” in the possible game number counter, and turns on the RB operating flag. To. When this process is finished, the main CPU 31 proceeds to the process of step S117.

  Next, when the main CPU 31 performs the BB1 operation processing in the step 112, performs the BB2 operation processing in the step 114, or performs the RB operation processing in the step 116, The carryover combination storage area is cleared (step S117). When this process ends, the main CPU 31 ends the bonus operation check process and proceeds to the process of step S21 in FIG.

  Next, the replay operation check process will be described with reference to FIG. FIG. 24 is a diagram illustrating a flowchart of the replay operation check process performed by the main control circuit 60 of the present embodiment.

  First, the main CPU 31 determines whether or not the display combination is replay 1 or replay 2 (step S441). At this time, when the main CPU 31 determines that the display combination is not replay 1 or replay 2, the main CPU 31 ends the replay operation check process and proceeds to the process of step S22 in FIG. On the other hand, when the main CPU 31 determines that the display combination is Replay 1 or Replay 2, the main CPU 31 then copies the insertion number counter to the automatic insertion counter (step S442).

  Next, the main CPU 31 determines whether or not the display combination is replay 2 (step S443). At this time, when the main CPU 31 determines that the display combination is not replay 2, the main CPU 31 ends the replay operation check process and proceeds to the process of step S22 in FIG. On the other hand, when determining that the display combination is Replay 2, the main CPU 31 determines whether or not the RT2 operating flag is ON (step S444).

  When determining that the RT2 operating flag is on in the process of step S444, the main CPU 31 ends the replay operation check process and proceeds to the process of step S22 in FIG. On the other hand, when determining that the RT2 operating flag is not on, the main CPU 31 sets “150” in the RT game number counter (step S445), and then turns on the RT2 operating flag. (Step S446). When this process is finished, the main CPU 31 ends the replay operation check process, and proceeds to the process of step S22 of FIG.

  Next, the RT end check process will be described with reference to FIG. FIG. 25 is a flowchart of the RT end check process performed by the main control circuit 60 of the present embodiment.

  First, the main CPU 31 determines whether or not the value of the RT game number counter is “1” or more (step S451). At this time, if the main CPU 31 determines that the value of the RT game number counter is not equal to or greater than “1”, the main CPU 31 ends the RT end check process and proceeds to the process of step S2 in FIG. On the other hand, when determining that the value of the RT game number counter is “1” or more, the main CPU 31 subtracts “1” from the value of the RT game number counter (step S452).

  Next, the main CPU 31 determines whether or not the value of the RT game number counter obtained by subtracting “1” by the process of step S452 is “0” (step S453). At this time, when the main CPU 31 determines that the value of the RT game number counter is not “0”, the main CPU 31 ends the RT end check process and proceeds to the process of step S2 in FIG. On the other hand, when determining that the value of the RT game number counter is “0”, the main CPU 31 then determines whether or not the RT1 operating flag is on (step S454).

  When determining in step S454 that the RT1 operating flag is on, the main CPU 31 turns off the RT1 operating flag (step S455). On the other hand, when determining that the RT1 operating flag is not on, the main CPU 31 turns off the RT2 operating flag (step S456). When the process of step S455 or the process of step S456 is completed, the main CPU 31 ends the RT end check process and proceeds to the process of step S2 in FIG.

  Next, with reference to FIG. 26, an interrupt process controlled by the main CPU will be described. FIG. 26 is a diagram illustrating a flowchart of an interrupt process performed by the main control circuit 60 in the main control circuit 60 according to the present embodiment. Further, the interrupt process under the control of the main CPU is an interrupt process that occurs every predetermined period (for example, 1.1173 milliseconds).

  First, the main CPU 31 interrupts the program being executed before calling the interrupt process under the control of the main CPU, and saves the address indicating the interrupted position and the values of various registers in a predetermined area of the RAM 33. (Step S401). This is because when the interrupt process under the control of the main CPU is completed, the address indicating the interrupted position of the saved program and the values of various registers are restored, and the program is continuously executed from the point of interruption. It is.

  Next, the main CPU 31 performs input port check processing for checking the I / O port 38 (step S402), and then adds “1” to the interrupt counter (step S403).

  Next, the main CPU 31 determines whether or not the value of the interrupt counter is an even number (step S404). At this time, when the main CPU 31 determines that the value of the interrupt counter is an even number, the main CPU 31 proceeds to the processing of step S411.

  On the other hand, when the main CPU 31 determines in step S404 that the value of the interrupt counter is not an even number, the main CPU 31 sets an identifier indicating the left reel to the rotation control reel identifier for determining the target reel for rotation control (step S404). S405). The main CPU 31 performs reel rotation control based on the rotation control reel identifier in a reel control process described later.

  Next, the main CPU 31 performs a reel control process described later with reference to FIG. 27 based on the rotation control reel identifier set in the process of step S405 (step S406).

  Next, the main CPU 31 sets an identifier indicating a middle reel as a rotation control reel identifier for determining a target reel for rotation control (step S407).

  Next, the main CPU 31 performs a reel control process described later with reference to FIG. 27 based on the rotation control reel identifier set in the process of step S407 (step S408).

  Next, the main CPU 31 sets an identifier indicating the right reel as a rotation control reel identifier for determining a target reel for rotation control (step S409).

  Next, the main CPU 31 performs a reel control process described later with reference to FIG. 27 based on the rotation control reel identifier set in the process of step S409 (step S410).

  Next, when the main CPU 31 determines that the value of the interrupt counter is an even number in the process of step S404, or when the reel control process is performed in step S410, the main CPU 31 performs a lamp / 7SEG drive control process ( Step S411). Specifically, the main CPU 31 drives and controls the BET lamps 9 a, 9 b, 9 c and the WIN lamp 17 via the lamp driving circuit 45. Thereby, the BET lamps 9a, 9b, 9c and the WIN lamp 17 are turned on and off. Further, the main CPU 31 drives and controls the payout number display unit 18 and the credit display unit 19 via the display unit drive circuit 48. As a result, various information (such as the number of credits) is displayed on the payout number display unit 18 and the credit display unit 19.

  Next, the main CPU 31 refers to the value saved in the RAM 33 in the process of step S401 and restores the register (step S412). When this process ends, the interrupt process under the control of the main CPU is ended, and the program interrupted by the occurrence of the interrupt process under the control of the main CPU is continuously executed.

  Next, the reel control process will be described with reference to FIG. FIG. 27 is a diagram illustrating a flowchart of the reel control process performed by the main control circuit 60 of the present embodiment.

  First, the main CPU 31 refers to the rotation control reel identifier set in step S405, step S407, and step S409 of the interrupt process (see FIG. 26) under the control of the main CPU described above, and the corresponding reel is in rotation control. It is determined whether or not (step S421). At this time, when the main CPU 31 determines that the corresponding reel is not under rotation control, the main CPU 31 ends the reel control process.

  On the other hand, when the main CPU 31 determines in the process of step S421 that the corresponding reel is under rotation control, the main CPU 31 determines whether or not the reel is in a waiting state for a planned stop position (step S422). Here, the waiting state for the planned stop position refers to a state of waiting for the corresponding rotating reel to reach the planned position for stopping the rotation. In this state, the rotation of the reel is maintained at a constant speed. When the main CPU 31 determines that the corresponding reel is not waiting for the scheduled stop position, the main CPU 31 proceeds to the process of step S425.

  Next, when the main CPU 31 determines in the process of step S422 that the corresponding reel is waiting for the planned stop position, the main CPU 31 determines whether or not the reel has reached the planned stop position (step S423). When the main CPU 31 determines that the corresponding reel has not reached the scheduled stop position, the main CPU 31 proceeds to the process of step S425.

  On the other hand, when the main CPU 31 determines in step S423 that the corresponding reel has reached the scheduled stop position, the main CPU 31 shifts the control state of the reel to the deceleration control state (step S424).

  Next, when the main CPU 31 determines in the process of step S422 that the corresponding reel is not waiting for the planned stop position, the main CPU 31 determines in the process of step S423 that the corresponding reel has not reached the planned stop position. Alternatively, when the control state of the corresponding reel is shifted to the deceleration control state in the process of step S424, the reel rotation acceleration control, constant speed control, deceleration control, or stop is performed according to the reel control state. Control is performed (step S425). The main CPU 31 ends the reel control process after completing the process of step S425.

  Next, the operation of the sub control circuit 61 will be described with reference to the flowcharts shown in FIGS.

  First, with reference to FIG. 28, a command reception process by the image control microcomputer 72 will be described. FIG. 28 is a diagram showing a flowchart of command reception processing by the image control microcomputer 72 of this embodiment.

  First, the image control microcomputer 72 updates various game information (step S201). Specifically, based on the command received from the main control circuit 60, the image control microcomputer 72 performs an internal winning combination stored in the work RAM 74 or a stop start position (effective pressing operations of the stop buttons 7L, 7C, 7R are performed. When done, information such as the code number of the symbol at the position of the center line 8c) is updated.

  Next, the image control microcomputer 72 performs a command corresponding execution process described later with reference to FIG. 29 (step S202). Specifically, based on the type of command received from the main control circuit 60, the image control microcomputer 72 processes a bet command reception process, a start command reception process, a reel stop command reception process, and a display combination command reception process. To determine the production data at each progress stage.

  Next, the image control microcomputer 72 makes a request for a lamp effect (step S203). Specifically, the image control microcomputer 72 sends a command for causing the sound / lamp control circuit (mSUB) 90 to produce an effect on the LED 101 and the lamp 102 based on the effect data determined in the process of step S202. Send. The sound / lamp control microcomputer 92 of the sound / lamp control circuit (mSUB) 90 that has received the command performs control for causing the LED 101 and the lamp 102 to emit light at a predetermined timing.

  Next, the image control microcomputer 72 makes a request for a sound effect (step S204). Specifically, the image control microcomputer 72 issues a command for causing the sound / lamp control circuit (mSUB) 90 to produce an effect on the speakers 21L and 21R based on the effect data determined in the process of step S202. Send. The sound / lamp control microcomputer 92 of the sound / lamp control circuit (mSUB) 90 that has received the command designates the phrase number corresponding to the received command and transmits the designated phrase number information to the sound source data IC95, and the sound source IC95. Then, a sound effect request process (see FIG. 34) described later is performed.

  Next, the image control microcomputer 72 makes a request for a liquid crystal effect (step S205). Specifically, the image control microcomputer 72 reads out the image data from the work RAM 74 based on the effect data determined in step S202, and sets the read image data and the display position and size of the image data. Such information is transmitted to the image control IC 76. The image control IC 76 stores the received image data and the image data stored in the image ROM 79 in one frame buffer area provided in the video RAM 80. At this time, the image control microcomputer 72 causes the image control IC 76 to perform a bank switching process for switching the display image data area and the write image data area in the frame buffer area at predetermined intervals. As a result, the image control IC 76 outputs the image data written in the write image data area to the liquid crystal display device 5 and replaces the display image data area with the write image data area. Write. When this process ends, the image control microcomputer 72 ends the command reception process.

  Next, with reference to FIG. 29, a command response execution process by the image control microcomputer 72 will be described. FIG. 29 is a diagram showing a flowchart of command response execution processing by the image control microcomputer 72 of this embodiment. In the command corresponding execution process, a predetermined process is performed based on the type of the received command.

  First, the image control microcomputer 72 determines whether or not the received command is a bet command (step S221). When the image control microcomputer 72 determines that the received command is a bet command, the image control microcomputer 72 performs a bet command reception process described later with reference to FIG. 30 (step S222). Specifically, in the process at the time of receiving a bet command, the image control microcomputer 72 sets an in-game identifier. When this process ends, the image control microcomputer 72 ends the command corresponding execution process, and proceeds to the process of step S203 in FIG.

  Next, when the image control microcomputer 72 determines in step S221 that the received command is not a bet command, the image control microcomputer 72 determines whether or not the received command is a start command (step S223). When the image control microcomputer 72 determines that the received command is a start command, the image control microcomputer 72 performs a start command reception process described later with reference to FIG. 31 (step S224). Specifically, in the start command reception process, the image control microcomputer 72 determines an effect identifier, sets start effect data, and the like. When this process ends, the image control microcomputer 72 ends the command corresponding execution process, and proceeds to the process of step S203 in FIG.

  Next, when determining in step S223 that the received command is not a start command, the image control microcomputer 72 determines whether or not the received command is a reel stop command (step S225). When determining that the received command is a reel stop command, the image control microcomputer 72 performs a reel stop command reception process described later with reference to FIG. 32 (step S226). Specifically, in the reel stop command reception process, the image control microcomputer 72 sets the first stop effect data, the second stop effect data, the third stop effect data, and the like. When this process ends, the image control microcomputer 72 ends the command corresponding execution process, and proceeds to the process of step S203 in FIG.

  Next, when the image control microcomputer 72 determines in step S225 that the received command is not a reel stop command, whether or not the received command is a display combination command having information of a display combination identifier indicating a display combination. Is determined (step S227). When determining that the received command is a display combination command, the image control microcomputer 72 performs a display combination command reception process described later with reference to FIG. 33 (step S228). Specifically, in the display combination command reception process, display effect data is set. When this process ends, the image control microcomputer 72 ends the command corresponding execution process and proceeds to the process of step S203 in FIG.

  Next, when the image control microcomputer 72 determines in step S227 that the received command is not a display combination command, the image control microcomputer 72 determines effect data corresponding to the received command (step S229). When this process ends, the image control microcomputer 72 ends the command corresponding execution process, and proceeds to the process of step S203 in FIG.

  Next, with reference to FIG. 30, the bet command reception process by the image control microcomputer 72 will be described. FIG. 30 is a diagram showing a flowchart of processing at the time of bet command reception by the image control microcomputer 72 of this embodiment.

  First, the image control microcomputer 72 acquires various types of information from the received bet command (step S251).

  Next, the image control microcomputer 72 determines whether or not the in-game identifier of the work RAM 74 is “0” (step S252). When determining that the in-game identifier is not “0”, the image control microcomputer 72 ends the bet command reception process.

  On the other hand, when the image control microcomputer 72 determines that the in-game identifier is “0” in the process of step S252, it sets “1” in the in-game identifier (step S253).

  When the bet command reception process ends, the image control microcomputer 72 proceeds to the process of step S203 of FIG. 28 via the command corresponding execution process of FIG.

  Next, a start command reception process by the image control microcomputer 72 will be described with reference to FIG. FIG. 31 is a diagram showing a flowchart of processing at the time of start command reception by the image control microcomputer 72 of the present embodiment.

  First, the image control microcomputer 72 acquires command information (step S261). Specifically, the image control microcomputer 72 sets the game state identifier, the winning combination identifier, the carryover combination identifier information, and the like included in the start command in the work RAM 74.

  Next, the image control microcomputer 72 acquires a random value (step S262).

  Next, the image control microcomputer 72 refers to the stage identifier lottery table and determines a stage identifier based on the internal winning combination and the random value acquired in the process of step S262 (step S263).

  Next, the image control microcomputer 72 acquires a random value (step S264).

  Next, the image control microcomputer 72 refers to the effect identifier lottery table, and determines the effect identifier based on the stage identifier and the random value acquired in the process of step S264 (step S265).

  Next, referring to the effect data determination table, start effect data is determined based on the stage identifier and the effect identifier (step S266).

  Next, the image control microcomputer 72 sets “0” to the stop reel number counter (step S267). When this process ends, the image control microcomputer 72 ends the start command reception process, and proceeds to the process of step S203 of FIG. 28 via the command corresponding execution process of FIG.

  Next, with reference to FIG. 32, the reel stop command reception process by the image control microcomputer 72 will be described. FIG. 32 is a diagram showing a flowchart of processing at the time of reel stop command reception by the image control microcomputer 72 of this embodiment.

  First, the image control microcomputer 72 sets a stop reel identifier and a stop symbol identification number included in the received reel stop command in the work RAM 74 (step S271).

  Next, the image control microcomputer 72 determines whether or not the reel stop is the first stop based on the stop reel identifier (step S272). When determining that the reel to be stopped is the first stop, the image control microcomputer 72 refers to the effect data determination table, and determines the first stop effect data based on the effect identifier (step S273). The gaming machine 1 performs an effect at the time of the first stop using the liquid crystal display device 5, the LED 101, the lamp, the speakers 21L, 21R, and the like based on the first stop effect data. When this process ends, the image control microcomputer 72 adds “1” to the stop reel number counter (step S277), and ends the reel stop command reception process.

  On the other hand, when determining in step S272 that the reel to be stopped is not the first stop, the image control microcomputer 72 determines whether or not the reel stop is the second stop based on the stop reel identifier ( Step S274). When determining that the reel to be stopped is the second stop, the image control microcomputer 72 refers to the effect data determination table, and determines the second stop effect data based on the effect identifier (step S275). Based on the second stop effect data, the gaming machine 1 uses the liquid crystal display device 5, the LED 101, the lamp, the speakers 21L, 21R, etc. to perform the effect at the second stop time. When this process ends, the image control microcomputer 72 adds “1” to the stop reel number counter (step S277), and ends the reel stop command reception process.

  On the other hand, when the image control microcomputer 72 determines in step S274 that the reel to be stopped is not the second stop, the image control microcomputer 72 refers to the effect data determination table and determines the third stop effect data based on the effect identifier. (Step S276). The gaming machine 1 performs an effect at the time of the third stop using the liquid crystal display device 5, the LED 101, the lamp, the speakers 21L, 21R, etc. based on the third stop effect data. Next, the image control microcomputer 72 adds “1” to the stop reel number counter (step S277), and ends the reel stop command reception process.

  When the process for receiving the reel stop command is terminated, the image control microcomputer 72 proceeds to the process of step S203 of FIG. 28 via the command corresponding execution process of FIG.

  Next, with reference to FIG. 33, a display combination command reception process by the image control microcomputer 72 will be described. FIG. 33 is a diagram showing a flowchart of processing at the time of display combination command reception by the image control microcomputer 72 of this embodiment.

  First, the image control microcomputer 72 acquires command information. (Step S281). For example, the image control microcomputer 72 sets the display combination identifier included in the received display combination command in the work RAM 74.

  Next, the image control microcomputer 72 refers to the effect data determination table, and determines display effect data based on the effect identifier (step S282).

  Next, the image control microcomputer 72 sets “0” in the in-game identifier (step S283). When this process ends, the image control microcomputer 72 ends the display combination command reception process, and proceeds to the process of step S203 of FIG. 28 via the command corresponding execution process of FIG.

  Next, the sound effect request process by the sound source IC 95 will be described with reference to FIG. FIG. 34 is a diagram showing a flowchart of the sound effect request process by the sound source IC 95 of this embodiment.

  First, the sound source IC 95 determines whether or not the specified phrase number information received from the sound / lamp control microcomputer 92 exists (step S331). At this time, if the sound source IC 95 determines that the specified phrase number information does not exist, it ends the sound effect request process. On the other hand, if the sound source IC 95 determines that the designated phrase number information exists, the tone generator IC 95 acquires request data from the request data table (see FIG. 15) based on the phrase number indicated by the designated phrase number information (step S332). .

  Next, the sound source IC 95 performs data confirmation processing to determine whether or not the request data has been normally acquired from the request data table (step S333). Next, the sound source IC 95 determines whether or not the acquired request data is correct data (step S334). At this time, when the sound source IC 95 determines that the acquired request data is not correct data, the sound effect request process is terminated. On the other hand, when the sound source IC 95 determines that the acquired request data is correct data, it performs a parameter setting process (see FIG. 35) described later (step S335).

  Next, the sound source IC 95 performs a process for executing a sound effect based on the channel parameter information set in the parameter setting process (step S336). However, when the parameter setting is performed for the “fade state” of the channel parameter information, the process related to the fade control is performed in the fade control process (see FIG. 36) described later without performing the process related to the fade control in step S336. I do.

  Next, parameter setting processing by the sound source IC 95 will be described with reference to FIG. FIG. 35 is a flowchart of parameter setting processing by the sound source IC 95 of this embodiment.

  First, the sound source IC 95 analyzes the request data acquired from the request data table (step S341). Specifically, the sound source IC 95 checks the request value and the target channel number.

  Next, the sound source IC 95 determines whether or not the request value is a request for sound output (step S342). Specifically, the sound source IC 95 determines whether or not the request value is “designated channel sound output request”. At this time, when the sound source IC 95 determines that the request value is not a request for sound output, the sound source IC 95 proceeds to the process of step S344. On the other hand, when the sound source IC 95 determines that the request value is a request for sound output, the sound source IC 95 prepares sound output for outputting sound source data having the same phrase number from the speakers 21L and 21R, such as setting channel parameter information. (Step S343). The sound source IC 95 ends the parameter setting process when the process ends.

  Next, when the sound source IC 95 determines in step S342 that the request value is not a request for sound output, the sound source IC 95 then determines whether or not the request value is a request for volume change (step S344). Specifically, the sound source IC 95 determines whether the request value is “designated channel volume control request”, “designated channel master volume control request”, or “master volume control request”. At this time, when the sound source IC 95 determines that the request value is not a request for changing the volume, the sound source IC 95 proceeds to the process of step S346. On the other hand, when the sound source IC 95 determines that the request value is a request related to volume change, the sound source IC 95 makes preparations for changing the volume value of the sound source data output from the target channel, such as setting channel parameter information (step). S345). When the sound source IC 95 ends the process, the parameter setting process ends.

  Next, when determining in step S344 that the request value is not a request for changing the sound volume, the sound source IC 95 determines whether the request value is a request for fade control (step S346). Specifically, the sound source IC 95 determines whether or not the request value is a “designated channel fade control request”. At this time, if the sound source IC 95 determines that the request value is not a request related to fade control, the sound source IC 95 proceeds to the process of step S348. On the other hand, when the sound source IC 95 determines that the request value is a request related to fade control, the sound source IC 95 makes preparations for performing fade control on the sound source data output from the target channel, such as setting channel parameter information (step S347). ). When the sound source IC 95 ends the process, the parameter setting process ends.

  Next, when determining in step S346 that the request value is not a request related to fade control, the sound source IC 95 then performs other processing such as setting channel parameter information in order to perform control according to the request value. Is performed (step S348). When the sound source IC 95 ends the process, the parameter setting process ends.

  When the sound source IC 95 ends the parameter setting process, the sound source IC 95 proceeds to the process of step S336 of the sound effect request process (see FIG. 34).

  Next, the fade control process will be described with reference to FIG. FIG. 36 is a diagram illustrating a flowchart of the fade control process according to the present embodiment. The fade control process is a process for the sound / lamp control microcomputer 92 to perform interrupt control every 8 milliseconds, and to cause the sound source IC 95 to perform fade control on the sound source data transmitted from the channel.

  First, the sound source IC 95 refers to the “fade state” that is channel parameter information, and determines whether or not there is a channel in a fade-in state or a fade-out state (step S351). At this time, when the sound source IC 95 determines that there is no channel in the fade-in state or the fade-out state, the sound source IC 95 ends the fade control process. On the other hand, when the sound source IC 95 determines that there is a channel that is in the fade-in state or the fade-out state, the sound source IC 95 is displaced based on the “fade target value”, “fade time”, and “fade elapsed time” that are channel parameter information. And the volume value of the channel in the fade state is changed to the calculated volume value (step S352).

  Next, the sound source IC 95 determines whether or not the changed volume value is the same value as the “fade target value” (step S353). At this time, when the sound source IC 95 determines that the changed volume value is the same value as the “fade target value”, the sound source IC 95 updates the “fade state” of the channel parameter information to information indicating that it is not in the fade state (step S354). ), The fade control process is terminated. On the other hand, when the sound source IC 95 determines that the changed volume value is not the same value as the “fade target value”, the fade control process is ended as it is.

  As described above, in the gaming machine 1, the image ROM 79 stores a plurality of image data, the liquid crystal display device 5 displays an image based on the image data, and the image control microcomputer 72 is stored in the image ROM 79. The image data based on each image data is displayed on the liquid crystal display device 5 while switching as the game progresses, the sound source ROM 97 stores a plurality of sound source data, and the speakers 21L and 21R are stored by the sound source ROM 97. A sound is output based on the sound source data, and the sound source IC 95 has a plurality of channels for sending the sound source data stored in the sound source ROM 97 to the speakers 21L and 21R, and the sound output from the speakers 21L and 21R for each of the channels. The volume value is controlled, and the program ROM 94 is displayed by the liquid crystal display device 5. To associate the sound suitable for the image and the display image, it stores the phrase number determination table for associating the sound source data representing each image data and the appropriate sound stored by the image ROM 79. At this time, the sound / lamp control microcomputer 92 is provided on the condition that the image control microcomputer 72 switches the display image when the sound source IC 95 sends a plurality of sound source data to the speakers 21L and 21R via a plurality of channels. Based on the phrase number determination table stored in the program ROM 94, control is performed to make the sound volume value suitable for the display image after switching higher than the sound volume values of other sounds.

  Therefore, according to the gaming machine 1, even when a plurality of sounds are output, the sound volume suitable for the display image after the switching becomes larger than the sound volume of other sounds by switching the display image. Therefore, the player can hear a sound suitable for the display image, and can improve the interest.

  In the gaming machine 1, the sound / lamp control microcomputer 92 switches the display image when the sound source IC 95 sends a plurality of sound source data to the speakers 21L and 21R via a plurality of channels. Based on the above, based on the phrase number determination table stored in the program ROM 94, crossfade control is performed to fade in the sound appropriate for the display image after switching and to fade out other sounds.

  Therefore, according to the gaming machine 1, the sound suitable for the display image after switching is faded in by the crossfade, so that an interesting sound production full of a sense of reality can be realized and the sound suitable for the display image can be heard. It can improve the interest of the player.

  In the present embodiment, as shown in FIG. 16, the crossfade control is performed on the sound output from the channel “01” and the sound output from the channel “02”, but the phrase number determination shown in FIG. By using the table and the request data table shown in FIG. 38, as shown in FIG. 39, the volume value of the sound output from the channel “01” and the volume value of the sound output from the channel “02” can be reversed. Good.

  The following describes volume control when the phrase number determination table shown in FIG. 37 and the request data table shown in FIG. 38 are used instead of the phrase number determination table shown in FIG. 14 and the request data table shown in FIG. To do.

  First, when the image control microcomputer 72 determines “deep sea-submarine action A” as effect data, a control command including the effect data is transmitted to the sound / lamp control microcomputer 92 by the image control microcomputer 72. When the sound / lamp control microcomputer 92 receives the command, it designates the phrase numbers “100”, “110”, and “220” with reference to the phrase number determination table, and sequentially transmits the designated phrase number information to the sound source IC 95. To do. The sound source IC 95 sequentially reads request data from the request data table based on the phrase number information.

  The sound source IC 95 reads the sound source data having the phrase number “100” from the sound source ROM 97 suitable for the deep sea image and the request data having the phrase number “100” based on the designated phrase number information indicating the phrase number “100”. Then, based on the read request data, the sound source data is transmitted from the channel “01” and output with the phrase sound volume value “256” (indicated by a solid line 100 in FIG. 39).

  Next, based on the designated phrase number information indicating the phrase number “110”, the tone generator IC 95 has the phrase number “110” from the tone generator ROM 97 and the request data having the phrase number “110” and the tone generator data suitable for the inboard image. And the sound source data is transmitted from the channel “02” based on the read request data, and is controlled to be output with the phrase volume value “256” (indicated by a broken line 110 in FIG. 39).

  Next, as soon as the sound source IC 95 performs control based on the request data having the phrase number “110”, the sound source IC 95 reads the request data having the phrase number “220” and transmits the phrase number “110” transmitted from the channel “02”. The sound source data having “” is muted (that is, the phrase volume value is set to “0”) (indicated by a broken line 220 in FIG. 39).

  Next, when the image control microcomputer 72 determines “inboard-submarine action D” as the effect data, a control command including the effect data is transmitted to the sound / lamp control microcomputer 92 by the image control microcomputer 72. When the sound / lamp control microcomputer 92 receives a command based on the effect data “inboard-submarine action D” transmitted from the image control microcomputer 72, the sound / lamp control microcomputer 92 refers to the phrase number determination table and determines the phrase numbers “230” and “240”. The designated phrase number information is sequentially transmitted to the sound source IC 95. The sound source IC 95 sequentially reads request data from the request data table based on the phrase number information.

  When the sound source IC 95 reads request data having the phrase number “230”, the sound source data having the phrase number “100” transmitted from the channel “01” is muted (that is, the phrase volume value is set to “0”). ”) (Shown by a solid line 230 in FIG. 39).

  Next, the sound source IC 95 reads request data having the phrase number “240”, and outputs sound source data having the phrase number “110” transmitted from the channel “02” with a phrase volume value “256”. (Indicated by a broken line 240 in FIG. 39). In other words, the sound source IC 95 uses the request data having the phrase number “230” and the phrase number “240” and the sound suitable for the deep sea image output via the channel “01” and the channel “02”. Control is performed to reverse the sound volume value suitable for the image in the ship being output.

  In this case, the sound / lamp control microcomputer 92 is provided on the condition that the image control microcomputer 72 switches the display image when the sound source IC 95 sends a plurality of sound source data to the speakers 21L and 21R via a plurality of channels. Based on the phrase number determination table stored in the program ROM 94, control is performed to mute a sound different from the sound suitable for the display image after switching.

  As a result, the volume of the sound suitable for the display image can be made larger than the volume of the other sounds only by the control for muting the sound different from the sound suitable for the display image after switching, thereby reducing the control burden. Can do.

  Also, as shown in FIG. 16, when performing the cross-fade control, the volume level of one sound source data is lowered with a certain inclination and the volume level of the other sound source data is raised with a certain inclination. As shown in FIG. 40 (a) or (b), the slope when the volume level is displaced may be changed with the passage of time. In this case, the sound source IC 95 uses a predetermined function based on the “fade target value”, “fade time”, and “fade elapsed time” in the fade interruption process (see FIG. 36) performed every 8 milliseconds. The volume value to be displaced is calculated. In this way, by changing the slope when the volume level is displaced with the passage of time, the pattern of crossfade control can be diversified, and the interest is improved without getting the player bored with the sound production. be able to.

  Furthermore, in the present embodiment, when switching the image to be displayed on the liquid crystal display device 5, in order to output the sound suitable for the switched image from the speakers 21L and 21R, the two sound source data are respectively transmitted through different channels in advance. Switch to the speakers 21L and 21R and set the phrase volume value of the sound suitable for the image after switching to “0”, and switch the image with the phrase volume value set to “0” while fading in the sound with the phrase volume value set to “0” The sound that was output before is faded out. Instead of such volume control, as shown in FIG. 41, before switching, the phrase volume value of the sound suitable for the image after switching is set to a value larger than “0”, and the image after switching is subjected to switching of images. It is good also as making the volume of the sound suitable for the volume larger than the volume of the other sound.

  In the example of FIG. 41, before switching the image, a sound suitable for the switched image is output via the channel “02” at a volume value “64”, and a sound suitable for the unswitched image is output via the channel “01”. Is output at a volume value “256”. In addition, when the image is switched, the volume value of the sound of channel “02” (sound suitable for the image after switching) is increased to “256”, and the volume value of the sound of channel “01” is increased to “64”. It is decreasing. Also in this case, since the volume of the sound suitable for the display image after the switching is higher than the volume of the other sounds by switching the display image, the player can listen to the sound suitable for the display image, Interest can be improved.

  Furthermore, in the present embodiment, an image to be displayed on the liquid crystal display device 5 based on the effect data and the sound source data indicating sound suitable for the image to be displayed via the effect data and the phrase number in the phrase number determination table. Although related, instead of the phrase number determination table, the image data to be displayed on the liquid crystal display device 5 for every effect data and the sound source data suitable for the image data at a higher volume value than the other sound source data. You may provide the related table which linked | related the request data for making it output. Thus, every time the effect data is determined as the game progresses, the sound source data suitable for the image data to be displayed on the liquid crystal display device 5 is controlled to be output at a higher sound volume value than the other sound source data. Can do. Further, in order to output sound source data suitable for the image data to be displayed on the liquid crystal display device 5 at a higher sound volume value than other sound source data, a plurality of request data and display image data may be associated with each effect data. Good.

  Furthermore, in this embodiment, inboard sound source data and outboard sound source data are stored separately in the sound source ROM 97, but either one of the sound source data is stored as a sound quality such as “designated channel filter control request”. By request data having a request value that changes the sound quality of the other sound source data, the sound quality of the other sound source data can be approached. As a result, the other sound source data need not be stored in the sound source ROM 97, and the storage area can be saved.

  Furthermore, since each internal lottery table shown in FIG. 7 is defined so that the winning ranges corresponding to the respective combinations do not overlap, two or more combinations are simultaneously stored in one unit game. Although not determined as a winning combination, it is possible to determine two or more winning combinations as internal winning combinations in one unit game by defining the winning ranges of a plurality of winning combinations.

  Furthermore, in this embodiment, although illustrated as a pachislot gaming machine, it is not limited to this, The present invention can be applied to other gaming machines.

  Furthermore, a game can be executed by applying the present invention to a game program in which the operation of the gaming machine 1 is executed in a pseudo manner for a home game machine. Also in this case, the same effect as the gaming machine 1 described above can be obtained.

It is a perspective view which shows the game machine in one Embodiment which concerns on this invention. It is a figure which shows the example of the arrangement | positioning table of the symbol on the reel of the game machine in one Embodiment. It is a figure which shows the structure of the internal circuit of the game machine in one Embodiment. It is a figure which shows the structure of the sub control circuit of the game machine in one Embodiment. It is a figure which shows the example of the symbol combination table in the game machine of one Embodiment. It is a figure which shows the example of the lottery count determination table in the game machine of one Embodiment. It is a figure which shows the example of the internal lottery table in the game machine of one Embodiment. It is a figure which shows the example of the internal winning combination determination table in the gaming machine of one embodiment. It is a figure which shows the example of the table at the time of the bonus action | operation in the gaming machine of one Embodiment. It is a figure which shows the example of the internal symbol combination storage area 1, the internal symbol combination storage area 2, and the carryover combination storage area of the gaming machine of one embodiment. It is a figure which shows the example of the stage identifier lottery table in the gaming machine of one embodiment. It is a figure which shows the example of the production identifier lottery table in the game machine of one Embodiment. It is a figure which shows the example of the production data determination table in the gaming machine of one embodiment. It is a figure which shows the example of the phrase number determination table in the game machine of one Embodiment. It is a figure which shows the example of the request data table in the game machine of one Embodiment. It is a figure which shows the change of the volume value at the time of the cross fade control based on the request data table in the game machine of one Embodiment. It is a figure which shows the flowchart of the reset interruption process by the main CPU performed by the main control circuit of one Embodiment. It is a figure which shows the flowchart of the bonus operation | movement monitoring process performed with the main control circuit of one Embodiment. It is a figure which shows the flowchart of a medal reception and start check process performed in the main control circuit of one Embodiment. It is a figure which shows the flowchart of the internal lottery process performed with the main control circuit of one Embodiment. It is a figure which shows the flowchart of the reel stop control process performed with the main control circuit of one Embodiment. It is a figure which shows the flowchart of the bonus completion | finish check process performed in the main control circuit of one Embodiment. It is a figure which shows the flowchart of the bonus operation | movement check process performed with the main control circuit of one Embodiment. It is a figure which shows the flowchart of the replay operation | movement check process performed with the main control circuit of one Embodiment. It is a figure which shows the flowchart of the RT completion | finish check process performed with the main control circuit of one Embodiment. It is a figure which shows the flowchart of the interruption process by control of the main CPU performed by the main control circuit of one Embodiment. It is a figure which shows the flowchart of the reel control process performed with the main control circuit of one Embodiment. It is a figure which shows the flowchart of the command reception interruption process by the image control microcomputer performed by the sub control circuit of one Embodiment. It is a figure which shows the flowchart of the command corresponding | compatible execution process performed with the sub control circuit of one Embodiment. It is a figure which shows the flowchart of the process at the time of the bet command reception performed by the sub control circuit of one Embodiment. It is a figure which shows the flowchart of the process at the time of the start command reception performed with the sub control circuit of one Embodiment. It is a figure which shows the flowchart of the process at the time of the reel stop command reception performed by the sub control circuit of one Embodiment. It is a figure which shows the flowchart of the process at the time of the display combination command reception performed by the sub control circuit of one Embodiment. It is a figure which shows the flowchart of the sound effect request process performed in the sub control circuit of one Embodiment. It is a figure which shows the flowchart of the parameter setting process performed with the sub control circuit of one Embodiment. It is a figure which shows the flowchart of the fade control process performed with the sub control circuit of one Embodiment. It is a figure which shows the example of the phrase number determination table in the game machine of one Embodiment. It is a figure which shows the example of the request data table in the game machine of one Embodiment. It is a figure which shows the change of the volume value at the time of volume control based on the request data table in the game machine of one Embodiment. It is a figure which shows the example of a change of the volume value at the time of the cross fade control in the gaming machine of one Embodiment. It is a figure which shows the example of a change of the volume value at the time of volume control in the game machine of one Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Game machine 2b ... Liquid crystal display part 3L, 3C, 3R ... Reel 4L, 4C, 4R ... Symbol display area 5 ... Liquid crystal display device 21L, 21R ... Speaker 23 ... Liquid crystal display area 101 ... Lamp 102 ... LED
30 ... Microcomputer 31 ... Main CPU
32 ... ROM
33 ... RAM
60 ... Main control circuit 61 ... Sub control circuit

Claims (3)

A plurality of reels each having a plurality of symbols arranged on the circumferential surface;
Among a plurality of symbols arranged on the peripheral surface of the reel, symbol display means for displaying a part of symbols,
Start operation detecting means for detecting a start operation by the player;
A symbol changing means for changing the symbol displayed on the symbol display means by rotating the reel based on the start operation detected by the start operation detecting means;
Based on the fact that the start operation is detected by the start operation detecting means, a winning combination determining means for determining a winning combination from a plurality of combinations,
Stop operation detecting means for detecting a stop operation by the player;
Based on the winning combination determined by the winning combination determining means and the stop operation detected by the stop operation detecting means, the rotation of the reel is stopped and displayed on the symbol display means. Stop control means for stopping the fluctuation of the design,
Image information storage means for storing a plurality of image information;
Image display means for displaying an image based on the image information stored by the image information storage means;
Image control means for causing the image display means to display an image based on the image information stored in the image information storage means while switching as the game progresses;
Sound information storage means for storing a plurality of sound information;
Sound output means for outputting sound based on the sound information stored by the sound information storage means;
A plurality of channels for sending the sound information stored by the sound information storage means to the sound output means, and a sound control means for controlling the volume of the sound output from the sound output means for each channel;
In order to associate a display image displayed by the image display unit with a sound suitable for the display image, correspondence information between each image information stored by the image information storage unit and sound information indicating the suitable sound is obtained. Relationship information storage means for storing;
With
The sound control means stores the relationship information storage on the condition that the image control means switches the display image when a plurality of sound information is sent to the sound output means via the plurality of channels. A game machine, characterized in that, based on the correspondence information stored in the means, control is performed to increase the volume of a sound suitable for the display image after switching, compared to the volume of other sounds. In the gaming machine according to claim 1,
The sound control means stores the relationship information storage on the condition that the image control means switches the display image when a plurality of sound information is sent to the sound output means via the plurality of channels. A gaming machine characterized by performing cross-fade control for fading in sound suitable for a display image after switching and fading out other sound based on the correspondence information stored in the means. In the gaming machine according to claim 1,
The sound control means stores the relationship information storage on the condition that the image control means switches the display image when a plurality of sound information is sent to the sound output means via the plurality of channels. Based on the correspondence information stored in the means, control is performed to mute a sound different from the sound suitable for the display image after switching.

Images