JP2008021987A5 - - Google Patents
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- JP2008021987A5 JP2008021987A5 JP2007157807A JP2007157807A JP2008021987A5 JP 2008021987 A5 JP2008021987 A5 JP 2008021987A5 JP 2007157807 A JP2007157807 A JP 2007157807A JP 2007157807 A JP2007157807 A JP 2007157807A JP 2008021987 A5 JP2008021987 A5 JP 2008021987A5
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Claims (14)
前記基板が半導体基板からなり、
前記半導体基板に形成された導電型の異なる第１、第２の領域からなる半導体素子と、
前記半導体基板を貫通する第１、第２の貫通電極と、
前記半導体基板上に形成された第１、第２の配線層と、
を有し、
前記電子部品の第１の電極が、前記第１の配線層を介して前記半導体素子の第１の領域と前記半導体基板の第１の貫通電極とに接続され、
前記電子部品の第２の電極が、前記第２の配線層を介して前記半導体素子の第２の領域と前記半導体基板の第２の貫通電極とに接続されていることを特徴とする半導体装置。 A semiconductor device in which electronic components are mounted on a substrate,
The substrate comprises a semiconductor substrate ;
Said semiconductor base plate first with different formed conductive type, a semiconductor element made of the second region,
First and second through electrodes penetrating the semiconductor substrate;
First and second wiring layers formed on the semiconductor substrate;
Have
A first electrode of the electronic component is connected to the first region of the semiconductor element and the first through electrode of the semiconductor substrate via the first wiring layer ;
The second electrode of the electronic component is connected to the second region of the semiconductor element and the second through electrode of the semiconductor substrate through the second wiring layer. .
前記半導体素子の第１の領域が前記Ｎ層からなり、前記半導体素子の第２の領域が前記Ｐ層からなることを特徴とする請求項１に記載の半導体装置。 The semiconductor substrate includes a P layer and an N layer provided in a part of the P layer,
2. The semiconductor device according to claim 1, wherein a first region of the semiconductor element is formed of the N layer, and a second region of the semiconductor element is formed of the P layer .
前記基板を半導体基板により形成する工程と、
前記半導体基板に導電型の異なる第１、第２の領域からなる半導体素子を形成する工程と、
前記半導体基板を貫通する第１、第２の貫通電極を形成する工程と、
前記半導体基板上に前記半導体素子の第１の領域と前記第１の貫通電極とを接続する第１の配線層と、前記半導体素子の第２の領域と前記第２の貫通電極とを接続する第２の配線層とを形成する工程と、
前記半導体基板上に前記電子部品を搭載する工程と、
を有し、
前記電子部品の第１の電極が、前記第１の配線層を介して前記半導体素子の第１の領域と前記半導体基板の第１の貫通電極とに接続され、
前記電子部品の第２の電極は、前記第２の配線層を介して前記半導体素子の第２の領域と前記半導体基板の第２の貫通電極とに接続されることを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device in which an electronic component is mounted on a substrate,
Forming the substrate with a semiconductor substrate;
Forming a semiconductor element comprising first and second regions of different conductivity types on the semiconductor substrate;
Forming first and second through electrodes penetrating the semiconductor substrate;
A first wiring layer that connects the first region of the semiconductor element and the first through electrode on the semiconductor substrate , and a second region of the semiconductor element and the second through electrode are connected. Forming a second wiring layer ;
Mounting the electronic component on the semiconductor substrate;
I have a,
A first electrode of the electronic component is connected to the first region of the semiconductor element and the first through electrode of the semiconductor substrate via the first wiring layer;
The second electrode of the electronic component is connected to the second region of the semiconductor element and the second through electrode of the semiconductor substrate through the second wiring layer . Production method.
前記半導体素子の第１の領域が前記Ｎ層からなり、前記半導体素子の第２の領域が前記Ｐ層からなることを特徴とする請求項８に記載の半導体装置の製造方法。 The semiconductor substrate includes a P layer and an N layer provided in a part of the P layer,
9. The method of manufacturing a semiconductor device according to claim 8, wherein the first region of the semiconductor element is made of the N layer, and the second region of the semiconductor element is made of the P layer .
前記基板が半導体基板からなり、
前記半導体基板に形成された導電型の異なる第１、第２の領域からなる半導体素子と、
前記半導体基板を貫通する第１、第２の貫通電極と、
前記半導体基板上に形成された第１、第２の配線層と、
を有し、
前記第１の配線層が前記半導体素子の第１の領域と前記半導体基板の第１の貫通電極とを接続し、
前記第２の配線層が前記半導体素子の第２の領域と前記半導体基板の第２の貫通電極とを接続していることを特徴とする基板。 A substrate on which electronic components are mounted,
The substrate comprises a semiconductor substrate ;
Said semiconductor base plate first with different formed conductive type, a semiconductor element made of the second region,
First and second through electrodes penetrating the semiconductor substrate;
First and second wiring layers formed on the semiconductor substrate;
Have
The first wiring layer connects the first region of the semiconductor element and the first through electrode of the semiconductor substrate;
The substrate, wherein the second wiring layer connects the second region of the semiconductor element and the second through electrode of the semiconductor substrate.
前記半導体素子の第１の領域が前記Ｎ層からなり、前記半導体素子の第２の領域が前記Ｐ層からなることを特徴とする請求項１２に記載の基板。 The semiconductor substrate includes a P layer and an N layer provided in a part of the P layer,
The substrate according to claim 12, wherein a first region of the semiconductor element is made of the N layer, and a second region of the semiconductor element is made of the P layer .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007157807A JP5394617B2 (en) | 2006-06-16 | 2007-06-14 | Semiconductor device, semiconductor device manufacturing method and substrate |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006168166 | 2006-06-16 | ||
| JP2006168166 | 2006-06-16 | ||
| JP2007157807A JP5394617B2 (en) | 2006-06-16 | 2007-06-14 | Semiconductor device, semiconductor device manufacturing method and substrate |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008021987A JP2008021987A (en) | 2008-01-31 |
| JP2008021987A5 true JP2008021987A5 (en) | 2010-07-08 |
| JP5394617B2 JP5394617B2 (en) | 2014-01-22 |
Family
ID=39077692
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007157807A Active JP5394617B2 (en) | 2006-06-16 | 2007-06-14 | Semiconductor device, semiconductor device manufacturing method and substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5394617B2 (en) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102008049777A1 (en) * | 2008-05-23 | 2009-11-26 | Osram Opto Semiconductors Gmbh | Optoelectronic module |
| JP5419525B2 (en) * | 2009-04-06 | 2014-02-19 | 新光電気工業株式会社 | Semiconductor device and manufacturing method thereof |
| US8598684B2 (en) | 2009-04-06 | 2013-12-03 | Shinko Electric Industries Co., Ltd. | Semiconductor device, and method of manufacturing the same |
| JP5419547B2 (en) * | 2009-05-28 | 2014-02-19 | 新光電気工業株式会社 | Semiconductor device and manufacturing method thereof |
| WO2012086517A1 (en) * | 2010-12-20 | 2012-06-28 | ローム株式会社 | Light-emitting element unit, and light-emitting element package |
| DE102010056056A1 (en) * | 2010-12-23 | 2012-06-28 | Osram Opto Semiconductors Gmbh | Method for producing an electrical connection carrier |
| JP5946520B2 (en) * | 2011-05-19 | 2016-07-06 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングＯｓｒａｍ Ｏｐｔｏ Ｓｅｍｉｃｏｎｄｕｃｔｏｒｓ ＧｍｂＨ | Optoelectronic device and method of manufacturing optoelectronic device |
| JP5919943B2 (en) * | 2012-03-27 | 2016-05-18 | 凸版印刷株式会社 | Silicon interposer |
| DE102012104494A1 (en) * | 2012-05-24 | 2013-11-28 | Epcos Ag | light emitting diode device |
| JP2013258241A (en) * | 2012-06-12 | 2013-12-26 | Murata Mfg Co Ltd | Light-emitting device |
| WO2013187319A1 (en) * | 2012-06-12 | 2013-12-19 | 株式会社村田製作所 | Mounting substrate and light-emitting device |
| KR102054337B1 (en) * | 2012-08-07 | 2020-01-22 | 루미리즈 홀딩 비.브이. | Led package and manufacturing method |
| JP2014220361A (en) * | 2013-05-08 | 2014-11-20 | 株式会社東芝 | Electrostatic protective element and light-emitting module |
| JP5836346B2 (en) * | 2013-10-04 | 2015-12-24 | 有限会社 ナプラ | Wiring board and electronic device |
| JP6539035B2 (en) * | 2014-01-08 | 2019-07-03 | ローム株式会社 | Chip parts |
| TWI501363B (en) * | 2014-01-10 | 2015-09-21 | Sfi Electronics Technology Inc | Miniaturized smd tpye diode packing components and manufacturing method thereof |
| DE102014105188A1 (en) * | 2014-04-11 | 2015-10-15 | Osram Opto Semiconductors Gmbh | Semiconductor chip, optoelectronic component with semiconductor chip and method for producing a semiconductor chip |
| JP5866561B1 (en) * | 2014-12-26 | 2016-02-17 | パナソニックＩｐマネジメント株式会社 | Light emitting device and manufacturing method thereof |
| JP5838357B1 (en) * | 2015-01-13 | 2016-01-06 | パナソニックＩｐマネジメント株式会社 | Light emitting device and manufacturing method thereof |
| JP6801950B2 (en) * | 2015-04-15 | 2020-12-16 | ショット日本株式会社 | Through Silicon Via and Semiconductor Package |
| JP6736260B2 (en) * | 2015-05-13 | 2020-08-05 | ローム株式会社 | Semiconductor light emitting device |
| KR102412600B1 (en) * | 2015-07-03 | 2022-06-23 | 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 | Light emitting device and lighting module having thereof |
| JP6662716B2 (en) * | 2016-06-08 | 2020-03-11 | 新光電気工業株式会社 | Optical sensor, method for manufacturing optical sensor |
| JP6732586B2 (en) * | 2016-07-28 | 2020-07-29 | ローム株式会社 | LED package |
| JP2022178412A (en) | 2021-05-20 | 2022-12-02 | スタンレー電気株式会社 | Semiconductor device and manufacturing method of semiconductor device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3911839B2 (en) * | 1998-04-08 | 2007-05-09 | 松下電器産業株式会社 | Semiconductor light emitting device |
| JP2000012913A (en) * | 1998-06-19 | 2000-01-14 | Matsushita Electron Corp | Electrostatic protective diode used for semiconductor light-emitting device and manufacture thereof |
| US6617681B1 (en) * | 1999-06-28 | 2003-09-09 | Intel Corporation | Interposer and method of making same |
| EP1617473A1 (en) * | 2004-07-13 | 2006-01-18 | Koninklijke Philips Electronics N.V. | Electronic device comprising an ESD device |
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2007
- 2007-06-14 JP JP2007157807A patent/JP5394617B2/en active Active
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