JP2008009625A - Integrated circuit for electric power source - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a chip size and to reduce a cost. <P>SOLUTION: This integrated circuit for an electric power source is provided with the first power source terminal applied with the first power source voltage, the second power source terminal applied with the second power source voltage (more than the first power source voltage) when the first power source voltage is applied to the first power source terminal, and applied with the third power source voltage (the first power source voltage < the third power source voltage < the second power source voltage) when the first power source voltage is not applied to the first power source terminal, a detecting circuit for detecting whether the voltage applied to the second power source terminal is the second power source voltage or the third power source voltage, and a power source voltage generating circuit for generating the first power source voltage, based on a detection result from the detecting circuit indicating that the voltage applied to the second power source terminal is the third power source voltage. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an integrated circuit for power supply.

  For example, in a power integrated circuit for a motor, a power supply voltage (for example, 12 volts: hereinafter referred to as VCCP) for driving the motor and a signal power supply voltage (for example, 5 VCC) for controlling the motor drive. Some use two power sources (hereinafter referred to as dual power sources), such as bolts: hereinafter referred to as VCCS. In order to deal with dual power supplies, the power supply integrated circuit includes, for example, a power supply terminal for VCCP and a power supply terminal for VCCS (see, for example, Patent Document 1).

FIG. 4 is a block diagram for explaining a conventional power supply integrated circuit 100. The power supply integrated circuit 100 includes power supply terminals 102 and 104, a VCCP use circuit unit 6, and a VCCS use circuit unit 8.
The power supply terminal 102 is a power supply terminal for VCCP, and is connected to a power supply line for VCCP (hereinafter referred to as a VCCP line). Then, VCCP is applied to the power supply terminal 102 from the outside of the power supply integrated circuit 100.
The power supply terminal 104 is a power supply terminal for VCCS, and is connected to a power supply line for VCCS (hereinafter referred to as a VCCS line). Then, VCCS is applied to the power supply terminal 104 from the outside of the power supply integrated circuit 100.
The VCCP using circuit unit 6 is connected to the VCCP line. Note that the VCCP using circuit unit 6 is formed of an element having a high breakdown voltage (for example, a breakdown voltage of greater than 12 volts).
The VCCS use circuit unit 8 is connected to the VCCS line.
When the power supply integrated circuit 100 is applied to a dual power supply device, VCCP is applied to the power supply terminal 102 and VCCS is applied to the power supply terminal 104.

However, for example, in an audio device (such as an optical disk device), VCCP and VCCS may be common (hereinafter referred to as a single power source). In this case, if the VCCP circuit 6 and the VCCS circuit 8 can be operated with the voltage of the single power supply (for example, 8 volts), the power supply terminal 102 and the power supply terminal 104 are connected inside or outside the power supply integrated circuit 100. In this case, a single power supply voltage is commonly applied to the power supply terminal 102 and the power supply terminal 104.
Japanese Patent Laid-Open No. 7-6838

  When the voltage applied to the power supply terminal 104 is limited to, for example, 5 volts, the VCCS circuit 8 is smaller in size than the high withstand voltage element and can be formed at low cost (for example, withstand voltage of 5 volts). It can be formed of an element. However, the power supply integrated circuit 100 in which the VCCS circuit 8 is formed of a low breakdown voltage element cannot be applied to the above-described single power supply device.

  That is, in order to support both the dual power supply device and the single power supply device, all of the VCCP circuit 6 and the VCCS circuit 8 shown in FIG. 4 must be formed of high voltage elements. It will be.

  As described above, the conventional integrated circuit 100 for power supply with two power supplies is considered to be applied to a single power supply apparatus even though the VCCS circuit 8 can be formed with a low withstand voltage element. Thus, the VCCS circuit portion 8 is formed of a high breakdown voltage element. Therefore, there is a problem that the chip size is increased and the cost of the power supply integrated circuit 100 is increased as compared with the case where the VCCS circuit unit 8 is formed of a low breakdown voltage element.

  Accordingly, an object of the present invention is to provide a power supply integrated circuit that can reduce the chip size of the power supply integrated circuit with two power supplies and can reduce the cost.

  A main invention for solving the above-mentioned problems is that a first power supply terminal to which a first power supply voltage is applied and a second power supply voltage (> the first power supply voltage when the first power supply voltage is applied to the first power supply terminal). 1 power supply voltage) is applied, and when the first power supply voltage is not applied to the first power supply terminal, the third power supply voltage (the first power supply voltage <the third power supply voltage <the second power supply voltage) is applied. A second power supply terminal, a detection circuit for detecting whether the voltage applied to the second power supply terminal is the second power supply voltage or the third power supply voltage, and applied to the second power supply terminal And a power supply voltage generation circuit for generating the first power supply voltage based on a detection result of the detection circuit indicating that the voltage is the third power supply voltage.

  According to the present invention, it is possible to reduce the chip size of the dual-power-supply integrated circuit and to reduce the cost.

  At least the following matters will become apparent from the description of this specification and the accompanying drawings.

=== Configuration of Integrated Circuit for Power Supply ===
Hereinafter, the configuration of the power integrated circuit of the present invention will be described with reference to FIG. FIG. 1 is a block diagram showing an example of the configuration of a power integrated circuit 1 according to the present invention.

  1 includes a reference voltage circuit 10 (generation source), a comparator 12 (comparison circuit), an error amplification circuit 14 (operational amplification circuit), an NPN bipolar transistor 16 (transistor), and resistors R1 and R2. , R3, R4, power supply terminal 2 (second power supply terminal), and power supply terminal 4 (first power supply terminal).

  The power supply terminal 2 is connected to the VCCP line. In the case of a dual power supply, for example, 12 volts (second power supply voltage) is applied to the power supply terminal 2 as a power system power supply voltage VCCP, and in the case of a single power supply, for example, 8 volts (third power supply voltage) is applied. The

  The power supply terminal 4 is connected to the VCCS line. Only when applied to a dual power supply device, for example, 5 volts (first power supply voltage) is applied to the power supply terminal 4 as the power supply voltage VCCS of the signal system. The VCCP line is connected to a VCCP use circuit (not shown), and the VCCS line is connected to a VCCS use circuit (not shown).

  For example, the reference voltage circuit 10 generates a constant (eg, 1.2 volts) reference voltage VREF (first reference voltage and second reference voltage) from the voltage of the VCCP line. The reference voltage circuit 10 can be configured by a known band gap type reference voltage circuit. The reference voltage VREF may be taken from outside the power supply integrated circuit 1.

The resistors R1 and R2 are connected in series between the VCCP line and the ground (hereinafter, the connection point between the resistors R1 and R2 is referred to as point A). When the resistance value of the resistor R1 is R1, the resistance value of the resistor R2 is R2, and the voltage appearing at the point A (voltage corresponding to the voltage applied to the second power supply terminal) is VA, VA is
VA = VCCP × R1 / (R1 + R2)
It becomes. The resistance values of R1 and R2 are set in advance so that VA is equal to the reference voltage VREF when VCCP is 10 volts, for example. That is, when VCCP is 10 volts or more, for example, VA is equal to or higher than the reference voltage VREF, and when VCCP is less than 10 volts, for example, VA is less than the reference voltage VREF. The resistors R1 and R2 may be externally attached to the power supply integrated circuit 1, respectively.

  The reference voltage VREF is applied to the inverting input terminal (hereinafter referred to as -terminal) of the comparator 12, and VA is applied to the non-inverting input terminal (hereinafter referred to as + terminal) of the comparator 12. Then, the comparator 12 outputs a comparison result between the reference voltages VREF and VA as COMOUT (detection result). The output COMOUT of the comparator 12 is high level (hereinafter referred to as “H”) when VA is equal to or higher than the reference voltage VREF, and is low level (hereinafter referred to as “L”) when VA is lower than the reference voltage VREF. Become. The comparator 12 and the resistors R1 and R2 constitute a detection circuit.

  A reference voltage VREF is applied to the + terminal of the error amplifying circuit 14, and a voltage (feedback voltage) that appears at a connection point (hereinafter referred to as a B point) between a resistor R4 and a resistor R3, which will be described later, is applied to the-terminal. Hereinafter, the voltage at point B is VB. Then, the error amplifier circuit 14 applies an output voltage corresponding to the comparison between the reference voltages VREF and VB to the base of the NPN transistor 16. The error amplifying circuit 14 operates when the output COMOUT of the comparator 12 is “L”, and stops operating when the output COMOUT is “H”.

  The collector of an NPN bipolar transistor (hereinafter referred to as NPN transistor) 16 is connected to the VCCP line, and the emitter (hereinafter referred to as C point) of NPN transistor 16 is grounded via resistors R4 and R3, It is connected.

The resistors R3 and R4 are connected in series between the point C and the ground, and generate VB from the output current of the NPN transistor 16 at the point B. When the voltage at the point C is VC, the resistance value of the resistor R3 is R3, and the resistance value of the resistor R4 is R4, VB is
VB = VC × R3 / (R3 + R4)
It becomes. The values of R3 and R4 are set to predetermined values so that VB is equal to the reference voltage VREF when VC is 5 volts, for example.

=== Comparator ===
An example of the configuration of the comparator 12 will be described with reference to FIG. FIG. 2 is a circuit diagram illustrating an example of the configuration of the comparator 12.

The comparator 12 has a constant current circuit 20, PNP bipolar transistors (hereinafter referred to as PNP transistors) 22, 24, NPN transistors 26, 28, 30, 32, and resistors R5, R6. Note that the transistor size ratios of the NPN transistor 26 and the NPN transistor 28, and the PNP transistor 22 and the PNP transistor 24 are equal.
The constant current circuit 20 generates a constant current I from VCCP applied to the power supply terminal 2.

  The collector of the PNP transistor 22 is connected to the collector of the NPN transistor 26, and the emitter of the PNP transistor 22 is connected to the emitter of the PNP transistor 24. A constant current I is supplied from the constant current circuit 20 to a connection point between the emitter of the PNP transistor 22 and the emitter of the PNP transistor 24. Further, VA is applied to the base of the PNP transistor 22.

  The collector of the PNP transistor 24 is connected to the collector of the NPN transistor 28. A reference voltage VREF is applied to the base of the PNP transistor 24.

  The base of the NPN transistor 26 is short-circuited to the collector of the NPN transistor 26 (hereinafter, the state in which the base and the collector are short-circuited in this way is referred to as diode connection) and connected to the base of the NPN transistor 28. Yes. The emitter of the NPN transistor 26 and the emitter of the NPN transistor 28 are both grounded. Therefore, the NPN transistor 26 and the NPN transistor 28 constitute a current mirror circuit. When the transistor size ratio is equal, the NPN transistor 28 tries to flow a collector current equal to the collector current of the NPN transistor 26.

  The base of the NPN transistor 30 is connected to the collector of the NPN transistor 28, and the collector of the NPN transistor 30 is connected to the VCCP line via the resistor R5. The emitter of the NPN transistor 30 is grounded.

The base of the NPN transistor 32 is connected to the collector of the NPN transistor 30, and the collector of the NPN transistor 32 is connected to the VCCP line via the resistor R6. The emitter of the NPN transistor 32 is grounded. Note that the voltage level of the collector of the NPN transistor 32 becomes the output COMOUT of the comparator 12.
Next, the operation of the comparator 12 will be described.

≪When VA is higher than reference voltage VREF≫
When VA is equal to or higher than the reference voltage VREF, the PNP transistor 24 is turned on and the PNP transistor 22 is turned off. When the PNP transistor 22 is turned off, the collector current is not supplied to the diode-connected NPN transistor 26. Therefore, the NPN transistor 26 is turned off, and the NPN transistor 26 that forms a current mirror circuit with the NPN transistor 26 is also turned off.

  The NPN transistor 30 is turned on when the collector current of the PNP transistor 24 is supplied to the base. When the NPN transistor 30 is turned on, no current is supplied to the base of the NPN transistor 32. Therefore, since the NPN transistor 32 is turned off, the output COMOUT of the comparator 12 becomes “H”.

≪When VA is less than reference voltage VREF≫
When VA is less than the reference voltage VREF, the PNP transistor 24 is turned off and the PNP transistor 22 is turned on. When the PNP transistor 22 is turned on, the collector current of the PNP transistor 22 is supplied to the collector of the diode-connected NPN transistor 26. Therefore, the NPN transistor 26 is turned on, and the NPN, the transistor 26, and the NPN transistor 28 constituting the current mirror circuit are also turned on. Then, the NPN transistor 28 tries to flow a collector current of the same size as the NPN transistor 26.

  Therefore, no current is supplied to the base of the NPN transistor 30, and the NPN transistor 30 is turned off. When the NPN transistor 30 is turned off, VCCP is applied to the base of the NPN transistor 32 via the resistor R5. Accordingly, since the NPN transistor 32 is turned on, the output COMOUT of the comparator 12 becomes “L”.

=== Regulator ===
An example of the configuration of the regulator 18 will be described with reference to FIG. FIG. 3 is a circuit diagram for explaining an example of the configuration of the regulator 18. In FIG. 3, the same components as those in FIG.

  The regulator 18 shown in FIG. 3 includes an error amplifier circuit 14, an NPN transistor 16, and resistors R3 and R4. Further, the error amplifying circuit 14 includes PNP transistors 42, 44, 52, 54, and NPN transistors 46, 48, 50, 56, 58, 60. Note that the transistor size ratios of the PNP transistors 42, 44, 52, 54 and the NPN transistors 50, 60 are equal.

  The base of the diode-connected PNP transistor 42 is connected to the base of the PNP transistor 44. The emitter of the PNP transistor 42 and the emitter of the PNP transistor 44 are both connected to the VCCP line. Therefore, the PNP transistor 42 and the PNP transistor 44 constitute a current mirror circuit, and when the transistor size ratio is equal, the PNP transistor 44 tries to flow a collector current equal to the collector current of the PNP transistor 42. Note that the collector of the PNP transistor 44 is connected to the collector of the NPN transistor 50.

  The collector of the NPN transistor 48 is connected to the collector of the PNP transistor 42, and the emitter is grounded. A reference voltage VREF is applied to the base of the NPN transistor 48.

  The collector of the NPN transistor 46 is connected to the collector of the PNP transistor 44, and the emitter is grounded. The output COMOUT of the comparator 12 is applied to the base of the NPN transistor 46.

  The base of the diode-connected NPN transistor 50 is connected to the base of the NPN transistor 60. The emitter of the NPN transistor 50 and the emitter of the NPN transistor 60 are both grounded. Therefore, the NPN transistor 50 and the NPN transistor 60 constitute a current mirror circuit. When the transistor size ratio between the NPN transistor 50 and the NPN transistor 60 is equal, the NPN transistor 60 has a collector equal to the collector current of the NPN transistor 50. Try to pass current.

  The base of the diode-connected PNP transistor 52 is connected to the base of the PNP transistor 54. The emitter of the PNP transistor 52 and the emitter of the PNP transistor 54 are both connected to the VCCP line. Therefore, the PNP transistor 52 and the PNP transistor 54 constitute a current mirror circuit, and when the transistor size ratio is equal, the PNP transistor 54 tries to flow a collector current equal to the collector current of the PNP transistor 52.

  The collector of the NPN transistor 56 is connected to the collector of the PNP transistor 52, and the emitter of the NPN transistor 56 is connected to the collector of the NPN transistor 60. A reference voltage VREF is applied to the base of the NPN transistor 56.

  The collector of the NPN transistor 58 is connected to the collector of the PNP transistor 54 and the base of the NPN transistor 16, and the emitter of the NPN transistor 58 is connected to the collector of the NPN transistor 60. Further, VB is applied to the base of the NPN transistor 58.

Next, the operation of the regulator 18 will be described.
The NPN transistor 48 is turned on when the reference voltage VREF is applied to the base. When the NPN transistor 48 is turned on, the PNP transistor 42 supplies a collector current to the collector of the NPN transistor 48. Therefore, both of the PNP transistors 42 and 44 constituting the current mirror circuit are turned on, and the PNP transistor 44 tries to flow a collector current equal to the collector current of the PNP transistor 42.

  Here, when the output COMOUT of the comparator 12 is “L”, the NPN transistor 46 is turned off. Since the NPN transistor 46 is turned off, the collector current of the PNP transistor 44 is supplied to the diode-connected NPN and the collector of the transistor 50. Therefore, both the PNP transistor 50 and the PNP transistor 60 constituting the current mirror circuit are turned on, and the PNP transistor 60 tries to flow a collector current equal to the collector current of the PNP transistor 50. Accordingly, a differential operation is performed in accordance with a comparison between the reference voltage VREF applied to the base of the PNP transistor 56 and VB applied to the base of the PNP transistor 58.

≪VB> Reference voltage VREF≫
In this case, the collector current of the NPN transistor 58 is larger than the collector current of the NPN transistor 56. Further, the collector current of the NPN transistor 56 is supplied from the collector of the PNP transistor 52, and the PNP transistor 54 and the PNP transistor 54 constituting the current mirror circuit have the same collector current of the PNP transistor 52 when the transistor size ratio is equal. An attempt is made to flow a collector current of the same magnification.
Therefore, the collector current of the NPN transistor 58 is larger than the collector current of the PNP transistor 54. Therefore, the output voltage to the base of the NPN transistor 16 decreases, and VB decreases accordingly.

≪In case of VB <reference voltage VREF≫
In this case, the collector current of the NPN transistor 56 is larger than the collector current of the NPN transistor 58. Further, the collector current of the NPN transistor 56 is supplied from the collector of the PNP transistor 52, and the PNP transistor 54 and the PNP transistor 54 constituting the current mirror circuit have the same collector current of the PNP transistor 52 when the transistor size ratio is equal. An attempt is made to flow a collector current of the same magnification.
Therefore, the collector current of the NPN transistor 54 is larger than the collector current of the PNP transistor 58. Therefore, the output voltage to the base of the NPN transistor 16 rises, and VB rises accordingly.

  As described above, the regulator 18 adjusts the output voltage to the base of the NPN transistor 16 so as to decrease VB when VB> reference voltage VREF and increase VB when VB <reference voltage VREF. . Therefore, VB is adjusted to be equal to the reference voltage VREF. At this time, the voltage VC at the point C is, for example, 5 volts depending on the setting of the resistance values of the resistors R3 and R4 as described above.

  On the other hand, when the output COMOUT of the comparator 12 is “H”, the NPN transistor 46 is turned on. Therefore, the collector current of the PNP transistor 44 is supplied as the collector current of the NPN transistor 46. For this reason, since no current is supplied to the collector of the diode-connected NPN transistor 50, the NPN transistor 50 is turned off, and the NPN transistor 50 and the NPN transistor 60 constituting the current mirror circuit are also turned off. When the NPN transistor 60 is turned off, both the NPN transistors 56 and 58 are turned off, and when the NPN transistor 56 is turned off, the PNP transistors 52 and 54 constituting the current mirror circuit are also turned off. Therefore, the error amplifier circuit 14 does not perform a differential operation between the reference voltages VREF and VB, and no current is supplied to the base of the NPN transistor 16. Therefore, the NPN transistor 16 is turned off and the regulator 18 does not operate.

=== Operation of Integrated Circuit for Power Supply ===
The operation of the power integrated circuit 1 of the present invention will be described below with reference to FIGS.

≪When applied to a dual power supply device≫
In FIG. 1, when applied to a dual power supply device of VCCP (for example, 12 volts) and VCCS (for example, 5 volts), VCCP is applied to the power supply terminal 2 and VCCS is applied to the power supply terminal 4. The resistors R1 and R2 are set with resistance values R1 and R2, respectively, so that when the VCCP line is 10 volts, for example, VA and the reference voltage VREF are equal, so when the VCCP line is 12 volts, VA is the reference The voltage VREF (for example, 1.2 volts) or higher. Therefore, the output COMOUT of the comparator 12 becomes “H”. When the output COMOUT of the comparator 12 becomes “H”, the error amplifier circuit 14 does not operate as described above, and the NPN transistor 16 is turned off. That is, the operation of the regulator 18 is stopped.
Therefore, when applied to a device with two power supplies, VCCP is applied to the VCCP use circuit unit (not shown) via the power supply terminal 2 and the VCCP line, and VCCS is used via the power supply terminal 4 and the VCCS line. It is applied to a circuit unit (not shown).

≪When applied to a single power supply device≫
When applied to a single power supply device, a single power supply voltage is applied only to the power supply terminal 2. When the voltage of the single power source is 8 volts, for example, VA is less than the reference voltage VREF. Therefore, the output COMOUT of the comparator 12 is “L”. When the output COMOUT of the comparator 12 becomes “L”, as described above, the error amplifier circuit 14 performs a differential operation based on the reference voltages VREF and VB. That is, when the reference voltage VREF> VB, the output voltage to the base of the NPN transistor 16 is increased, and when the reference voltage VREF <VB, the output voltage to the base of the PN transistor 16 is decreased. As a result, VB approaches the reference voltage VREF. Further, as VB approaches the reference voltage VREF, the voltage VC at the point C approaches 5 volts. Therefore, even if VCCS is not applied to the power supply terminal 4, a voltage of, for example, 5 volts can be generated from a voltage of, for example, 8 volts on the VCCP line and applied to the VCCS line. Therefore, the VCCS use circuit 8 connected to the VCCS line can be formed with a low breakdown voltage element.

  Therefore, when applied to a single power supply device, a single power supply voltage (for example, 8 volts) is applied to the VCCP using circuit unit (not shown) via the power supply terminal 2 and the VCCP line, and the voltage VC at the point C Is applied to the VCCS use circuit unit (not shown) via the VCCS line.

  In the present embodiment, the VREF generated in the reference voltage circuit 10 is used in the comparator 12 and the error amplifying circuit 14, but a generation source may be provided separately.

 As described above, the power supply integrated circuit 1 of the present invention can form the VCCS use circuit 8 in FIG. 4 with a low breakdown voltage element. Therefore, the chip size of the power supply integrated circuit 1 for two power supplies can be reduced, and the cost can be reduced.

 Further, by comparing VA with the reference voltage VREF, it is possible to reliably detect whether the voltage applied to the power supply terminal 2 is, for example, 12 volts or, for example, 8 volts.

 Further, the output voltage of the error amplifying circuit 14 applied to the base of the NPN transistor 16 is adjusted so that the voltage VB becomes equal to the reference output voltage VREF. Can be reliably applied to the VCCP line.

 Furthermore, by using the reference voltage VREF generated in the reference voltage circuit 10 in common for comparison in the comparator 12 and the error amplifier circuit 14, the cost can be further reduced.

  Although the present embodiment has been described above, the above-described examples are for facilitating the understanding of the present invention, and are not intended to limit the present invention. The present invention can be changed / improved without departing from the spirit thereof, and the present invention includes equivalents thereof.

It is a block diagram which shows the structure of the integrated circuit for power supplies which concerns on this invention. It is a circuit diagram which shows an example of a structure of a comparator. It is a circuit diagram which shows an example of a structure of a regulator. It is a block diagram of the conventional integrated circuit for power supplies.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,100 Power supply integrated circuit 2, 4, 102, 104 Power supply terminal 6 VCCP use circuit part 8 VCCS use circuit part 10 Reference voltage circuit 12 Comparator 14 Error amplification circuit 16 NPN transistor 18 Regulator 20 Constant current circuit 22, 24, 42 , 44, 52, 54 PNP transistor 46, 48, 50, 56, 58, 60 NPN transistor 26, 28, 30, 32 NPN transistor R1, R2, R3, R4 Resistance

Claims (4)

A first power supply terminal to which a first power supply voltage is applied;
When the first power supply voltage is applied to the first power supply terminal, a second power supply voltage (> the first power supply voltage) is applied, and when the first power supply voltage is not applied to the first power supply terminal, the second power supply voltage is applied. A second power supply terminal to which three power supply voltages (the first power supply voltage <the third power supply voltage <the second power supply voltage) are applied;
A detection circuit for detecting whether the voltage applied to the second power supply terminal is the second power supply voltage or the third power supply voltage;
A power supply voltage generating circuit for generating the first power supply voltage based on a detection result of the detection circuit indicating that a voltage applied to the second power supply terminal is the third power supply voltage;
An integrated circuit for power supply, comprising: The detection circuit includes:
When the voltage according to the voltage applied to the second power supply terminal is compared with the first reference voltage, and the voltage according to the voltage applied to the second power supply terminal is equal to or higher than the first reference voltage, When a detection result indicating that the voltage applied to the second power supply terminal is the second power supply voltage is output, and the voltage corresponding to the voltage applied to the second power supply terminal is less than the first reference voltage A comparison circuit for outputting a detection result indicating that the voltage applied to the second power supply terminal is the third power supply voltage;
The integrated circuit for power supply according to claim 1, comprising: The power supply voltage generation circuit includes:
An operational amplifier circuit that operates according to the detection result of the detection circuit when the voltage applied to the second power supply terminal is the third power supply voltage, and compares the second reference voltage and the feedback voltage;
A transistor that operates according to the magnitude of the output voltage of the operational amplifier circuit, and outputs the first power supply voltage when the second reference voltage and the feedback voltage are equal;
A resistor having a predetermined value for converting the output current of the transistor into the feedback voltage;
The integrated circuit for power supply according to claim 1, wherein: The sources of the first reference voltage and the second reference voltage are the same.
The integrated circuit for power supply according to claim 3.

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