JP2008004971A5 - - Google Patents
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- JP2008004971A5 JP2008004971A5 JP2007249579A JP2007249579A JP2008004971A5 JP 2008004971 A5 JP2008004971 A5 JP 2008004971A5 JP 2007249579 A JP2007249579 A JP 2007249579A JP 2007249579 A JP2007249579 A JP 2007249579A JP 2008004971 A5 JP2008004971 A5 JP 2008004971A5
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- JP
- Japan
- Prior art keywords
- resin
- resin sheet
- mold
- die pad
- back surface
- Prior art date
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Claims (3)
表面と裏面を備え、ダイパッドを含むフレームと、
該ダイパッドの表面に載置されたパワーチップと、
該パワーチップを封止するように設けられたモールド樹脂と、
対向する第１面と第２面とを備え、該ダイパッドの裏面がその第１面と接するように配置され、該ダイパッドを包含するサイズで、かつ該モールド樹脂よりも熱伝導率が大きい絶縁性の樹脂シートと、
該樹脂シートの第２面上に設けられた金属箔と、
該樹脂シートと該モールド樹脂とが共に液状化された状態で混合した混合層と、を含むことを特徴とする半導体装置。 A semiconductor device in which a chip is resin-molded,
A frame having a front surface and a back surface, including a die pad;
A power chip placed on the surface of the die pad;
A mold resin provided to seal the power chip;
Insulating property that has a first surface and a second surface facing each other, is disposed so that the back surface of the die pad is in contact with the first surface, has a size including the die pad, and has a higher thermal conductivity than the mold resin. Resin sheet,
A metal foil provided on the second surface of the resin sheet;
A semiconductor device comprising: a mixed layer in which the resin sheet and the mold resin are mixed in a liquefied state.
表面と裏面を備え、ダイパッドを含むフレームと、A frame having a front surface and a back surface, including a die pad;
該ダイパッドの表面に載置されたパワーチップと、A power chip placed on the surface of the die pad;
対向する第１面と第２面とを備え、該ダイパッドの裏面がその第１面と接するように配置され、該ダイパッドを包含するサイズの絶縁性の樹脂シートと、An insulating resin sheet having a size that includes a first surface and a second surface facing each other, the back surface of the die pad being in contact with the first surface, and including the die pad;
該樹脂シートの第１面上に、該パワーチップを封止するように設けられたモールド樹脂と、Mold resin provided on the first surface of the resin sheet so as to seal the power chip;
該樹脂シートの第２面上に設けられた金属箔と、A metal foil provided on the second surface of the resin sheet;
該樹脂シートと、該モールド樹脂との間に、これらを構成する樹脂が混合した混合層とを含み、Between the resin sheet and the mold resin, a mixed layer in which the resins constituting them are mixed,
該樹脂シートの第１面と該ダイパッドの裏面とが直接固着されており、The first surface of the resin sheet and the back surface of the die pad are directly fixed,
該樹脂シートの第１面と該ダイパッドの裏面とが直接固着されている部分である固着部における該樹脂シートが１層からなり、The resin sheet in the fixing portion, which is a portion where the first surface of the resin sheet and the back surface of the die pad are directly fixed, is composed of one layer,
該樹脂シートの第１面が、該固着部と該混合層とによって覆われており、A first surface of the resin sheet is covered with the fixing portion and the mixed layer;
該混合層は、該樹脂シートと該モールド樹脂との明確な界面が無くなり、その間での沿面絶縁を考慮する必要がなくなる程度にこれらを構成する樹脂が混合してなることを特徴とする半導体装置。The mixed layer is formed by mixing a resin constituting the resin sheet and the mold resin so that a clear interface between the resin sheet and the mold resin is eliminated and it is not necessary to consider creeping insulation therebetween. .
ａ）第１面と第２面とを有し、絶縁性でかつ樹脂モールドに用いるモールド樹脂よりも熱伝導率が大きい樹脂シートであって、
該樹脂シートは第２面を金属箔で覆われており、
更には常温では固体であるが高温では一旦溶融した後に完全硬化に向かう特徴を有する半硬化状態の樹脂からなる該樹脂シートを準備する工程と、
ｂ）表面と裏面を備え、ダイパッドを有するフレームを準備するフレーム準備工程と、
ｃ）該ダイパッドの表面上にパワーチップを載置する工程と、
ｄ）該樹脂シートの溶融温度より高温の樹脂封止樹脂用金型を準備する工程と、
ｅ）該樹脂封止用金型の内部底面に該金属箔が接するように、該樹脂封止用金型内に該樹脂シートを載置する工程と、
ｆ）該ダイパッドの裏面が該樹脂シートの第１面に接するように、該樹脂シートの第１面上に該フレームを載置する工程と、
ｇ）該樹脂封止用金型内に液状化した該モールド樹脂を加熱加圧注入し、該金型内を充填するとともに、該金型内で該モールド樹脂と該樹脂シートとを加熱硬化させるモールド工程と、を含み、
上記ｇ）モールド工程が、
該ダイパッドの裏面と該樹脂シートの第１面とを固着するとともに、
溶融し液状化した該樹脂シートと、液状化した該モールド樹脂との間で、これらを構成する樹脂を混合させて混合層を形成する工程であることを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device in which a chip is resin-molded,
a) a resin sheet having a first surface and a second surface, which is insulative and has a higher thermal conductivity than a mold resin used for a resin mold,
The resin sheet has a second surface covered with a metal foil,
Further, a step of preparing the resin sheet made of a resin in a semi-cured state, which is solid at normal temperature but once melted at a high temperature and has a characteristic of being completely cured,
b) a frame preparation step of preparing a frame having a front surface and a back surface and having a die pad;
c) placing a power chip on the surface of the die pad;
d) preparing a mold for resin-encapsulating resin having a temperature higher than the melting temperature of the resin sheet;
e) placing the resin sheet in the resin sealing mold such that the metal foil is in contact with the inner bottom surface of the resin sealing mold;
f) placing the frame on the first surface of the resin sheet such that the back surface of the die pad is in contact with the first surface of the resin sheet;
g) The mold resin liquefied in the mold for resin sealing is heated and pressurized to fill the mold, and the mold resin and the resin sheet are heated and cured in the mold. A molding process,
G) the molding step
While fixing the back surface of the die pad and the first surface of the resin sheet,
A method of manufacturing a semiconductor device, comprising a step of forming a mixed layer by mixing a resin constituting these between the molten and liquefied resin sheet and the liquefied mold resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007249579A JP2008004971A (en) | 2007-09-26 | 2007-09-26 | Semiconductor device, and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007249579A JP2008004971A (en) | 2007-09-26 | 2007-09-26 | Semiconductor device, and its manufacturing method |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003339730A Division JP2005109100A (en) | 2003-09-30 | 2003-09-30 | Semiconductor device and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008004971A JP2008004971A (en) | 2008-01-10 |
| JP2008004971A5 true JP2008004971A5 (en) | 2009-10-15 |
Family
ID=39009047
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007249579A Pending JP2008004971A (en) | 2007-09-26 | 2007-09-26 | Semiconductor device, and its manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2008004971A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4947135B2 (en) | 2009-12-04 | 2012-06-06 | 株式会社デンソー | Semiconductor package and manufacturing method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10125826A (en) * | 1996-10-24 | 1998-05-15 | Hitachi Ltd | Semiconductor device and manufacture thereof |
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2007
- 2007-09-26 JP JP2007249579A patent/JP2008004971A/en active Pending
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