JP2008004608A - Method for packaging electronic component - Google Patents

Method for packaging electronic component Download PDF

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Publication number
JP2008004608A
JP2008004608A JP2006170036A JP2006170036A JP2008004608A JP 2008004608 A JP2008004608 A JP 2008004608A JP 2006170036 A JP2006170036 A JP 2006170036A JP 2006170036 A JP2006170036 A JP 2006170036A JP 2008004608 A JP2008004608 A JP 2008004608A
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Japan
Prior art keywords
resin
electronic component
circuit board
opening
resist film
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JP2006170036A
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Japanese (ja)
Inventor
Tadahiko Sakai
忠彦 境
Hideki Nagafuku
秀喜 永福
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2006170036A priority Critical patent/JP2008004608A/en
Publication of JP2008004608A publication Critical patent/JP2008004608A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

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  • Wire Bonding (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for packaging an electronic component in which a cavity causing short circuit between adjoining electrodes can be prevented from occurring. <P>SOLUTION: After the surface of a circuit board 10 is coated with first resin 30 such that a resist film 12 covering a circuit pattern formed on the surface of the circuit board 10 fills an opening 13 formed by exposing an electrode 11 juxtaposed to the circuit pattern, the resist film 12 is coated with second resin 40 for bonding an electronic component 20, having a lower surface provided with a bump 21 being bonded to the electrode 11, to the surface of the circuit board 10. Viscosity of the first resin 30 is set lower than that of the second resin 40 so that the second resin 40 spread by the lower surface of the electronic component 20 does not enter the opening 13 to entrain the air when the electronic component 20 is hot pressed to the surface of the circuit board 10 subsequently. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、回路基板の電極と電子部品のバンプとを熱圧着により接合する電子部品の実装方法に関するものである。   The present invention relates to an electronic component mounting method in which electrodes of a circuit board and bumps of an electronic component are joined by thermocompression bonding.

電子部品の実装方法として、電子部品の下面に突設されたバンプを、回路基板の表面に形成された回路パターンの電極に熱圧着して接合する方法が知られている。このような電子部品の実装方法により製造された電子製品は、回路基板と電子部品の線膨張係数が異なることから、電子部品の駆動に伴うヒートサイクルに起因して電極とバンプの接合部に大きな応力が生じ、バンプが電極から剥がれてしまうなどの問題が発生し易いものであった。このため、回路基板と電子部品の間に熱硬化性樹脂を介在させ、この熱硬化性樹脂により電子部品と回路基板をしっかり接合することによって上記問題を解決することが知られている（特許文献１）。
特開平８−１５３７５２号公報 As a method for mounting an electronic component, a method is known in which bumps protruding from the lower surface of the electronic component are bonded by thermocompression bonding to electrodes of a circuit pattern formed on the surface of the circuit board. Electronic products manufactured by such an electronic component mounting method have a large linear expansion coefficient between the circuit board and the electronic component, so that the junction between the electrode and the bump is large due to the heat cycle accompanying the driving of the electronic component. The problem is that stress is generated and the bumps are peeled off from the electrodes. For this reason, it is known that a thermosetting resin is interposed between the circuit board and the electronic component, and the electronic component and the circuit board are firmly bonded by the thermosetting resin to solve the above problem (Patent Document). 1).
JP-A-8-153752

ところで、回路基板の表面には回路パターンの保護と回路パターンにおける電気絶縁性確保のためにレジスト膜がコーティングして形成される。しかし、回路基板の電極は露出させておく必要があることから電極の表面にはレジスト膜はコーティングされておらず、レジスト膜は電極の少なくとも一部を露出させるための開口部を確保して、回路基板にコーティングされる。従ってこの開口部を形成したことによって、電極の側部にはレジスト段差と呼称されるレジスト膜の不連続部分が生じている。   By the way, a resist film is formed on the surface of the circuit board by coating a resist film for protecting the circuit pattern and ensuring electrical insulation in the circuit pattern. However, since the electrode of the circuit board needs to be exposed, the surface of the electrode is not coated with a resist film, and the resist film secures an opening for exposing at least a part of the electrode, It is coated on the circuit board. Therefore, by forming this opening, a discontinuous portion of the resist film called a resist step is generated on the side of the electrode.

一方、電子部品はそのバンプを回路基板の電極に位置合わせした上で、熱硬化性樹脂が塗布された回路基板に搭載され、バンプを電極に熱圧着してボンディングされる。この場合、熱硬化性樹脂はディスペンサ等により回路基板の中央部に塗布される。従って、電子部品を回路基板に搭載してバンプを電極に熱圧着する際には、熱硬化性樹脂は電子部品の下面が押し付けられることにより、回路基板の中心部側から外方（回路基板に並設された電極側）へ向かって押し広げられながら熱硬化する。   On the other hand, the electronic component is mounted on a circuit board coated with a thermosetting resin after the bumps are aligned with the electrodes of the circuit board, and the bumps are bonded to the electrodes by thermocompression bonding. In this case, the thermosetting resin is applied to the central portion of the circuit board by a dispenser or the like. Therefore, when the electronic component is mounted on the circuit board and the bump is thermocompression bonded to the electrode, the thermosetting resin is pressed outward (from the center of the circuit board to the circuit board) by pressing the lower surface of the electronic component. It cures while being spread toward the electrode side).

ここで、熱圧着時に押し広げられた熱硬化性樹脂は上記のレジスト膜の開口部に入り込むので、熱硬化性樹脂が熱硬化した後には電極とバンプとの接合部は強固に固定されるが、熱硬化性樹脂が開口部に入り込む際、空気を巻き込むことにより、熱硬化性樹脂の内部に小さなボイド（気泡）が発生し易い。このようにして熱硬化性樹脂の内部に発生したボイドはその数が少数の場合は無害であるが、ボイドが多数発生してこれらが一体化して大きくなると、レジスト膜の開口部内を電極へ向かって移動するようになり、終には回路基板に並設された相隣る電極間に入り込んで、両電極に跨った空洞（連通孔）を形成するようになる。そして、この空洞内の湿気が回路基板の表面に付着すると、相隣る電極間は短絡することになる。   Here, since the thermosetting resin that has been spread during the thermocompression bonding enters the opening of the resist film, the joint between the electrode and the bump is firmly fixed after the thermosetting resin is thermally cured. When the thermosetting resin enters the opening portion, small voids (bubbles) are easily generated inside the thermosetting resin by entraining air. The number of voids generated inside the thermosetting resin in this way is harmless when the number is small, but when a large number of voids are generated and integrated and become large, the inside of the opening of the resist film faces the electrode. Finally, it enters between adjacent electrodes arranged side by side on the circuit board to form a cavity (communication hole) straddling both electrodes. When moisture in the cavity adheres to the surface of the circuit board, the adjacent electrodes are short-circuited.

そこで本発明は、相隣る電極間の短絡発生の原因となる空洞が生じるのを防止できる電子部品の実装方法を提供することを目的とする。   Accordingly, an object of the present invention is to provide a method for mounting an electronic component that can prevent the formation of a cavity that causes a short circuit between adjacent electrodes.

請求項１に記載の電子部品の実装方法は、回路基板の表面に形成された回路パターンを被覆するレジスト膜が回路パターンに並設された電極を露出させることによって生じたレ
ジスト膜の開口部を埋めるように第１の樹脂を回路基板の表面に塗布する工程と、前記電極と接合されるバンプを下面に有する電子部品を回路基板の表面に接着するための第２の樹脂を前記レジスト膜上に塗布する工程と、前記第２の樹脂が回路基板と電子部品の間に充填されるように電子部品を回路基板に押圧しながら、回路基板の前記電極に電子部品の前記バンプを熱圧着させる工程とを含み、前記第１の樹脂の粘度を前記第２の樹脂の粘度よりも低くした。 The electronic component mounting method according to claim 1, wherein the resist film covering the circuit pattern formed on the surface of the circuit board has an opening in the resist film formed by exposing an electrode arranged in parallel to the circuit pattern. A step of applying a first resin to the surface of the circuit board so as to fill, and a second resin for bonding an electronic component having a bump bonded to the electrode on the lower surface to the surface of the circuit board on the resist film And applying the bumps of the electronic component to the electrodes of the circuit board while pressing the electronic component against the circuit board so that the second resin is filled between the circuit board and the electronic component. A viscosity of the first resin is made lower than that of the second resin.

請求項２に記載の電子部品の実装方法は、請求項１に記載の電子部品の実装方法において、前記第１の樹脂及び前記第２の樹脂は同一の樹脂をベースとし、前記第１の樹脂は前記第２の樹脂よりも無機フィラー含有量が少ない。   The electronic component mounting method according to claim 2 is the electronic component mounting method according to claim 1, wherein the first resin and the second resin are based on the same resin, and the first resin is used. Has a lower inorganic filler content than the second resin.

請求項３に記載の電子部品の実装方法は、請求項２に記載の電子部品の実装方法において、前記第１の樹脂の無機フィラー含有量が零である。   The electronic component mounting method according to claim 3 is the electronic component mounting method according to claim 2, wherein the inorganic filler content of the first resin is zero.

請求項４に記載の電子部品の実装方法は、請求項１乃至３のいずれかに記載の電子部品の実装方法において、前記第１の樹脂のチキソ性は前記第２の樹脂のチキソ性よりも小さい。   The electronic component mounting method according to claim 4 is the electronic component mounting method according to any one of claims 1 to 3, wherein the thixotropy of the first resin is greater than the thixotropy of the second resin. small.

本発明に係る電子部品の実装方法では、電子部品を回路基板に熱圧着する前に、レジスト膜の開口部内に第１の樹脂を埋めているので、電子部品の熱圧着時に第２の樹脂が開口部内に入り込むことがなく、第２の樹脂が開口部内に入り込む際に空気を巻き込むことによって開口部内にボイドが生じるのが防止される。一方、予め開口部内に埋められる第１の樹脂は第２の樹脂よりも相対的に粘度が低いことから第２の樹脂よりも開口部の形状に馴染み易く、開口部に埋められる際に空気を巻き込みにくいのでボイドが生じにくい。従って本発明に係る電子部品の実装方法によれば、電子部品の熱圧着時に粘度の高い第２の樹脂がレジスト膜の開口部に入り込んでボイドを生成させるようなことがなく、相隣る電極間の短絡発生の原因となる空洞が生じるのを防止することができる。更には、粘度の高い第２の樹脂が開口部に入り込んでボイドを生じさせるおそれがないので、第２の樹脂の粘度をより大きくすることができ、これにより電子部品と回路基板の間の接合力を向上させることもできる。   In the electronic component mounting method according to the present invention, the first resin is buried in the opening of the resist film before the electronic component is thermocompression bonded to the circuit board. It does not enter the opening, and voids are prevented from being generated in the opening by entraining the air when the second resin enters the opening. On the other hand, since the first resin buried in the opening in advance has a relatively lower viscosity than the second resin, the first resin is more easily adapted to the shape of the opening than the second resin, and air is filled when the opening is buried. Since it is difficult to entrain, voids are less likely to occur. Therefore, according to the electronic component mounting method of the present invention, the second resin having a high viscosity does not enter the opening of the resist film and generate voids when the electronic component is thermocompression bonded. It is possible to prevent the formation of a cavity that causes a short circuit between them. Furthermore, since there is no possibility that the second resin having a high viscosity enters the opening and causes voids, the viscosity of the second resin can be further increased, whereby the bonding between the electronic component and the circuit board can be performed. You can also improve your power.

以下、図面を参照して本発明の実施の形態を説明する。図１（ａ），（ｂ），（ｃ），（ｄ）は本発明の一実施の形態における電子部品の実装方法の工程説明図、図２は本発明の一実施の形態における回路基板の平面図、図３（ａ），（ｂ），（ｃ），（ｄ）は本発明の一実施の形態における電子部品の実装工程において、第１の樹脂及び第２の樹脂の塗布手順の例を示す回路基板の平面図である。   Embodiments of the present invention will be described below with reference to the drawings. 1A, 1B, 1C, and 1D are explanatory diagrams of the process of mounting an electronic component in an embodiment of the present invention, and FIG. 2 is a circuit board of an embodiment of the present invention. FIGS. 3A, 3B, 3C, and 3D are plan views showing examples of application procedures of the first resin and the second resin in the electronic component mounting process according to the embodiment of the present invention. It is a top view of the circuit board which shows this.

図１において、電子部品２０を回路基板１０に実装する実装装置１は、回路基板１０を水平姿勢に保持する基板保持台２と、基板保持台２の上方を基板保持台２に対して水平方向や上下方向へ相対的に移動自在な熱圧着ヘッド３を備えている。熱圧着ヘッド３は、その下部に電子部品２０を吸着保持する。   In FIG. 1, a mounting apparatus 1 that mounts an electronic component 20 on a circuit board 10 includes a board holding table 2 that holds the circuit board 10 in a horizontal position, and a horizontal direction above the board holding board 2 with respect to the board holding table 2. And a thermocompression bonding head 3 that is relatively movable in the vertical direction. The thermocompression bonding head 3 sucks and holds the electronic component 20 at the lower part thereof.

基板保持台２に保持される回路基板１０は耐熱性材料から成り、その表面（上面）には図示しない銅箔からなる回路パターンとこの回路パターンを被覆するレジスト膜１２がコーティングして形成されている。   The circuit board 10 held on the substrate holder 2 is made of a heat-resistant material, and the surface (upper surface) is formed by coating a circuit pattern made of copper foil (not shown) and a resist film 12 covering the circuit pattern. Yes.

図２において、回路パターン上には回路基板１０の中央部を矩形に囲むように電極１１が並設されており、レジスト膜１２は、各電極１１を露出させるための開口部１３を溝状
に確保して形成されている。従って回路基板１０の表面には、回路基板１０の中央部を囲む矩形形状のレジスト膜１２の開口部１３が形成されている。 In FIG. 2, electrodes 11 are arranged in parallel on the circuit pattern so as to surround the central portion of the circuit board 10 in a rectangular shape, and the resist film 12 has an opening 13 for exposing each electrode 11 in a groove shape. Secured and formed. Therefore, an opening 13 of a rectangular resist film 12 surrounding the center of the circuit board 10 is formed on the surface of the circuit board 10.

図１に示すように、電子部品２０の下面には複数のバンプ２１が突設されている。各バンプ２１は、回路基板１０表面の電極１１と対応する配列で設けられており、後述するように、対応する電極１１に位置合わせされた上で、電極１１の上面に熱圧着される。   As shown in FIG. 1, a plurality of bumps 21 protrude from the lower surface of the electronic component 20. Each bump 21 is provided in an array corresponding to the electrode 11 on the surface of the circuit board 10, and after being aligned with the corresponding electrode 11, as described later, is thermocompression bonded to the upper surface of the electrode 11.

図１において、電子部品２０を回路基板１０に実装するには、先ず、回路基板１０を実装装置１の基板保持台２の上面に保持する。これにより回路基板１０は電極１１及びレジスト膜１２が形成された面が上を向いた状態で水平姿勢に保持される。   In FIG. 1, to mount the electronic component 20 on the circuit board 10, first, the circuit board 10 is held on the upper surface of the board holding table 2 of the mounting apparatus 1. As a result, the circuit board 10 is held in a horizontal posture with the surface on which the electrode 11 and the resist film 12 are formed facing upward.

次に、各開口部１３を埋めるように、第１の樹脂３０を回路基板１０の表面に塗布する（図１（ａ））。この第１の樹脂３０の開口部１３内への塗布は、例えば印刷工法や図示しないディスペンサによる注入工法等によって行う。   Next, the first resin 30 is applied to the surface of the circuit board 10 so as to fill each opening 13 (FIG. 1A). The application of the first resin 30 into the opening 13 is performed by, for example, a printing method or an injection method using a dispenser (not shown).

この第１の樹脂３０の塗布は、その後に行う電子部品２０の回路基板１０上への熱圧着工程において、回路基板１０上で押し広げられた第２の樹脂４０が開口部１３内に流入して空気の巻き込みによるボイド（樹脂内に発生する小さな気泡）を発生させることがないようにするために行うものである。従って、第１の樹脂３０は、電気絶縁性を有する熱硬化性樹脂であって、少なくとも後の工程で用いられる第２の樹脂４０よりは粘度が低いもの、また、その中でもできるだけ粘度の低いものを用いる。粘度が低くければ開口部１３の形状に馴染み易く、空気の巻き込みによるボイドの発生を極力抑えることができるからである。   The application of the first resin 30 is performed in the subsequent thermocompression bonding process of the electronic component 20 onto the circuit board 10, and the second resin 40 spread on the circuit board 10 flows into the opening 13. In order to prevent the generation of voids (small bubbles generated in the resin) due to air entrainment. Therefore, the first resin 30 is a thermosetting resin having electrical insulation, and has a viscosity lower than that of the second resin 40 used in at least a later process, and also has a viscosity as low as possible among them. Is used. This is because if the viscosity is low, the shape of the opening portion 13 can be easily adjusted, and generation of voids due to air entrainment can be suppressed as much as possible.

開口部１３を埋めるように第１の樹脂３０を回路基板１０の表面に塗布したら、次いで電子部品２０を回路基板１０の表面に接着するための第２の樹脂４０を回路基板１０の中央部のレジスト膜１２上に塗布する（図１（ｂ））。この第２の樹脂４０のレジスト膜１２上への塗布も印刷工法やディスペンサによる注入工法等によって行う。   After the first resin 30 is applied to the surface of the circuit board 10 so as to fill the opening 13, the second resin 40 for bonding the electronic component 20 to the surface of the circuit board 10 is then applied to the central part of the circuit board 10. It is applied onto the resist film 12 (FIG. 1B). The application of the second resin 40 onto the resist film 12 is also performed by a printing method, an injection method using a dispenser, or the like.

この第２の樹脂４０のレジスト膜１２上への塗布は、電子部品２０を回路基板１０の表面に熱圧着させる際に、電子部品２０の下面によって第２の樹脂４０を押し広げて回路基板１０と電子部品２０との間に第２の樹脂４０を充填させることによって、回路基板１０の電極１１と電子部品２０のバンプ２１との接合部の強度を補強するものである。従って、第２の樹脂４０は、電気絶縁性を有する熱硬化性樹脂であって、適度に粘度が高く、熱硬化後に所要の強度が得られるものを用いる。   The second resin 40 is applied onto the resist film 12 by spreading the second resin 40 by the lower surface of the electronic component 20 when the electronic component 20 is thermocompression bonded to the surface of the circuit substrate 10. By filling the second resin 40 between the electronic component 20 and the electronic component 20, the strength of the joint portion between the electrode 11 of the circuit board 10 and the bump 21 of the electronic component 20 is reinforced. Therefore, the second resin 40 is a thermosetting resin having electrical insulation, and has a moderately high viscosity and can obtain a required strength after thermosetting.

レジスト膜１２上に第２の樹脂４０を塗布したら、電子部品２０を吸着保持させた熱圧着ヘッド３を回路基板１０の上方に位置させる（図１（ｂ））。そして、回路基板１０の電極１１と電子部品２０のバンプ２１との位置合わせを行った後、熱圧着ヘッド３を下降させ、バンプ２１を電極１１に着地させて、電子部品２０を回路基板１０の上面に押し付けて両者を加熱する（図１（ｃ））。これにより回路基板１０の電極１１と電子部品２０のバンプ２１は接合されるが、この電極１１とバンプ２１の接合過程において、レジスト膜１２の上面に塗布された第２の樹脂４０は電子部品２０の下面に押圧されて、回路基板１０と電子部品２０との間を、回路基板１０の中央部から外方、すなわち電極１１側へ向けて押し広げられる（図２の矢印ａ）。   After the second resin 40 is applied onto the resist film 12, the thermocompression bonding head 3 that holds the electronic component 20 by suction is positioned above the circuit board 10 (FIG. 1B). Then, after aligning the electrode 11 of the circuit board 10 and the bump 21 of the electronic component 20, the thermocompression bonding head 3 is lowered, the bump 21 is landed on the electrode 11, and the electronic component 20 is attached to the circuit board 10. Both are pressed against the upper surface and heated (FIG. 1 (c)). As a result, the electrodes 11 of the circuit board 10 and the bumps 21 of the electronic component 20 are bonded. In the bonding process of the electrodes 11 and the bumps 21, the second resin 40 applied to the upper surface of the resist film 12 is the electronic component 20. 2 is pressed between the circuit board 10 and the electronic component 20 outward from the center of the circuit board 10, that is, toward the electrode 11 (arrow a in FIG. 2).

この電子部品２０の回路基板１０への熱圧着工程において、第２の樹脂４０は、回路基板１０の中央部から外方へ向けて押し広げられて電子部品２０の外縁にまで達する。一方、第１の樹脂３０の一部は第２の樹脂４０と混合して回路基板１０の外方へ向けて押し広げられるが、第１の樹脂３０の大部分は開口部１３内及び電極１１とバンプ２１との接合
部近傍にとどまる（図１（ｃ））。 In the step of thermocompression bonding the electronic component 20 to the circuit board 10, the second resin 40 is spread outward from the center of the circuit board 10 and reaches the outer edge of the electronic component 20. On the other hand, a part of the first resin 30 is mixed with the second resin 40 and spread outwardly from the circuit board 10, but most of the first resin 30 is in the opening 13 and the electrode 11. It remains in the vicinity of the joint between the bump 21 and the bump 21 (FIG. 1C).

このようにして電極１１とバンプ２１の接合が終わったら、熱圧着ヘッド３の加熱を停止し、電子部品２０の吸着を解除した上で熱圧着ヘッド３を上方へ退去させる。これにより電子部品２０の回路基板１０上への実装は完了し、電子製品Ｐは完成する（図１（ｄ））。   When the bonding of the electrode 11 and the bump 21 is completed in this way, the heating of the thermocompression bonding head 3 is stopped, the adsorption of the electronic component 20 is released, and the thermocompression bonding head 3 is moved upward. Thereby, the mounting of the electronic component 20 on the circuit board 10 is completed, and the electronic product P is completed (FIG. 1D).

このようにして製造された電子製品Ｐでは、回路基板１０が主としてエポキシ樹脂などを材料として成る一方で、電子部品２０は主としてシリコンを材料として成るため、両者の線膨張係数は著しく相違しており、前者の線膨張係数は後者のそれよりも極めて大きい。このため、電極１１とバンプ２１の接合部には、電子部品２０の駆動に伴うヒートサイクルに起因して大きな応力が生じるが、回路基板１０と電子部品２０との間及び電極１１とバンプ２１との接合部には熱硬化性樹脂である第２の樹脂４０が充填されているので、電極１１とバンプ２１との接合部に生じる応力が緩和され、上述したヒートサイクルに起因する両者の剥がれは防止される。   In the electronic product P manufactured in this way, the circuit board 10 is mainly made of epoxy resin or the like, while the electronic component 20 is mainly made of silicon. Therefore, the linear expansion coefficients of both are significantly different. The former linear expansion coefficient is much larger than that of the latter. Therefore, a large stress is generated at the joint between the electrode 11 and the bump 21 due to the heat cycle accompanying the driving of the electronic component 20, but between the circuit board 10 and the electronic component 20 and between the electrode 11 and the bump 21. Since the second resin 40, which is a thermosetting resin, is filled in the joint portion, the stress generated in the joint portion between the electrode 11 and the bump 21 is relieved, and peeling of both due to the heat cycle described above is prevented. Is prevented.

上記の電子部品２０の実装方法では、電子部品２０を回路基板１０に熱圧着する前に、レジスト膜１２の開口部１３内に第１の樹脂３０を埋めているので、電子部品２０の熱圧着時に第２の樹脂４０が開口部１３内に入り込むことがなく、第２の樹脂４０が開口部１３内に入り込む際に空気を巻き込むことによって開口部１３内にボイドが生じるのが防止される。一方、予め開口部１３内に埋められる第１の樹脂３０は第２の樹脂４０よりも相対的に粘度が低いことから第２の樹脂４０よりも開口部１３の形状に馴染み易く、開口部１３に埋められる際に空気を巻き込みにくいのでボイドが生じにくい。従って、本実施の形態に示した電子部品２０の実装方法によれば、電子部品２０の熱圧着時に粘度の高い第２の樹脂４０がレジスト膜１２の開口部１３に入り込んでボイドを生成させるようなことがなく、相隣る電極１１，１１間の短絡発生の原因となる空洞が生じるのを防止することができる。更には、粘度の高い第２の樹脂４０が開口部１３に入り込んでボイドを生じさせるおそれがないので、第２の樹脂４０の粘度をより大きくすることができ、これにより電子部品２０と回路基板１０の間の接合力を向上させることもできる。   In the mounting method of the electronic component 20 described above, the first resin 30 is buried in the opening 13 of the resist film 12 before the electronic component 20 is thermocompression bonded to the circuit board 10. Occasionally, the second resin 40 does not enter the opening 13, and voids are prevented from being generated in the opening 13 by entraining air when the second resin 40 enters the opening 13. On the other hand, since the first resin 30 embedded in the opening 13 in advance has a relatively lower viscosity than the second resin 40, the first resin 30 is more familiar with the shape of the opening 13 than the second resin 40. Since it is difficult to entrain air when it is buried in, it is difficult for voids to occur. Therefore, according to the mounting method of the electronic component 20 shown in the present embodiment, the second resin 40 having a high viscosity enters the opening 13 of the resist film 12 and generates a void when the electronic component 20 is thermocompression bonded. It is possible to prevent the formation of a cavity that causes a short circuit between the adjacent electrodes 11 and 11. Furthermore, since there is no possibility that the second resin 40 having a high viscosity enters the opening portion 13 and causes voids, the viscosity of the second resin 40 can be increased, and thus the electronic component 20 and the circuit board can be increased. The joining force between 10 can also be improved.

ここで、第１の樹脂３０ではなく第２の樹脂４０を開口部１３内に充填した後、第２の樹脂４０の粘度が低下するような温度で回路基板１０を加熱しながら真空脱泡することによっても開口部１３内のボイドを減少させることができるが、本実施の形態に示した方法によれば、初めから第２の樹脂４０よりも粘度の低い第１の樹脂３０を用いることで、このような真空脱泡工程を省くことができる。なお、本実施の形態に示した方法においても、電子部品２０を回路基板１０に熱圧着した後に真空脱泡を行うことは有効であり、第１の樹脂３０を開口部１３に埋め込んだときに空気を巻き込んでボイドを生じさせてしまった場合であっても、そのボイドを減少させることができる。   Here, after filling the opening 13 with the second resin 40 instead of the first resin 30, vacuum degassing is performed while heating the circuit board 10 at a temperature at which the viscosity of the second resin 40 is lowered. The voids in the opening 13 can also be reduced by this, but according to the method shown in the present embodiment, by using the first resin 30 having a lower viscosity than the second resin 40 from the beginning. Such a vacuum defoaming step can be omitted. Even in the method shown in the present embodiment, it is effective to perform vacuum defoaming after thermocompression bonding of the electronic component 20 to the circuit board 10, and when the first resin 30 is embedded in the opening 13. Even when air is involved and voids are generated, the voids can be reduced.

ところで、第１の樹脂３０及び第２の樹脂４０は同一の樹脂をベース（主材料）とした上で、それぞれに含有させる無機フィラー量によって粘度の高低を調節することが好ましい。第１の樹脂３０と第２の樹脂４０とは熱圧着時に混じり合うので、第１の樹脂３０と第２の樹脂４０を同一の樹脂ベースとすれば互いに馴染み、回路基板１０と電子部品２０との間の接合を強固なものにすることができる。また、含有させる無機フィラー量の調節は容易であるので、粘度の調整も簡単に行うことができる。なお、第１の樹脂３０の無機フィラー含有量を第２の樹脂４０の無機フィラー含有量よりも少なくすることによって、第１の樹脂３０の粘度を第２の樹脂４０の粘度よりも低くすることができる。また、前述したように、第１の樹脂３０はできるだけ粘度が低いことが好ましく、このためには、第１の樹脂３０の無機フィラー含有量が零であることが望ましい。   By the way, it is preferable that the first resin 30 and the second resin 40 have the same resin as a base (main material), and the viscosity is adjusted according to the amount of inorganic filler to be contained in each. Since the first resin 30 and the second resin 40 are mixed at the time of thermocompression bonding, if the first resin 30 and the second resin 40 are made the same resin base, they become familiar with each other, and the circuit board 10 and the electronic component 20 Can be made strong. Further, since the amount of the inorganic filler to be contained can be easily adjusted, the viscosity can be easily adjusted. In addition, the viscosity of the first resin 30 is made lower than the viscosity of the second resin 40 by making the inorganic filler content of the first resin 30 smaller than the inorganic filler content of the second resin 40. Can do. Further, as described above, the first resin 30 preferably has as low a viscosity as possible. For this purpose, the inorganic filler content of the first resin 30 is preferably zero.

ここで、第１の樹脂３０と第２の樹脂４０を同一の樹脂ベースとする場合には、その樹脂材料はフェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、ビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、グリシジルアミン型エポキシ樹脂、脂環式エポキシ樹脂等とすることが好ましい。一方、第１の樹脂３０と第２の樹脂４０を同一の樹脂ベースとしない場合には、第１の樹脂の樹脂材料は、例えばビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、グリシジルアミン型エポキシ樹脂、脂環式エポキシ樹脂等とすることが好ましく、第２の樹脂の樹脂材料は、例えば、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、ビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、グリシジルアミン型エポキシ樹脂、脂環式エポキシ樹脂等とすることが好ましい。   Here, when the first resin 30 and the second resin 40 are based on the same resin, the resin materials are phenol novolac type epoxy resin, cresol novolac type epoxy resin, bisphenol A type epoxy resin, and bisphenol F type. It is preferable to use an epoxy resin, a glycidylamine type epoxy resin, an alicyclic epoxy resin, or the like. On the other hand, when the first resin 30 and the second resin 40 are not based on the same resin, the resin material of the first resin is, for example, a bisphenol A type epoxy resin, a bisphenol F type epoxy resin, or a glycidylamine type epoxy. Preferably, the resin material of the second resin is, for example, phenol novolac type epoxy resin, cresol novolac type epoxy resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, glycidyl. An amine type epoxy resin, an alicyclic epoxy resin, or the like is preferable.

また、第１の樹脂３０の粘度を第２の樹脂４０の粘度よりも低くするだけでなく、第１の樹脂３０のチキソ性（チキソ比）を第２の樹脂４０のチキソ性よりも小さくするとよい。これにより第１の樹脂３０に第２の樹脂４０よりも流動し易い性質を与えることができ、レジスト膜１２の開口部１３に埋め込んだ際の空気の巻き込みによるボイドの発生をより効果的に防ぎ得るからである。   Further, not only the viscosity of the first resin 30 is made lower than the viscosity of the second resin 40, but also the thixotropy (thixo ratio) of the first resin 30 is made smaller than the thixotropy of the second resin 40. Good. As a result, the first resin 30 can be more easily flowable than the second resin 40, and the generation of voids due to air entrainment when embedded in the opening 13 of the resist film 12 can be more effectively prevented. Because you get.

次いで、図３を参照して第１の樹脂３０及び第２の樹脂４０の塗布手順の例を示す。図３（ａ）に示す例は、回路基板１０の表面に矩形に形成された溝状の開口部１３を埋めるように「口」の字状に第１の樹脂３０をレジスト膜１２上に塗布した後（図３（ａ）（イ），（ロ））、その「口」の字の中央のスペースに第２の樹脂４０を塗布するものであり（図３（ａ）（ハ））、図３（ｂ）に示す例は、回路基板１０の表面に矩形に形成された溝状の開口部１３を埋めるように「口」の字状に第１の樹脂３０をレジスト膜１２上に塗布した後（図３（ｂ）（イ），（ロ））、その「口」の字の対角線を描くように、「×」状に第２の樹脂４０を塗布するものである（図３（ｂ）（ハ））。   Next, an example of a procedure for applying the first resin 30 and the second resin 40 will be described with reference to FIG. In the example shown in FIG. 3A, the first resin 30 is applied on the resist film 12 in the shape of a “mouth” so as to fill the groove-shaped opening 13 formed in a rectangular shape on the surface of the circuit board 10. (FIGS. 3A, 3A, and 3B), the second resin 40 is applied to the central space of the “mouth” shape (FIGS. 3A, 3C), In the example shown in FIG. 3B, the first resin 30 is applied on the resist film 12 in the shape of a “mouth” so as to fill the rectangular groove-shaped opening 13 on the surface of the circuit board 10. After that (FIGS. 3B, 3A, and 3B), the second resin 40 is applied in an “x” shape so as to draw a diagonal line of the “mouth” shape (FIG. 3B). b) (C)).

また、図３（ｃ）に示す例は、回路基板１０の表面に矩形に形成された溝状の開口部１３を含むほぼ正方形の形状に第１の樹脂３０を塗布した後（図３（ｃ）（イ），（ロ））、その正方形の中央部に第２の樹脂４０を塗布するものであり（図３（ｃ）（ハ））、図３（ｄ）に示す例は、回路基板１０の表面に矩形に形成された溝状の開口部１３を含むほぼ正方形の形状に第１の樹脂３０を塗布した後（図３（ｄ）（イ），（ロ））、その正方形の対角線を描くように、「×」状に第２の樹脂４０を塗布するものである（図３（ｄ）（ハ））。   Further, in the example shown in FIG. 3C, after the first resin 30 is applied in a substantially square shape including the groove-shaped opening 13 formed in a rectangular shape on the surface of the circuit board 10 (FIG. 3C (B), (b)), the second resin 40 is applied to the center of the square (FIG. 3 (c) (c)), and the example shown in FIG. After applying the first resin 30 in a substantially square shape including the groove-shaped opening 13 formed in a rectangular shape on the surface of FIG. 10 (FIGS. 3D, 3A and 3B), the diagonal line of the square The second resin 40 is applied in a “x” shape as shown in FIG. 3 (FIG. 3D and FIG. 3C).

第１の樹脂３０及び第２の樹脂４０の塗布手順の例としてここでは上記４つのものを示したが、開口部１３を埋めるように第１の樹脂３０を回路基板１０の表面に塗布した後、電子部品２０を回路基板１０の表面に接着するための第２の樹脂４０をレジスト膜１２上に塗布するものであれば、その他の手順によっても構わない。   Although the above four are shown as examples of the application procedure of the first resin 30 and the second resin 40, after the first resin 30 is applied to the surface of the circuit board 10 so as to fill the opening 13. As long as the second resin 40 for bonding the electronic component 20 to the surface of the circuit board 10 is applied onto the resist film 12, other procedures may be used.

なお、上述の実施の形態では、各電極１１は回路基板１０の中央部を囲む四辺形の各辺に相当する位置に並設されているとしていたが、回路基板１０の中央部を挟んで位置する平行な２本の直線に相当する位置に並設されるもの等であってもよい。この場合においても上述した実施の形態に示した本発明における電子部品の実装方法を適用することができる。   In the above-described embodiment, each electrode 11 is arranged side by side at a position corresponding to each side of the quadrangle surrounding the center portion of the circuit board 10. It may be arranged in parallel at a position corresponding to two parallel straight lines. Also in this case, the electronic component mounting method according to the present invention described in the above-described embodiment can be applied.

本発明によれば、相隣る電極間の短絡発生の原因となる空洞が生じるのを防止することができる。   According to the present invention, it is possible to prevent the formation of a cavity that causes a short circuit between adjacent electrodes.

（ａ），（ｂ），（ｃ），（ｄ）は本発明の一実施の形態における電子部品の実装方法の工程説明図(A), (b), (c), (d) is process explanatory drawing of the mounting method of the electronic component in one embodiment of this invention 本発明の一実施の形態における回路基板の平面図The top view of the circuit board in one embodiment of the present invention （ａ），（ｂ），（ｃ），（ｄ）は本発明の一実施の形態における電子部品の実装工程において、第１の樹脂及び第２の樹脂の塗布手順の例を示す回路基板の平面図(A), (b), (c), (d) is a circuit board showing an example of the application procedure of the first resin and the second resin in the mounting process of the electronic component in one embodiment of the present invention. Plan view

符号の説明Explanation of symbols

１０ 回路基板
１１ 電極
１２ レジスト膜
１３ 開口部
２０ 電子部品
２１ バンプ
３０ 第１の樹脂
４０ 第２の樹脂 DESCRIPTION OF SYMBOLS 10 Circuit board 11 Electrode 12 Resist film 13 Opening part 20 Electronic component 21 Bump 30 1st resin 40 2nd resin

Claims (4)

回路基板の表面に形成された回路パターンを被覆するレジスト膜が回路パターンに並設された電極を露出させることによって生じたレジスト膜の開口部を埋めるように第１の樹脂を回路基板の表面に塗布する工程と、前記電極と接合されるバンプを下面に有する電子部品を回路基板の表面に接着するための第２の樹脂を前記レジスト膜上に塗布する工程と、前記第２の樹脂が回路基板と電子部品の間に充填されるように電子部品を回路基板に押圧しながら、回路基板の前記電極に電子部品の前記バンプを熱圧着させる工程とを含み、前記第１の樹脂の粘度を前記第２の樹脂の粘度よりも低くしたことを特徴とする電子部品の実装方法。   A first resin is applied to the surface of the circuit board so that the resist film covering the circuit pattern formed on the surface of the circuit board fills the opening of the resist film generated by exposing the electrodes arranged in parallel to the circuit pattern. A step of applying, a step of applying a second resin on the surface of the circuit board for bonding an electronic component having a bump bonded to the electrode on the lower surface thereof, and the second resin is a circuit. Thermocompression bonding the bump of the electronic component to the electrode of the circuit board while pressing the electronic component against the circuit board so as to be filled between the substrate and the electronic component, and the viscosity of the first resin An electronic component mounting method, wherein the viscosity is lower than that of the second resin. 前記第１の樹脂及び前記第２の樹脂は同一の樹脂をベースとし、前記第１の樹脂の無機フィラー含有量は、前記第２の樹脂の無機フィラー含有量よりも少ないことを特徴とする請求項１に記載の電子部品の実装方法。   The first resin and the second resin are based on the same resin, and the inorganic filler content of the first resin is less than the inorganic filler content of the second resin. Item 2. A method for mounting an electronic component according to Item 1. 前記第１の樹脂の無機フィラー含有量が零であることを特徴とする請求項２に記載の電子部品の実装方法。   The electronic component mounting method according to claim 2, wherein the content of the inorganic filler in the first resin is zero. 前記第１の樹脂のチキソ性は前記第２の樹脂のチキソ性よりも小さいことを特徴とする請求項１乃至３のいずれかに記載の電子部品の実装方法。
4. The electronic component mounting method according to claim 1, wherein the thixotropy of the first resin is smaller than the thixotropy of the second resin.
JP2006170036A 2006-06-20 2006-06-20 Method for packaging electronic component Pending JP2008004608A (en)

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Cited By (1)

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WO2013047801A1 (en) * 2011-09-30 2013-04-04 日本ケミコン株式会社 Solid electrolytic capacitor manufacturing method and solid electrolytic capacitor

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JPH08153752A (en) * 1994-11-28 1996-06-11 Nec Corp Flip chip mounting method
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JP2006156794A (en) * 2004-11-30 2006-06-15 Sony Corp Method and structure of joining semiconductor device

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JPH08153752A (en) * 1994-11-28 1996-06-11 Nec Corp Flip chip mounting method
JP2002198394A (en) * 2000-11-28 2002-07-12 Polymer Flip Chip Corp Method for mounting flip-chip on substrate
JP2004179552A (en) * 2002-11-28 2004-06-24 Nec Corp Mounting structure and mounting method for semiconductor device, and reworking method
JP2006156794A (en) * 2004-11-30 2006-06-15 Sony Corp Method and structure of joining semiconductor device

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Publication number Priority date Publication date Assignee Title
WO2013047801A1 (en) * 2011-09-30 2013-04-04 日本ケミコン株式会社 Solid electrolytic capacitor manufacturing method and solid electrolytic capacitor
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