JP2007323138A - Memory controller, flash memory system, and control method of flash memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To shorten the processing time of retrieval processing of retrieving the head of a sector region where data is not written. <P>SOLUTION: It is determined in parallel whether data is written in a first sector region corresponding to the number Na derived by adding variable A to the number Ns indicated by the head position information and a second sector region corresponding to the number Nb derived by subtracting variable B from the number Ne indicated by the end position information. When it is determined that no data is written in neither the first sector region or the second sector region, the number Ne indicated by the end position information is changed to the number Na. When it is determined that data is written only in the first sector region, the number Ns indicated by the head position information is changed to the number Na, and the number Ne indicated by the end position information is changed to the number Nb. When it is determined that data is written in both the first sector region and the second sector region, the number Ns indicated by the head position information is repeatedly changed to the number Nb. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a memory controller that controls access to a flash memory, a flash memory system, and a flash memory control method, and more particularly, in a write process to a flash memory, a sector area in which data of a physical block to be written is not written. The present invention relates to a memory controller having a function of searching for a head, a flash memory system, and a flash memory control method.

  A NAND flash memory is often used as a semiconductor memory that is a storage medium such as a memory card or a silicon disk. This flash memory has a plurality of memory cells, and has a logical value “1” when each memory cell is in an erased state and a logical value “0” when in a written state.

  By the way, when these memory cells are changed from the erased state to the written state, it can be performed in units of memory cells. However, when the memory cells are changed from the written state to the erased state, it is performed in units of memory cells. However, batch erase is performed in units of blocks including a predetermined number of memory cells (block erase).

  In addition, a block (physical block) made up of a predetermined number of memory cells is composed of a plurality of pages which are write and read access processing units. That is, 32 pages for the small block and 64 pages for the large block. In the small block, one page is composed of a user area of 1 sector (512 bytes) and a redundant area of 16 bytes.

  In a large block, one page is composed of a 4-sector (2048-byte) user area (hereinafter, a 512-byte unit user area is referred to as a sector area) and a 64-byte redundant area. Each redundant area is divided into four parts (hereinafter, in a large block, the redundant area divided into four is referred to as a partial redundant area). Therefore, in the small block, one page corresponds to one sector area, and in the large block, one page corresponds to four sector areas.

  A memory controller that controls the writing process to the flash memory writes data given from the host system to the flash memory in accordance with a command given from the host system. Here, when data is written to the flash memory, the data is written in order from the first page (sector area) in the physical block. Therefore, when data is written to a physical block in which data is written up to a middle page (sector area) in the physical block, the head of the page (sector area) where data is not written is searched and detected. Data writing is started from the page (sector area).

  In addition, when starting the write processing of a series of data, if data already exists in the physical block to which the series of data is written, a search for searching the head of the sector area where the data of the physical block is not written If the processing is performed and the detected sector area is before the sector area where writing of a series of data is started, the writing process of a series of data is started for the physical block. On the other hand, if the detected sector area is after the sector area where the writing of a series of data is started, the series of data is written into another physical block that has been erased. That is, the search process for searching for the head of the sector area in which no data is written determines whether a series of data can be written in a physical block in which data already exists.

  As a method for searching the head of a sector area in which such data is not written, for example, a search method using start page information as shown in Patent Document 1 and a binary tree search that is generally used There is. This binary tree search will be described below with reference to FIG. FIG. 9A shows a physical block accessed via the first interface (chA) and a physical block accessed via the second interface (chB). The physical block accessed via the first interface (chA) and the physical block accessed via the second interface (chB) form a virtually combined virtual block. Hereinafter, a physical block accessed via the first interface (chA) is referred to as a “chA physical block”, and a physical block accessed via the second interface (chB) is referred to as a “chB physical block”. To tell.

  As shown in FIG. 9B, the virtual block includes 512 sector areas in which sector areas in the chA physical block and sector areas in the chB physical block are alternately arranged. Here, SNa # 0 to SNa # 255 are serial numbers assigned to sector areas in the physical block of chA (hereinafter referred to as physical sector numbers), and SNb # 0 to SNb # 255 are in the physical block of chB. A serial number assigned to the sector area (hereinafter referred to as a physical sector number).

  SN # 0 to SN # 511 are serial numbers assigned to 512 sector areas included in the virtual block (hereinafter referred to as sector number SN). Further, in the search of the sector area in which the following data is not written, the start position information indicating the start of the search range is set as the start pointer X, and the end position information indicating the end is set as the end pointer Y.

  FIG. 9C shows a search process when data is written up to the sector area (physical sector number SNa # 150) of SN # 300. In this search, first, the start pointer X is set to 0 corresponding to the sector number SN # 0 of the first sector area, and the end pointer Y is set to 512 obtained by adding 1 to the sector number SN # 511 of the last sector area. . Subsequently, the sector number SN of the intermediate point between the value (0) set for the start pointer X and the value (512) set for the end pointer Y is written in the partial redundancy area corresponding to the sector area of SN # 256. Whether or not data is written in the sector area with the sector number SN of SN # 256, with reference to the additional information (additional information for determining whether or not data is written in the sector area). Determine (number of searches: 1).

  If it is determined that data has been written, the setting value of the start pointer X is changed to the value of the sector number SN of the sector area referred to. On the other hand, if it is determined that data has not been written, the setting value of the end pointer Y is changed to the value of the sector number SN of the sector area referred to. In this example, since data is written in the user area (physical sector number SNa # 128) having the sector number SN of SN # 256, the set value of the start pointer X is changed to 256.

  Next, the sector number SN at the midpoint between the value (256) set for the start pointer X and the value (512) set for the end pointer Y is written in the partial redundancy area corresponding to the sector area of SN # 384. Information (additional information that can determine whether data is written in the sector area) is referred to, and it is determined whether data is written in the sector area whose sector number SN is SN # 384 (search Number of times: 2). In this example, since no data is written in the user area (physical sector number SNa # 192) with the sector number SN of SN # 384, the set value of the end pointer Y is changed to 384.

  Next, the sector number SN at the midpoint between the value (256) set for the start pointer X and the value (384) set for the end pointer Y is written in the partial redundancy area corresponding to the sector area of SN # 320. Information (additional information that can determine whether or not data is written in the sector area) is referred to, and it is determined whether or not data is written in the sector area whose SN number is SN # 320 (search Number of times: 3). In this example, since no data is written in the user area (physical sector number SNa # 160) with the sector number SN of SN # 320, the set value of the end pointer Y is changed to 320.

Similarly, additional information (data is written to the sector area) written in the partial redundancy area corresponding to (X + Y) / 2, which is the intermediate point between the value set for the start pointer X and the value set for the end pointer Y. Reference to the additional information), and the start pointer X or the end pointer Y are sequentially updated, and the difference between the value set for the start pointer X and the value set for the end pointer Y is It is determined that the value set in the end pointer Y when it is 1 is the head sector number SN of the sector area in which no data is written.
JP 2002-196977 A

  However, in the search process using the binary tree search described above, the number of searches is determined by the number of sector areas, and as shown in FIG. 9, for example, sector areas whose sector numbers SN are indicated by SN # 0 to SN # 511 are defined. In the case of 512 (2 to the 9th power), 9 searches are required. In other words, when the number of sector areas is 2 to the nth power, there is a problem that the search must always be performed n times.

  The present invention has been made in view of such a situation, and an object thereof is to provide a memory controller, a flash memory system, and a flash memory control method capable of solving the above-described problems.

A memory controller of the present invention is a memory controller that controls access to a flash memory in which stored data is erased in units of blocks, and includes a first interface and a second interface for accessing the flash memory. Forming a virtual block obtained by virtually combining the interface means, a physical block in the flash memory connected to the first interface, and a physical block in the flash memory connected to the second interface; Write means for writing data to the sector area in the physical block on the first interface side of the block and the sector area in the physical block on the second interface side of the block, and information for specifying the search range in the virtual block , Search scope Search range holding means for holding start position information indicating the number of the first sector area and end position information indicating the number of the end sector area of the search range, and adding a predetermined variable A to the number Ns indicated by the start position information It is determined whether data is written in the first sector area corresponding to the number Na and the second sector area corresponding to the number Nb obtained by subtracting a predetermined variable B from the number Ne indicated by the end position information. When it is determined that no data is written in both the first sector area and the second sector area, the number Ne indicated by the end position information is changed to the number Na, and data is stored only in the first sector area. Is determined, the number Ns indicated by the head position information is changed to the number Na, the number Ne indicated by the end position information is changed to the number Nb, and the first sector is changed. Sector data search means for changing the number Ns indicated by the head position information to the number Nb when it is determined that data is written in both the area and the second sector area, the number Ns and the number Ne , The number Na and the number Nb are in a range where the difference between the number Ne and the number Ns is 3 or more,
Ns <Na <Nb <Ne
Na-Ns≤ (Ne-Ns) / 2
Nb-Na ≦ (Ne-Ns) / 2
Ne-Nb ≦ (Ne-Ns) / 2
And one of the first sector area and the second sector area is a sector area in the physical block on the first interface side, and the other is a sector area in the physical block on the second interface side The values of the variable A and the variable B are set so that
Further, when the difference between the number Ns indicated by the head position information and the number Ne indicated by the tail position information is 1, the data in the virtual block is written from the number Ns indicated by the head position information. First sector area determining means for determining the end of the sector area may be provided.
Further, when the difference between the number Ns indicated by the head position information and the number Ne indicated by the tail position information is 1, data in the virtual block is not written from the number Ne indicated by the tail position information. A second sector area discriminating means for discriminating the head of the sector area can be provided.
The values of the variable A and the variable B can be (Ne−Ns) / 3 or (Ne−Ns) / 4.
A flash memory system according to the present invention includes the above-described memory controller and a flash memory whose access is controlled by the memory controller.
The flash memory control method of the present invention is a flash memory control method for controlling access to a flash memory in which stored data is erased in block units, and is connected to a first interface for accessing the flash memory. Forming a virtual block that virtually combines the physical block in the flash memory and the physical block in the flash memory connected to the second interface for accessing the flash memory, and A step of writing data to a sector area in a physical block on one interface side and a sector area in a physical block on the second interface side, and the head of a search range as information for specifying the search range in the virtual block Start position indicating the sector area number A step of holding information and end position information indicating the number of the end sector area of the search range; a first sector area corresponding to a number Na obtained by adding a predetermined variable A to the number Ns indicated by the start position information; It is determined whether data is written in the second sector area corresponding to the number Nb obtained by subtracting the predetermined variable B from the number Ne indicated by the end position information, and the first sector area and the second sector are determined. When it is determined that data is not written in both areas, the number Ne indicated by the end position information is changed to number Na, and when it is determined that data is written only in the first sector area, The number Ns indicated by the head position information is changed to the number Na and the number Ne indicated by the end position information is changed to the number Nb, so that data is written in both the first sector area and the second sector area. The number Ns indicated by the head position information is changed to the number Nb, the number Ns, the number Ne, the number Na, and the number Nb are represented by the numbers Ne and Ns. In the range where the difference is 3 or more,
Ns <Na <Nb <Ne
Na-Ns≤ (Ne-Ns) / 2
Nb-Na ≦ (Ne-Ns) / 2
Ne-Nb ≦ (Ne-Ns) / 2
And one of the first sector area and the second sector area is a sector area in the physical block on the first interface side, and the other is a sector area in the physical block on the second interface side The values of the variable A and the variable B are set so that
Further, when the difference between the number Ns indicated by the head position information and the number Ne indicated by the tail position information is 1, the data in the virtual block is written from the number Ns indicated by the head position information. A step of determining the end of the sector area may be included.
Further, when the difference between the number Ns indicated by the head position information and the number Ne indicated by the tail position information is 1, data in the virtual block is not written from the number Ne indicated by the tail position information. A step of determining the head of the sector area may be included.
The values of the variable A and the variable B can be (Ne−Ns) / 3 or (Ne−Ns) / 4.
As described above, in the memory controller, the flash memory system, and the flash memory control method of the present invention, the first sector area and the end position corresponding to the number Na obtained by adding the predetermined variable A to the number Ns indicated by the head position information. It is determined in parallel whether or not data is written in the second sector area corresponding to the number Nb obtained by subtracting the predetermined variable B from the number Ne indicated by the information, and the first sector area and the second sector area When it is determined that data is not written in both of the two, the number Ne indicated by the end position information is changed to the number Na, and when it is determined that data is written only in the first sector area, the head position The number Ns indicated by the information is changed to the number Na and the number Ne indicated by the end position information is changed to the number Nb, so that data is stored in both the first sector area and the second sector area. Is when it is determined that the written, change the number Ns indicating the head position information to the number Nb.
Here, the number Ns, the number Ne, the number Na, and the number Nb are within a range where the difference between the number Ne and the number Ns is 3 or more,
Ns <Na <Nb <Ne
Na-Ns≤ (Ne-Ns) / 2
Nb-Na ≦ (Ne-Ns) / 2
Ne-Nb ≦ (Ne-Ns) / 2
If the values of the variable A and the variable B are set so as to satisfy the condition, the search range after updating the number Ns indicated by the head position information and the number Ne indicated by the end position information becomes ½ or less before the update. .
An even sector number is assigned to a sector area in the physical block on the first interface side, an odd sector number is assigned to a sector area in the physical block on the second interface side, and numbers Na and Nb are assigned. If the values of variable A and variable B are set so that one is an even number and the other is an odd number, one of the first sector area and the second sector area is in the physical block on the first interface side. The other is the sector area in the physical block on the second interface side.
Then, when the difference between the number Ns indicated by the head position information and the number Ne indicated by the tail position information is 1, the end of the sector area in which the data in the virtual block is written from the number Ns indicated by the head position information Is determined.
Further, when the difference between the number Ns indicated by the head position information and the number Ne indicated by the tail position information is 1, the head of the sector area in which data in the virtual block is not written from the number Ne indicated by the tail position information. Is determined.

  According to the memory controller, the flash memory system, and the flash memory control method of the present invention, the first sector area corresponding to the number Na obtained by adding the predetermined variable A to the number Ns indicated by the head position information and the tail position information are indicated. It is determined in parallel whether or not data is written in the second sector area corresponding to the number Nb obtained by subtracting the predetermined variable B from the number Ne, and both the first sector area and the second sector area are determined. When it is determined that data is not written, the number Ne indicated by the tail position information is changed to the number Na, and when it is determined that data is written only in the first sector area, the head position information indicates. The number Ns is changed to the number Na, the number Ne indicated by the end position information is changed to the number Nb, and data is written to both the first sector area and the second sector area. If it is determined that the number Ns indicated by the head position information is changed to the number Nb, the average search speed for searching the head of the sector area in which no data is written in the physical block Can be improved. For example, if the number of sector areas in one virtual block is 2 to the power of n, the normal binary tree search must always be performed n times, but the memory controller, flash memory of the present invention According to the control method of the memory system and the flash memory, the sector area to be searched can be detected with the number of searches of n times or less.

  In the present embodiment, the first sector area corresponding to the number Na obtained by adding the predetermined variable A to the number Ns indicated by the head position information and the number Nb obtained by subtracting the predetermined variable B from the number Ne indicated by the tail position information. If it is determined in parallel whether or not data is written in the second sector area, and if it is determined that data is not written in both the first sector area and the second sector area, the end position When the number Ne indicated by the information is changed to the number Na and it is determined that data is written only in the first sector area, the number Ns indicated by the head position information is changed to the number Na and the end position information indicates When the number Ne is changed to the number Nb and it is determined that data is written in both the first sector area and the second sector area, the number Ns indicated by the head position information is changed to the number Nb. By repeating the data in the physical block is to search for the beginning of the sector area which is not written.

  Further, the variable A, the variable B, and the difference (Nb−Na) between the number Nb and the number Na is equal to or less than ½ ((Ne−Ns) / 2) of the difference between the number Ne and the number Ns. , Variable B, and at least one of the difference between the number Nb and the number Na (Nb−Na) is smaller than ½ of the difference between the number Ne and the number Ns ((Ne−Ns) / 2), and the number Na The values of the variables A and B are set so that one of the numbers Nb is an even number and the other is an odd number.

  Thus, for example, when the number of sector areas in one virtual block is 2 to the nth power, if a normal binary tree search is performed, the search must always be performed n times. Thus, the head of the sector area where the physical block data is not written can be detected with the number of searches of n times or less. One of the first sector area and the second sector area is a sector area in the physical block on the first interface side, and the other is a sector area in the physical block on the second interface side. It is possible to determine in parallel whether data is written in the first sector area and the second sector area.

  Hereinafter, the details of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram for explaining an outline of an embodiment of a flash memory system according to the present invention. As shown in FIG. 1, the flash memory system 1 includes a flash memory 2 and a memory controller 3 that controls the flash memory 2. The flash memory system 1 is connected to the host system 4 via the external bus 13.

  The host system 4 is composed of a CPU (Central Processing Unit) for controlling the entire operation of the host system 4 and a companion chip responsible for exchanging information with the flash memory system 1. The host system 4 may be various information processing apparatuses such as a personal computer and a digital still camera that process various kinds of information such as characters, sounds, and image information.

  The flash memory 2 is a non-volatile memory, and performs data copying or reading by copying data between a register and a memory cell array.

  The memory cell array includes a plurality of memory cell groups and word lines. Each memory cell group includes a plurality of memory cells connected in series. The word line is for selecting a specific memory cell in the memory cell group. Data is copied between the selected memory cell and the register via the word line, that is, data is copied from the register to the selected memory cell, or data is copied from the selected memory cell to the register. . That is, the data given from the memory controller 3 is written into the memory cell array via the register, and the data stored in the memory cell array is supplied to the memory controller 3 via the register.

  The memory cells constituting the memory cell array are constituted by MOS transistors having gates on the upper and lower sides. Here, the upper gate is called a control gate, and the lower gate is called a floating gate. Data is written or erased by injecting charges (electrons) into the floating gate or discharging charges (electrons) from the floating gate.

  Since the floating gate is surrounded by an insulator, the injected electrons are held for a long period of time. Note that when electrons are injected into the floating gate, a high voltage at which the control gate is on the high potential side is applied between the control gate and the floating gate. In addition, when electrons are discharged from the floating gate, a high voltage at which the control gate is on the low potential side is applied between the control gate and the floating gate.

  Here, a state where electrons are injected into the floating gate is a write state, which corresponds to a logical value “0”. The state in which electrons are discharged from the floating gate is an erased state, which corresponds to a logical value “1”.

  Such an address space of the flash memory 2 is composed of “pages” and “blocks (physical blocks)”. A page is a processing unit in a data read operation and a data write operation performed in the flash memory 2. The physical block is a processing unit in the data erasing operation performed in the flash memory 2, and is composed of a plurality of pages.

  Here, FIG. 2 schematically shows the structure of the address space of the flash memory 2, and one page consists of a user area 25 of 4 sectors (2048 bytes) and a redundant area 26 of 64 bytes. 1 physical block is composed of 64 pages. Here, a case where one byte is 8 bits including bits b0 to b7 is shown. A 512-byte area obtained by dividing the user area 25 into four is called a sector area, and an area allocated to each sector area in the redundant area 26 is called a partial redundant area. Further, the physical block of the flash memory 2 can be regarded as being composed of 256 sector areas and 256 partially redundant areas allocated to each sector area.

  Further, as shown in FIG. 3C, each physical block is assigned a unique physical block address (PBA). Further, when the storage area is divided into a plurality of zones for management, a physical zone is constituted by a plurality of physical blocks, and a unique physical zone number (PZN) is assigned to each physical zone. A serial number in each physical zone of a physical block included in each physical zone is referred to as a physical zone block number (PZIBN).

  On the other hand, the address space on the host system 4 side is managed by an LBA (Logical Block Address) which is a serial number assigned to an area divided in units of sectors (512 bytes) as shown in FIG. Here, a group of a plurality of sectors is called a logical block, and a group of a plurality of logical blocks is called a logical zone. Further, as shown in FIG. 3B, a serial number assigned to a logical block is referred to as a logical block number (LBN), and a serial number assigned to a logical zone is referred to as a logical zone number (LZN). In addition, a serial number in each logical zone of a logical block included in each logical zone is referred to as a logical zone block number (LZIBN).

  In addition, one physical zone is allocated to each logical zone, and data corresponding to each logical block included in the logical zone is written to a physical block included in the physical zone allocated to the logical zone. Therefore, the number of sectors included in one logical block is set according to the number of sector areas included in one physical block. However, when one logical block is assigned to a plurality of physical blocks, the plurality of physical blocks are regarded as one physical block, and the number of sectors included in one logical block is set.

  In the example shown in FIG. 3, since a flash memory in which one physical block is composed of 256 sector areas is assumed, 256 sectors correspond to one logical block. Therefore, the logical zone of LZN # 0 configured with 500 logical blocks of LBN # 0 to # 499 corresponds to the 128000 sector area of LBA # 0 to # 127999.

  Similarly, the logical zone of LZN # 1 corresponds to the 128000 sector area of LBA # 128000 to # 255999, and the logical zone of LZN # 2 corresponds to the 128000 sector area of LBA # 256000 to # 383999, The logical zone of LZN # 3 corresponds to the 128000 sector area of LBA # 384000 to # 511999.

  In addition, the logical zone of LZN # 0 configured with 500 logical blocks of LBN # 0 to # 499 is allocated to the physical zone of PZN # 0 configured with 512 physical blocks of PBA # 0 to # 511. It has been. Similarly, the logical zone of LZN # 1 is assigned to the physical zone of PZN # 1, the logical zone of LZN # 2 is assigned to the physical zone of PZN # 2, and the logical zone of LZN # 3 is assigned to PZN #. Assigned to three physical zones.

  Here, the reason why the number of physical blocks included in the physical zone is larger than the number of logical blocks included in the logical zone is that new data and old data corresponding to the same logical block coexist in different physical blocks. This is a case in which a case where a defective block in which data cannot be normally written is generated.

  In addition, since the data of the logical blocks assigned to the physical block are written in each physical block in the LBA order, the LBA given from the host system 4 is managed by managing the correspondence between the physical block and the logical block. And the access relationship in the flash memory 2 can be managed.

  Note that the correspondence between the physical block and the logical block changes every time data is written or erased. Therefore, an address conversion table is created in order to manage the correspondence between the two at each time point, and the address conversion table is updated each time the correspondence changes. Also, the correspondence relationship between the logical zone and the physical zone is set in advance, and the address conversion table can be created for each logical zone.

  This address conversion table is created based on information (hereinafter referred to as logical address information) indicating a logical block written in the redundant area 26 of the first page of the physical block. As the logical address information written in the redundant area 26, information for specifying a logical block such as LBN is used. If the correspondence relationship between the logical zone and the physical zone is set in advance, an address conversion table can be created based on LZIBN. Therefore, it is preferable to use LZIBN having a smaller data amount than LBN.

  Further, a block status (flag) indicating whether or not the physical block is a defective block is written in the redundant area 26 of the first page of the physical block. In the partial redundancy area corresponding to each sector area, an error correction code (ECC) of user data written in the corresponding sector area and additional information (whether or not data is written in the sector area) are determined. Additional information) can be written.

  Next, the memory controller 3 that performs access processing to the flash memory 2 will be described. The memory controller 3 performs each process such as a read process, a write process, and a block erase process by supplying data, address information, internal commands, and the like to the flash memory 2.

  Here, the internal command is a command for the memory controller 3 to instruct the flash memory 2 to execute processing, and the flash memory 2 operates according to the internal command given from the memory controller 3. On the other hand, a command given from the host system 4 to the memory controller 3 is called an external command.

  As shown in FIG. 1, the memory controller 3 includes a microprocessor 6, a host interface block 7, a work area 8, a buffer 9, a flash memory interface block 10, and an ECC (error collection code) block 11. ROM (Read Only Memory) 12. The memory controller 3 constituted by these functional blocks is integrated on one semiconductor chip.

  The microprocessor 6 controls the overall operation of the memory controller 3 in accordance with a program stored in the ROM 12.

  Further, the microprocessor 6 controls the operation of the flash memory interface block 10 and the like based on the program stored in the ROM 12, so that interface means, writing means, search range holding means, sector area search means, The first sector area discriminating means and the second sector area discriminating means are realized.

  Further, the microprocessor 6 reads out a command set (hereinafter referred to as a sequence command) defining various processes and the like from the ROM 12, and causes the flash memory interface block 10 to execute processes according to the sequence command.

  The ROM 12 is a non-volatile storage element and stores the above sequence commands and the like. The work area 8 is a work area in which data necessary for controlling the flash memory 2 is temporarily stored, and is composed of a plurality of SRAM (Static Random Access Memory) cells. The above address conversion table is created on this work area 8.

  The buffer 9 temporarily stores data read from the flash memory 2 and data to be written to the flash memory 2. That is, data read from the flash memory 2 is held in the buffer 9 until the host system 4 can receive the data, and data to be written to the flash memory 2 is stored until the flash memory 2 becomes writable. It is held in the buffer 9.

  The ECC block 11 generates an error correction code added to data to be written to the flash memory 2 and detects and corrects an error included in the read data based on the error correction code added to the read data.

  The host interface block 7 exchanges data, address information, external commands, and the like with the host system 4 via the external bus 13. Data or the like supplied from the host system 4 to the flash memory system 1 is taken into the flash memory system 1 (for example, the buffer 9) using the host interface block 7 as an entrance. Data supplied from the flash memory system 1 to the host system 4 is supplied to the host system 4 through the host interface block 7 as an exit.

  The flash memory interface block 10 exchanges data, address information, status information, internal commands, and the like with the flash memory 2 via the internal bus 14.

  The host interface block 7 and the flash memory interface block 10 include various registers as shown in FIG. That is, the host interface block 7 includes a command register R1, a sector number register R2, an LBA register R3, and the like. The flash memory interface block 10 includes a physical block address register R11, a sector number register R12, a counter R13, and the like.

  Information given from the host system 4 is written in the command register R1, the sector number register R2, and the LBA register R3. External commands such as a write command and a read command are written in the command register R1. The number of sectors in the access target area is written in the sector number register R2. In the LBA register R3, the head LBA of the access target area is written.

  Information indicating the access target area in the flash memory 2 based on the information written in the sector number register R2 and the LBA register R3 is written in the physical block address register R11, the sector number register R12, and the counter R13.

  For example, if a 256-sector area with consecutive LBAs is assigned to one physical block in the flash memory 2 (one block has 64 pages and one page has 4 sectors), the LBA described in FIG. Eight bits correspond to the sector number SN, and the upper bits excluding the lower eight bits correspond to the logical block number (LBN).

  That is, when an area of 256 sectors with continuous LBAs is made one logical block, the lower 8 bits of the LBA indicate a sector number SN (0 to 255) which is a serial number assigned to each sector in the logical block. The upper bits excluding the lower 8 bits of the LBA indicate the logical block number (LBN). Note that the number of bits of the LBA, logical block number (LBN), and sector number SN is determined according to the capacity and specifications of the flash memory 2.

  Next, information set in the physical block address register R11, the sector number register R12, and the counter R13 will be described. In the sector number register R12, a portion corresponding to the sector number SN of the LBA written in the LBA register R3 is written.

  Here, since user data is written in each physical block in the order of LBA, the sector number SN corresponds to a serial number assigned to a sector area included in each physical block. On the other hand, in the physical block address register R11, the physical block address (PBA) of the physical block corresponding to the logical block specified based on the part indicating the logical block number (LBN) of the LBA written in the LBA register R3 or empty The physical block address (PBA) of the block is written.

  That is, when reading user data from the physical block corresponding to the specified logical block, or when additional writing is performed on the physical block, the physical block address (PBA) of the physical block corresponding to the specified logical block Is written to the physical block address register R11. In addition, when user data corresponding to the specified logical block is written into an empty block, the physical block address (PBA) of the empty block is written into the physical block address register R11. In the counter R13, the number of sectors set in the sector number register R2 is written.

  When the access target area specified based on the information set in the LBA register R3 and the sector number register R2 extends over a plurality of logical blocks, the physical block of the access target area also extends over the plurality of physical blocks. Therefore, information is set in the physical block address register R11, the sector number register R12, and the counter R13 for each logical block, and the number of sectors of user data written in each logical block is set in the counter R13.

  Further, the flash memory interface block 10 performs a series of write processes (hereinafter referred to as a sequence write process) and a series of read processes based on the values set in the physical block address register R11, the sector number register R12, and the counter R13. (Hereinafter referred to as a sequence reading process).

  In the sequential writing process, every time data of one sector is supplied from the buffer 9 to the flash memory 2, the value set in the sector number register R12 is incremented (incremented by 1), and the value set in the counter R13 is Decrement (decrease by 1). When the value set in the counter R13 becomes 0, the sequence writing process ends. Therefore, data is written from the sector area of the sector number initially set in the sector number register R12 to the area corresponding to the number of sectors initially set in the counter R13.

  Similarly, in the sequence read processing, every time data of one sector is read from the flash memory 2 to the buffer 9, the value set in the sector number register R12 is incremented (incremented by 1) and set in the counter R13. The value is decremented (decremented by 1). The sequence reading process ends when the value set in the counter R13 becomes zero. Therefore, the data stored in the area corresponding to the number of sectors initially set in the counter R13 is read from the sector area of the sector number initially set in the sector number register R12.

  For example, when “10” is set in the sector number register R12 and “8” is set in the counter R13 and the sequence writing process is started, user data is written in the sector areas of SN # 10 to # 17.

  Next, search processing for searching for the head of a sector area in which such data is not written will be described with reference to FIGS. Note that the search processing described below is accessed via the second interface and the physical block of chA accessed via the first interface, as described in FIGS. 9A and 9B. It is assumed that the processing is performed by a virtual block obtained by virtually combining the physical blocks of chB. In addition, each physical block is assumed to be a large block in which one physical block can be regarded as being composed of 256 sector areas.

  Since data is alternately written to the chA physical block and the chB physical block, if the sector number assigned to the sector area in the virtual block is an even number, the sector area is included in the chA physical block. If the sector number assigned to the sector area in the virtual block is an odd number, the sector area is included in the physical block of chB.

  Also, as information for specifying the search range in the virtual block, the number Ns indicated by the head position information (information indicating the number of the first sector area of the search range) and the end position information (information indicating the number of the last sector area of the search range) The number Ne indicated by The first sector area is a sector area corresponding to the number Na obtained by adding the variable A to the number Ns, and the second sector area is the second sector area corresponding to the number Nb obtained by subtracting the variable B from the number Ne. It is.

In the range where the difference between the number Ne and the number Ns is 3 or more (range Ne−Ns ≧ 3), the variable A and the variable B can be set as appropriate within the range satisfying the following conditions. In the first condition, the variable A and the variable B must be set so that the number Ns, the number Ne, the number Na, and the number Nb satisfy the following conditional expressions (1) to (4).
Ns <Na <Nb <Ne (1)
Na-Ns ≦ (Ne-Ns) / 2 (2)
Nb-Na ≦ (Ne-Ns) / 2 (3)
Ne−Nb ≦ (Ne−Ns) / 2 (4)

  When the variables A and B are set so as to satisfy this condition, the processing time for the search process for searching for the head of the sector area in which no data is written can be made shorter than the normal binary tree search. That is, in the case of normal binary tree search, the range (Ne−Ns) from the first sector area to the last sector area of the search range is always ½ of the previous range, but the conditional expression (1) When variable A and variable B are set so as to satisfy (4), the range (Ne−Ns) from the first sector area to the last sector area of the search range becomes narrower than ½ of the previous range. Therefore, the search time can be shortened compared with the normal binary tree search.

  More specifically, the range (Ne−Ns) from the first sector area to the last sector area of the search range depends on whether data is written in the first sector area and the second sector area. Search from the first sector area to the first sector area (Na-Ns), the range from the first sector area to the second sector area (Nb-Na), and the second sector area The range narrows to one of the ranges (Ne−Nb) up to the last sector area of the range.

  Here, the range from the first sector area to the first sector area (Na-Ns), the range from the first sector area to the second sector area (Nb-Na), and the second sector If the range (Ne−Nb) from the area to the end sector area of the search range is all smaller than ½ of the range (Ne−Ns) from the start sector area to the end sector area of the search range, the search range The range (Ne−Ns) from the first sector area to the last sector area is narrower than ½ of the previous range.

  Further, the range (Na-Ns) from the first sector area to the first sector area, the range (Nb-Na) from the first sector area to the second sector area, and the second sector area If any one of the range from the search sector to the end sector area (Ne−Nb) is equal to ½ of the range from the start sector area to the end sector area (Ne−Ns) of the search range In some cases, the range (Ne−Ns) from the first sector area to the last sector area is not narrower than ½ of the previous range (may be ½ of the previous range). However, in this case, the other two ranges are smaller than ½ of the range (Ne−Ns) from the first sector area to the last sector area of the search range. The range (Ne-Ns) may be narrower than half of the previous range.

  The second condition is that one of the first sector area and the second sector area is a sector area in the physical block on the first interface side, and the other is a sector area in the physical block on the second interface side. The variables A and B must be set so that

  Here, when an even sector number is assigned to the sector area in the physical block on the first interface side and an odd sector number is assigned to the sector area in the physical block on the second interface side, the number Na If the number Nb is an even number and the other is an odd number, the third condition can be satisfied. Therefore, after obtaining the number Na and the number Nb, 1 may be added to either the number Na or the number Nb, or 1 may be subtracted from either one to satisfy this condition. Note that adding 1 to or subtracting 1 from one of the numbers Na and Nb in this way can be regarded as substantially changing the values of the variables A and B.

  If variable A and variable B are set so as to satisfy this condition, it is determined in parallel whether data is written in the first sector area and whether data is written in the second sector area. can do.

  Next, a processing procedure of search processing for searching for the head of a sector area in which no data is written will be described with reference to the flowchart of FIG. In the following description, the number Ns indicated by the head position information (information indicating the number of the first sector area in the search range) is referred to as a start pointer X, and the end position information (information indicating the number of the first sector area in the search range). The number Ne indicated by () is referred to as an end pointer Y. Variable A and variable B are (Y−X) / 4 corresponding to (Ne−Ns) / 4.

  When starting this search process, initial values are set in the start pointer X and the end pointer Y. That is, the start pointer X is set to 0 which is the sector number of the head sector area in the virtual block, and the end pointer Y is set to 512 which is obtained by adding 1 to the sector number of the end sector area in the virtual block ( Step S1).

Next, it is determined whether or not the difference between the end pointer Y and the start pointer X is smaller than 4 (step S2). Based on this condition, the number Na and number Nb calculation method is determined. When the difference between the end pointer Y and the start pointer X is 4 or more (step S2: No), the number Na and the number Nb are calculated by the following equations (5) and (6) (step S3).
Na = X + (Y−X) / 4 (5)
Nb = Y− (Y−X) / 4 (6)

When the difference between the end pointer Y and the start pointer X is smaller than 4 (step S2: Yes), the number Na and the number Nb are calculated by the following formulas (7) and (8) (step S4).
Na = X + 1 (7)
Nb = Y-1 (8)

  That is, when the difference between the end pointer Y and the start pointer X is smaller than 4, the numbers A and Nb are calculated by setting the variables A and B to 1. Here, the variable A and the variable B are set to 1 because the value of (Y−X) / 4 (value obtained by rounding down the decimal point) becomes 0, and Na = X and Nb = Y. This is to avoid it.

  It is determined whether both the number Na and the number Nb calculated in step S3 or step S4 are even or odd (step S5).

  When one of the numbers Na and Nb is an even number and the other is an odd number (step S5: No), one of the first sector area with a sector number SN of Na and the second sector area with a sector number SN of Nb is the first. The sector area in the physical block on one interface side is the sector area in the physical block on the second interface side. Therefore, the process proceeds to step S8 without adjusting the numbers Na and Nb.

  When both the number Na and the number Nb are even or odd (step S5: Yes), it is determined whether the number Na and the number Nb are the same number (step S6). If the number Na and the number Nb are the same number (step S6: Yes), it is not necessary to access the two interfaces of the first interface and the second interface, so the adjustment to the number Na and the number Nb is not performed, and the step S8 is performed. Proceed to When the number Na and the number Nb are not the same number (step S6: No), after adjusting to add 1 to the number Na (step S7), the process proceeds to step S8.

  Next, the first sector area with the sector number SN of Na and the second sector area with the sector number SN of Nb are accessed in parallel via the first interface and the second interface. The adjustment of the number Na in step S7 is performed to enable this parallel processing. Therefore, an adjustment to subtract 1 from the number Nb may be performed without changing the number Na. In addition, in accessing the first sector area and the second sector area, additional information (determining whether data is written in the sector area) written in the partial redundancy area corresponding to each sector area Additional information) can be referred to, and based on the reference result, it is determined whether or not data is written in the first sector area and the second sector area.

  The start pointer X is determined based on the result of determination of whether data is written in the first sector area (step S8) and determination of whether data is written in the second sector area (step S9). And / or the end pointer Y are changed.

  If no data is written in the first sector area (step S8: No), no data is written in the sector area after the first sector area, so the value of the end pointer Y is set to the value of the number Na. (Step S11). Since data is written in each sector area in the order of sector numbers, data is not written in the second sector area when data is not written in the first sector area.

  When data is written in both the first sector area and the second sector area (step S8: Yes, step S9: Yes), the data is written in the sector area before the second sector area. Therefore, the value of the start pointer X is changed to the value of the number Nb (step S12).

  When data is written in the first sector area and data is not written in the second sector area (step S8: Yes, step S9: No), the sector area before the first sector area Since the data has been written, the value of the start pointer X is changed to the value Na, and no data is written in the sector area after the second sector area, so the value of the end pointer Y is set to the number Nb. (Step S10).

  After changing the value of either or both of the start pointer X and the end pointer Y in steps S10 to 12, it is determined whether or not the difference between the changed start pointer X and end pointer Y is 1 (step S13). . When the difference between the start pointer X and the end pointer Y is 1 (step S13: Yes), the search process is terminated. When the difference between the start pointer X and the end pointer Y is not 1 (step S13: Yes), the process returns to step S2.

  That is, this search process is repeated until the difference between the start pointer X and the end pointer Y becomes 1, and when the difference between the start pointer X and the end pointer Y becomes 1, the value set in the start pointer X is The sector number SN at the end of the sector area in which data is written coincides, and the value set in the end pointer Y matches the sector number SN at the beginning of the sector area in which no data is written.

  Next, the search processing when data is written up to the sector area of SN # 300 of sector number SN in the virtual block will be specifically described with reference to FIG.

<Number of searches 1>
Based on the initial value 0 of the start pointer X and the initial value 512 of the end pointer Y, the Na value 128 (= 0 + (512-0) / 4) and the Nb value 384 (= 512- (512-0) / 4) Since both Na and Nb are even numbers, the value of Na is set to 129 (= 128 + 1). Reference is made to the partial redundancy area corresponding to the first sector area of sector number SN # 129 and the partial redundancy area corresponding to the second sector area of sector number SN # 384. As a result of the reference, it is determined that there is data in the first sector area and no data in the second sector area, and the value of the start pointer X is changed to the Na value 129 and the value of the end pointer Y is changed to the Nb value 384. Change to

<Number of searches 2>
Based on the start pointer X value 129 and the end pointer Y value 384, the Na value 192 (= 129 + (384-129) / 4) and the Nb value 321 (= 384- (384-129) / 4) are calculated. To do. Reference is made to the partial redundancy area corresponding to the first sector area with sector number SN # 192 and the partial redundancy area corresponding to the second sector area with sector number SN # 321. As a result of the reference, it is determined that there is data in the first sector area and no data in the second sector area, the value of the start pointer X is changed to the Na value 192, and the value of the end pointer Y is changed to the value 321 of Nb. Change to

<Number of searches 3>
Based on the value 192 of the start pointer X and the value 321 of the end pointer Y, the Na value 224 (= 192 + (321-192) / 4) and the Nb value 289 (= 321- (321-192) / 4) are calculated. To do. Reference is made to the partial redundancy area corresponding to the first sector area with sector number SN # 224 and the partial redundancy area corresponding to the second sector area with sector number SN # 289. As a result of the reference, it is determined that there is data in both the first sector area and the second sector area, and the value of the start pointer X is changed to the value 289 of Nb.

<Number of searches 4>
Based on the value 289 of the start pointer X and the value 321 of the end pointer Y, the Na value 297 (= 289 + (321-289) / 4) and the Nb value 313 (= 321- (321-289) / 4) are calculated. Since both Na and Nb are odd numbers, the value of Na is set to 298 (= 297 + 1). Reference is made to the partial redundancy area corresponding to the first sector area with sector number SN # 298 and the partial redundancy area corresponding to the second sector area with sector number SN # 313. As a result of the reference, it is determined that there is data in the first sector area and no data in the second sector area, and the value of the start pointer X is changed to the Na value 298 and the value of the end pointer Y is changed to the value 313 of Nb. Change to

<Number of searches 5>
Based on the start pointer X value 298 and the end pointer Y value 313, the Na value 301 (= 298 + (313-298) / 4) and the Nb value 310 (= 313- (313-298) / 4) are calculated. To do. A partial redundancy area corresponding to the first sector area with sector number SN # 301 and a partial redundancy area corresponding to the second sector area with sector number SN # 310 are referred to. As a result of the reference, it is determined that there is no data in both the first sector area and the second sector area, and the value of the end pointer Y is changed to the value 301 of Na.

<Number of searches 6>
Since the difference between the start pointer X value 298 and the end pointer Y value 301 is smaller than 4, the Na value 299 obtained by adding 1 to the start pointer X value 298 and the Nb value obtained by subtracting 1 from the end pointer Y value 301 The value 300 is determined. Reference is made to the partial redundancy area corresponding to the first sector area of sector number SN # 299 and the partial redundancy area corresponding to the second sector area of sector number SN # 300. As a result of the reference, it is determined that there is data in both the first sector area and the second sector area, and the value of the start pointer X is changed to the value 300 of Nb.

  Here, since the difference between the value 300 of the start pointer X and the value 301 of the end pointer Y is 1, the search is terminated, and it is determined that the sector number SN at the end of the sector area in which data is written is # 300. Then, it is determined that the first sector number SN of the sector area where data is not written is # 301.

  Next, the search processing when data is written up to the sector area of SN # 305 of the sector number SN in the virtual block will be specifically described with reference to FIG. Since the number of searches up to 4 is the same as in the case of FIG. 6, only the number of searches after 5 will be described.

<Number of searches 5>
Based on the start pointer X value 298 and the end pointer Y value 313, the Na value 301 (= 298 + (313-298) / 4) and the Nb value 310 (= 313- (313-298) / 4) are calculated. To do. A partial redundancy area corresponding to the first sector area with sector number SN # 301 and a partial redundancy area corresponding to the second sector area with sector number SN # 310 are referred to. As a result of the reference, it is determined that there is data in the first sector area and no data in the second sector area, and the value of the start pointer X is changed to the value 301 of Na and the value of the end pointer Y is changed to the value 310 of Nb. Change to

<Number of searches 6>
Based on the value 301 of the start pointer X and the value 310 of the end pointer Y, the Na value 303 (= 301 + (310−301) / 4) and the Nb value 308 (= 310− (310−301) / 4) are calculated. To do. Reference is made to the partial redundancy area corresponding to the first sector area of sector number SN # 303 and the partial redundancy area corresponding to the second sector area of sector number SN # 308. As a result of the reference, it is determined that there is data in the first sector area and no data in the second sector area, the value of the start pointer X is changed to the value 303 of Na, and the value of the end pointer Y is changed to the value 308 of Nb. Change to

<Number of searches 7>
Based on the value 303 of the start pointer X and the value 308 of the end pointer Y, the Na value 304 (= 303 + (308−303) / 4) and the Nb value 307 (= 308− (308−303) / 4) are calculated. To do. Reference is made to the partial redundancy area corresponding to the first sector area with sector number SN # 304 and the partial redundancy area corresponding to the second sector area with sector number SN # 307. As a result of the reference, it is determined that there is data in the first sector area and no data in the second sector area, the value of the start pointer X is changed to the Na value 304, and the value of the end pointer Y is changed to the Nb value 307. Change to

<Number of searches 8>
Since the difference between the value 304 of the start pointer X and the value 307 of the end pointer Y is smaller than 4, the Na value 305 obtained by adding 1 to the value 304 of the start pointer X and the Nb value obtained by subtracting 1 from the value 307 of the end pointer Y A value 306 is obtained. Reference is made to the partial redundancy area corresponding to the first sector area of sector number SN # 305 and the partial redundancy area corresponding to the second sector area of sector number SN # 306. As a result of the reference, it is determined that there is data in the first sector area and no data in the second sector area, the value of the start pointer X is changed to the Na value 305, and the value of the end pointer Y is changed to the Nb value 306. Change to

  Here, since the difference between the value 305 of the start pointer X and the value 306 of the end pointer Y is 1, the search is terminated, and it is determined that the sector number SN at the end of the sector area in which data is written is # 305. Then, it is determined that the head sector number SN of the sector area in which no data is written is # 306.

  Next, the search processing when data is written up to the sector area of SN # 309 of the sector number SN in the virtual block will be specifically described with reference to FIG. Since the number of searches up to 5 is the same as in the case of FIG. 7, the number of searches after 6 will be described.

<Number of searches 6>
Based on the value 301 of the start pointer X and the value 310 of the end pointer Y, the Na value 303 (= 301 + (310−301) / 4) and the Nb value 308 (= 310− (310−301) / 4) are calculated. To do. Reference is made to the partial redundancy area corresponding to the first sector area of sector number SN # 303 and the partial redundancy area corresponding to the second sector area of sector number SN # 308. As a result of the reference, it is determined that there is data in both the first sector area and the second sector area, and the value of the start pointer X is changed to the value 308 of Nb.

<Number of searches 7>
Since the difference between the start pointer X value 308 and the end pointer Y value 310 is smaller than 4, the Na value 309 obtained by adding 1 to the start pointer X value 308 and the Nb value obtained by subtracting 1 from the end pointer Y value 310. A value 309 is obtained. Here, since the values of Na and Nb are the same, the partial redundancy areas corresponding to the first sector area and the second sector area of sector number SN # 309 are referred to without adjusting the number Na. As a result of the reference, it is determined that there is data in both the first sector area and the second sector area, and the value of the start pointer X is changed to the value 309 of Nb.

  Here, since the difference between the value 309 of the start pointer X and the value 310 of the end pointer Y is 1, the search is terminated, and it is determined that the sector number SN at the end of the sector area in which data is written is # 309. Then, it is determined that the first sector number SN of the sector area in which no data is written is # 310.

  As described above, when the start pointer X and the end pointer Y are updated by judging in parallel the presence / absence of data in the first sector area and the presence / absence of data in the second sector area, When there is data in both the first sector area and the second sector area, the difference between the start pointer X and the end pointer Y is reduced to the value of the variable B, so that both the first sector area and the second sector area When there is no data, the difference between the start pointer X and the end pointer Y is narrowed to the value of the variable A, and when there is data in the first sector area and there is no data in the second sector area, the start pointer X and end The difference in the pointer Y is narrowed to the difference between the number Nb and the number Na. Accordingly, when the variable A and the variable B are (Y−X) / 4 corresponding to (Ne−Ns) / 4 as in the above example, data is stored in both the first sector area and the second sector area. Or when there is no data in both the first sector area and the second sector area, the difference between the start pointer X and the end pointer Y is reduced to ¼, and the first sector area When there is data and there is no data in the second sector area, the difference between the start pointer X and the end pointer Y is reduced to ½. On the other hand, in the normal binary tree search, the difference between the start pointer X and the end pointer Y is reduced by ½.

  Therefore, in the above example, the number of searches varies depending on the number of sector areas in which data has been written, but the top of the sector area in which data is not written less than the number of searches by the normal binary tree search. Can be detected.

  In the above example, the variable A and the variable B are set to (Y−X) / 4 corresponding to (Ne−Ns) / 4, but the variable A and the variable B are equivalent to (Ne−Ns) / 3. If (Y−X) / 3, the difference between the start pointer X and the end pointer Y is reduced by 1/3. Moreover, the variable A and the variable B may be different values. For example, the variable A may be (YX) / 4 corresponding to (Ne-Ns) / 4, and the variable B may be (YX) / 2 corresponding to (Ne-Ns) / 2.

1 is a block diagram for explaining an outline of an embodiment of a flash memory system of the present invention. FIG. FIG. 2 is a diagram schematically showing a structure of an address space of the flash memory of FIG. 1. It is a figure for demonstrating the outline | summary of address translation. FIG. 2 is a block diagram showing details of a host interface block and a flash memory interface block of FIG. 1. It is a flowchart for demonstrating the search process which searches the head of the sector area in which the data in the virtual block are not written. It is a figure for demonstrating the search process in case data are written to SN # 300 of sector number SN. It is a figure for demonstrating the search process in case data are written to SN # 305 of sector number SN. It is a figure for demonstrating the search process when data is written to SN # 309 of sector number SN. It is a figure for demonstrating the search process using the conventional binary tree search.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Flash memory system 2 Flash memory 3 Memory controller 4 Host system 6 Microprocessor (interface means, writing means, search range holding means, sector area search means, first sector area determination means, second sector area determination means)
7 Host interface block 8 Work area 9 Buffer 10 Flash memory interface block 11 ECC block 12 ROM
13 External bus 14 Internal bus 25 User area 26 Redundant area R1 Command register R2 Sector number register R3 LBA register R11 Physical block address register R12 Sector number register R13 Counter

Claims (9)

A memory controller that controls access to a flash memory in which stored data is erased in block units,
Interface means having a first interface and a second interface for accessing the flash memory;
Forming a virtual block obtained by virtually combining the physical block in the flash memory connected to the first interface and the physical block in the flash memory connected to the second interface, and Writing means for writing data to a sector area in a physical block on one interface side and a sector area in a physical block on the second interface side;
Search range holding means for holding, as information for specifying the search range in the virtual block, start position information indicating the number of the first sector area of the search range and end position information indicating the number of the last sector area of the search range;
A first sector area corresponding to a number Na obtained by adding a predetermined variable A to a number Ns indicated by the head position information and a second Nb corresponding to a number Nb obtained by subtracting a predetermined variable B from the number Ne indicated by the end position information. Whether or not data is written in the sector area, and if it is determined that data is not written in both the first sector area and the second sector area, the number Ne indicated by the end position information Is changed to the number Na, and it is determined that the data is written only in the first sector area, the number Ns indicated by the head position information is changed to the number Na and the number Ne indicated by the end position information is changed. When the number Nb is changed and it is determined that data is written in both the first sector area and the second sector area, the number Ns indicated by the head position information is changed to the number Nb. And a data area search means,
The number Ns, the number Ne, the number Na, and the number Nb are within a range where the difference between the number Ne and the number Ns is 3 or more,
Ns <Na <Nb <Ne
Na-Ns≤ (Ne-Ns) / 2
Nb-Na ≦ (Ne-Ns) / 2
Ne-Nb ≦ (Ne-Ns) / 2
And one of the first sector area and the second sector area is a sector area in the physical block on the first interface side, and the other is a sector area in the physical block on the second interface side The values of the variable A and the variable B are set so that   When the difference between the number Ns indicated by the head position information and the number Ne indicated by the tail position information is 1, a sector area in which data in the virtual block is written from the number Ns indicated by the head position information 2. The memory controller according to claim 1, further comprising a first sector region discriminating unit that discriminates the end of the first sector area.   When the difference between the number Ns indicated by the start position information and the number Ne indicated by the end position information is 1, a sector area in which data in the virtual block is not written from the number Ne indicated by the end position information 2. The memory controller according to claim 1, further comprising second sector area discrimination means for discriminating a head of the first sector area.   4. The memory controller according to claim 1, wherein the values of the variable A and the variable B are (Ne−Ns) / 3 or (Ne−Ns) / 4. 5.   A flash memory system comprising: the memory controller according to claim 1; and a flash memory whose access is controlled by the memory controller. A flash memory control method for controlling access to a flash memory in which stored data is erased in block units,
A physical block in the flash memory connected to the first interface for accessing the flash memory and a physical block in the flash memory connected to the second interface for accessing the flash memory are virtually Forming a combined virtual block and writing data to a sector area in the physical block on the first interface side of the virtual block and a sector area in the physical block on the second interface side;
As information for specifying the search range in the virtual block, holding the first position information indicating the number of the first sector area of the search range and the end position information indicating the number of the last sector area of the search range;
A first sector area corresponding to a number Na obtained by adding a predetermined variable A to a number Ns indicated by the head position information and a second Nb corresponding to a number Nb obtained by subtracting a predetermined variable B from the number Ne indicated by the end position information. Whether or not data has been written to the sector area, and if it is determined that no data has been written to both the first sector area and the second sector area, the number Ne indicated by the end position information Is changed to the number Na, and it is determined that the data is written only in the first sector area, the number Ns indicated by the head position information is changed to the number Na and the number Ne indicated by the end position information is changed. When the number Nb is changed and it is determined that data is written in both the first sector area and the second sector area, the number Ns indicated by the head position information is changed to the number Nb. Tsu and a flop,
The number Ns, the number Ne, the number Na, and the number Nb are within a range where the difference between the number Ne and the number Ns is 3 or more,
Ns <Na <Nb <Ne
Na-Ns≤ (Ne-Ns) / 2
Nb-Na ≦ (Ne-Ns) / 2
Ne-Nb ≦ (Ne-Ns) / 2
And one of the first sector area and the second sector area is a sector area in the physical block on the first interface side, and the other is a sector area in the physical block on the second interface side The flash memory control method is characterized in that the values of the variable A and the variable B are set such that   When the difference between the number Ns indicated by the head position information and the number Ne indicated by the tail position information is 1, a sector area in which data in the virtual block is written from the number Ns indicated by the head position information 7. The method of controlling a flash memory according to claim 6, further comprising a step of determining the end of the flash memory.   When the difference between the number Ns indicated by the start position information and the number Ne indicated by the end position information is 1, a sector area in which data in the virtual block is not written from the number Ne indicated by the end position information The method of controlling a flash memory according to claim 6, further comprising a step of determining the head of the flash memory.   9. The flash memory control method according to claim 6, wherein the values of the variable A and the variable B are (Ne-Ns) / 3 or (Ne-Ns) / 4. .

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