JP2007311541A - Substrate device, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of transferring a thin film transistor which can prevent crystallization of a lower semiconductor layer. <P>SOLUTION: A lower semiconductor layer 42 for preventing damage of an active layer when a glass substrate 41 is chemically etched is made of amorphous silicon having a large etching selectivity to hydrofluoric acid. A reflective layer 4 for reflecting an excimer laser beam is provided between lower and upper semiconductor layers 42 and 6 to be laminated therebetween. Consequently, the lower semiconductor layer 42 can be prevented from being poly-crystallized when the lower layer is irradiated with the excimer laser beam. The function of the lower semiconductor layer 42 as an etching stopper layer can be prevented from being degraded by the poly-crystallization. A transfer yield can be largely increased. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a substrate device having an amorphous semiconductor layer and a manufacturing method thereof.

  Conventionally, a liquid crystal panel as this type of substrate device has an array substrate. In this array substrate, a thin film transistor is provided on a glass substrate. Further, there is a method in which the thin film transistor is peeled off from the glass substrate and transferred onto a substrate different from the glass substrate. Specifically, as a method for transferring the thin film transistor, thin film transistors are stacked on a first substrate via a peeling layer, and after attaching a second substrate on the thin film transistors, The blades are inserted and separated from the second substrate, and the first substrate and the second substrate are separated by a separation layer between the first substrate and the second substrate. A method of transferring a thin film transistor onto the second substrate is known (see, for example, Patent Document 1).

  In addition, as a transfer method of this kind of thin film transistor, in order to peel off the thin film transistor composed of the polycrystalline silicon layer on the glass substrate, the glass substrate is polished to a predetermined thickness by mechanical polishing, and then the glass substrate is Remove by chemical etching. At this time, an etching stopper layer is provided on the glass substrate so as not to cause etching damage to the thin film transistor fabricated on the glass substrate. As the etching stopper layer, for example, an amorphous silicon (a-Si) film having a large etching selectivity with respect to an etchant such as hydrofluoric acid is used.

For the formation of the polycrystalline silicon layer constituting the thin film transistor, a laser annealing method is generally used in which the amorphous silicon layer is crystallized with an excimer laser. Further, the excimer laser used in this laser annealing method has a large absorption coefficient for the amorphous silicon layer, and hardly transmits light through the amorphous silicon layer. Further, in this excimer laser method, the crystallization of the amorphous silicon layer is improved by irradiating an arbitrary position of the amorphous silicon layer with an excimer laser a plurality of times.
JP 2004-228374 A

  However, when the excimer laser is irradiated to an arbitrary position of the amorphous silicon layer a plurality of times as described above to improve the crystallization of the amorphous silicon layer, the excimer laser is applied for the second time. When subsequently irradiated, the absorption coefficient of the crystallized polycrystalline silicon layer with respect to the excimer laser is greatly reduced. Accordingly, in this case, the excimer laser passes through the polycrystalline silicon layer and is irradiated to the etching stopper layer, and the etching stopper layer is crystallized. When this etching stopper layer is crystallized, the etchant penetrates through the crystal grain boundary, so that this etching stopper layer does not function during etching and damages the thin film transistor during this etching. is doing.

  The present invention has been made in view of these points, and an object of the present invention is to provide a substrate device that can prevent crystallization of the first amorphous semiconductor layer and a method for manufacturing the same.

  The present invention provides a first amorphous semiconductor layer and a second non-crystalline semiconductor layer which is provided on one main surface of the first amorphous semiconductor layer and is crystallized by laser beam irradiation to become a polycrystalline semiconductor layer. A crystalline semiconductor layer; and a reflective layer that is positioned between the first amorphous semiconductor layer and the second amorphous semiconductor layer and reflects a laser beam.

  According to the present invention, a laser beam is irradiated from one main surface side of the second amorphous semiconductor layer, and the second amorphous semiconductor layer is crystallized to form a polycrystalline semiconductor layer. At this time, the laser beam is reflected by the reflective layer located between the second amorphous semiconductor layer and the first amorphous semiconductor layer. Therefore, irradiation of the first amorphous semiconductor layer with this laser beam can be prevented, so that crystallization of the first amorphous semiconductor layer due to irradiation with the laser beam can be prevented.

  Hereinafter, the configuration of the first embodiment of the substrate device of the present invention will be described with reference to FIG.

In FIG. 5, reference numeral 1 denotes a liquid crystal panel as a substrate device. The liquid crystal panel 1 is a liquid crystal display (LCD) as a liquid crystal display device, and includes a substantially rectangular flat plate array substrate 2. The array substrate 2 has a resin substrate 3 as a second substrate which is a substantially transparent insulating substrate having translucency. The resin substrate 3 is made of a synthetic resin such as plastic. Further, a reflective layer 4 which is an insulating film made of an insulator such as silicon oxide (SiO ₂ ) is laminated on the surface which is one main surface of the resin substrate 3. The reflective layer 4 is constituted by a single layer having a film thickness of about 157 nm, for example.

  And on the surface which is one main surface of this reflective layer 4, the island-shaped active layer 5 as a semiconductor layer is laminated | stacked and provided. As shown in FIGS. 1 and 2, the active layer 5 is a polycrystalline semiconductor formed by polycrystallization by excimer laser annealing of the upper semiconductor layer 6 which is the uppermost layer as the second amorphous semiconductor layer. It is a polysilicon layer as a polycrystalline semiconductor layer composed of some polysilicon (p-Si).

The upper semiconductor layer 6 is a film to be crystallized, and is composed of amorphous silicon (a-Si) as amorphous silicon having a film thickness of, for example, 0.5 nm. Further, the upper semiconductor layer 6 is laminated on the surface of the reflective layer 4 and is polycrystallized by pulse laser annealing as excimer laser annealing by excimer laser beam irradiation to become a polysilicon layer. The excimer laser beam is, for example, a XeCl excimer laser having a wavelength of 308 nm and an energy density of 450 mJ / cm ² .

  Here, the reflective layer 4 is a reflective film that reflects the excimer laser beam irradiated when the thickness d of the reflective layer 4 is adjusted and the upper semiconductor layer 6 is polycrystallized. Specifically, the refractive index Nc of the reflective layer 4 is 1.47, for example. At this time, the refractive index Nc of the reflective layer 4 is obtained when the wavelength of the excimer laser beam is λ (nm), and the film thickness d of the reflective layer 4 is an odd multiple of (λ / 4) / Nc. The maximum is obtained when the thickness d of the reflective layer 4 is an even multiple of (λ / 4) / Nc. Therefore, in this reflective layer 4, when n is an odd number, the thickness d of the reflective layer 4 is in the range of error (λ / 8) / Nc centering on d = (n × λ / 4) Nc. It is set to be inside. That is, the reflective layer 4 is set so that the film thickness d is in the range of (n × λ / 4) / Nc ± (λ / 8) / Nc.

  Furthermore, a channel region 11 is provided in the center of the active layer 5 in the width direction, and a source region 12 and a drain region 13 are provided on both sides of the channel region 11. Further, a gate insulating film 14 is formed on the reflective layer 4 including the active layer 5. The gate insulating film 14 is made of, for example, silicon oxide having a film thickness of 100 nm. Further, a gate electrode 15 is stacked on the gate insulating film 14 facing the channel region 11 of the active layer 5. The gate electrode 15 is made of, for example, an alloy of molybdenum (Mo) and tungsten (W) (Mo-35% W) and has a film thickness of 300 nm. The gate electrode 15, the gate insulating film 14 and the active layer 5 form a thin film transistor (TFT) 16 which is a switching element.

  An interlayer insulating film 17 is laminated on the gate insulating film 14 including the gate electrode 15 of the thin film transistor 16. The interlayer insulating film 17 is composed of a silicon oxide thin film having a film thickness of, for example, 800 nm. The interlayer insulating film 17 and the gate insulating film 14 penetrate through the interlayer insulating film 17 and the gate insulating film 14, and communicate with the source region 12 and the drain region 13 of the active layer 5. 19 is provided.

  A source electrode 21 is stacked on the interlayer insulating film 17 including the first contact hole 18 penetrating the source region 12 of the active layer 5, and the source electrode 21 is electrically connected to the source region 12 of the active layer 5. Has been. Further, a drain electrode 22 is stacked on the interlayer insulating film 17 including the first contact hole 19 penetrating the drain region 13 of the active layer 5, and the drain electrode 22 is electrically connected to the drain region 13 of the active layer 5. It is connected. Here, the source electrode 21 and the drain electrode 22 are configured, for example, by laminating aluminum (Al) on a titanium (Ti) thin film.

  On the interlayer insulating film 17 including the source electrode 21 and the drain electrode 22, a passivation film 23 as a protective insulating film serving as a protective film is laminated. The passivation film 23 is composed of silicon nitride (SiN). In addition, the passivation film 23 is provided with a second contact hole 24 that penetrates the passivation film 23 and communicates with the drain electrode 22. A pixel electrode 25 is stacked on the passivation film 23 including the second contact hole 24, and the pixel electrode 25 is electrically connected to the drain electrode 22 through the second contact hole 24. Furthermore, on the passivation film 23 including the pixel electrode 25, an alignment film 26 made of alignment-treated polyimide is laminated.

  Further, a counter substrate 31 is disposed to face the alignment film 26. The counter substrate 31 includes a glass substrate 32 as an insulating substrate having a substantially transparent translucency. A color filter layer 33 is laminated on the entire surface of the resin substrate 3 2 facing the alignment film 26, and a counter electrode 34 as a common electrode is laminated on the color filter layer 33. Further, an alignment film 35 made of alignment-treated polyimide is laminated on the counter electrode 34. A liquid crystal composition 37 is injected into a liquid crystal sealing region 36 between the alignment film 26 of the array substrate 2 and the alignment film 35 of the counter substrate 31 to provide a liquid crystal layer 38 as a light modulation layer. .

  Next, a method for manufacturing the substrate device according to the embodiment will be described.

  First, as shown in FIG. 1, a first amorphous material is formed on a glass substrate 41, which is a first substrate as a substantially transparent insulating substrate having a thickness of, for example, about 0.5 mm. A lower semiconductor layer 42 as a semiconductor layer is stacked. The lower semiconductor layer 42 is made of amorphous silicon, which is amorphous silicon, which is an amorphous semiconductor having a film thickness of about 50 nm, for example.

  That is, the lower semiconductor layer 42 is made of amorphous silicon, which is amorphous silicon having a high etching selectivity with respect to an etchant such as hydrofluoric acid (HF), which is used when the glass substrate 41 is chemically etched. It functions as an etching stopper layer. Accordingly, the lower semiconductor layer 42 is polycrystallized by the excimer laser beam irradiation to become a polysilicon layer. Here, this polysilicon layer is a polycrystalline silicon layer as a polycrystalline semiconductor layer formed by polycrystallization of amorphous silicon by excimer laser annealing.

Next, a reflective layer 4 is formed by laminating a silicon oxide (SiO ₂ ) thin film having a film thickness of, for example, about 157 nm on the surface that is one main surface of the lower semiconductor layer 42.

  At this time, when the wavelength of the excimer laser beam is λ, the refractive index of the reflective layer is Nc, and n is an odd number so that the excimer laser beam is reflected by the reflective layer 4, The film thickness d is set to be in the range of (n × λ / 4) Nc ± (λ / 8) / Nc.

  Thereafter, an upper semiconductor layer 6 is formed by laminating an amorphous silicon thin film having a film thickness of, for example, about 50 nm on the surface which is one main surface of the reflective layer 4.

  Here, each of the lower semiconductor layer 42, the reflective layer 4 and the upper semiconductor layer 6 is continuously formed in a vacuum by a plasma CVD (Chemical Vapor Deposition) method.

  Next, the glass substrate 41 on which each of the lower semiconductor layer 42, the reflective layer 4, and the upper semiconductor layer 6 is laminated is heated in a vacuum, for example, at 450 ° C. for 30 minutes, so that heat treatment is performed in the lower semiconductor layer 42. The hydrogen concentration in the upper semiconductor layer 6 is reduced.

  Thereafter, an excimer laser beam having a wavelength λ of, for example, 308 nm is irradiated from above the upper semiconductor layer 6 side, and the upper semiconductor layer 6 is polycrystallized by excimer laser annealing to form polysilicon. And

At this time, the excimer laser annealing is an XeCl excimer laser, and an excimer laser beam having an energy density of, for example, about 450 mJ / cm ² is overlapped so that the overlap rate is 90% or more and 98% or less. However, the upper semiconductor layer 6 is irradiated so that the average number of irradiations is 10 times or more, for example, 20 times.

  In addition, the excimer laser beam that has passed through the upper semiconductor layer 6 is reflected by the reflective layer 4 laminated under the upper semiconductor layer 6. Therefore, the excimer laser beam is not irradiated onto the lower semiconductor layer 42, and the lower semiconductor layer 42 is not polycrystallized.

  Further, after processing the active layer 5 into an island shape, a silicon oxide thin film having a film thickness of, for example, 100 nm is formed on the reflective layer 4 including the island-shaped active layer 5 by a plasma CVD method. Thus, the gate insulating film 14 is formed. Here, for the formation of the gate insulating film 14, for example, a plasma CVD method using tetraethoxysilane (TEOS) as a source gas was used.

  Next, an alloy of molybdenum and tungsten (Mo-35% W) is formed on the gate insulating film 14 by sputtering, for example, to a thickness of about 300 nm, and then patterned to form the gate electrode 15.

  Thereafter, as shown in FIG. 2, an impurity F is implanted by ion implantation on both sides of the active layer 5 using the gate electrode 15 as a mask to form a source region 12 and a drain region 13. At this time, between the source region 12 and the drain region 13 of the active layer 5, a channel region 11 in which no impurity F is implanted is formed by a mask by the gate electrode 15.

Here, as the implantation of the impurity F, boric acid (B) ions were implanted with an acceleration voltage of 35 kV and a dose of 1 × 10 ¹³ / cm ² , for example, using an ion implantation apparatus (not shown).

  Thereafter, the glass substrate 41 having the active layer 5 implanted with the impurities F is heated in a nitrogen atmosphere at a temperature of 500 ° C. or higher and 600 ° C. or lower, preferably 550 ° C. for 5 minutes. The impurity F implanted into the is activated.

  Further, an interlayer insulating film 17 is formed on the gate insulating film 14 including the gate electrode 15 by laminating a silicon oxide thin film having a film thickness of, for example, 800 nm by a plasma CVD method.

  Next, first contact holes 18 and 19 are formed in the interlayer insulating film 17 and the gate insulating film 14 by dry etching to open the source region 12 and the drain region 13 of the active layer 5, respectively.

  Further, a titanium thin film is laminated on the interlayer insulating film 17 including the first contact holes 18 and 19, and then an aluminum thin film is laminated on the titanium thin film to form the source electrode 21 and the drain electrode 22.

  After that, as shown in FIG. 3, a passivation film 23 is formed by laminating a silicon nitride thin film on the interlayer insulating film 17 including the source electrode 21 and the drain electrode 22.

  Next, the glass substrate 41 on which the passivation film 23 is laminated is heated in a hydrogen atmosphere at a temperature of 300 ° C. or higher and 400 ° C. or lower, for example, 350 ° C. for 1 hour, and heat-treated. Is diffused into the active layer 5 and hydrogenated to compensate for crystal defects in the active layer 5 to complete the thin film transistor 16.

  Further, after the thin film transistor 16 is completed, an adhesive 45 is applied onto the glass substrate 41 on which the thin film transistor 16 is formed, that is, the passivation film 23, and then supported on the glass substrate 41 with the adhesive 45. The substrate 46 is bonded. Here, the support substrate 46 is a glass substrate as an insulating substrate having translucency.

  In this state, the back surface of the glass substrate 41 located on the opposite side of the support substrate 46 is mechanically polished until the thickness dimension of the glass substrate 41 becomes 0.2 mm.

  Thereafter, the back surface of the glass substrate 41 polished by this mechanical polishing is completely removed by polishing, for example, by chemical etching using hydrofluoric acid as an etchant, as shown in FIG.

  At this time, since the lower semiconductor layer 42 laminated on the glass substrate 41 is made of amorphous silicon, the lower semiconductor layer 42 functions as an etching stopper layer at the time of chemical etching with hydrofluoric acid. Damage to the active layer 5 of the thin film transistor 16 laminated on the lower semiconductor layer 42 by chemical etching using hydrofluoric acid is prevented.

  Thereafter, the lower semiconductor layer 42 of the thin film transistor 16 from which the glass substrate 41 has been completely removed is selectively removed with an alkaline etching solution, and then the reflective layer 4 stacked on the lower semiconductor layer 42 is formed. After an adhesive (not shown) is applied to the lower surface, as shown in FIG. 5, it is transferred onto the resin substrate 3 as a transfer destination, and is adhered and transferred.

  Next, the support substrate 46 and the adhesive 45 are removed from the passivation film 23 laminated on the thin film transistor 16 transferred onto the resin substrate 3.

  Thereafter, a second contact hole 24 is provided in the passivation film 23 by dry etching to communicate with the drain electrode 22.

  Further, after the pixel electrode 25 is stacked on the passivation film 23 including the second contact hole 24, the alignment film 26 is stacked on the passivation film 23 including the pixel electrode 25, thereby completing the array substrate 2.

  Next, after the alignment film 35 of the counter substrate 31 is bonded to the alignment film 26 of the array substrate 2, a liquid crystal composition 37 is injected into the liquid crystal sealing region 36 between the alignment films 26 and 35. A liquid crystal layer 38 is formed to complete the liquid crystal panel 1.

  Here, since the thin film transistor 16 having the active layer 5 made of polysilicon has a mobility of 100 times or more as compared with the thin film transistor having the active layer made of amorphous silicon, conventionally, the LSI (Large Scale Integration) is used. It is possible to form a peripheral drive circuit (not shown) that is externally connected to the resin substrate 3 on which the thin film transistors 16 are laminated.

  In order to form polysilicon constituting the active layer 5 of the thin film transistor 16, an excimer laser annealing method is generally used in which the upper semiconductor layer 6 made of amorphous silicon is polycrystallized with an excimer laser beam. ing. As this excimer laser beam, generally, ultraviolet light such as XeCl having a wavelength of 308 nm or KrF having a wavelength of 248 nm is used. The wavelengths of these excimer laser beams have a large absorption coefficient with respect to amorphous silicon, and the incident excimer laser beam is all absorbed by about 10 nm from the surface of the upper semiconductor layer 6 and hardly transmits below the lower semiconductor layer 6. .

  In this excimer laser annealing method, the excimer laser beam is directed toward the surface of the upper semiconductor layer 6 so that the overlap rate is 90% or more and 98% or less, and the average number of irradiations is 10 times or more. In general, the amorphous silicon is polycrystallized while being irradiated. At this time, the upper semiconductor layer 6 is polycrystallized by the first excimer laser beam irradiation, and the crystallinity is improved by the second and subsequent excimer laser beam irradiations.

  However, since the absorption coefficient for the excimer laser beam by the active layer 5 made of polysilicon in which the upper semiconductor layer 6 is polycrystallized is greatly reduced, a part of the excimer laser beam irradiated to the active layer 5 is reduced. However, the light passes through the active layer 5 and leaks, and the lower semiconductor layer 42 stacked under the active layer 5 is irradiated.

  Therefore, when the average number of times of irradiation of the active layer 5 with this excimer laser beam is increased, the lower semiconductor layer 42 is also polycrystallized in addition to the upper semiconductor layer 6 that should be crystallized. The lower semiconductor layer 42 is an etching stopper layer for chemical etching using the hydrofluoric acid of the glass substrate 41 as an etching solution. When the lower semiconductor layer 42 is polycrystallized, the etching solution is removed through the crystal grain boundary. There is a possibility that penetration into the active layer 5 may occur and damage the thin film transistor 16.

  Therefore, as in the first embodiment described above, the lower semiconductor layer 42 serving as an etching stopper layer for preventing etching damage to the active layer 5 of the thin film transistor 16 when the glass substrate 41 is chemically etched with hydrofluoric acid is formed. A reflection layer 4 for reflecting an excimer laser beam is laminated between the lower semiconductor layer 42 and the upper semiconductor layer 6 serving as the active layer 5 of the thin film transistor 16 while being made of amorphous silicon having a high etching selectivity ratio to hydrofluoric acid. It was set as the structure made to do.

  Here, the excimer laser beam can be reflected by adjusting the film thickness d of the reflective layer 4. That is, an insulating film having a refractive index Nc and a film thickness d (nm) is formed on the lower semiconductor layer 42, and this insulating film is a reflective film for an excimer laser beam having a wavelength λ (nm). The film thickness d is set. Specifically, as shown in FIG. 6, the refractive index Nc of the reflective layer 4 is minimized when the thickness of the insulating film is an odd multiple of (λ / 4) / Nc, and the thickness of the insulating film is (λ / 4) It is the maximum even number times / Nc. Therefore, when this insulating film is composed of a single layer, the thickness d of this insulating film is an error range (λ) centered on d = (n × λ / 4) / Nc; (n = odd number). / 8) The reflective layer 4 is set so as to be within / Nc.

  As a result, the excimer laser beam irradiated to the lower semiconductor layer 42 has the maximum reflection at the interface between the reflective layer 4 and the lower semiconductor layer 42 configured by adjusting the film thickness of the insulating film. Thus, the energy density and intensity of the excimer laser beam reaching the lower semiconductor layer 42 can be reduced. Accordingly, when the excimer laser beam is irradiated from the surface side of the upper semiconductor layer 6 to polycrystallize the upper semiconductor layer 6 into the active layer 5, the reflection laminated below the upper semiconductor layer 6. The excimer laser beam can be efficiently reflected by the layer 4.

  Therefore, when the upper semiconductor layer 6 is polycrystallized by irradiating it with the excimer laser beam, the irradiation of the lower semiconductor layer 42 with this excimer laser beam can be prevented. Therefore, since the lower semiconductor layer 42 can be prevented from being polycrystallized by the irradiation of the excimer laser beam, the function of the etching stopper layer due to the polycrystallization of the lower semiconductor layer 42 can be prevented. For this reason, the lower semiconductor layer 42 can function reliably as an etching stopper layer when the glass substrate 41 is chemically etched with an etchant such as hydrofluoric acid, so that the transfer yield can be greatly improved.

  In the first embodiment, the reflective layer 4 is a single layer. However, as in the second embodiment shown in FIG. 7, the reflective layer 4 has a structure in which a plurality of laminated films are laminated. You can also In this case, the reflection layer 4 includes a first layer 51 which is an antireflection film made of silicon nitride and having a refractive index Nsin of 1.88. The first layer 51 is stacked on the lower semiconductor layer 42. On the surface which is one main surface of the first layer 51, a second layer 52 made of silicon oxide and having a refractive index Nsio of 1.47 is laminated, for example, about 100 nm. Yes.

  Further, the first layer 51 has a transmittance (Dsin × Nsin + 100 × Nsio) of the first layer 51 (dsin × Nsin + 100 × Nsio) as shown in FIG. The minimum is an odd multiple of λ / 4), and the maximum is an even multiple of (λ / 4). Therefore, the reflective layer 4 constituted by the laminated structure of the first layer 51 and the second layer 52 has a thickness Σ (Nn × Dn) of the reflective layer 4 of (m × λ / 4); n = integer, m = odd) and an error range (λ / 8) / Nm; (Nm = average refractive index of the first layer 51 and the second layer 52). Since the excimer laser beam can be reflected at 4, the same operational effects as in the first embodiment can be obtained.

  In the second embodiment, the reflective layer 4 is formed by laminating the first layer 51 and the second layer 52. However, the reflective layer 4 is composed of a plurality of, for example, n layers. Even if the refractive index of each layer of the reflective layer 4 is N1, N2,..., Nn, and the film thicknesses of these layers are d1, d2,. When the average refractive index of each layer is Nm, n is an integer, m is an odd number, and the wavelength of the excimer laser beam is λ, the thickness Σ (Nn × dn) of the reflective layer 4 is (m × λ / 4). By setting the film thickness of each of these layers within an error range (λ / 8) / Nm centered on), the reflective layer 4 can reflect the excimer laser beam efficiently. The same effect as the form can be achieved.

It is an explanatory sectional view showing the substrate apparatus of a 1st embodiment of the present invention. It is explanatory sectional drawing which shows the state which polycrystallizes the 2nd amorphous semiconductor layer of a board | substrate apparatus same as the above. It is explanatory sectional drawing which shows the state which formed the thin-film transistor in the board | substrate apparatus same as the above. It is explanatory sectional drawing which shows the state which attached the board | substrate on the board | substrate apparatus same as the above and removed the translucent board | substrate. It is explanatory sectional drawing which shows the liquid crystal display device which transferred the board | substrate apparatus same as the above. It is a secondary graph which shows the relationship between the film thickness of the reflection layer of the board | substrate apparatus same as the above, and the transmittance | permeability. It is explanatory sectional drawing which shows the board | substrate apparatus of the 2nd Embodiment of this invention. It is a secondary graph which shows the relationship between the film thickness of the reflection layer of the board | substrate apparatus same as the above, and the transmittance | permeability.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Liquid crystal panel as a substrate device 3 Resin substrate as a second substrate 4 Reflective layer 5 Active layer as a polycrystalline semiconductor layer 6 Upper semiconductor layer as a second amorphous semiconductor layer
41 Glass substrate as first substrate
42 Lower semiconductor layer as first amorphous semiconductor layer
First layer as 51 layers
52 second layer as layer

Claims (5)

A first amorphous semiconductor layer;
A second amorphous semiconductor layer provided on one main surface of the first amorphous semiconductor layer and crystallized by laser beam irradiation to become a polycrystalline semiconductor layer;
A substrate device comprising: a reflective layer that is positioned between the first amorphous semiconductor layer and the second amorphous semiconductor layer and reflects a laser beam. The substrate apparatus according to claim 1, wherein the reflective layer reflects a laser beam by adjusting a film thickness of the reflective layer. When the refractive index of the reflective layer is Nc, n is an odd number, and the wavelength of the laser beam is λ, the thickness d of the reflective layer is (n × λ / 4) / Nc ± ( It is (lambda / 8) / Nc. The board | substrate apparatus as described in any one of Claim 1 or 2 characterized by the above-mentioned. The reflective layer has a plurality of layers with refractive indexes of N1, N2,..., Nn and film thicknesses of d1, d2,..., Dn, and an average refractive index of the plurality of layers is Nm. When n is an integer, m is an odd number, and the wavelength of the laser beam is λ, the film thickness Σ (Nn × dn) of the reflective layer is (m × λ / 4) ± (λ / 8) / Nm The substrate device according to any one of claims 1 to 3, wherein the substrate device is provided. A first substrate;
A first amorphous semiconductor layer provided on one main surface of the first substrate;
A second amorphous semiconductor layer provided on one main surface of the first amorphous semiconductor layer and crystallized by laser beam irradiation to become a polycrystalline semiconductor layer;
A method of manufacturing a substrate device comprising: a reflective layer that is positioned between the first amorphous semiconductor layer and the second amorphous semiconductor layer and reflects a laser beam;
The second amorphous semiconductor layer is crystallized by irradiating a laser beam from one main surface side of the translucent substrate to form a polycrystalline semiconductor layer,
The method for manufacturing a substrate device, wherein the light-transmitting substrate is removed by etching, and the polycrystalline semiconductor layer is transferred to a second substrate different from the first substrate.

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