JPH02224253A - Thin film semiconductor device and manufacture thereof - Google Patents
Thin film semiconductor device and manufacture thereofInfo
- Publication number
- JPH02224253A JPH02224253A JP4299389A JP4299389A JPH02224253A JP H02224253 A JPH02224253 A JP H02224253A JP 4299389 A JP4299389 A JP 4299389A JP 4299389 A JP4299389 A JP 4299389A JP H02224253 A JPH02224253 A JP H02224253A
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor device
- semiconductor
- thin film
- silicon oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 41
- 239000010409 thin film Substances 0.000 title claims description 15
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 24
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 11
- 239000010703 silicon Substances 0.000 claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 239000010408 film Substances 0.000 claims description 93
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 230000001681 protective effect Effects 0.000 abstract description 13
- 238000005530 etching Methods 0.000 abstract description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 5
- 150000003376 silicon Chemical class 0.000 abstract description 4
- 239000011521 glass Substances 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 6
- 239000012535 impurity Substances 0.000 description 6
- 238000000137 annealing Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000002834 transmittance Methods 0.000 description 3
- 238000011109 contamination Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000009736 wetting Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Landscapes
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はエネルギビームを用いた薄膜半導体装置の製造
方法に係り、特にレーザアニールなどにおける光プロセ
スに関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method of manufacturing a thin film semiconductor device using an energy beam, and particularly to an optical process such as laser annealing.
従来は特開昭６２−２０６８１３号公報に記載のように
、薄膜トランジスタの半導体層をビームアニルで再結晶
化する当り、空気中の不純物が混入しないように半導体
層に保護膜を設けて行っていた。Conventionally, as described in Japanese Unexamined Patent Publication No. 62-206813, when recrystallizing a semiconductor layer of a thin film transistor by beam annealing, a protective film was provided on the semiconductor layer to prevent airborne impurities from being mixed in.
アニール後、この保護膜を除去して、ゲート絶縁膜を設
けて、ゲート膜を形成する。この際、保護膜の特性とし
て。After annealing, this protective film is removed and a gate insulating film is provided to form a gate film. At this time, as a characteristic of the protective film.
■ エネルギービームの透過性が良いこと。■Good energy beam penetration.
■ エネルギービームに対して２反射防止の役目になる
こと。■ It acts as a 2-reflection prevention against energy beams.
■ 再結晶化すべき半導体層の物質とヌレが良いこと。■ Good wetting with the substance of the semiconductor layer to be recrystallized.
■ アニール後に容易に除去出来ること。■ Easily removed after annealing.
が要求される。is required.
そのため、一般に５ｉｎ２．ＳｉＮ、Ｗ膜などが用いら
れる。Therefore, generally 5in2. SiN, W film, etc. are used.
又、ゲート絶縁膜の特性として ■ 絶縁耐圧が十分であること。Also, as the characteristics of the gate insulating film, ■ Sufficient dielectric strength.
■ 再結晶すべき半導体層の物質とヌレが良いなど半導
体層と、良い界面が出来ること。■ A good interface with the semiconductor layer, such as good wetting with the material of the semiconductor layer to be recrystallized, is created.
が要求される。is required.
そのため、Ｓｉｎ、が最も一般に使われている。Therefore, Sin is most commonly used.
レーザ照射の保護膜、ゲート絶縁膜はそれぞれの目的に
合せ、その材料及び膜の厚さが使われている。そのため
、膜の形成は別々のプロセスで行われている。その結果
、プロセス数が多いことに問題があった。又、上述保護
膜のエツチング工程において、半導体層の損傷やエツチ
ングによる汚染などの問題があった。The material and thickness of the laser irradiation protective film and gate insulating film are selected depending on the purpose. Therefore, film formation is performed in separate processes. As a result, there was a problem with the large number of processes. Further, in the etching process of the above-mentioned protective film, there were problems such as damage to the semiconductor layer and contamination due to etching.
本発明の目的は、保護膜とゲート絶縁膜を同−膜にする
ことによって、プロセス数を低減し、又保護膜のエツチ
ング工程をなくすことによって。An object of the present invention is to reduce the number of processes by using the same film as the protective film and the gate insulating film, and to eliminate the etching process for the protective film.
清浄な半導体−絶縁膜界面を得ようとすることである。The aim is to obtain a clean semiconductor-insulating film interface.
本発明の他の目的は、適切に膜の厚さを選択することに
よって、光照射の効率を最高に保ちながら、耐圧力を持
つゲート絶縁膜を得ることにある。Another object of the present invention is to obtain a gate insulating film that can withstand pressure while maintaining maximum light irradiation efficiency by appropriately selecting the film thickness.
上記目的を達成するために以下の手段を用いた。 The following means were used to achieve the above objective.
すなわちアニールすべき半導体膜層の上に１３００Å以
上、１７００Å以下のシリコン酸化膜を形成しゲート絶
縁膜として使われる。That is, a silicon oxide film with a thickness of 1300 Å or more and 1700 Å or less is formed on the semiconductor film layer to be annealed and used as a gate insulating film.
このシリコン酸化膜を通して、波長３０８ｎｍの紫外光
を照射して、半導体膜層をアニールしてこのシリコン酸
化膜をレーザ光照射様保護として使用し、その後、その
絶縁膜上にゲート電極を設はレーザ照射領域の前記シリ
コン酸化膜をそのままゲート絶縁膜として用いる方法で
ある。The semiconductor film layer is annealed by irradiating ultraviolet light with a wavelength of 308 nm through this silicon oxide film, and this silicon oxide film is used as a protection for laser light irradiation.Then, a gate electrode is placed on the insulating film and the laser beam is applied. This is a method in which the silicon oxide film in the irradiated area is used as it is as a gate insulating film.
以下９本発明の作用について説明する。 Below, nine effects of the present invention will be explained.
半導体膜表面には種々の不純物が吸着しており。Various impurities are adsorbed on the surface of semiconductor films.
半導体膜上を堆積させると、これらの不純物が半導体−
絶縁物の界面準位を形成する。しかし、レーザによって
半導体層をアニールすると、界面付近の不純物は半導体
の厚さ方法に拡散し、ＭＯ８構造によって半導体−絶縁
物界面に誘起されたキャリアはトラップされる確立が減
る。このため。When deposited on a semiconductor film, these impurities become
Forms interface states of insulators. However, when the semiconductor layer is annealed by a laser, impurities near the interface diffuse into the thickness of the semiconductor, reducing the probability that carriers induced at the semiconductor-insulator interface by the MO8 structure will be trapped. For this reason.
キャリアの移動度は増加し、トランジスタのしきい電圧
は減少する。ここで、絶縁膜をエツチングにより除き、
新たにゲート絶縁膜を堆積させると。Carrier mobility increases and the transistor threshold voltage decreases. Here, the insulating film is removed by etching,
When a new gate insulating film is deposited.
半導体−絶縁膜界面にはエツチングによる損傷が入るだ
けでなく、再度、不純物が取込まれることになる。した
がって、キャリアの移動度は減少し。Not only is the semiconductor-insulating film interface damaged by etching, but also impurities are taken in again. Therefore, carrier mobility decreases.
トランジスタのしきい電圧は増加する。The threshold voltage of the transistor increases.
レーザ光が酸化シリコン膜を通して、半導体膜に照射さ
れる際に、干渉効果によって、半導体層に到達する光の
強度は変る。この干渉効果は、入射光の波長、酸化シリ
コンと半導体膜の光学係数及び酸化シリコンの厚さに依
存する。When a semiconductor film is irradiated with laser light through a silicon oxide film, the intensity of the light reaching the semiconductor layer changes due to interference effects. This interference effect depends on the wavelength of the incident light, the optical coefficients of the silicon oxide and the semiconductor film, and the thickness of the silicon oxide.
波長３０８ｎｍの光を膜に垂直に照射する場合。When the film is irradiated with light with a wavelength of 308 nm perpendicularly.
酸化シリコンの厚さ（ｄ）と半導体膜表面に到達すする
光の強度（Ｔ）（シリコン膜の透光率）との間、第２図
に示すように次のような関係がある。As shown in FIG. 2, the following relationship exists between the thickness (d) of silicon oxide and the intensity (T) of light reaching the surface of the semiconductor film (light transmittance of the silicon film).
Ｔが最大になる条件は： ｄ＝５２０Ｘ （１＋２Ｎ）人。The conditions for maximum T are: d=520X (1+2N) people.
Ｎ＝０．１，２．・・・
Ｔが最小になる条件は：
ｄ＝１０４０ｘ人、Ｎ＝０，１，２． ・・・すなわち
、酸化シリコン膜の厚さ（ｄ）が ５２０人、１５６０
人、・・・の時、最も光照射の効率が良いである。又、
計算の制度を考慮に入れたら。N=0.1,2. ... The conditions for minimizing T are: d=1040x people, N=0, 1, 2. ...That is, the thickness (d) of the silicon oxide film is 520 people, 1560
Light irradiation is most efficient when a person... or,
If we take into account the system of calculation.
それぞれ、５００人＜ｄ＜７５０人及び、１３００人＜
ｄ＜１８００人の範囲になる。500<d<750 and 1300<, respectively.
The range is d<1800 people.
一方、多結晶シリコンで構成されるＴＰＴの場合、ゲー
ト電圧は約１０〜５０Ｖである。この電圧で絶縁破壊を
起こさせないためにはゲート絶縁膜を１２００人〜１７
００人の酸化シリコンにすればよい。しかもしきい電圧
はさきほど上昇しないで済むことが分かった。On the other hand, in the case of a TPT made of polycrystalline silicon, the gate voltage is about 10 to 50V. In order to prevent dielectric breakdown from occurring at this voltage, the gate insulating film must be
00 people's silicon oxide. Moreover, it was found that the threshold voltage did not need to rise too much.
以上によって、光照射保護膜とゲート絶縁膜の共通膜と
して、酸化シリコンを１５００± ２００人、シリコン
膜の上に形成し、その上から３０８ｎｍのレーザ光を照
射し、ゲート膜を設ければ。As described above, 1500±200 layers of silicon oxide are formed on the silicon film as a common film for the light irradiation protection film and the gate insulating film, and a 308 nm laser beam is irradiated from above to form the gate film.
保護膜とゲート絶縁膜の良法の機能が得られる。Good functions of a protective film and a gate insulating film can be obtained.
又、保護膜とゲート絶縁膜を一つの膜にすること＆とよ
って、プロセスを１つ低減出来る。Furthermore, by forming the protective film and the gate insulating film into one film, the number of processes can be reduced by one.
以下２本発明の一実施例を第１図により説明する。第１
図に示すように、歪点５８０℃のガラス基板（１）の上
に、ＬＰＣＶＤ法により、約１５００人の厚さのアモル
ファスシリコン膜（２）を堆積させた後、このシリコン
膜をホット、エッチの工程によって、島切った。このシ
リコン膜の上にＡＰＣＶＤ法により酸化シリコンＩＩＩ
（３）を１５６０人デポした。この酸化シリコン膜（
３）の上から波長３０８ｎｍのエキシマレーザを３００
ｍＪ／ｃｍ”の強度で照射し、アモルファスシリコン膜
（２）をアニールした。この際第２図に示すように、ア
モルファスシリコン膜上の酸化シリコン膜の厚さが１３
００℃Å以上、１８００Å以下であれば、レーザ光の透
光率が最も良い。このため、効率良くシリコン膜をアニ
ールできた。Two embodiments of the present invention will be described below with reference to FIG. 1st
As shown in the figure, an amorphous silicon film (2) with a thickness of approximately 1500 nm is deposited by LPCVD on a glass substrate (1) with a strain point of 580°C, and then this silicon film is hot etched. The island was cut by the process of Silicon oxide III is deposited on this silicon film by the APCVD method.
(3) was deposited for 1,560 people. This silicon oxide film (
3) From above, connect an excimer laser with a wavelength of 308 nm to 300 nm.
The amorphous silicon film (2) was annealed by irradiation with an intensity of 1.0 mJ/cm. At this time, as shown in FIG. 2, the thickness of the silicon oxide film on the amorphous silicon film was 13.
If it is 00° C. or more and 1800 Å or less, the transmittance of laser light is the best. Therefore, the silicon film could be annealed efficiently.
その後、第３図の薄膜トランジスターの断面構造図に示
すように、酸化シリコン膜３をそのままゲート絶縁膜に
し、そのゲート電極様にＬＰＧＶＤシリコン膜を１００
０人堆積させる（３４）。ホト、エッチ工程によって素
子部を形成し、イオン打ち込み法によりＰ（リン）を３
０ｋｅＶのエネルギーで５Ｘ１０’のドース量を与える
。その上にキャッピング膜（３５）を１０００人形成し
た後。Thereafter, as shown in the cross-sectional structural diagram of the thin film transistor in FIG.
Deposit 0 people (34). The element part is formed by photo-etching process, and P (phosphorus) is added by ion implantation method.
A dose of 5×10′ is given at an energy of 0 keV. After forming 1000 capping films (35) thereon.
６００”Ｃ，２４時に於て、ソース（３１）、ドレイ（
３２）領域の不純物活性化を行う。その後。Source (31), Dray (
32) Activate impurities in the region. after that.
ＡＱ配線（３６）Ｌ、透明電極ＩＴＯを堆積させる。ホ
トエッチ工程によって液晶デイスプレィ様ＴＰＴを形成
する。AQ wiring (36) L and transparent electrode ITO are deposited. A liquid crystal display-like TPT is formed by a photoetch process.
上述した実施例では、照射光の波長は３０８ｎｍとした
が、それ以外の波長の光の場合も本発明は使える。たと
えば、波長が２４８．４ｎｍのｋｒＦレーザの場合、最
適酸化シリコン膜の厚さは１２００Å以上１４００１以
下である。In the above embodiment, the wavelength of the irradiation light was 308 nm, but the present invention can also be used with light of other wavelengths. For example, in the case of a krF laser with a wavelength of 248.4 nm, the optimal thickness of the silicon oxide film is 1200 Å or more and 1400 Å or less.
さらに、上述実施例では、再結晶すべき半導体層（２）
をシリコン膜としたが、それ以外の任意好適な材料の半
導体層としても良い。Furthermore, in the above embodiment, the semiconductor layer (2) to be recrystallized
Although a silicon film is used as the semiconductor layer, the semiconductor layer may be made of any other suitable material.
本発明によれば、レーザ照射保護間とゲート絶縁膜を同
−膜にすることが出来るので、プロセスの低減が出来る
。According to the present invention, since the laser irradiation protection layer and the gate insulating film can be made of the same film, the number of processes can be reduced.
又、レーザ照射保護膜のエツチング工程をなくしたこと
によって、この工程によって起こる半導体層の損傷、汚
染の起こる可能性がなくした。Furthermore, by eliminating the etching step of the laser irradiation protective film, the possibility of damage or contamination of the semiconductor layer caused by this step is eliminated.
さらに、光の干渉効果を利用して、酸化シリコン膜の厚
さを１３００Å以上、１７００Å以下すなわち、光の透
光率の最も良い厚さにすることによって、光照射エネル
ギーを最大限に利用することが出来る。Furthermore, by utilizing the interference effect of light, the thickness of the silicon oxide film is set to be at least 1,300 Å and at most 1,700 Å, that is, the thickness that provides the best light transmittance, thereby maximizing the use of light irradiation energy. I can do it.
第１図は本発明を示すレーザ照射時の半導体を構成する
膜の断面図である。第２図はシリコン膜上に形成される
酸化シリコン（Ｓｉｎ２）膜の厚さとその膜を透過する
波長３０８ｎｍの光の透過光強度の関係を示す図である
。第３図は本発明を応用した一実施例（ＴＰＴ）の断面
構造図である。
２・・・保護膜、ゲート絶縁膜となる酸化シリコン膜、
４・・・レーザ光、３４・・・ゲート電極膜図面の浄書
（内容に変更なし７
茅 Ｉ 目
３、・・ 酢顕イヒしリコン用１
４、・し−デ光
手続補正書（方式）
％式％
薄膜半導体装置の製造方法
名
輌（５＋Ｏ＋殊武会社
日
立
製
作
所
居
所（〒１ｆＸｌｌ東京都千代田区丸の内−丁目５番１号
（内容に変更なし）
第
目
龍々Ｌシリコン
喋厚
＜Ａ）
茅
固FIG. 1 is a cross-sectional view of a film constituting a semiconductor during laser irradiation according to the present invention. FIG. 2 is a diagram showing the relationship between the thickness of a silicon oxide (Sin2) film formed on a silicon film and the intensity of light with a wavelength of 308 nm transmitted through the film. FIG. 3 is a cross-sectional structural diagram of an embodiment (TPT) to which the present invention is applied. 2... Silicon oxide film serving as a protective film and gate insulating film,
4... Laser light, 34... Engraving of the gate electrode film drawing (no change in content 7). % Formula % Famous method for manufacturing thin film semiconductor devices (5+O+Subu Company Hitachi, Ltd. Address: 1F Kayagu
Claims (1)
において、薄膜半導体装置を形成する半導体膜の上にシ
リコン酸化膜を形成した後、その膜を通して、光を照射
して、半導体膜をアニールし、光照射領域のシリコン酸
化膜をそのままゲート絶縁膜にすることを特徴とする薄
膜半導体装置の製造方法。 ２、絶縁基板上に形成される薄膜半導体装置を製造する
方法において、薄膜半導体装置を形成する半導体膜の上
に、厚さが１０００Å以上、２０００Å以下の範囲でか
つ、照射する光の波長をλとしたときに、膜厚が λ／５．９４×ｎ±２００Å（ｎ＝１、２、３、・・・
）となるようにシリコン酸化膜を形成した後、その膜を
通して前記波長入の光を照射して、半導体膜をアニール
し、光照射領域のシリコン酸化膜をそのままゲート絶縁
膜にするとことを特徴とする薄膜半導体装置の製造方法
。 ３、絶縁基板上に形成される薄膜半導体装置を製造する
方法において、薄膜半導体装置を形成する半導体膜の上
に、厚さ１３００Å以上、１７００Å以下のシリコン酸
化膜を形成した後、その膜を通して波長３０８ｎｍの光
を照射して半導体膜をアニールし、光照射領域のシリコ
ン酸化膜をそのままゲート絶縁膜として使用することを
特徴とする薄膜半導体装置の製造方法。 ４、請求項２において、上記半導体膜をシリコン膜にす
ることを特徴とする薄膜半導体装置の製造方法。[Claims] 1. In a method for manufacturing a thin film semiconductor device formed on an insulating substrate, a silicon oxide film is formed on a semiconductor film forming the thin film semiconductor device, and then light is irradiated through the film. A method for manufacturing a thin film semiconductor device, characterized in that the semiconductor film is annealed, and the silicon oxide film in the light irradiation region is used as a gate insulating film. 2. In a method for manufacturing a thin film semiconductor device formed on an insulating substrate, the thickness of the semiconductor film forming the thin film semiconductor device is in the range of 1000 Å or more and 2000 Å or less, and the wavelength of the irradiated light is λ. When the film thickness is λ/5.94×n±200 Å (n=1, 2, 3,...
), and then the semiconductor film is annealed by irradiating light with the above-mentioned wavelength through the film, and the silicon oxide film in the light irradiated area becomes the gate insulating film as it is. A method for manufacturing a thin film semiconductor device. 3. In a method for manufacturing a thin film semiconductor device formed on an insulating substrate, a silicon oxide film with a thickness of 1300 Å or more and 1700 Å or less is formed on the semiconductor film forming the thin film semiconductor device, and then wavelengths are transmitted through the film. A method for manufacturing a thin film semiconductor device, characterized in that a semiconductor film is annealed by irradiating light of 308 nm, and the silicon oxide film in the light irradiated region is used as it is as a gate insulating film. 4. The method of manufacturing a thin film semiconductor device according to claim 2, wherein the semiconductor film is a silicon film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4299389A JPH02224253A (en) | 1989-02-27 | 1989-02-27 | Thin film semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4299389A JPH02224253A (en) | 1989-02-27 | 1989-02-27 | Thin film semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02224253A true JPH02224253A (en) | 1990-09-06 |
Family
ID=12651552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4299389A Pending JPH02224253A (en) | 1989-02-27 | 1989-02-27 | Thin film semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02224253A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6168980B1 (en) | 1992-08-27 | 2001-01-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
| US6562672B2 (en) * | 1991-03-18 | 2003-05-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor material and method for forming the same and thin film transistor |
| WO2008132862A1 (en) * | 2007-04-25 | 2008-11-06 | Sharp Kabushiki Kaisha | Semiconductor device, and its manufacturing method |
-
1989
- 1989-02-27 JP JP4299389A patent/JPH02224253A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6562672B2 (en) * | 1991-03-18 | 2003-05-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor material and method for forming the same and thin film transistor |
| US6168980B1 (en) | 1992-08-27 | 2001-01-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
| WO2008132862A1 (en) * | 2007-04-25 | 2008-11-06 | Sharp Kabushiki Kaisha | Semiconductor device, and its manufacturing method |
| JPWO2008132862A1 (en) * | 2007-04-25 | 2010-07-22 | シャープ株式会社 | Semiconductor device and manufacturing method thereof |
| US8575614B2 (en) | 2007-04-25 | 2013-11-05 | Sharp Kabushiki Kaisha | Display device |
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