JP2007294998A - Variable resistive element and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable resistive element having a structure in which an area of an electrically contributing region of a variable resistor is more minute than an area specified by an upper electrode, a lower electrode and the like, and to provide its manufacturing method. <P>SOLUTION: On the upper part of the lower electrode 1 disposed on a base substrate 5, a bump electrode material 2 extending parallelly in the same direction as the lower electrode 1 is formed. The different surface of the bump electrode material 2 from the contacting surface with the lower electrode 1 contacts with the variable resistor 3. The different surface of the variable resistor 3 from the contacting surface with the bump electrode material 2 contacts with the upper electrode 4. Thereby, since the crosspoint of the bump electrode material 2 (variable resistor 3) and the upper electrode 4 becomes the electrically contributing region of the variable resistor, the area of the region is reduced more than areas of the regions of conventional variable resistive elements. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention comprises one electrode, the other electrode, and a variable resistor, wherein the variable resistor exists in a region sandwiched between the one electrode and the other electrode, and a voltage pulse is applied between the two electrodes. The present invention relates to a method for manufacturing a variable resistance element that changes its electrical resistance when applied.

  In recent years, various devices such as next-generation non-volatile random access memory (NVRAM: Nonvolatile Random Access Memory) capable of operating at high speed instead of flash memory include FeRAM (Ferroelectric RAM), MRAM (Magnetic RAM), and PRAM (Phase Change RAM). A structure has been proposed, and intense development competition has been conducted from the viewpoint of high performance, high reliability, low cost, and process consistency. However, each of these current memory devices has advantages and disadvantages, and it is still far from the ideal realization of a “universal memory” having the advantages of SRAM, DRAM, and flash memory.

  For these existing technologies, a resistive non-volatile memory RRAM (Resistive Random Access Memory) (registered trademark) using a variable resistive element whose electric resistance reversibly changes by applying a voltage pulse has been proposed. This configuration is shown in FIG.

  As shown in FIG. 25, the conventional variable resistance element has a structure in which a lower electrode 203, a variable resistor 202, and an upper electrode 201 are laminated in order, and a voltage is applied between the upper electrode 201 and the lower electrode 203. By applying a pulse, the resistance value can be reversibly changed. A novel nonvolatile semiconductor memory device can be realized by reading a resistance value that changes by this reversible resistance change operation (hereinafter referred to as “switching operation”).

  In this nonvolatile semiconductor memory device, a plurality of memory cells including variable resistance elements are arranged in a matrix in the row direction and the column direction to form a memory cell array, and data is written to each memory cell in the memory cell array. Peripheral circuits for controlling erase and read operations are arranged. As the memory cell, a memory cell is composed of one selection transistor T and one variable resistance element R (referred to as “1T / 1R type”) because of the difference in its constituent elements. There are cells, memory cells composed of only one variable resistance element R (referred to as “1R type”), and the like. Among these, FIG. 26 shows a configuration example of a 1T / 1R type memory cell.

  FIG. 26 is an equivalent circuit diagram showing a configuration example of a memory cell array including 1T / 1R type memory cells. The gate of the selection transistor T of each memory cell is connected to the word lines (WL1 to WLn), and the source of the selection transistor T of each memory cell is connected to the source lines (SL1 to SLn) (n is a natural number). . One electrode of the variable resistance element R for each memory cell is connected to the drain of the selection transistor T, and the other electrode of the variable resistance element R is connected to the bit lines (BL1 to BLm) (m Is a natural number).

  The word lines WL1 to WLn are connected to the word line decoder 206, the source lines SL1 to SLn are connected to the source line decoder 207, and the bit lines BL1 to BLm are connected to the bit line decoder 205, respectively. Yes. A specific bit line, word line, and source line for writing, erasing, and reading operations to a specific memory cell in the memory cell array 204 are selected according to an address input (not shown).

  FIG. 27 is a schematic cross-sectional view of one memory cell constituting the memory cell array 204 in FIG. In this configuration, the select transistor T and the variable resistance element R form one memory cell. The selection transistor T includes a gate insulating film 213, a gate electrode 214, a drain diffusion layer region 215, and a source diffusion layer region 216, and is formed on the upper surface of the semiconductor substrate 211 on which the element isolation region 212 is formed. The variable resistance element R includes a lower electrode 218, a variable resistor 219, and an upper electrode 220. In the present embodiment, the variable resistor 219 is arranged in the opening disposed between the lower electrode 218 and the upper electrode 220. However, as shown in FIG. It is also good.

  The gate electrode 214 of the transistor T forms a word line, and the source line wiring 224 is electrically connected to the source diffusion layer region 216 of the transistor T through the contact plug 222. The bit line wiring 223 is electrically connected to the upper electrode 220 of the variable resistance element R through the contact plug 221, while the lower electrode 218 of the variable resistance element R is connected to the transistor T through the contact plug 217. The drain diffusion layer region 215 is electrically connected.

  As described above, the selection transistor T and the variable resistance element R are arranged in series, so that the transistor of the memory cell selected by the change in the potential of the word line is turned on, and the memory selected by the change in the potential of the bit line. The cell can be selectively written or erased only to the variable resistance element R of the cell.

  FIG. 28 is an equivalent circuit diagram showing a configuration example of a 1R type memory cell. Each memory cell includes only the variable resistance element R, and one electrode of the variable resistance element R is connected to the word lines (WL1 to WLn) and the other electrode is connected to the bit lines (BL1 to BLm). . Each word line WL1 to WLn is connected to a word line decoder 233, and each bit line BL1 to BLm is connected to a bit line decoder 232, respectively. Then, in accordance with an address input (not shown), specific bit lines and word lines for writing, erasing and reading operations to specific memory cells in the memory cell array 231 are selected.

  FIG. 29 is a schematic perspective view showing an example of a memory cell constituting the memory cell array 231 in FIG. As shown in FIG. 29, the upper electrode wiring 243 and the lower electrode wiring 241 are arranged so as to cross each other, one of which forms a bit line and the other forms a word line. In addition, a variable resistor 242 is arranged at the intersection of each electrode (usually called “cross point”). In the example of FIG. 29, the upper electrode 243 and the variable resistor 242 are processed into the same shape for the sake of convenience, but the portions that contribute electrically to the switching operation of the variable resistor 242 are the upper electrode 243 and the lower electrode 241. It becomes the area of crossing points.

Note that the variable resistor material used for the variable resistor 219 in FIG. 27 or the variable resistor 242 in FIG. 29 is known by the giant magnetoresistive effect by Shanqing Liu, Alex Ignatiev, etc. of the University of Houston, USA. The following Patent Document 1 and Non-Patent Document 1 disclose a method for reversibly changing the electric resistance by applying a voltage pulse to the perovskite material. Although this method uses a perovskite material known for its giant magnetoresistive effect, this method is extremely epoch-making in that a resistance change of several orders of magnitude appears even at room temperature without applying a magnetic field. In the element structure exemplified in Patent Document 1, a crystalline praseodymium / calcium / manganese oxide Pr _1-X Ca _X MnO ₃ (PCMO) film, which is a perovskite oxide, is used as a variable resistor material. Yes.

Other variable resistor materials include oxides of transition metal elements such as titanium oxide (TiO ₂ ) films, nickel oxide (NiO) films, zinc oxide (ZnO) films, and niobium oxide (Nb ₂ O ₅ ) films. It is known from Non-Patent Document 2 and Patent Document 2 that reversible resistance change is exhibited. Among these, the phenomenon of the switching operation using NiO is reported in detail in Non-Patent Document 3.

US Pat. No. 6,204,139 Liu, S .; Q. In addition, “Electrical-pulse-induced reversible resistance change effect in magnetosensitive films”, Applied Physics Letter, Vol. 76, pp. 2749-2751, 2000 H. Pagna, et al., “Bistable Switching in Electroformed Metal-Insulator-Metal Devices”, Phys. Stat. Sol. (A), vol. 108, pp. 11-65, 1988 JP 2002-537627 A Baek, I. et al. G. In addition, “Highly Scalable Non-volatile Resistive Memory Using Simple Binary Oxide Driven Asymmetric Universal Voltage Pulses”, IEDM 04, p. 587-590, 2004

By the way, during the above-described information rewriting operation of the nonvolatile memory device, that is, until the resistance of the variable resistor reaches a predetermined resistance value by applying an electric pulse between the upper electrode and the lower electrode. In addition, a transient current flows through the variable resistance element R. This current is referred to as a write current or an erase current depending on the direction of resistance change. For example, when an oxide of a transition metal element is used as the variable resistor material, in Non-Patent Document 3 using NiO, the write current and the erase current are 1 mA with an electrode area of 0.3 × 0.7 μm ^2. Is reported to be Since the amount of this current depends on the area of the electrically contributing region of the variable resistor, the write current and the erase current can be suppressed by reducing the area, and the current consumption as the nonvolatile memory device Can be suppressed.

  In general, if the variable resistor has good crystallinity, a stable switching memory element can be achieved with good reproducibility. However, this improvement in crystallinity relatively lowers the resistance value of the variable resistor. Since the resistance value of the variable resistor is inversely proportional to the area of the electrically contributing region of the variable resistor, the resistance of the variable resistor element R decreases when the area is large. In this case, in the 1T / 1R type memory cell, if the resistance of the variable resistive element R is significantly smaller than the on-resistance of the control transistor T, a sufficient voltage is not applied to the variable resistor and writing is not performed. Will occur. Further, even in the 1R type memory cell, the same problem that the parasitic current flowing through the selected bit wiring or the non-selected cell connected to the word wiring becomes large, the voltage supplied to the wiring is insufficient, and writing is not performed. Will occur.

  Accordingly, if the area of the electrically contributing region of the variable resistor can be reduced, it is possible to suppress the current consumption and to create a memory element with stable switching operation that does not become unwritable with good reproducibility. However, in the conventional memory cell described above, the area of the electrically contributing region of the variable resistor is, for example, the area of the variable resistor 219 in FIG. 27 or the upper electrode in FIG. 25 in the 1T / 1R type memory cell. In a 1R type memory cell having a size of 201, the area is defined by the area of a cross point region where the upper electrode wiring 243 and the lower electrode wiring 241 in FIG. 29 intersect. Accordingly, since the area of the electrically contributing region of the variable resistor is limited by the workable area of these electrodes and the like, there is a limit to the area that can be achieved upon reduction.

  The present invention has been made in view of the above problems, and has a variable structure in which the area of the electrically contributing region of the variable resistor is smaller than the area defined by the upper electrode or the lower electrode. An object of the present invention is to provide a resistance element and a manufacturing method thereof.

  In order to achieve the above object, a variable resistance element according to the present invention extends a lower electrode extending in a first direction parallel to the substrate surface and a second direction parallel to the substrate surface and orthogonal to the first direction. An upper electrode, two interlayer insulating films that are separated from each other in the second direction to electrically insulate between the lower electrode and the upper electrode, and a gap sandwiched between the two interlayer insulating films Projecting in the direction perpendicular to the substrate surface from one side to the other side of the two electrodes, and on the two straight lines parallel to the lower electrode with respect to one lower electrode, the first A projecting electrode object extending continuously or intermittently in the direction, and at the intersection between the electrodes, either one of the two electrodes and one of the two electrodes of the projecting electrode object. The ends are opposite and the variable resistor is one of the two electrodes. And the projecting electrode object are formed between the ends of either of the electrodes, and by applying a voltage pulse between the electrodes, the electrical resistance at the intersection between the electrodes changes. This is a first feature.

In order to achieve the above object, the variable resistance element according to the present invention includes a lower electrode extending in a first direction parallel to the substrate surface, and a second direction parallel to the substrate surface and perpendicular to the first direction. Sandwiched between the two upper-layer insulating films, the upper electrode extending, the two inter-layer insulating films that are separated from each other in the second direction to electrically insulate the lower electrode and the upper electrode, and the two inter-layer insulating films Projecting in a direction perpendicular to the substrate surface from one side of the two electrodes toward the other side, and on one straight line parallel to the lower electrode with respect to one lower electrode A protruding electrode object that extends continuously or intermittently in a first direction, and at either of the electrodes and either side of the protruding electrode object at the intersection between the electrodes. The close end faces,
A variable resistor is formed between any one of the two electrodes and an end of the protruding electrode near the one of the two electrodes, and by applying a voltage pulse between the two electrodes, A second feature is that the electrical resistance at the intersection between the two electrodes changes.

  According to the first or second characteristic configuration of the variable resistance element according to the present invention, the variable resistance element includes the protruding electrode object in contact with one of the two electrodes, and the protruding electrode object is provided on the other electrode. In this configuration, a variable resistor is provided at the tip, and connected to the other electrode via the variable resistor. For this reason, the area of the electrically contributing region of the variable resistor can be made smaller than the workable area defined in the manufacturing process. The protruding electrode object can be formed with a small area by a self-aligned process without relying only on the miniaturization restricted by the exposure technique. As a result, current consumption during writing and erasing can be reduced, and a memory element having a stable switching operation in which writing failure due to low resistance does not occur can be formed with good reproducibility.

  According to the variable resistance element of the invention, in addition to the first characteristic configuration, one of the two interlayer insulating films has a first interlayer insulating film in the second direction with the lower electrode interposed therebetween. Each of the two separated first interlayer insulating films is formed so that opposite side surfaces thereof are in contact with the side surface of the lower electrode and extend in the first direction, and the other second of the two interlayer insulating films is formed. The interlayer insulating film is formed such that its lower surface is located above the upper surface of the lower electrode, its upper surface is in contact with the lower surface of the upper electrode, and extends in the first direction with a narrower line width than the lower electrode. The projecting electrode object is formed between each side surface of the divided two first interlayer insulating films and both side surfaces of the second interlayer insulating film, and between the upper surface of the lower electrode and the lower surface of the upper electrode. Filled, the upper end surface becomes two parallel lines and is continuous in the first direction Or extending intermittently and formed such that the lower end surface of the protruding electrode object abuts on the upper surface of the lower electrode, and is continuously formed in the first direction on the upper end portion including the upper end surface of the protruding electrode object. A third feature is that an extending variable resistor is formed, and an upper end surface of the variable resistor at an upper end portion of the protruding electrode is in contact with a lower surface of the upper electrode at the intersection between the electrodes. To do.

  According to the variable resistance element of the invention, in addition to the first characteristic configuration, one of the two interlayer insulating films has a first interlayer insulating film in the second direction with the lower electrode interposed therebetween. Each of the two separated first interlayer insulating films is formed so that opposite side surfaces thereof are in contact with the side surface of the lower electrode and extend in the first direction, and the other second of the two interlayer insulating films is formed. The interlayer insulating film is formed so that its lower surface is in contact with the upper surface of the lower electrode, its upper surface is in contact with the lower surface of the upper electrode, and extends in the first direction with a line width narrower than the lower electrode, The protruding electrode object fills between each side surface of the two divided first interlayer insulating films and both side surfaces of the second interlayer insulating film, and between the upper surface of the lower electrode and the lower surface of the upper electrode. The upper end surface and the lower end surface each have two parallel lines and are cut in the first direction. The upper end surface of the protruding electrode object is formed so as to contact the lower surface of the upper electrode at the intersection between the electrodes, and the lower end portion including the lower end surface of the protruding electrode object, A fourth feature is that the variable resistor is formed so as to continuously extend in the first direction, and a lower end surface of the variable resistor is in contact with an upper surface of the lower electrode.

  In addition to the first characteristic configuration, the variable resistance element according to the present invention includes the variable resistor in the form of a thin film on the entire lower surface of the upper electrode, and one of the two interlayer insulating films. The first interlayer insulating film is divided in the second direction with the lower electrode interposed therebetween, and the opposing side surfaces of the two divided first interlayer insulating films are in contact with the side surfaces of the lower electrode in the first direction. The other second interlayer insulating film of the two interlayer insulating films, the lower surface thereof is located above the upper surface of the lower electrode, the upper surface is in contact with the lower surface of the variable resistor, In addition, the protruding electrode object is formed to extend in the first direction with a line width narrower than that of the lower electrode, and the protruding electrode object is formed on each side surface of the two divided first interlayer insulating films and the second interlayer insulating film. Between both side surfaces and between the upper surface of the lower electrode and the lower surface of the variable resistor The upper end surface is formed into two parallel lines and extends continuously or intermittently in the first direction, the lower end surface of the protruding electrode object abuts on the upper surface of the lower electrode, and the protrusion A fifth feature is that the upper end surface of the electrode object is formed so as to contact the lower surface of the variable resistor.

  In addition to the first characteristic configuration, the variable resistance element according to the present invention includes a first interlayer insulating film of one of the two interlayer insulating films, a lower surface of which is in contact with an upper surface of the lower electrode, and an upper surface thereof. Is in contact with the lower surface of the upper electrode, and both side surfaces of the lower electrode extend in the first direction continuously above and below the lower electrode, and the other of the two interlayer insulating films is formed. The two interlayer insulating films are divided in the second direction with the lower electrode interposed therebetween, and the opposite side surfaces of the two divided second interlayer insulating films are the side surfaces of the lower electrode and the first interlayer insulating film. Are formed so as to extend in the first direction apart from each other, and the protruding electrode object is formed on each side surface of the two separated second interlayer insulating films and on both sides of the first interlayer insulating film and the lower electrode. And between the lower surface position of the lower electrode and the lower surface of the upper electrode The upper end surface is formed into two parallel lines and extends continuously or intermittently in the first direction so that the side surface of the lower end portion of the protruding electrode object contacts the side surface of the lower electrode. The variable resistor is formed at an upper end portion including the upper end surface of the protruding electrode object so as to continuously extend in the first direction, and the protruding electrode is formed at the intersection between the electrodes. A sixth feature is that the upper end surface of the variable resistor at the upper end of the object abuts on the lower surface of the upper electrode.

  In the variable resistance element according to the present invention, in addition to the second characteristic configuration, the two interlayer insulating films are separated from each other in the second direction on the lower electrode, and each upper surface thereof is the upper electrode. Each of the lower surfaces is in contact with the upper surface of the lower electrode, and the opposing side surfaces of the two interlayer insulating films are formed to extend in the first direction. The two interlayer insulating films are filled with a gap formed on the lower electrode and between the upper surface of the lower electrode and the lower surface of the upper electrode, and each of the upper and lower surfaces has one line. And extending continuously or intermittently in the first direction, and formed such that a lower end surface of the protruding electrode object abuts on an upper surface of the lower electrode at the intersection between the electrodes. The variable resistor is provided at an upper end portion including the upper end surface of the protruding electrode object. It is formed so as to extend continuously or intermittently in the first direction, and the upper end surface of the variable resistor at the upper end of the protruding electrode object is on the lower surface of the upper electrode at the intersection between the electrodes. The seventh feature is to abut.

  In the variable resistance element according to the present invention, in addition to the second characteristic configuration, the two interlayer insulating films are separated from each other in the second direction on the lower electrode, and each upper surface thereof is the upper electrode. Each of the lower surfaces is in contact with the upper surface of the lower electrode, and the opposing side surfaces of the two interlayer insulating films are formed to extend in the first direction. The two interlayer insulating films are filled with a gap formed on the lower electrode and between the upper surface of the lower electrode and the lower surface of the upper electrode, and each of the upper and lower surfaces has one line. And extending continuously or intermittently in the first direction, the upper end surface of the protruding electrode object is in contact with the lower surface of the upper electrode at the intersection between the electrodes, The variable resistor is provided at the lower end including the lower end surface of the protruding electrode object. It is formed so as to extend intermittently in the first direction, and the lower end surface of the variable resistor at the lower end portion of the protruding electrode object abuts on the upper surface of the lower electrode at the intersection between the electrodes. Is the eighth feature.

  The variable resistance element according to the present invention has a ninth feature that, in addition to any one of the first to eighth feature configurations, the lower electrode is a diffusion layer formed on a semiconductor substrate. And

  The variable resistance element according to the present invention is characterized in that, in addition to any one of the first to ninth characteristic configurations, the protruding electrode is formed of a transition metal or a nitride of a transition metal element. A tenth feature is provided.

  In addition to the tenth characteristic configuration, the variable resistance element according to the present invention has an eleventh characteristic that the protruding electrode material is titanium nitride.

  According to the eleventh characteristic configuration of the variable resistance element according to the present invention, since the titanium-based material conventionally used for general semiconductor processes can be used as the protruding electrode object, the assembly of the process becomes easy. .

  In addition to any one of the first to eleventh features, the variable resistance element according to the present invention is formed by oxidizing the part of the protruding electrode object. The twelfth feature.

  According to the twelfth characteristic configuration of the variable resistance element according to the present invention, the variable resistor film can be formed by an oxidation heat treatment process, which is a general process in a semiconductor manufacturing process. Therefore, it can be realized with an existing apparatus without requiring a special apparatus.

  Moreover, the variable resistance element according to the present invention includes at least one of the variable resistor, the lower electrode, and the upper electrode in addition to any one of the first to twelfth features. The line width of the contact surface with the upper electrode is formed to be narrower than the line width of either the lower electrode or the upper electrode.

  Moreover, the variable resistance element according to the present invention includes at least one of the variable resistor, the lower electrode, and the upper electrode in addition to any one of the first to twelfth features. The contact surface is formed with a line width smaller than the film thickness value of either the lower electrode or the upper electrode.

  According to the thirteenth or fourteenth feature configuration of the variable resistance element according to the present invention, the area of the electrically contributing region of the variable resistor can be made smaller than the workable area defined in the manufacturing process. it can.

  In the variable resistance element according to the present invention, in addition to any one of the first to fourteenth features, the variable resistor is formed of an oxide of a transition metal element or an oxynitride of a transition metal. This is a fifteenth feature.

  In addition to the fifteenth characteristic configuration, the variable resistance element according to the present invention has a sixteenth characteristic in that the variable resistor is titanium oxide or titanium oxynitride.

  According to the sixteenth characteristic configuration of the variable resistance element according to the present invention, since the titanium-based material that has been conventionally used for general semiconductor processes can be used as the variable resistor, the assembly of the process becomes easy. .

  In order to achieve the above object, a method for manufacturing a variable resistance element according to the present invention is a method for manufacturing a variable resistance element having any one of the third to fifth characteristics, wherein an electrode is formed on a substrate. A first step of forming a lower electrode extending in the first direction by depositing a material, laminating a first electrode film, and processing the first electrode film; and an upper region of the lower electrode A second step of forming the first interlayer insulating film having an opening reaching the electrode surface of the lower electrode; and the opening formed in the second step while contacting at least a partial region of the lower electrode. A third step of forming the protruding electrode object extending upward along the inner side wall of the first electrode; a fourth step of forming the variable resistor at the tip portion of the protruding electrode object; and a second step of depositing an electrode material. Laminating electrode films and processing the second electrode film , The first characterized by a fifth and step of forming the upper electrode extending in the second direction.

  According to the first feature of the method of manufacturing a variable resistance element according to the present invention, a variable resistor is formed at the tip portion of the protruding electrode object extending from the lower electrode in the direction of the upper electrode, and the variable resistor is interposed through the variable resistor. Thus, the protruding electrode body and the upper electrode are connected. That is, it is possible to manufacture a variable resistance element in which the area of the electrically contributing region of the variable resistor is reduced.

  The first step includes a step of depositing the first electrode film constituting the lower electrode, a step of depositing a second insulating film on the first electrode film, the first electrode film, and the first electrode And a step of processing two insulating films.

  The second step includes a step of depositing the first insulating film, a step of smoothing the first insulating film until an upper surface of the second insulating film is exposed, and a part of the second insulating film. Alternatively, the step of forming the opening penetrating so as to reach the electrode surface of the lower electrode in the first insulating film by removing all of the first insulating film may be provided.

  A variable resistance element manufacturing method according to the present invention is a variable resistance element manufacturing method having the third or fifth characteristic configuration in addition to the first characteristic, wherein the third step includes: Depositing a conductive material on the opening and the first insulating film to form an electrode film for the projecting electrode object; and a third insulation functioning as the second interlayer insulating film on the electrode film for the projecting electrode object Depositing a film; removing the third insulating film until an upper surface of the electrode film for the projecting electrode object is exposed; and projecting electrode object electrode laminated in a region other than the upper region of the opening. A step of forming the protruding electrode object in contact with the lower electrode in the opening by removing the film.

  A variable resistance element manufacturing method according to the present invention is a variable resistance element manufacturing method having the fourth characteristic configuration in addition to the first characteristic, wherein the third step is performed in the opening. And a sixth step of depositing a conductive material on the first interlayer insulating film to form an electrode film for protruding electrodes, and removing the electrode film for protruding electrodes stacked on the first interlayer insulating film The step of forming the protruding electrode object on the side wall of the opening is a third feature.

  In addition to the third feature described above, the variable resistance element manufacturing method according to the present invention may further include a step of forming the projecting electrode object electrode film on the upper surface of the lower electrode in the sixth step. A fourth feature is that the film thickness of the electrode film for the protruding electrode object is reduced as it approaches.

  In the variable resistance element manufacturing method according to the present invention, in addition to the fourth feature, the fourth step may be a third interlayer insulating film on the opening and the first insulating film. Forming an insulating film, and in the process of forming the third insulating film, of the protruding electrode formed on the side wall of the opening in the third step, formed near the upper surface of the lower electrode. A fifth feature is that the variable resistor is formed in the portion by oxidizing the protruding electrode object in the thin region to be formed.

  In order to achieve the above object, a variable resistance element manufacturing method according to the present invention is a variable resistance element manufacturing method having the sixth characteristic configuration, wherein the first electrode is formed on the substrate. Depositing an electrode film, and then depositing a first insulating film to be the first interlayer insulating film on the first electrode film, and processing the first electrode film and the first insulating film; A first step of forming the lower electrode extending in one direction; and contacting at least a partial region of the lower electrode and extending upward along the outer side wall of the lower electrode and the outer side wall of the first insulating film A second step of forming the protruding electrode object, a third step of forming the variable resistor at a tip portion of the protruding electrode object, a second electrode film is deposited by depositing an electrode material, and the second Before stretching in the second direction by processing the electrode film A fourth step of forming an upper electrode, that having a sixth feature of the.

  According to the sixth feature of the method of manufacturing a variable resistance element according to the present invention, a variable resistor is formed at the tip of the protruding electrode object extending from the lower electrode toward the upper electrode, and the variable resistor is interposed through the variable resistor. Thus, the protruding electrode body and the upper electrode are connected. That is, it is possible to manufacture a variable resistance element in which the area of the electrically contributing region of the variable resistor is reduced.

  Further, in the variable resistance element manufacturing method according to the present invention, in addition to the sixth feature, the second step includes depositing a conductive material on the entire surface including the upper surface of the first insulating film, and protruding electrode objects. Forming the electrode film, and removing the electrode film for the projecting electrode object formed in a region other than the outer side wall of the first electrode film and the outer side wall of the first insulating film. Forming on the outer side wall of the first electrode film and the outer side wall of the first insulating film.

  In the variable resistance element manufacturing method according to the present invention, in addition to the sixth or seventh feature, the third step includes the second interlayer insulating film and the entire surface including the upper surface of the first insulating film. An eighth feature is that the method includes a step of depositing a second insulating film, and a step of smoothing the second insulating film until the upper surface of the electrode film for protruding electrodes is exposed.

  In order to achieve the above object, a variable resistance element manufacturing method according to the present invention is a variable resistance element manufacturing method having the seventh characteristic configuration, wherein a first electrode material is deposited on a substrate. The first step of forming a plurality of lower electrodes extending in the first direction by laminating electrode films and processing the first electrode film is common to each of the two adjacent lower electrodes. And depositing a first insulating film serving as an interlayer insulating film of one of the two interlayer insulating films having an opening that penetrates to reach the upper surface of at least a part of each of the lower electrodes. A step of depositing a conductive material and laminating the electrode film for the projecting electrode object, processing the electrode film for the projecting electrode object, contacting at least a partial region of the lower electrode, and The protrusion extending upward along the inner wall A third step of forming an electrode object, a fourth step of depositing a second insulating film to be the other interlayer insulating film of the two interlayer insulating films and then processing to fill the opening, and the protrusion A fifth step of forming the variable resistor at the tip portion of the electrode object, and depositing an electrode material, laminating the second electrode film, processing the second electrode film, and extending in the second direction And a sixth step of forming the upper electrode.

  In order to achieve the above object, a variable resistance element manufacturing method according to the present invention is a variable resistance element manufacturing method having the eighth characteristic configuration described above, in which an electrode material is deposited on a substrate to form a first. The first step of forming a plurality of lower electrodes extending in the first direction by laminating electrode films and processing the first electrode film is common to each of the two adjacent lower electrodes. And depositing a first insulating film serving as an interlayer insulating film of the two interlayer insulating films having a first opening penetrating so as to reach the upper surface of at least a part of each of the lower electrodes. A second step is performed by depositing and processing a dummy film material to form a dummy film that contacts a partial region of the lower electrode and extends upward along the inner wall of the first opening. Process and the other interlayer insulation of the two interlayer insulation films After depositing a second insulating film to be a film, processing is performed to fill the inside of the first opening with the second insulating film, and by removing the dummy film, the upper surface of the lower electrode is removed. A fifth step of forming a second opening so that a portion is exposed; a sixth step of forming the variable resistor and the protruding electrode object in the second opening; A seventh step of forming the upper electrode extending in the second direction having a protruding electrode in the second opening by laminating an electrode film and processing the second electrode film. Is a tenth feature.

  According to the ninth or tenth feature of the method of manufacturing a variable resistance element according to the present invention, the variable resistor is formed at the tip portion of the protruding electrode object linearly extending from the lower electrode in the direction of the upper electrode, The protruding electrode object and the upper electrode are connected via the variable resistor. That is, it is possible to manufacture a variable resistance element in which the area of the electrically contributing region of the variable resistor is reduced.

  In the variable resistance element manufacturing method according to the present invention, in addition to the tenth feature, the dummy film may be any material of the first insulating film, the second insulating film, and the first electrode film. The fifth step selectively removes only the dummy film with respect to the first insulating film, the second insulating film, and the first electrode film by an etching method. The eleventh feature is to have a process.

  Further, in the variable resistance element manufacturing method according to the present invention, in addition to the tenth or eleventh feature, the sixth step includes oxidizing the upper surface of the lower electrode located in the second opening. A twelfth feature is that it includes a step of forming a variable resistor.

  According to the variable resistance element manufacturing method of the present invention, in addition to any one of the first to third and sixth to tenth features, at least the protruding electrode object is formed after the protruding electrode object is formed. A thirteenth feature includes a step of forming the variable resistor by depositing a variable resistor material thereon and laminating a variable resistor film.

  At this time, the variable resistor film may be laminated by depositing the variable resistor material by any one of a sputtering method and a CVD method.

  In addition to the first to eleventh features, the method of manufacturing a variable resistance element according to the present invention includes oxidizing the exposed portion of the protruding electrode object after forming the protruding electrode object. A fourteenth feature includes a step of forming the variable resistor.

  According to the fourteenth feature of the method of manufacturing a variable resistance element according to the present invention, the variable resistance element is formed by oxidizing the exposed portion of the protruding electrode object, so that the variable resistance element is realized by an extremely simple process. it can. At this time, as the oxidation method, in addition to the (high temperature) thermal oxidation method, an oxygen plasma oxidation method, an ozone oxidation method, or the like can be used.

  The variable resistance element manufacturing method according to the present invention has a fifteenth feature that, in addition to any one of the first to fourteenth features, the protruding electrode material is titanium nitride.

  According to the fifteenth characteristic configuration of the variable resistance element manufacturing method according to the present invention, since the titanium-based material conventionally used for general semiconductor processes can be used as the protruding electrode object, the assembly of the process can be performed. It becomes easy.

  The variable resistance element manufacturing method according to the present invention, in addition to any one of the first to fifteenth features, is characterized in that the variable resistor is titanium oxide or titanium oxynitride. To do.

  In the variable resistance element of the present invention, the shape of the contact surface between the variable resistor and one of the electrodes or the other electrode is an annular or separated linear shape. The area of the contributing region is not limited to the workable area defined in the manufacturing process. As a result, the area of the electrically contributing region of the variable resistor can be made smaller than the workable area defined in the manufacturing process, so that current consumption during writing and erasing can be reduced. A memory element having a stable switching operation in which writing failure due to low resistance does not occur can be formed with good reproducibility. Further, according to the variable resistance element manufacturing method of the present invention, the area of the electrically contributing region of the variable resistor as described above can be made smaller than the workable area defined by the manufacturing process. A resistance element can be manufactured.

  Embodiments of a variable resistance element according to the present invention (hereinafter appropriately abbreviated as “invention element”) and a manufacturing method thereof (hereinafter appropriately abbreviated as “invention method”) will be described below with reference to the drawings. To do.

  The element of the present invention has a configuration in which the upper electrode and the lower electrode are connected via a variable resistor, but in order to make the contact area between any one electrode and the variable resistor smaller than the conventional configuration, either It is the structure provided with the protruding electrode object electrically connected with one electrode. In the following, description will be given with a particular focus on the manufacturing process of the protruding electrode object.

<First Embodiment>
A first embodiment (hereinafter referred to as “this embodiment” as appropriate) of an element of the present invention and a method for manufacturing the same will be described with reference to FIGS.

  FIG. 1 is a schematic cross-sectional view showing the element of the present invention of this embodiment. As shown in FIG. 1, the element of the present invention in this embodiment includes a lower electrode wiring 1 and an upper electrode wiring 4 formed on a base substrate 5, and a variable resistor 3 as a memory material body between upper and lower electrode wirings. The protruding electrode object 2 made of a conductive material is connected to the lower electrode 1, and the variable resistor 3 is formed at the tip of the protruding electrode object 2.

  An example in which the element of the present invention thus configured is applied to a 1R type memory cell will be described below. FIG. 2 is a schematic plan view showing a 1R type memory cell array. FIGS. 3 and 4 are diagrams showing the manufacturing process of the element of the present invention in this embodiment, and are shown in the order of each process in FIGS. 3A to 4G (2 on account of space). Divided into drawings). 3 and 4, a schematic cross-sectional view along the line XX ′ in FIG. 2, that is, the upper electrode wiring TE, and a schematic cross-sectional view along the YY ′ line, that is, the lower electrode wiring BE, respectively. It is displayed on the left and right.

  The manufacturing process of the element of the present invention in this embodiment will be described below with reference to FIGS.

First, the base insulating film 15 is formed on the semiconductor substrate 16 on which peripheral circuits and the like (not shown) are appropriately formed. In this embodiment, after depositing a BPSG (borophosphosilicate glass) film 15 with a thickness of 1500 nm, the surface of the semiconductor substrate 16 is further subjected to a so-called CMP method (Chemical Mechanical Polishing Method). The surface is planarized by polishing until the thickness of the BPSG film 15 on the surface reaches 800 nm. Subsequently, a material film (first electrode film) 11 to be a lower electrode wiring is deposited thereon. In this embodiment, a Ti film having a thickness of 5 nm, a TiN film having a thickness of 20 nm, an AlCu film having a thickness of 200 nm, a Ti film having a thickness of 5 nm, and a TiN film having a thickness of 100 nm are sequentially deposited by sputtering. (TiN / Ti / Al-Cu / TiN / Ti laminated structure). Further, a SiN film (second insulating film) 17 having a thickness of 150 nm is deposited on the material film 11 to be the lower electrode wiring by a CVD (Chemical Vapor Deposition) method. Thereafter, a material that becomes the SiN film 17 and the lower electrode wiring by using a resist (not shown) patterned in an L / S (line & space) shape as shown in the lower electrode wiring BE of FIG. 2 by a photolithography technique as a mask. The lower electrode wiring is formed by etching the film 11. Then, as shown in FIG. 3A, a SiO ₂ film (first insulating film) 18 is deposited thereon by 600 nm by a CVD method.

Next, as shown in FIG. 3B, the surface of the SiN film 17 is exposed while the surface is planarized by polishing the SiO ₂ film 18 to the surface level of the SiN film 17 by CMP. The planarization method is not limited to the CMP method, and any appropriate planarization technique including a spin-on method, a combination of the spin-on method and an etch-back method may be used.

Next, as shown in FIG. 3C, the SiN film 17 is formed on the SiO ₂ film 18 and the material film 11 to be the lower electrode wiring by a dry etching method using the downstream type NF ₃ plasma. On the other hand, the opening A is formed by selective removal. The removal method of the SiN film 17 is not limited to the dry etching method, and may be removed by a wet etching method including a hot phosphoric acid treatment.

Next, as shown in FIG. 3D, a TiN film (electrode film for protruding electrode object) 12 as an example of a material film to be a protruding electrode object is deposited on the entire surface by sputtering to a thickness of 40 nm. At this time, the thickness of the TiN film 12 formed along the inner side surface in the opening A can be set to 20 nm, for example. Thereafter, a SiO ₂ film (third insulating film) 19 is deposited on the entire surface with a thickness of 600 nm by a CVD method. Since the TiN film 12 is formed along the opening A, the opening A is not filled.

Next, the SiO ₂ film 19 is polished to the surface level of the TiN film 12 by CMP to flatten the surface and expose the surface of the TiN film 12. Thereafter, as shown in FIG. 4E, the TiN film 12 on the SiO ₂ film 18 other than the opening A is removed by the etch back method, thereby forming the protruding electrode body 12 made of the TiN film.

Next, as shown in FIG. 4F, the variable tip formed by oxidizing the exposed tip portion of the protruding electrode body 12 made of a TiN film by performing thermal oxidation in an atmosphere containing oxygen at 250 to 450 ° C. A TiO ₂ film 13 as an example of a resistor is formed. In the present embodiment, the variable resistor is a TiO ₂ film, but it is also possible to obtain a TiO _{2 -X} N _X film having variable resistance characteristics by appropriately adjusting the oxidation conditions such as the oxidation temperature and oxygen concentration. .

  Next, a material film (second electrode film) 14 to be the upper electrode wiring is deposited on the entire surface. In this embodiment, a TiN film having a thickness of 20 nm, an AlCu film having a thickness of 200 nm, a Ti film having a thickness of 5 nm, and a TiN film having a thickness of 100 nm are sequentially deposited by a sputtering method (TiN / Ti / Al— Cu / TiN laminated structure). Thereafter, the material film 14 to be the upper electrode wiring is etched by using a resist (not shown) patterned in an L / S (line & space) shape as shown in the upper electrode wiring TE of FIG. Thus, the upper electrode wiring 14 is formed. Further, as shown in FIG. 4G, an interlayer insulating film 20 is deposited, and contacts to the upper electrode wiring 14 and the lower electrode wiring 11 and metal wiring (neither is shown) are formed.

  The variable resistance element formed in this way can reduce the area of the contact surface between the variable resistor and the electrode as compared with the conventional configuration. This point will be described below with reference to the drawings.

  FIG. 5 is a schematic plan view comparing a conventional variable resistance element and the variable resistance element according to the present embodiment. FIG. 5 (a) shows a conventional configuration, and FIG. 5 (b) shows a configuration according to the present embodiment.

  As shown in FIG. 5A, in the conventional 1R type memory cell, the cross-point portion that is the region S1 (shaded portion in the figure) where the lower electrode wiring 121 and the upper electrode wiring 122 intersect is a variable resistor. This is a region that contributes electrically.

  On the other hand, according to the variable resistance element of the present embodiment, the protruding electrode object is formed only in a partial region on the boundary side in the upper region of the lower electrode wiring 123 and is electrically connected to the upper electrode wiring. Therefore, a region S2 (shaded portion in the figure) that is a cross-point portion between the protruding electrode object and the upper electrode wiring 124 is a region that contributes electrically to the variable resistor.

  The region S2 has a linear shape having a width corresponding to at least the film thickness of the protruding electrode object, but its area is reduced compared to the region S1 in the conventional variable resistance element. Since the protruding electrode can be formed by a self-aligning process, the area can be arbitrarily changed by adjusting the film thickness.

  That is, according to the configuration of the present embodiment, the contact area can be reduced as compared with the contact area of the conventional configuration, so that the current consumption can be suppressed by configuring the nonvolatile memory device with the element, In addition, it is possible to produce a memory element having a stable switching operation in which writing is not disabled with good reproducibility.

In the above description, the deposited insulating films are the SiO ₂ film 18 and the SiO ₂ film 19. However, the insulating film is not limited to the SiO ₂ film, and may be any appropriate one including SiN film, polyimide film, and SiOF film. A simple insulating film may be used. Insulating film deposition may also be performed using any suitable deposition technique including pulsed laser deposition, rf-sputtering, e-beam evaporation, thermal evaporation, metalorganic deposition, spin-on deposition, and metalorganic chemical vapor deposition. Can be deposited. The same applies to each of the following embodiments.

<Second Embodiment>
A second embodiment (hereinafter referred to as “this embodiment” as appropriate) of the element of the present invention and the method for manufacturing the same will be described with reference to FIGS. In addition, about the process which overlaps with 1st Embodiment, that is described and the detailed description is abbreviate | omitted suitably.

  In addition, the descriptions of the first insulating film and the second insulating film are names given for convenience according to the order of forming the insulating films in each embodiment, and are independent between different embodiments unless otherwise specified. It is used for The same applies to the following embodiments.

  FIG. 6 is a schematic cross-sectional view showing the element of the present invention of this embodiment. As shown in FIG. 6, the element of the present invention in this embodiment has a lower electrode wiring 31 and an upper electrode wiring 34 formed on a base substrate 35, and a variable resistor 33 as a memory material body between upper and lower electrodes. In addition to the structure, the protruding electrode object 32 made of a conductive material is connected to the upper electrode 34, and the protruding electrode object 32 and the lower electrode 31 are connected via the variable resistor 33.

  Next, a case where the variable resistance element manufacturing method of the present embodiment is applied to a 1R type memory cell will be described below as an example. 7 and 8 are diagrams showing the manufacturing process of the element of the present invention in this embodiment, and are shown in the order of each process in FIGS. 7A to 8G (divided into two drawings for the sake of space). ing). 7 and 8, a schematic cross-sectional view taken along the line XX ′ in FIG. 2 showing the 1R type memory cell array, that is, the upper electrode wiring TE, and the line YY ′, ie, the lower electrode wiring BE. The cross-sectional schematic diagram along is shown on the right and left, respectively. FIG. 9 is an enlarged view of the schematic diagram shown in FIG. 7 or 8 for explaining one process in the manufacturing process.

  The manufacturing process of the element of the present invention in this embodiment will be described below with reference to FIGS.

First, as shown in FIG. 7A, the lower electrode wiring BE is patterned on the base insulating film 35 on the semiconductor substrate 36 by the same procedure as in the process of FIG. 3A in the first embodiment. A material film (first electrode film) 31 and a SiN film (second insulating film) 37 to be processed into the lower electrode wiring are formed. Furthermore, an SiO ₂ film (first insulating film) 38 is deposited on the entire surface.

  Next, an opening A is formed on the lower electrode wiring 31, as shown in FIG. 7B, by the same procedure as in the steps of FIGS. 3B and 3C in the first embodiment.

  Next, as shown in FIG. 7C, a TiN film (electrode film for protruding electrode object) 32 as an example of a material film to be a protruding electrode object is deposited on the entire surface. This deposition method will be described with reference to an enlarged view. FIG. 9A is an enlarged view of the X-X ′ sectional view shown in FIG.

  As shown in FIG. 9A, when the TiN film is deposited, the TiN film 32 in the opening A is formed by a sputtering method so as to have a so-called overhang shape. For example, when the thickness of the TiN film 32 in the flat portion on the insulating film 38 is 40 nm, the thickness of the TiN film formed on the side surface in the opening A is 3 nm to 20 nm, and the bottom of the opening Decrease the film thickness as it approaches. Such a shape can be easily formed by appropriately adjusting sputtering conditions such as pressure, substrate bias, and the presence or absence of a collimator.

  Next, as shown in FIG. 7D, processing by etch back is performed until the TiN film 32 on the insulating film 38 is completely removed. Through this process, as shown in an enlarged view in FIG. 9B, the TiN film 32 remains only on the side surface in the opening A.

Next, as shown in FIG. 8E, a SiO ₂ film (third insulating film) 39 is deposited on the entire surface with a thickness of 600 nm by the CVD method. Since the step of forming the SiO ₂ film 39 is an oxidizing atmosphere, the TiN film 32 remaining on the side surface in the opening A during the formation of the SiO ₂ film 39 is partially oxidized. In the configuration of the present embodiment, the remaining film thickness of the TiN film 32 is thinner toward the bottom of the opening A as shown in FIG. 9B, and therefore, in the step of forming the SiO ₂ film 39, the bottom of the opening A is formed. The TiN film 32 located at a location close to is oxidized to form a TiO ₂ film. The formed TiO ₂ film is used as a material film for the variable resistor. That is, a TiO ₂ film 33 as a variable resistor is formed at the interface between the TiN film 32 and the lower electrode 31 (see FIG. 9C). As a result, the protruding electrode 32 and the lower electrode 31 are connected via the TiO ₂ film 33.

Next, as shown in FIG. 8F, the surface is planarized and the TiN film 32 is exposed by polishing the SiO ₂ film 39 to the surface level of the TiN film 32 by CMP. Then, the upper electrode 34 is formed by simultaneously patterning the material film (second electrode film) to be the upper electrode wiring 34 and the projecting electrode object 32 therebelow. This is for the purpose of preventing the adjacent upper electrodes from being short-circuited by the protruding electrode object 32 because the extending directions of the upper electrode wiring 34 and the protruding electrode object 32 are orthogonal to each other.

  Thereafter, an interlayer insulating film 40 is deposited (see FIG. 8G), and contacts to the upper electrode wiring 34 and the lower electrode wiring 31 and metal wiring (both not shown) are formed.

  According to the configuration of the present embodiment, the upper electrode wiring 34 and the TiN film 32 remaining in the opening A are electrically connected. That is, as shown in FIG. 6, the protruding electrode 32 is connected to the upper electrode 34 and has a variable resistor 33 at the lower end thereof. Accordingly, the schematic plan view in the present embodiment has a configuration as shown in FIG. 5B as in the first embodiment, and only the partial region on the boundary side in the upper region of the wiring of the lower electrode wiring 123. Since the projecting electrode object is formed and electrically connected to the upper electrode wiring, the region S2 (hatched portion in the figure) that is a cross-point portion between the projecting electrode object and the upper electrode wiring 124 is variable. This is a region where the resistor contributes electrically.

  Since the variable resistance element formed in this way can reduce the area of the contact surface between the variable resistor and the electrode as compared with the conventional configuration, the nonvolatile memory device is configured by the element, as in the first embodiment. As a result, it is possible to suppress the current consumption and to create a memory element with a stable switching operation in which writing is not disabled with good reproducibility.

  In this embodiment, the oxidation that proceeds during the formation of the oxide film is used. However, the present invention is not limited to this. Other examples include thermal oxidation in an oxygen atmosphere, oxidation in oxygen plasma, and ozone oxidation. Alternatively, the oxidation method may be used.

<Third Embodiment>
A third embodiment (hereinafter referred to as “this embodiment” as appropriate) of the element of the present invention and the method for manufacturing the same will be described with reference to FIGS. In addition, about the process which overlaps with 1st Embodiment, that is described and the detailed description is abbreviate | omitted suitably.

  In the first and second embodiments described above, the film formation of the variable resistor is formed by oxidation of the protruding electrode object. However, in this embodiment, the variable resistor is formed directly on the protruding electrode object. The element of the present invention is formed. Hereinafter, a case where the variable resistance element manufacturing method of the present embodiment is applied to a 1R type memory cell will be described as an example.

  10 and 11 are diagrams showing the manufacturing process of the element of the present invention in this embodiment, and are shown in the order of each process in FIGS. 10 (a) to 11 (g) (divided into two drawings for the sake of space). ing). 10 and 11, a schematic cross-sectional view taken along the line XX ′ in FIG. 2 showing the 1R type memory cell array, that is, the upper electrode wiring TE, and the line YY ′, ie, the lower electrode wiring BE. The cross-sectional schematic diagram along is shown on the right and left, respectively.

First, as shown in FIG. 10A, the lower electrode wiring BE is patterned on the base insulating film 45 on the semiconductor substrate 46 by the same procedure as in the process of FIG. 3A in the first embodiment. A material film (first electrode film) 41 and a SiN film (second insulating film) 47 to be processed into the lower electrode wiring are formed. Further, an SiO ₂ film (first insulating film) 48 is deposited on the entire surface.

Next, the SiO ₂ film 48 is planarized by the same procedure as in the step of FIG. 3B in the first embodiment until the surface of the SiN film 47 is exposed as shown in FIG. 10B. To do.

  Next, an opening A is formed on the lower electrode wiring 41 as shown in FIG. 10C by the same procedure as in the step of FIG. 3C in the first embodiment.

Next, a TiN film (electrode film for projecting electrode object) as an example of the projecting electrode object, as shown in FIG. 10 (d), by the same procedure as the process of FIG. 3 (d) in the first embodiment. 42 and a SiO ₂ film 49 are deposited on the entire surface.

  Next, as shown in FIG. 11E, a protruding electrode object 42 made of a TiN film is formed by the same procedure as in the step of FIG. 3E in the first embodiment.

Next, as shown in FIG. 11F, a TiO ₂ film (variable resistor film) 43 as an example of a variable resistor material film is formed on the entire surface. As an example of this film forming method, a DC power of 1.5 kW / cm ² is applied to the Ti target by a DC magnetron sputtering method under conditions of a gas flow rate Ar / O ₂ = 5 sccm / 15 sccm and a pressure of 3 to 15 mTorr. Thus, the TiO ₂ film 43 can be formed.

  Next, as shown in FIG. 11 (g), the upper electrode wiring 44, the interlayer insulating film 50, the upper electrode wiring 44, and the lower part are processed by the same procedure as in the step of FIG. 3 (g) in the first embodiment. A contact to the electrode wiring 41 and a metal wiring (both not shown) are formed.

  According to the configuration of the present embodiment, the upper electrode wiring 44 and the protruding electrode object 42 are connected via the variable resistor 43, and the protruding electrode object 42 is connected to the lower electrode 41. Accordingly, the schematic plan view in the present embodiment has a configuration as shown in FIG. 5B as in the first and second embodiments. Since the protruding electrode object is formed only in the partial region and is electrically connected to the upper electrode wiring, the region S2 (the hatched portion in the figure) that is a cross-point portion between the protruding electrode object and the upper electrode wiring 124 ) Is an area where the variable resistor contributes electrically.

  The variable resistance element formed in this manner can reduce the area of the contact surface between the variable resistor and the electrode as compared with the conventional configuration, as in the first and second embodiments. By configuring the device, it is possible to suppress the current consumption and to create a memory element with a stable switching operation that does not cause inability to be written with good reproducibility.

In the above description, the variable resistor 43 is made of titanium oxide by sputtering. However, the film forming method is not limited to this and may be formed by using CVD. In the case of forming by the CVD method, the substrate is heated to 250 ° C. to 500 ° C., and the raw material is TiCl ₄ or Ti (OCH ₃ ) ₄ , Ti (OC ₂ H ₆ ) ₄ , Ti (O— _{i-C 3 H 7) 4} , Ti (O-n-C 4 H 7) 4, Ti (O-n-C 4 H 9) 4, Ti (O-sec-C 4 H 9) 4, Ti ( N (CH ₃ ) ₂ ) ₄ , Ti (N (C ₂ H ₅ ) ₂ ) _4, etc. may be introduced into the reaction chamber with a vaporizer and reacted with oxygen to form.

The variable resistor 43 may be not only titanium oxide but also a titanium oxynitride film. For example, it is possible to obtain a TiO _{2 -X} N _X film having variable resistance characteristics by appropriately adjusting the gas flow rate ratio by sputtering in N 2 / O 2 / Ar gas with TiO ₂ as a target.

<Fourth Embodiment>
A fourth embodiment (hereinafter referred to as “this embodiment” as appropriate) of the element of the present invention and the method for manufacturing the same will be described with reference to FIGS. In addition, about the process which overlaps with 1st Embodiment, that is described and the detailed description is abbreviate | omitted suitably.

  FIG. 12 is a schematic cross-sectional view showing the element of the present invention of this embodiment. As shown in FIG. 12, the element of the present invention in this embodiment has a lower electrode wiring 51 and an upper electrode wiring 54 formed on a base substrate 55, and a variable resistor 53 as a memory material body between the upper and lower electrodes. In addition to the structure, a protruding electrode 52 made of a conductive material is connected to the lower electrode 51, and the protruding electrode 52 and the upper electrode 54 are connected via a variable resistor 53.

  Next, a case where the manufacturing method of the element of the present embodiment of the present embodiment is applied to a 1R type memory cell as shown in FIG. 2 will be described as an example. FIG. 13 and FIG. 14 are diagrams showing the manufacturing process of the element of the present invention in this embodiment, which are shown in the order of each process in FIGS. 13 (a) to 14 (g) (divided into two drawings for the sake of space). ing). 13 and FIG. 14, a schematic cross-sectional view along the line XX ′ in FIG. 2 showing the 1R type memory cell array, that is, the upper electrode wiring TE, and the line YY ′, ie, the lower electrode wiring BE. The cross-sectional schematic diagram along is shown on the right and left, respectively.

  First, a base insulating film 65 is formed on a semiconductor substrate 66 on which peripheral circuits and the like (not shown) are appropriately formed. In the present embodiment, as in the first embodiment, after the BPSG film 65 is deposited with a thickness of 1500 nm, the surface of the BPSG film 65 on the surface of the semiconductor substrate 66 is further 800 nm by CMP. The surface is flattened by polishing until Subsequently, a material film (first electrode film) 61 to be a lower electrode wiring is deposited thereon. In this embodiment, a Ti film having a thickness of 5 nm, a TiN film having a thickness of 20 nm, an AlCu film having a thickness of 200 nm, a Ti film having a thickness of 5 nm, and a TiN film having a thickness of 100 nm are sequentially deposited by sputtering. (TiN / Ti / Al-Cu / TiN / Ti laminated structure). Further, a SiN film (first insulating film) 67 is deposited to a thickness of 150 nm on the material film 61 to be the lower electrode wiring by the CVD method. Thereafter, the SiN film 67 is etched by using a resist (not shown) patterned into an L / S (line & space) shape as shown in the lower electrode wiring BE of FIG. Then, the lower electrode wiring shown in FIG. 13A is formed by etching the material film 61 serving as the lower electrode wiring using the SiN film 67 as a mask.

  Next, as shown in FIG. 13B, a TiN film (electrode film for protruding electrode object) 62 as an example of a material film to be a protruding electrode object is deposited on the entire surface by sputtering to a thickness of 40 nm. At this time, the thickness of the TiN film 12 formed on the side wall of the lower electrode 61 can be set to about 20 nm, for example.

  Next, processing by etch back is performed until the TiN film 62 on the base insulating film 65 and the SiN film 67 is completely removed. By this process, the TiN film 62 remains over the side walls of the lower electrode 61 and the SiN film 67 as shown in FIG.

Next, as shown in FIG. 13D, a SiO ₂ film (second insulating film) 68 is deposited on the entire surface with a thickness of 600 nm by a CVD method.

Next, as shown in FIG. 14E, the surface of the TiN film 62 is planarized and part of the TiN film 62 is exposed by polishing the SiO ₂ film 68 to the upper surface level of the TiN film 62 by CMP. The planarization method is not limited to the CMP method, and any appropriate planarization technique including a spin-on method, a combination of the spin-on method and an etch-back method may be used.

Next, as shown in FIG. 14F, the exposed portion of the protruding electrode body 62 made of a TiN film is thermally oxidized in an atmosphere containing oxygen at 250 to 450 ° C., and as an example of a variable resistor. A TiO ₂ film 63 is formed.

  Next, a material film (second electrode film) 64 to be the upper electrode wiring is deposited on the entire surface. In this embodiment, a TiN film having a thickness of 20 nm, an AlCu film having a thickness of 200 nm, a Ti film having a thickness of 5 nm, and a TiN film having a thickness of 100 nm are sequentially deposited by a sputtering method (TiN / Ti / Al-Cu / TiN laminated structure). Thereafter, the material film 64 to be the upper electrode wiring is etched by using a resist (not shown) patterned in an L / S (line & space) shape as shown in the upper electrode wiring TE of FIG. Thus, the upper electrode wiring 64 is formed. Further, as shown in FIG. 14 (g), an interlayer insulating film 69 is deposited, and contacts to the upper electrode wiring 64 and the lower electrode wiring 61 and metal wiring (both not shown) are formed.

  According to the configuration of the present embodiment, the upper electrode wiring 54 and the protruding electrode object 52 are connected via the variable resistor 53, and the protruding electrode object 52 is connected to the lower electrode 51 at the side wall thereof. In the variable resistance element formed in this way, the area of the contact surface between the variable resistor and the electrode can be reduced as compared with the conventional configuration, as in the above embodiments.

  FIG. 15 is a schematic plan view comparing a conventional variable resistance element and the variable resistance element according to the present embodiment. FIG. 15 (a) shows a conventional configuration, and FIG. 15 (b) shows a configuration according to the present embodiment. FIG. 15A is the same as the configuration shown in FIG.

  According to the variable resistance element of the present embodiment, the protruding electrode object is formed only on the outer side surface region of the lower electrode wiring 125, and the protruding electrode object and the upper electrode wiring 126 are connected. A region S3 (shaded portion in the figure) that is a cross-point portion between the object and the upper electrode wiring 126 is a region that contributes electrically to the variable resistor.

  The region S3 has a linear shape having a width corresponding to at least the film thickness of the protruding electrode object, but the area is reduced as compared with the region S1 in the conventional variable resistance element. Since the protruding electrode can be formed by a self-aligning process, the area can be arbitrarily changed by adjusting the film thickness.

  That is, according to the configuration of the present embodiment, the contact area can be reduced compared to the contact area of the conventional configuration, similarly to the configuration of each of the above-described embodiments. As a result, it is possible to suppress the current consumption and to create a memory element with a stable switching operation in which writing is not disabled with good reproducibility.

In this embodiment, the variable resistor is formed by oxidizing the exposed portion of the protruding electrode body 62. However, as described above in the third embodiment, the material of the variable resistor is formed on the upper surface of the protruding electrode body 62. For example, a variable resistor may be formed by forming a TiO ₂ film (variable resistor film) as the film.

<Fifth Embodiment>
A fifth embodiment (hereinafter, referred to as “this embodiment” as appropriate) of the element of the present invention and the method for manufacturing the same will be described with reference to FIGS. In addition, about the process which overlaps with 1st Embodiment, that is described and the detailed description is abbreviate | omitted suitably.

  FIG. 16 is a cross-sectional view showing the element of the present invention of this embodiment. As shown in FIG. 16, the element of the present embodiment of the present embodiment has a lower electrode wiring 301 and an upper electrode wiring 304 formed on a base substrate 305, and a variable resistor 303 as a memory material body between upper and lower electrodes. In addition to the structure, a protruding electrode 302 made of a conductive material is connected to the lower electrode 301, and a variable resistor 303 is formed at the tip of the protruding electrode 302.

  Next, a case where the variable resistance element manufacturing method of the present embodiment is applied to a 1R type memory cell will be described below as an example. 17 to 19 are diagrams showing the manufacturing process of the element of the present invention in the present embodiment, and are shown in the order of each process by FIGS. 17 (a) to 19 (i) (divided into three drawings for the sake of space). ing). 17 to 19, a schematic cross-sectional view taken along line XX ′ in FIG. 2 showing the 1R type memory cell array, that is, the upper electrode wiring TE, and line YY ′, ie, lower electrode wiring BE, are shown. The cross-sectional schematic diagram along is shown on the right and left, respectively. FIG. 20 is a schematic plan view showing the layout of the opening pattern WBE used in the manufacturing process of FIG.

First, a base insulating film 315 is formed over a semiconductor substrate 316 on which peripheral circuits and the like (not shown) are appropriately formed. In this embodiment, as in the first embodiment, after the BPSG film 315 is deposited with a thickness of 1500 nm, the surface of the BPSG film 315 on the surface of the semiconductor substrate 316 is further 800 nm by CMP. The surface is flattened by polishing until Subsequently, a material film (first electrode film) 311 to be a lower electrode wiring is deposited. In this embodiment, a Ti film having a thickness of 5 nm, a TiN film having a thickness of 20 nm, an AlCu film having a thickness of 200 nm, a Ti film having a thickness of 5 nm, and a TiN film having a thickness of 105 nm are sequentially deposited by sputtering. (TiN / Ti / Al-Cu / TiN / Ti laminated structure). Thereafter, the material film 311 to be the lower electrode wiring is etched by using a resist (not shown) patterned into an L / S (line & space) shape as shown in the lower electrode wiring BE of FIG. 2 by a photolithography technique as a mask. Thus, the lower electrode wiring 311 shown in FIG. 17A is formed. Further thereon, a SiO ₂ film 317 is deposited on the entire surface with a thickness of 600 nm by a CVD method.

Next, the surface is planarized by polishing the SiO ₂ film 317 to the surface level of the lower electrode wiring 311 by CMP. Furthermore, as shown in FIG. 17B, an SiN film (first insulating film) 318 is deposited on the entire surface with a thickness of 150 nm by a CVD method.

  Next, the SiN film 318 is etched by using a resist (not shown in FIG. 17) patterned into an opening pattern shape as shown by a broken line area WBE in FIG. As shown, an opening 319 is formed between adjacent SiN film 318 patterns. In FIG. 20, the pattern BE has the same configuration as the lower electrode wiring BE shown in FIG. 2, the opening pattern WBE is a pattern extending in the same direction as the lower electrode wiring BE, and both sides on the short side are adjacent to each other. They are laid out so as to be located on the lower electrode wiring BE region of the book. The opening pattern WBE is repeatedly arranged in parallel with the lower electrode wiring BE at a pitch of every two lower electrode wirings BE. Here, both sides on the short side (boundary on the short side) of the opening pattern WBE do not necessarily need to be on the center line of the lower electrode wiring BE, and may be anywhere on at least the lower electrode wiring BE region.

  Next, as shown in FIG. 17D, a TiN film (electrode film for protruding electrode object) 312 as an example of a material film to be a protruding electrode object is deposited on the entire surface by sputtering to a thickness of 40 nm. At this time, the thickness of the TiN film 312 formed along the inner side surface in the opening 319 can be set to 20 nm, for example. Since the TiN film 312 is formed along the opening 319, the opening 319 is not filled.

  Next, as shown in FIG. 18E, the etching process is performed until the insulating film 318 and the TiN film 312 on the insulating film 317 are completely removed, so that only the side surface in the opening 319 has TiN. The film 312 remains. Through this process, a protruding electrode object 312 made of a TiN film connected to the lower electrode wiring 311 is formed.

Next, as shown in FIG. 18F, a SiO ₂ film (second insulating film) 320 is deposited on the entire surface with a thickness of 600 nm by a CVD method.

Next, as shown in FIG. 18G, by polishing the SiO ₂ film 320 to the surface level of the SiN film 318 by CMP, the surface is flattened and the tip of the TiN film 312 that is a protruding electrode object is removed. Expose. Further, as a result of the step, as shown in FIG. 18G, the insulating film 318 and the insulating film 320 are alternately arranged with the protruding electrode body 312 interposed therebetween.

Next, as shown in FIG. 18H, the variable tip formed by oxidizing the exposed tip portion of the protruding electrode 312 made of a TiN film by thermal oxidation in an atmosphere containing oxygen at 250 to 450 ° C. A TiO ₂ film 313 as an example of a resistor is formed. In the present embodiment, the variable resistor is a TiO ₂ film, but it is also possible to obtain a TiO _{2 -X} N _X film having variable resistance characteristics by appropriately adjusting the oxidation conditions such as the oxidation temperature and oxygen concentration. . In the present embodiment, the variable resistor is formed by thermally oxidizing the protruding electrode object. However, as in the other embodiments described above, other oxidation methods such as oxidation in oxygen plasma and ozone oxidation are used. Alternatively, a film may be formed so as to be directly deposited on the protruding electrode object by a CVD method or a sputtering method.

  Next, a material film (second electrode film) 314 to be the upper electrode wiring is deposited on the entire surface. In this embodiment, a TiN film having a thickness of 20 nm, an AlCu film having a thickness of 200 nm, a Ti film having a thickness of 5 nm, and a TiN film having a thickness of 100 nm are sequentially deposited by a sputtering method (TiN / Ti / Al-Cu / TiN laminated structure). After that, a material film 314 to be the upper electrode wiring is formed using a resist (not shown) patterned into an L / S (line & space) shape as shown in the upper electrode wiring TE of FIG. The upper electrode wiring 314 is formed by etching the resistor 313 and the protruding electrode body 312. Further, as shown in FIG. 19 (i), an interlayer insulating film 321 is deposited, and contacts to the upper electrode wiring 314 and the lower electrode wiring 311 and metal wiring (none of them are shown) are formed. In this embodiment, in the present embodiment, in order to avoid the adjacent BE wirings from being short-circuited by the protruding electrode object 312 formed along the inside of the opening pattern WBE shown in FIG. In addition, the variable resistor 313 and the protruding electrode 312 are also removed by etching. However, for example, in an arbitrary area outside the memory cell array without BE wiring, at least a part of the remaining protruding electrode 312 and variable resistor 313 may be removed by photolithography patterning and etching techniques. It is also possible to etch only the upper electrode wiring material 314 in the process of processing the upper electrode wiring in FIG.

  The variable resistance element formed as described above can reduce the area of the contact surface between the variable resistor and the electrode as compared with the conventional configuration. This point will be described below with reference to the drawings.

  FIG. 21 is a schematic plan view comparing a conventional variable resistance element and the variable resistance element according to the present embodiment. FIG. 21A shows a conventional configuration, and FIG. 21B shows a configuration according to the present embodiment. 21A is the same as the configuration shown in FIGS. 5A and 15A.

  According to the variable resistance element of the present embodiment, the protruding electrode object is formed only in a partial region on the boundary side of the opening pattern WBE in FIG. Therefore, the region S6 (shaded portion in the figure), which is a cross-point portion between the protruding electrode object and the upper electrode wiring 130, is a region that contributes electrically to the variable resistor. Become.

  The region S6 has a linear shape having a width corresponding to at least the film thickness of the protruding electrode object, but its area is reduced compared to the region S1 in the conventional variable resistance element. Since the protruding electrode can be formed by a self-aligning process, the area can be arbitrarily changed by adjusting the film thickness.

  That is, according to the configuration of the present embodiment, the contact area can be reduced compared to the contact area of the conventional configuration, similarly to the configuration of each of the above-described embodiments. As a result, it is possible to suppress the current consumption and to create a memory element with a stable switching operation in which writing is not disabled with good reproducibility. Furthermore, according to the configuration of the present embodiment, the contact surface per variable resistance element can be formed into one linear shape by adding a photolithography process and an etching process using the opening pattern WBE. The contact area can be further reduced as compared with the above-described first to fourth embodiments in which the contact surface per two variable resistance elements has two linear shapes.

In this embodiment, the insulating film 317 is an SiO ₂ film, and the insulating film 318 is an SiN film. However, this is an etching selection for the insulating film 317 in the etching process of the insulating film 318 in FIG. However, the insulating film 317 may be a SiN film and the insulating film 318 may be a SiO ₂ film. In addition, films of different materials may be used in combination as appropriate from among insulating material options including other insulating materials than the SiO ₂ film and the SiN film. On the other hand, the insulating films 317 and 318 can be the same material film, for example, the same SiO ₂ film, but the etching of the insulating film 318 must be controlled so as to control the reduction of the insulating film 317. Another material is more preferable.

Similarly, in the present embodiment, the insulating film 320 is an SiO ₂ film, but it may be a SiN film or another insulating material film. However, in the CMP process of FIG. In order to ensure the selectivity of the polishing of 320, it is more preferable to use a material different from that of the insulating film 318.

  In this embodiment, the material film 311 for the lower electrode wiring is formed as a laminated structure film of TiN / Ti / Al—Cu / TiN / Ti, and the material film 312 for the protruding electrode is formed as a TiN film as in the other embodiments. However, in the etching process of the TiN film 312 in FIG. 18E, the thickness of the uppermost layer TiN of the lower electrode wiring 311 is reduced due to over-etching. The film thickness is set in consideration. On the other hand, it is possible to easily change the manufacturing method in which the material of the uppermost layer of the lower electrode wiring 311 and the material film of the protruding electrode material are combined with different materials.

In the present embodiment, the step of forming the variable resistor film 313 is shown in FIG. 18H, but it is possible to easily change the step after the step of FIG. 17C. That is, after FIG. 17C, a TiO ₂ film to be a variable resistor is formed on the exposed surface of the lower electrode wiring 311 by a thermal oxidation method, and then the steps after FIG. As a result, the step of FIG. 18 (h) becomes unnecessary. In this case, the variable resistor is formed between the protruding electrode body and the lower electrode wiring, and the protruding electrode body is connected to the upper electrode wiring.

<Sixth Embodiment>
A sixth embodiment (hereinafter, referred to as “this embodiment” as appropriate) of the element of the present invention and the method for manufacturing the same will be described with reference to FIGS. In addition, about the process which overlaps with 5th Embodiment, that is described and the detailed description is abbreviate | omitted suitably.

  FIG. 22 is a cross-sectional view showing the element of the present invention of this embodiment. As shown in FIG. 22, the element of the present embodiment of the present embodiment has a lower electrode wiring 331 and an upper electrode wiring 334 formed on a base substrate 335, and a variable resistor 333 as a memory material body between upper and lower electrodes. In addition to the structure, the protruding electrode object 332 made of a conductive material is connected to the upper electrode 334, and the protruding electrode object 332 and the lower electrode 331 are opposed to each other via the variable resistor 333.

  Next, a case where the variable resistance element manufacturing method of the present embodiment is applied to a 1R type memory cell will be described below as an example. FIG. 23 and FIG. 24 are diagrams showing the manufacturing process of the element of the present invention in this embodiment, and are shown in the order of each process by FIGS. 23 (a) to 24 (g) (divided into two drawings for the sake of space). ing). 23 and 24, a schematic cross-sectional view taken along line XX ′ in FIG. 2 showing the 1R type memory cell array, that is, the upper electrode wiring TE, and line YY ′, ie, lower electrode wiring BE. The cross-sectional schematic diagram which followed was shown on either side.

First, as shown in FIG. 23A, the lower electrode wiring BE is formed on the base insulating film 345 on the semiconductor substrate 346 by the same procedure as that up to the step of FIG. 17C in the fifth embodiment. A patterned lower electrode wiring (first electrode film) 341 and a SiO ₂ film 347 filling the space between the lower electrode wirings 341 are formed, and an opening (first opening) 349 is further formed thereon. However, although the first insulating film (corresponding to the insulating film 348 in FIG. 23 and the insulating film 318 in FIG. 17) patterned into the opening pattern WBE is the SiN film in the fifth embodiment, this is Al _{2 in} this embodiment. The O ₃ film 348 is used. That is, an Al ₂ O ₃ film 348 is deposited on the entire surface with a thickness of 150 nm by a sputtering method, and etched using a resist patterned into an opening pattern WBE by a photolithography technique as a mask, thereby adjacent Al ₂ O ₃ film 348. Openings 349 are formed between the patterns.

Next, as shown in FIG. 23B, an SiO ₂ film (dummy film) 350, which is an insulating material, is deposited on the entire surface with a thickness of 25 nm by a CVD method. At this time, the thickness of the SiO ₂ film 350 formed along the inner side surface of the opening 349 can be set to 20 nm, for example. Since the SiO ₂ film 350 is formed along the opening 349, the opening 349 is not filled.

Next, processing by etch back is performed until the SiO ₂ film 350 on the insulating film 348 and the insulating film 347 is completely removed. By this step, as shown in FIG. 23C, the SiO ₂ film 350 remains only on the side surface of the opening 349 (side wall of the Al ₂ O ₃ film 348). Further thereon, a SiN film (second insulating film) 351 is deposited on the entire surface with a thickness of 600 nm by a CVD method.

Next, as shown in FIG. 23D, the SiN film 351 is polished to the surface level of the Al ₂ O ₃ film 348 by the CMP method to flatten the surface and be formed on the inner side surface of the opening 349. The tip of the SiO ₂ film 350 is exposed. Further, as a result of the process, the insulating film 348 and the insulating film 351 are alternately arranged with the SiO ₂ film 350 interposed therebetween, as shown in FIG.

Next, as shown in FIG. 24E, only the SiO ₂ film 350 is selectively removed from the Al ₂ O ₃ film 348, the SiN film 351, and the lower electrode wiring 341 by a wet etching method containing hydrofluoric acid. . By this process, only a part of the region on the surface of the lower electrode wiring 341 is exposed by the thickness of the SiO ₂ film 350 formed along the inner side surface of the opening 349, and the Al ₂ O ₃ film 348 and the SiN An opening (second opening) 352 having the height of the film 351 is formed.

Next, as shown in FIG. 24F, the exposed portion on the surface of the lower electrode wiring 341 in the opening 352 is oxidized by thermal oxidation in an atmosphere containing oxygen at 250 to 450 ° C. A TiO ₂ film 343 as an example of the variable resistor is formed. In the present embodiment, the variable resistor is a TiO ₂ film, but it is also possible to obtain a TiO _{2 -X} N _X film having variable resistance characteristics by appropriately adjusting the oxidation conditions such as the oxidation temperature and oxygen concentration. . In this embodiment, a variable resistor is formed by thermally oxidizing a partial region of the lower electrode wiring 341. However, as in the other embodiments described above, oxidation in oxygen plasma, ozone oxidation, etc. An oxidation method may be used.

  Next, as shown in FIG. 24G, a material film (second electrode film) 344 to be the upper electrode wiring is deposited on the entire surface. In this embodiment, a TiN film having a thickness of 20 nm, an AlCu film having a thickness of 200 nm, a Ti film having a thickness of 5 nm, and a TiN film having a thickness of 100 nm are sequentially deposited by a sputtering method (TiN / Ti / Al-Cu / TiN laminated structure). Through this process, the projecting electrode object 342 made of the material film 344 to be the upper electrode wiring is formed by embedding the material film 344 to be the upper electrode wiring in the opening 352. In FIG. 24G, for convenience, the upper electrode wiring 344 is indicated by a shaded portion by dots and the protruding electrode object 342 is indicated by a hatched portion, but in the present embodiment, these are the same material film formed in the same process. It is.

  Thereafter, a material film 344 to be the upper electrode wiring is formed using a resist (not shown) patterned into an L / S (line & space) shape as shown in the upper electrode wiring TE of FIG. The upper electrode wiring 344 is formed by etching the resistor 343 and the protruding electrode object 342. Further, an interlayer insulating film 353 is deposited, and contacts to the upper electrode wiring 344 and the lower electrode wiring 341 and metal wiring (neither is shown) are formed.

  According to the configuration of the present embodiment, as shown in FIG. 22, the protruding electrode object 332 and the lower electrode 331 face each other via the variable resistor 333, and the protruding electrode object 332 is connected to the upper electrode 334. Accordingly, the plan schematic diagram in the present embodiment has a configuration as shown in FIG. 21B as in the fifth embodiment, and the protruding electrode object is only in a partial region on the boundary side of the opening pattern WBE in FIG. Is formed and is electrically connected to the upper electrode wiring. Therefore, a region S6 (hatched portion in FIG. 21) which is a cross-point portion between the protruding electrode object and the lower electrode wiring 130 is a variable resistor. This is a region that contributes electrically.

  Since the variable resistance element formed in this way can reduce the area of the contact surface between the variable resistor and the electrode as compared with the conventional configuration, the nonvolatile memory device is configured by the element as in the fifth embodiment. As a result, it is possible to suppress the current consumption and to create a memory element with a stable switching operation in which writing is not disabled with good reproducibility.

In this embodiment, the dummy film formed on the opening 349 is the SiO ₂ film 350. However, the present invention is not limited to this, and other material films may be used. Further, since the dummy film is removed in the step of FIG. 24 (e), it is not necessary to be an insulating material film, and may be a conductive material film. However, the insulating film 348, the insulating film 351, and the lower part may be used. A material that can be selectively removed by etching with respect to the electrode wiring 341 is desirable. In this embodiment, the selective etching is wet etching by acid treatment, but the present invention is not limited to this.

As in the fifth embodiment, the insulating film 347, the insulating film 348, and the insulating film 351 are not limited to the materials used in this embodiment, but the insulating film 348 is formed of a material different from that of the insulating film 347. It is more preferable to select a different material from the insulating film 348. As another example in consideration of the above, the insulating film 348 is an SiN film, the insulating film 351 is an SiO ₂ film, and the insulating film 350 is an α (amorphous) -Si film that is a non-insulating material. In the process of FIG. The α-Si film 350 may be removed by dry etching using RIE (Reactive Ion Etching).

  Further, as a modification of this embodiment, after the step of FIG. 24E, a material film of a protruding electrode is deposited on the entire surface to fill the opening 352, and then etched back or CMP to fill the opening 352. It is possible to easily change the process to form the protruding electrode object. Thereafter, the upper surface of the protruding electrode is oxidized to form a variable resistor at the tip, and then an electrode film constituting the upper electrode is deposited. In this case, since the protruding electrode object is connected to the lower electrode and a variable resistor is formed at the tip of the protruding electrode object, the cross-sectional shape structure is the same as that of FIG.

  As another modification of this embodiment, after the step of FIG. 24F, a material film of a protruding electrode is deposited on the entire surface to fill the opening 352, and the opening 352 is etched back or CMP. It is also possible to easily change the process such as forming a protruding electrode inside. Thereafter, an electrode film constituting the upper electrode is deposited on the upper surface of the protruding electrode object. In this case, since the variable resistor is formed at the lower end of the protruding electrode object and the upper electrode is formed above the protruding electrode object, the cross-sectional shape structure is the same as that of FIG.

  As described above, the element of the present invention described according to the first to sixth embodiments is configured to reduce the area of the electrically contributing region of the variable resistor by the protruding electrode connected to the upper electrode or the lower electrode. It is not necessary to reduce the line width of the upper electrode and the lower electrode. Therefore, there is a problem of increasing the wiring resistance of the upper electrode and the lower electrode, which may occur when the conventional problem is solved by reducing the line width of the upper electrode or the lower electrode beyond the limitation of the exposure technique by some method. It can be avoided in the element. This suggests that the element of the present invention is more effective for a 1R type memory cell array configuration that requires a longer electrode wiring length in accordance with the integration of memory cells.

  In addition, the problem of increasing the wiring resistance of the upper electrode and the lower electrode, which may occur when the conventional problem is solved by reducing the film thickness of the upper electrode or the lower electrode and utilizing only the side surface by some method, It can be avoided by the inventive element. This also suggests that the element of the present invention is more effective in a 1R type memory cell array configuration in which a longer electrode wiring length is required in accordance with the integration of memory cells.

  As described above, according to the variable resistance element and the manufacturing method thereof of the present invention, the transition metal element is selected by selecting a transition metal or a nitride of a transition metal element as the material film of the protruding electrode object and oxidizing one end thereof. Since the oxide or transition metal element oxynitride can be used as the variable resistor, the variable resistor film can be formed by an oxidation heat treatment process, which is a general process in a semiconductor process. There is no need for special equipment. Further, since a noble metal is not necessarily required as the material film of the protruding electrode object, it can be easily manufactured with high compatibility with the existing CMOS process.

  Furthermore, titanium nitride as the material film of the protruding electrode body, and the variable resistor as its oxide or oxynitride, titanium oxide or titanium oxynitride, has been conventionally used in semiconductor processes. By using a titanium-based material, there is an advantage that the process can be easily assembled.

  Further, as a secondary function of the present invention, an effect of reducing variation in resistance value of the variable resistor was obtained. As explained in Non-Patent Document 2, in the conventional variable resistance element, the local filament portion of the variable resistor is dominant with respect to the resistance change, whereas the variable of the present invention. In the resistive element, by reducing the area of the electrically contributing region of the variable resistor, the influence of this local filament portion is eliminated, and the intrinsic characteristic of the variable resistor is developed. By doing so, it is assumed that the variation was improved. Therefore, according to the variable resistance element of the present invention, resistance variation control to a smaller resistance value range is possible.

  Further, in each of the embodiments of the present invention described above, the region where the variable resistor contributes electrically is described based on the expressions of linear and annular, but these are assumed to be linear and rectangular, respectively. It is not strictly limited. That is, a curved line or a broken line other than a straight line, or a combination thereof can be modified, and even if it is a semicircle, a U-shape, or an L-shape, the area of the variable resistor that contributes electrically is reduced. As long as the configuration is adopted, the effectiveness of the present invention is not impaired. Further, it may be a circle other than a rectangular ring, an ellipse, or a polygon other than a quadrilateral, and the ring may be formed by a broken line or a curve.

In each of the embodiments of the present invention described above, the control element in the 1T / 1R type memory cell is a MOS transistor. However, even if the control element is another control element such as a diode element, This does not hinder the application of the variable resistance element. In addition, in order to reduce the parasitic current in the 1R type memory cell, a memory cell having a structure in which a diode is connected in series to the cross-point structure can be used. The diode generally has a structure in which the variable resistor, which is a memory material body, is connected in series to the outside of the upper electrode or the lower electrode. However, the diode is provided between the variable resistor and the upper electrode or is variable. It is good also as a structure arrange | positioned between a resistor and a lower electrode. As the diode, a material exhibiting PN diode characteristics or Schottky diode characteristics, or a varistor such as ZnO or Bi ₂ O ₃ may be used.

  In each of the embodiments of the present invention described above, the conductive material as the protruding electrode object has been described as a TiN film, but the present invention is not limited to this. For example, by using a transition metal such as Ti, Ni, Zn, V, Nb or the like as a protruding electrode, an oxide of a transition metal element formed by oxidizing one end portion thereof is used as a variable resistor. Can do. In addition, a transition metal element nitride such as ZnN, WN or the like is used as a protruding electrode, so that an oxide of a transition metal element or an acid of a transition metal element formed by oxidizing one tip of the nitride. Nitride can be used as a variable resistor.

  In addition to the above, the material film of the protruding electrode material may be a noble metal such as Pt, Ir, Ru, Os, Rh, Pd, a metal element such as Al, and other alloys. However, in these metal materials, since the variable resistor must be formed by a deposition method, the advantage of one aspect of the present invention that the variable resistor is formed by oxidizing one end portion of the protruding electrode object is utilized. For this purpose, the material film of the protruding electrode is more preferably a transition metal element or a nitride of a transition metal element that is conductive.

Furthermore, in each of the embodiments of the present invention described above, the variable resistor is a TiO ₂ film, but the variable resistor film is not limited to this. For example, an oxide of a transition metal element or a transition metal element oxynitride formed by oxidizing the transition metal or nitride of a transition metal element other than Ti and TiN can be used. Alternatively, a perovskite oxide such as PCMO may be directly formed on the protruding electrode.

  In each of the embodiments of the present invention described above, the upper electrode and the lower electrode are TiN films or a laminated structure film of TiN film, Ti film and Al—Cu film, but the present invention is not limited to this. For example, other transition metals or alloys containing these elements, noble metals such as Pt, Ir, Ru, Os, Rh, Pd, metal elements such as Al, and other alloys can be arbitrarily selected. .

In each of the embodiments of the present invention described above, titanium nitride is represented as TiN, titanium oxide is represented as TiO ₂ , titanium oxynitride is represented as TiO _{2 -X} N _{X, and the} like. The composition ratio is not strictly limited. In particular, with regard to titanium oxide and titanium oxynitride, any composition ratio having variable resistance does not hinder application of the present invention as a variable resistor. Furthermore, the dimension described when explaining the manufacturing process in each embodiment is an example, and is not limited to this dimension.

1 is a schematic cross-sectional view showing a configuration of a variable resistance element according to a first embodiment of the present invention. Schematic diagram showing a 1R configuration memory cell array The schematic sectional drawing which showed the variable resistance element of the 1st Embodiment of this invention in order of the manufacturing process. The schematic sectional drawing which showed the variable resistance element of the 1st Embodiment of this invention in order of the manufacturing process. A schematic plan view showing a region that contributes electrically to the variable resistor according to the conventional configuration and the first embodiment of the present invention. Schematic sectional view showing the configuration of the variable resistance element of the second embodiment of the present invention The schematic sectional drawing which showed the variable resistance element of the 2nd Embodiment of this invention in order of the manufacturing process. The schematic sectional drawing which showed the variable resistance element of the 2nd Embodiment of this invention in order of the manufacturing process. Schematic cross-sectional view showing, on an enlarged scale, the XX 'cross-sectional view of FIGS. 7 (c), 7 (d) and 8 (e) The schematic sectional drawing shown to the manufacturing process order of the variable resistance element of the 3rd Embodiment of this invention The schematic sectional drawing shown to the manufacturing process order of the variable resistance element of the 3rd Embodiment of this invention Schematic sectional view showing the configuration of a variable resistance element according to a fourth embodiment of the present invention The schematic sectional drawing which showed the variable resistance element of the 4th Embodiment of this invention in order of the manufacturing process. The schematic sectional drawing which showed the variable resistance element of the 4th Embodiment of this invention in order of the manufacturing process. A schematic plan view showing a region that contributes electrically to the variable resistor in the conventional configuration and the fourth embodiment of the present invention. Schematic sectional view showing the configuration of a variable resistance element according to a fifth embodiment of the present invention The schematic sectional drawing which showed the variable resistance element of the 5th Embodiment of this invention to manufacturing process order The schematic sectional drawing which showed the variable resistance element of the 5th Embodiment of this invention to manufacturing process order The schematic sectional drawing which showed the variable resistance element of the 5th Embodiment of this invention to manufacturing process order Plane schematic diagram showing the layout of the opening pattern in the variable resistance element manufacturing process of the fifth embodiment of the present invention A schematic plan view showing a region that contributes electrically to the variable resistor according to the conventional configuration and the fifth embodiment of the present invention. Schematic sectional view showing the configuration of a variable resistance element according to a sixth embodiment of the present invention Schematic sectional view showing a variable resistance element according to a sixth embodiment of the present invention in the order of manufacturing steps Schematic sectional view showing a variable resistance element according to a sixth embodiment of the present invention in the order of manufacturing steps A perspective view showing a basic structure of a conventional variable resistance element A circuit diagram schematically showing a configuration example of a memory cell array of a 1T / 1R type memory cell including a variable resistance element and a selection transistor. Schematic cross-section showing an example of a conventional 1T / 1R type memory cell structure 1 is a circuit diagram schematically showing a configuration example of a memory cell array of a 1R type memory cell including a variable resistance element. The perspective view which shows typically one structural example of the structure of 1R type | mold memory cell structure

Explanation of symbols

R: Variable resistance element T: Selection transistor TE, 4, 14, 24, 34, 44, 54, 64, 122, 124, 126, 130, 132, 136, 138, 201, 220, 243, 304, 314, 334 , 344: upper electrode BE, 1,11,21,31,41,51,61,121,123,125,129,131,135,137,203,218,241,301,311,331,341: lower Electrode 2, 22, 32, 42, 52, 62, 302, 312, 332, 342: Projection electrode object 3, 23, 33, 43, 53, 63, 202, 219, 242, 303, 313, 333, 343: Variable resistor A, 91, 128, 319, 349, 352: opening 5, 25, 55, 244, 305: base substrate 16, 36, 46, 66, 21 , 316, 346: semiconductor substrate 15, 35, 45, 65, 315, 345: underlying insulating film 17, 37, 47, 67: SiN film 18, 19, 20, 38, 39, 40, 48, 49, 50, 68, 69, 317, 320, 321, 347, 350, 353: SiO ₂ film 318, 351: SiN film 348: Al ₂ O ₃ film WBE, WTE: opening pattern RBE: wiring pattern 212: element isolation region 213: gate Insulating film 214: Gate electrode 215: Drain region 216: Source region 217, 221, 222: Contact plug 223: Bit wiring 224: Source wiring 127: Opening or electrode size S1, S2, S3, S6, S7, S8, S9 : Electrically contributing region of variable resistor 204, 231: memory cell array 205, 232 Bit line decoder 206,233: the word line decoder 207 source line decoder BL1, BL2, ···, BLm: bit line WL1, WL2, ···, WLn: word lines SL1, SL2, ···, SLn: Source line

Claims (32)

A lower electrode extending in a first direction parallel to the substrate surface, an upper electrode extending in a second direction parallel to the substrate surface and perpendicular to the first direction, and an electrical connection between the lower electrode and the upper electrode Two interlayer insulating films that are spaced apart from each other in the second direction to be electrically insulated, and a gap sandwiched between the two interlayer insulating films from the one side to the other side of the two electrodes. And a protruding electrode object that protrudes in a direction perpendicular to the surface and extends continuously or intermittently in the first direction on two straight lines parallel to the lower electrode with respect to one lower electrode. ,
At the intersection between the two electrodes, either one of the two electrodes is opposed to an end of the protruding electrode near the one of the two electrodes,
A variable resistor is formed between one of the electrodes and an end of the protruding electrode near the one of the electrodes;
By applying a voltage pulse between the electrodes, the electric resistance at the intersection between the electrodes changes. A lower electrode extending in a first direction parallel to the substrate surface, an upper electrode extending in a second direction parallel to the substrate surface and perpendicular to the first direction, and an electrical connection between the lower electrode and the upper electrode Two interlayer insulating films that are spaced apart from each other in the second direction to be electrically insulated, and a gap sandwiched between the two interlayer insulating films from the one side to the other side of the two electrodes. A protruding electrode object protruding in a direction perpendicular to the surface and extending continuously or intermittently in the first direction on one straight line parallel to the lower electrode with respect to one lower electrode. ,
At the intersection between the two electrodes, either one of the two electrodes is opposed to an end of the protruding electrode near the one of the two electrodes,
A variable resistor is formed between one of the electrodes and an end of the protruding electrode near the one of the electrodes;
By applying a voltage pulse between the electrodes, the electric resistance at the intersection between the electrodes changes. One first interlayer insulating film of the two interlayer insulating films is divided in the second direction with the lower electrode interposed therebetween, and the opposing side surfaces of the two divided first interlayer insulating films are the lower parts Formed so as to extend in the first direction in contact with the side surface of the electrode;
The other second interlayer insulating film of the two interlayer insulating films has a lower surface positioned above the upper surface of the lower electrode, an upper surface in contact with the lower surface of the upper electrode, and a line width narrower than that of the lower electrode Formed so as to extend in the first direction,
The protruding electrode material fills between the side surfaces of the two separated first interlayer insulating films and both side surfaces of the second interlayer insulating film, and between the upper surface of the lower electrode and the lower surface of the upper electrode. The upper end surface is formed into two parallel lines and extends continuously or intermittently in the first direction, and the lower end surface of the protruding electrode object is in contact with the upper surface of the lower electrode,
A variable resistor continuously extending in the first direction is formed at an upper end portion including the upper end surface of the protruding electrode object, and the variable of the upper end portion of the protruding electrode object is formed at the intersection between the electrodes. The variable resistance element according to claim 1, wherein an upper end surface of the resistor is in contact with a lower surface of the upper electrode. One first interlayer insulating film of the two interlayer insulating films is divided in the second direction with the lower electrode interposed therebetween, and the opposing side surfaces of the two divided first interlayer insulating films are the lower parts Formed so as to extend in the first direction in contact with the side surface of the electrode;
The other second interlayer insulating film of the two interlayer insulating films has a lower surface in contact with the upper surface of the lower electrode, an upper surface in contact with the lower surface of the upper electrode, and a narrower line width than the lower electrode. Formed to stretch in one direction,
The protruding electrode material fills between the side surfaces of the two separated first interlayer insulating films and both side surfaces of the second interlayer insulating film, and between the upper surface of the lower electrode and the lower surface of the upper electrode. The upper end surface and the lower end surface are each formed into two parallel lines and extend intermittently in the first direction, and the upper end surface of the protruding electrode object is the upper portion at the intersection between the electrodes. Formed to contact the lower surface of the electrode,
The variable resistor is formed at a lower end portion including the lower end surface of the protruding electrode body so as to continuously extend in the first direction, and the lower end surface of the variable resistor contacts the upper surface of the lower electrode. The variable resistance element according to claim 1. The variable resistor in the form of a thin film is provided on the entire lower surface of the upper electrode,
One first interlayer insulating film of the two interlayer insulating films is divided in the second direction with the lower electrode interposed therebetween, and the opposing side surfaces of the two divided first interlayer insulating films are the lower parts Formed so as to extend in the first direction in contact with the side surface of the electrode;
The other second interlayer insulating film of the two interlayer insulating films has a lower surface located above the upper surface of the lower electrode, an upper surface in contact with the lower surface of the variable resistor, and a line narrower than the lower electrode. Formed to extend in the first direction with a width;
The protruding electrode object fills between each side surface of the divided two first interlayer insulating films and both side surfaces of the second interlayer insulating film, and between the upper surface of the lower electrode and the lower surface of the variable resistor. Then, the upper end surface becomes two parallel lines and extends continuously or intermittently in the first direction, the lower end surface of the protruding electrode object abuts on the upper surface of the lower electrode, and the protruding electrode The variable resistance element according to claim 1, wherein an upper end surface of the object is formed so as to abut on a lower surface of the variable resistor. The first interlayer insulating film of one of the two interlayer insulating films has a lower surface in contact with the upper surface of the lower electrode, an upper surface in contact with the lower surface of the upper electrode, and both side surfaces thereof on both side surfaces of the lower electrode. And are formed so as to extend in the first direction continuously in the vertical direction,
The other second interlayer insulating film of the two interlayer insulating films is divided in the second direction with the lower electrode in between, and the opposing side surfaces of the two divided second interlayer insulating films are the lower parts Formed to extend in the first direction apart from the electrodes and side surfaces of the first interlayer insulating film,
The projecting electrode object includes a side surface of each of the two separated second interlayer insulating films, between both side surfaces of the first interlayer insulating film and the lower electrode, a lower surface position of the lower electrode, and a lower surface of the upper electrode. The upper end surface becomes two parallel lines and extends continuously or intermittently in the first direction, and the side surface of the lower end portion of the protruding electrode object is the side surface of the lower electrode. Formed to abut,
The variable resistor is formed at an upper end portion including the upper end surface of the protruding electrode object so as to continuously extend in the first direction, and an upper end portion of the protruding electrode object at the intersection between the electrodes. The variable resistance element according to claim 1, wherein an upper end surface of the variable resistor is in contact with a lower surface of the upper electrode. The two interlayer insulating films are spaced apart from each other in the second direction on the lower electrode, their upper surfaces are in contact with the lower surface of the upper electrode, their lower surfaces are in contact with the upper surface of the lower electrode, and The opposing side surfaces of the two interlayer insulating films are formed so as to extend in the first direction,
The protruding electrode object is filled with a gap formed by separating the two interlayer insulating films on the lower electrode, and between the upper surface of the lower electrode and the lower surface of the upper electrode, and has an upper end surface and a lower end surface. Each extending in the first direction continuously or intermittently in the form of a single line, and the lower end surface of the protruding electrode object contacts the upper surface of the lower electrode at the intersection between the electrodes. Formed as
The variable resistor is formed at an upper end portion including the upper end surface of the protruding electrode object so as to extend continuously or intermittently in the first direction, and the protruding electrode object is formed at the intersection between the electrodes. 3. The variable resistance element according to claim 2, wherein an upper end surface of the variable resistor at an upper end portion of the upper end portion is in contact with a lower surface of the upper electrode. The two interlayer insulating films are spaced apart from each other in the second direction on the lower electrode, their upper surfaces are in contact with the lower surface of the upper electrode, their lower surfaces are in contact with the upper surface of the lower electrode, and The opposing side surfaces of the two interlayer insulating films are formed so as to extend in the first direction,
The protruding electrode object is filled with a gap formed by separating the two interlayer insulating films on the lower electrode, and between the upper surface of the lower electrode and the lower surface of the upper electrode, and has an upper end surface and a lower end surface. Are formed in such a manner that the upper end surface of the protruding electrode object is in contact with the lower surface of the upper electrode at the intersection between the electrodes. And
The variable resistor is formed to extend continuously or intermittently in the first direction at a lower end portion including the lower end surface of the protruding electrode object, and the protruding electrode object is formed at the intersection between the electrodes. The variable resistance element according to claim 2, wherein a lower end surface of the variable resistor at a lower end portion of the lower end portion is in contact with an upper surface of the lower electrode.   The variable resistance element according to any one of claims 1 to 8, wherein the lower electrode is a diffusion layer formed on a semiconductor substrate.   10. The variable resistance element according to claim 1, wherein the protruding electrode is formed of a transition metal or a nitride of a transition metal element. 11.   The variable resistance element according to claim 10, wherein the protruding electrode object is titanium nitride.   The variable resistance element according to claim 1, wherein the variable resistor is formed by oxidizing a part of the protruding electrode body.   A line width of a contact surface between the variable resistor and at least one of the lower electrode and the upper electrode is formed narrower than any line width of the lower electrode and the upper electrode. The variable resistance element according to any one of claims 1 to 12, wherein the variable resistance element is provided.   A line having a dimension in which a line width of a contact surface between the variable resistor and at least one of the lower electrode and the upper electrode is smaller than a film thickness value of the lower electrode and the upper electrode. The variable resistance element according to claim 1, wherein the variable resistance element is formed with a width.   The variable resistance element according to claim 1, wherein the variable resistor is formed of an oxide of a transition metal element or an oxynitride of a transition metal.   The variable resistance element according to claim 15, wherein the variable resistor is titanium oxide or titanium oxynitride. A method of manufacturing a variable resistance element according to any one of claims 3 to 5,
Depositing an electrode material on a substrate, laminating a first electrode film, and processing the first electrode film to form the lower electrode extending in the first direction;
A second step of forming the first interlayer insulating film having an opening reaching the electrode surface of the lower electrode in an upper region of the lower electrode;
A third step of forming the protruding electrode object that contacts at least a partial region of the lower electrode and extends upward along the inner side wall of the opening formed in the second step;
A fourth step of forming the variable resistor at a tip portion of the protruding electrode object;
A fifth step of forming the upper electrode extending in the second direction by depositing an electrode material, laminating a second electrode film, and processing the second electrode film. Production method. A method of manufacturing a variable resistance element according to claim 3 or 5,
The third step is
Depositing a conductive material on the opening and the first interlayer insulating film to form an electrode film for protruding electrodes;
Depositing a third insulating film to be the second interlayer insulating film on the electrode film for the projecting electrode object;
Removing the third insulating film until the upper surface of the electrode film for protruding electrodes is exposed;
Removing the electrode film for protruding electrode objects stacked in a region other than the upper region of the opening, thereby forming the protruding electrode object in contact with the lower electrode in the opening. The manufacturing method of Claim 17 characterized by these. It is a manufacturing method of the variable resistance element according to claim 4,
The third step is
A sixth step of depositing a conductive material in the opening and on the first interlayer insulating film to form an electrode film for a protruding electrode;
The step of forming the protruding electrode object on the side wall of the opening by removing the electrode film for protruding electrode object stacked on the first interlayer insulating film is provided. Manufacturing method.   The sixth step is characterized in that, when the electrode film for protruding electrode object is stacked in the opening, the film thickness of the electrode film for protruding electrode object is reduced as it approaches the upper surface of the lower electrode. The manufacturing method as described in. The fourth step is
Forming a third insulating film to be the second interlayer insulating film on the opening and the first insulating film;
In the course of the step of forming the third insulating film, among the protruding electrode objects formed on the side wall of the opening in the third step, the protrusion in the thin region formed near the upper surface of the lower electrode 21. The manufacturing method according to claim 20, wherein the variable resistor is formed at the location by oxidizing the electrode. It is a manufacturing method of the variable resistance element according to claim 6,
A first electrode film constituting the lower electrode is deposited on a substrate, and then a first insulating film serving as the first interlayer insulating film is deposited on the first electrode film, and the first electrode film and the first electrode A first step of forming the lower electrode extending in the first direction by processing an insulating film;
A second step of forming the protruding electrode object that contacts at least a partial region of the lower electrode and extends upward along the outer side wall of the lower electrode and the outer side wall of the first insulating film;
A third step of forming the variable resistor at the tip of the protruding electrode object;
A fourth step of forming the upper electrode extending in the second direction by depositing an electrode material, laminating the second electrode film, and processing the second electrode film. Production method. The second step includes
Depositing a conductive material on the entire surface including the upper surface of the first insulating film to form an electrode film for protruding electrodes;
By removing the electrode film for the protruding electrode object formed in a region other than the outer side wall of the first electrode film and the outer side wall of the first insulating film, the protruding electrode object is removed from the outer side wall of the first electrode film. The method of claim 22, further comprising: forming on an outer side wall of the first insulating film. The third step is
Depositing a second insulating film to be the second interlayer insulating film on the entire surface including the upper surface of the first insulating film;
24. The method of claim 22, further comprising: smoothing the second insulating film until an upper surface of the electrode film for protruding electrodes is exposed. It is a manufacturing method of the variable resistance element according to claim 7,
A first step of forming a plurality of lower electrodes extending in the first direction by depositing an electrode material on a substrate, laminating a first electrode film, and processing the first electrode film;
One of the two interlayer insulating films having an opening that is opened in common with respect to each of the two adjacent lower electrodes and penetrated so as to reach the upper surface of at least a part of each of the lower electrodes. A second step of depositing a first insulating film to be an interlayer insulating film;
A conductive material is deposited to deposit the electrode film for the projecting electrode object, and the electrode film for the projecting electrode object is processed so as to contact at least a partial region of the lower electrode and along the inner wall of the opening. A third step of forming the protruding electrode object extending upwardly,
A fourth step of depositing a second insulating film to be the other interlayer insulating film of the two interlayer insulating films and then processing to fill the opening;
A fifth step of forming the variable resistor at the tip of the protruding electrode object;
And a sixth step of forming the upper electrode extending in the second direction by depositing an electrode material, laminating the second electrode film, and processing the second electrode film. Production method. It is a manufacturing method of the variable resistance element according to claim 8,
A first step of forming a plurality of lower electrodes extending in the first direction by depositing an electrode material on a substrate, laminating a first electrode film, and processing the first electrode film;
The two interlayer insulating films having a first opening that is opened in common to each of the two adjacent lower electrodes and penetrates so as to reach the upper surface of at least a part of each of the lower electrodes. A second step of depositing a first insulating film to be one interlayer insulating film;
A third step of forming a dummy film that contacts the partial region of the lower electrode and extends upward along the inner wall of the first opening by depositing and processing a dummy film material;
A fourth step of depositing a second insulating film to be the other interlayer insulating film of the two interlayer insulating films and then processing to fill the first opening with the second insulating film;
A fifth step of forming a second opening so that a part of the upper surface of the lower electrode is exposed by removing the dummy film;
A sixth step of forming the variable resistor and the protruding electrode object in the second opening;
By depositing an electrode material, laminating a second electrode film, and processing the second electrode film, the upper electrode extending in the second direction having a protruding electrode in the second opening is formed. And a seventh step. The dummy film is made of a material different from any material of the first insulating film, the second insulating film, and the first electrode film;
The fifth step includes a step of selectively removing only the dummy film with respect to the first insulating film, the second insulating film, and the first electrode film by an etching method. Item 27. The manufacturing method according to Item 26.   28. The manufacturing method according to claim 26, wherein the sixth step includes a step of forming the variable resistor by oxidizing the upper surface of the lower electrode located in the second opening. .   18. The method according to claim 17, further comprising: forming the variable resistor by depositing a variable resistor material and laminating a variable resistor film on at least the bump electrode after forming the bump electrode. The manufacturing method according to any one of claims 19 to 22 and claims 22 to 26.   28. The method according to claim 17, further comprising a step of forming the variable resistor by oxidizing an exposed portion of the protruding electrode object after forming the protruding electrode object. Production method.   The manufacturing method according to any one of claims 17 to 30, wherein the protruding electrode object is titanium nitride. The manufacturing method according to any one of claims 17 to 31, wherein the variable resistor is titanium oxide or titanium oxynitride.

Images