JP2007259132A - Receiving apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To detect and eliminate a DC component without transmitting a training signal. <P>SOLUTION: A DC offset detector 13 detects the DC component contained in an output signal from an A/D converter 11 for a non-signal period IFG in which there is no carrier on a transmission line (a signal line Ls). A subtracter 14 subtracts the DC component detected by the DC offset detector 13 from the output signal from the A/D converter. Accordingly, the DC component can be detected and eliminated without transmitting the training signal as conventional examples. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a receiving apparatus used in a communication system that performs packet communication using a digital modulation / demodulation method.

  Conventionally, a variable amplifier that amplifies an analog received signal, an A / D converter that converts the received signal amplified by the variable amplifier into a digital signal, which is used in a communication system that performs packet communication using a digital modulation / demodulation method, and A There is provided a receiving apparatus including a demodulating circuit that demodulates original data from a digital signal output from the / D converter. In such a receiving apparatus, a DC component (DC offset component) may occur due to the electrical characteristics of the variable amplifier and the A / D converter. Such a direct current component adversely affects the digital signal output from the A / D converter.

Therefore, a training signal, which is a known signal pattern, is transmitted prior to actual data transmission, and a DC component (DC offset component) generated when such training signal is received is detected, and a detected DC component is detected during actual data transmission. Has been proposed (see Patent Document 1).
JP-A-8-116340

  However, in the above conventional example, a training signal for detecting a direct current component must be transmitted before actual data transmission, and there is a problem that the efficiency of data transmission decreases with the transmission of the training signal.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a receiving apparatus capable of detecting and removing a direct current component without transmitting a training signal.

  In order to achieve the above object, the invention of claim 1 is used in a communication system that performs packet communication by a digital modulation / demodulation method, and a variable amplifier that amplifies an analog reception signal and a reception signal amplified by the variable amplifier are digitally converted. A receiving apparatus comprising an A / D converter for converting into a signal and a demodulating circuit for demodulating original data from a digital signal output from the A / D converter. DC offset detecting means for detecting a DC component included in the output signal of the / D converter, subtracting means for subtracting the DC component detected by the DC offset detecting means from the output signal of the A / D converter, and subtracting means The signal level of the digital signal from which the DC component is subtracted is detected, and the gain of the variable amplifier is adjusted so as to compensate for the difference between the detected value and a predetermined reference value. And a amplification factor adjusting means, characterized by comprising entering an output digital signal of the subtraction means to the demodulation circuit.

  According to a second aspect of the present invention, in the first aspect of the present invention, the no-signal period is a non-communication period provided between packets.

  According to a third aspect of the present invention, in the second aspect of the present invention, the direct current offset detecting means detects the direct current component during a no-signal period after the reception of the packet is completed.

  According to a fourth aspect of the present invention, in any one of the first to third aspects, the DC offset detecting means detects a DC component by averaging a plurality of sampling values.

  According to a fifth aspect of the present invention, in the fourth aspect of the invention, the direct current offset detecting means samples the direct current component with a sampling time sufficiently shorter than the no-signal period.

  According to a sixth aspect of the present invention, in the fourth or fifth aspect of the present invention, the direct current offset detecting means samples the direct current component except for a period from when the gain of the variable amplifier is adjusted to when it is stabilized. .

  According to a seventh aspect of the invention, in the second aspect of the invention, the DC offset detecting means detects a DC component every time a packet is received.

  According to an eighth aspect of the present invention, in any one of the first to sixth aspects, the storage device stores a direct current component detected by the direct current offset detection device, and the subtracting device converts the direct current component stored in the storage device to A / D. Subtract from the output signal of the converter.

  According to a ninth aspect of the invention, in the eighth aspect of the invention, every time a packet is received, the DC offset detecting means detects the DC component and the subtracting means subtracts the detected DC component from the output signal of the A / D converter. The first operation mode to be selected and the second operation mode in which the subtracting means subtracts the DC component stored in advance in the storage means from the output signal of the A / D converter are selectively selected and set. A setting means is provided.

  According to a tenth aspect of the present invention, in the ninth aspect of the invention, the subtracting means includes input receiving means for receiving an input of a subtraction value to be subtracted from the output signal of the A / D converter, and the setting means includes the first and second setting means. Select either the operation mode or the third operation mode in which the subtraction means subtracts the subtraction value received by the input reception means from the output signal of the A / D converter instead of the DC component detected by the DC offset detection means. It is characterized by comprising setting means for selectively selecting and setting.

  According to the first aspect of the present invention, the DC offset detection means detects a DC component included in the output signal of the A / D converter in a non-signal period in which no carrier wave exists on the transmission line, and the A / D converter Since the subtracting means subtracts the direct current component detected by the direct current offset detecting means from the output signal, the direct current component can be detected and removed without transmitting the training signal as in the conventional example. Further, since the signal level of the digital signal from which the DC component is subtracted by the subtracting means is detected by the amplification degree adjusting means, and the amplification degree of the variable amplifier is adjusted so as to compensate for the difference between the detected value and the predetermined reference value, It is possible to prevent a malfunction such that the amplification factor of the variable amplifier becomes excessive due to the direct current component.

  According to the invention of claim 2, since it is not necessary to provide a no-signal period only for detecting a DC component, the efficiency of data transmission is improved.

  According to the invention of claim 3, since the DC offset detecting means detects the DC component in the non-signal period after the reception of the packet is completed, the DC component can be stably and reliably even if the non-signal period varies. Can be detected.

  According to the invention of claim 4, the influence of randomly generated noise or sudden noise is reduced, and the detection accuracy of the DC component is improved.

  According to the invention of claim 5, since the no-signal period does not become unnecessarily long, the efficiency of data transmission is improved.

  According to the sixth aspect of the present invention, since the DC offset detection means samples the DC component except for the period from when the gain of the variable amplifier is adjusted until it becomes stable, the detection accuracy of the DC component is improved.

  According to the invention of claim 7, since the DC offset detection means detects the DC component every time a packet is received, even when the DC characteristics fluctuate due to changes in the electrical characteristics of the A / D converter or the like, The direct current component can be reliably removed.

  According to the eighth aspect of the present invention, when the fluctuation of the DC component is small, the frequency of detecting the DC component by the DC offset detecting means can be reduced, so that the data transmission efficiency is improved.

  According to the ninth aspect of the present invention, convenience is improved by switching between the first operation mode and the second operation mode in accordance with the application and use environment.

  According to the invention of claim 10, since the subtracting value received by the input receiving means can select the third operation mode in which the subtracting means subtracts from the output signal of the A / D converter, the convenience is further improved. To do.

(Embodiment 1)
As shown in FIG. 2, the communication system according to the present embodiment is connected to a plurality of transmission devices T that transmit digitally modulated data signals (packets) and the transmission devices T via signal lines Ls. A main apparatus M that receives a data signal that is time-division-multiplexed transmission, and a plurality of reception apparatuses R that receive the data signal that is time-division-multiplexed transmission from the transmission apparatus T via the signal line Ls via the main apparatus M Has been. Note that although a balanced line such as a pair line is used as the signal line Ls, an unbalanced line such as a coaxial line may be used. Further, a pair of enhanced category 5 or category 6 LAN cables or a pair of CPEV cables may be used for the signal line Ls.

  Further, a plurality of time slots are defined by the synchronization signal transmitted from the main apparatus M to the signal line Ls, and each transmission apparatus T requests the main apparatus M to allocate time slots before starting transmission of the data signal, The data signal (packet) is stored and transmitted in the time slot TS assigned by the main apparatus M (see FIG. 3). The main apparatus M and the receiving apparatus R can receive the packet (data signal) stored in the time slot and reconstruct the original data. In addition, according to the time division multiplex transmission method, data signals transmitted from different transmission devices T in different time slots are received, and data transmitted from different transmission devices T to each other by a plurality of reception devices R are separated. It can be acquired independently. However, which transmission device T uses which time slot is appropriately assigned to each transmission device T by a control signal transmitted by the main device M included in the synchronization signal. It should be noted that the present invention is not limited to time division multiplex transmission in which a plurality of time slots are arranged in an orderly manner using a synchronization signal. It is also possible to send out a packet.

  As shown in FIG. 1, the receiving device R of the present embodiment receives a data signal transmitted via the signal line Ls and demodulates the original data, and a packet output from the receiving circuit unit 1. And a signal processing circuit 2 for reconstructing each data.

  The reception circuit unit 1 includes a variable amplifier 10 that amplifies an analog reception signal (data signal), an A / D converter 11 that converts the reception signal amplified by the variable amplifier 10 into a digital signal, and an A / D converter. 11 for demodulating the original data from the digital signal output from the signal 11 and DC offset detection for detecting the DC component contained in the output signal of the A / D converter 11 in the non-signal period in which no carrier wave exists on the transmission line Unit 13, detection value holding unit 16 that holds (stores) the detection value detected by DC offset detection unit 13, and the DC component detected by DC offset detection unit 13 is subtracted from the output signal of A / D converter 11. Subtractor 14 and variable amplifier 10 so as to detect the signal level of the digital signal from which the DC component has been subtracted by subtractor 14 and compensate for the difference between the detected value and a predetermined reference value. And a amplification factor adjustment (AGC) circuit 15 for adjusting the amplification degree, a digital signal output from the subtracter 14 is configured to input to the demodulation circuit 12. Here, the no-signal period in the present embodiment is a communication disabled period (Inter Frame Gap) IFG provided between packets (between time slots TS) as shown in FIG. Are defined according to normal communication conditions in the entire communication system from the transmission delay and clock error between them, the time required to complete the transmission / reception processing, the time required to identify the preceding and following packets, and the like. A packet transmitted via the signal line Ls is composed of a preamble PA, a header portion H, and a data portion D as shown in FIG.

  In addition, since there is a possibility that the DC component is erroneously detected due to the influence of randomly generated noise or suddenly generated noise in one detection, the DC offset detection unit 13 in this embodiment receives a packet. Is detected by sampling the output of the A / D converter 11 a plurality of times and calculating the average of the sampling values of the plurality of times to detect a DC component (DC offset component) The accuracy of has been improved. In addition, the process of averaging multiple sampling values may be a simple arithmetic average, the arithmetic average of the remaining sampling values excluding the maximum and minimum sampling values so as not to include abnormal values, or the center It may be a value. In addition, since the no-signal period IFG does not become unnecessarily long by setting the sampling time to be sufficiently shorter than the no-signal period IFG, the efficiency of data transmission is improved.

  Next, the operation of this embodiment will be described with reference to the time chart of FIG. 4A is a waveform diagram of a received signal (data signal) input to the A / D converter 11, and FIG. 4B is a control signal for the AGC circuit 15 to set the amplification degree of the variable amplifier 10. (The amplification level is set to an arbitrary value at the H level, and the amplification level is returned to the initial value at the L level.) FIG. 5C shows the H level when the receiving circuit unit 1 detects the carrier (carrier wave). Each carrier sense signal is shown. Doff in the figure is a DC offset component included in the received signal.

  If a received signal (packet) is input to the receiving circuit unit 1 at time t = t0, the AGC circuit 15 detects the signal level of the preamble PA and compensates for the difference between the detected value and a predetermined reference value. A control signal for setting the amplification degree of the variable amplifier 10 is output (time t = t1). The variable amplifier 10 adjusts the amplification degree based on this control signal, so that the signal level of the received signal becomes a desired level (time t = t2). At the same time as the control signal is output from the AGC circuit 15, the carrier sense signal is also at the H level. Time t = t1 to t2 is a response period (transient period) from when the amplification degree of the variable amplifier 10 is adjusted until it is stabilized.

  Assuming that the reception signal is terminated at time t = t3, the signal level becomes almost zero, so that reception completion of the reception signal (packet) is detected and the carrier sense signal becomes L level (time t = t4). In response to detection of the completion of reception, the AGC circuit 15 stops outputting the control signal, and the amplification degree of the variable amplifier 10 is returned to the initial value. The DC offset detector 13 samples the output of the A / D converter 11 a plurality of times after the time when the amplification degree of the variable amplifier 10 returns to the initial value and stabilizes (time t = t5). The average of the sampling values is calculated to detect a DC component (DC offset component). The detected value is held in the detected value holding unit 16, and the signal level corresponding to the detected value is subtracted from the output signal of the A / D converter 11 in the subtractor 14 (time t = t6). Therefore, when the next reception signal (packet) is input (time t = t7), the DC component is removed (cancelled).

  As described above, according to the present embodiment, the DC offset detection unit 13 is included in the output signal of the A / D converter 11 in the non-signal period IFG in which no carrier wave (carrier) exists on the transmission line (signal line Ls). Since the subtracter 14 subtracts the DC component detected by the DC offset detector 13 from the output signal of the A / D converter, the DC signal is detected without transmitting the training signal as in the conventional example. Components can be detected and removed. Further, since the signal level of the digital signal from which the DC component is subtracted by the subtractor 14 is detected, and the AGC circuit 15 adjusts the amplification degree of the variable amplifier 10 so as to compensate for the difference between the detected value and a predetermined reference value. Thus, it is possible to prevent such a malfunction that the amplification degree of the variable amplifier 10 becomes excessive due to the DC component. Here, in the present embodiment, since the DC offset detection unit 13 detects the DC component during the no-signal period IFG that is provided between the packets (between the time slots TS), the DC component is detected. Since there is no need to provide a no-signal period, the efficiency of data transmission is improved, and the no-signal period IFG varies due to a transmission delay between the transmitting device T and the receiving device R, a clock error, and the like. However, there is an advantage that the DC component can be detected stably and reliably. Further, since the DC offset detection unit 13 performs sampling except for a period from the time when the amplification degree of the variable amplifier 10 is adjusted until it becomes stable (between times t4 and t5 in FIG. 4), the DC component detection accuracy is improved. To do.

  By the way, since the data signal is time-division multiplexed in the communication system according to the present embodiment, the signal level of the DC component changes when the temperature characteristics of the variable amplifier 10 and the A / D converter 11 change. However, since the receiving device R of the present embodiment detects a DC component every time a packet is received, the DC component is reliably detected for each packet even if the temperature characteristics change as described above. Can be removed. This is not limited to the case where the temperature characteristics change, and the same effect can be obtained when noise of a level that cannot be ignored compared to the DC component is generated.

(Embodiment 2)
As shown in FIG. 5, the receiving device R of the present embodiment includes a control unit 3 having a CPU as a main component, a storage unit 4 made of a nonvolatile semiconductor memory, a key switch, and the like, and a subtractor 14 having an A And an input receiving unit 5 that receives an input of a subtraction value to be subtracted from the output signal of the / D converter 11. In the receiving circuit unit 1, a state in which the output of the A / D converter 11 is input to the DC offset detection unit 13 and a state in which the output of the A / D converter 11 is not input to the DC offset detection unit 13 are selected. A change-over switch 17 is provided that is switched on and off, and the control unit 3 turns the change-over switch 17 on and off. However, since the basic configuration of the present embodiment is the same as that of the first embodiment, common components are denoted by the same reference numerals and description thereof is omitted.

  In the present embodiment, every time a packet is received as described above, the DC offset detector 13 detects the DC component and the subtractor 14 subtracts the detected DC component from the output signal of the A / D converter 11. The DC offset detection unit 13 detects the DC component at the operation mode 1 and the timing received by the input reception unit 5 and holds it in the detection value holding unit 16, and thereafter the detection value held in the detection value holding unit 16 The second operation mode in which the subtracter 14 subtracts from the output signal of the A / D converter 11 and the subtraction value received by the input receiving unit 5 are stored in the storage unit 4 and read out from the storage unit 4 by the control unit 3. Any one of the third operation modes in which the subtractor 14 subtracts the subtraction value from the output signal of the A / D converter is selected and set by the control unit 3. However, the selection of the operation mode in the control unit 3 may be performed according to a selection input received by the input reception unit 5, or may be performed by an application program, for example.

  Thus, when the fluctuation of the direct current component is small, the frequency of detecting the direct current component by the direct current offset detector 13 is reduced by setting the second operation mode, so that the data transmission efficiency is improved. There are advantages. Further, by subtracting the DC component (subtracted value) received by the input receiving unit 5 by the subtractor 14, the DC component can be removed even in an environment where a correct DC offset component cannot be detected due to a large amount of external noise. In addition, there is an advantage that convenience is improved by switching the operation mode according to the application and the use environment. The subtraction value received by the input receiving unit 5 is a value obtained by performing statistical processing over a long period of time on electrical measurement means, inspection during manufacturing or maintenance, or detection value of the DC offset detection unit 13. That's fine.

  Here, as shown in FIG. 6, by simply connecting the connector of the functional module 108 to the connection port of the gate device 103, the power path and the information path of the functional module 108 can be secured at the same time. There is a wiring system that can be connected also to the gate device 103 and is excellent in workability. In this wiring system, one or a plurality of switch boxes 102 embedded and disposed at appropriate positions in a building are provided, and a power line 110 and an information line 111 that are wired in advance in a wall surface between the switch boxes 102 are sent and wired. At the same time, with respect to the switch box 102 at the starting end, a field line 110 drawn indoors through the main breaker MB and the branch breaker BB drawn into the wiring board 101, and a gateway 120 ( Information line 111 connected via a router and a hub is connected. It is also possible to incorporate the video transmission system according to the present invention in such a wiring system.

2 is a block diagram illustrating a receiving apparatus according to Embodiment 1. FIG. It is a system configuration | structure figure of the communication system using the same as the above. It is explanatory drawing of the time slot in the same as the above. It is a time chart for operation | movement description same as the above. 6 is a block diagram illustrating a receiving apparatus according to Embodiment 2. FIG. It is a system configuration diagram of a wiring system incorporating the same.

Explanation of symbols

R receiver 1 receiving circuit unit 2 signal processing circuit 10 variable amplifier 11 A / D converter 12 demodulating circuit 13 DC offset detecting unit 14 subtractor 15 AGC circuit (amplification degree adjusting means)

Claims (10)

A variable amplifier that amplifies an analog received signal, an A / D converter that converts the received signal amplified by the variable amplifier into a digital signal, and an A / D converter that are used in a communication system that performs packet communication using a digital modulation / demodulation method In a receiving device comprising a demodulating circuit for demodulating original data from a digital signal output from the device,
DC offset detection means for detecting a DC component included in the output signal of the A / D converter in a non-signal period in which no carrier wave is present on the transmission line, and DC offset detection means detected from the output signal of the A / D converter Subtracting means for subtracting the DC component, and detecting the signal level of the digital signal from which the DC component has been subtracted by the subtracting means, and adjusting the gain of the variable amplifier so as to compensate for the difference between the detected value and a predetermined reference value A receiving apparatus comprising: an amplification degree adjusting unit; and a digital signal output from the subtracting unit is input to a demodulation circuit.   The receiving apparatus according to claim 1, wherein the no-signal period is a communication disable period provided between packets.   3. The receiving apparatus according to claim 2, wherein the DC offset detecting means detects a DC component in a no-signal period after reception of the packet is completed.   4. The receiving apparatus according to claim 1, wherein the DC offset detecting means detects a DC component by averaging a plurality of sampling values.   5. The receiving apparatus according to claim 4, wherein the DC offset detecting means samples the DC component with a sampling time sufficiently shorter than the no-signal period.   6. The receiving apparatus according to claim 4, wherein the DC offset detecting means samples the DC component except for a period from when the amplification degree of the variable amplifier is adjusted until it is stabilized.   3. The receiving apparatus according to claim 2, wherein the DC offset detecting means detects a DC component every time a packet is received.   7. The storage device according to claim 1, further comprising storage means for storing a DC component detected by the DC offset detection means, wherein the subtraction means subtracts the DC component stored in the storage means from the output signal of the A / D converter. The receiving device according to any one of the above.   The first operation mode in which the DC offset detection means detects the DC component and the subtraction means subtracts the detected DC component from the output signal of the A / D converter every time a packet is received, and is stored in the storage means in advance. 9. A setting means for selectively selecting and setting one of a second operation mode in which a subtracting means subtracts a direct current component from an output signal of an A / D converter. Receiver. Input receiving means for receiving an input of a subtraction value to be subtracted from the output signal of the A / D converter by the subtracting means;
The setting means includes first and second operation modes, and a subtraction means for the subtraction means to subtract the subtraction value received by the input reception means from the output signal of the A / D converter instead of the DC component detected by the DC offset detection means. 10. The receiving apparatus according to claim 9, further comprising setting means for selectively selecting and setting one of the three operation modes.

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