JP2000165280A - Dc feedback circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a DC feedback circuit that stably suppresses a DC offset even when a base band filter is present in a feedback loop that is operated for a non-signal period. SOLUTION: A sample-and-hold circuit 7 detects a DC component appearing at an output terminal 6 by a mixer 2 and an base band filter 5 for a non-signal period and stores the DC component in a hold capacitor C, and keeps the DC component stored in the capacitor C for periods other than the non-signal period. A comparator 9 compares the DC component with a reference voltage Vref, outputs a signal in response to the result to a level shift circuit 4 inserted in a base band signal path, which shifts a level of the DC component to suppress the output DC offset based on the outputted signal. Through the control above, for the non-signal period, the DC feedback loop is operated to make the feedback loop stable by changing a frequency characteristic of the filter so as to suppress the DC offset at the signal output terminal 6, and the control signal given to the DC level shift circuit 4 is maintained for periods other than the non-signal period thereby attaining suppression of the DC offset for all the periods.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a detection unit for detecting an RF modulation signal having no signal period among RF modulation signals for mobile communication and digital broadcasting, for example, and relates to a DC offset generated in a detection output. The present invention relates to a DC feedback circuit that reduces the power consumption.

[0002]

2. Description of the Related Art For example, a receiver for mobile communication or digital broadcasting uses a detection circuit for detecting an RF modulation signal and extracting a baseband signal. FIG. 6 is a simplified representation of this detector. That is,
The RF modulation signal input from the input terminal 1 is detected by the mixer 2 and a desired baseband signal is output from the output terminal 6 via the baseband filter 5 for removing unnecessary components. Here, from the frequency conversion carrier input 3,
A conversion carrier for detection is supplied to the mixer 2.

In this detector, particularly when the frequency is high, the frequency-converted carrier easily leaks into the RF modulation signal input of the mixer 2, and if this is detected by the mixer 2, a DC offset is added to the output of the mixer 2. Occurs. In particular, when these circuits are formed into ICs, a DC offset also occurs due to a mismatch between circuit element pairs. Further, when the baseband filter 5 and the like to be arranged at the subsequent stage of the mixer 2 are built into the IC, this circuit becomes a factor of generating a new DC offset. In particular, when the inserted circuit has a signal amplifying function, the DC offset at the output of the mixer 2 is amplified.

As described above, in the baseband signal transmission path after the detection output, there are many causes of DC offset, but the power supply voltage used has been reduced due to recent trends in power saving. These DC offsets have come to squeeze the dynamic range of the signal.

In processing a baseband signal, the output cannot be AC-coupled in many cases.
When these signals have a non-signal period, the amount of DC offset is detected during this non-signal period, and a DC feedback loop is formed. Suppression is possible.

As a measure for suppressing these DC offsets, for example, the method described in Japanese Patent Application Laid-Open No. 9-284160 is effective. In this known example,
Since the DC offset is suppressed in the output section of the detection mixer, the DC offset is amplified at the output even if there is a gain stage after the detection circuit, and the dynamic range of the signal is not suppressed.

Although the above publication does not refer to the DC feedback loop in the case where there is no signal period, the DC offset detecting means is constituted by a sample-and-hold circuit, and the DC feedback loop is operated during the no signal period so that the non-signal The amount corresponding to the detected DC offset amount may be held during periods other than the period.

For this reason, as shown in the above publication, if a portion near the output of the detection mixer can be fed back as much as possible and a baseband filter can be incorporated in a DC feedback loop, the DC offset can be effectively suppressed.

However, if the dominant pole of the baseband filter is added in addition to the dominant pole of the DC feedback loop,
The feedback loop is likely to be unstable. There is no problem if one of these poles is at a frequency sufficiently lower than the other, but these poles are likely to be close to each other. This is because the dominant pole of the baseband filter is determined by the band of the baseband signal to be handled, and the dominant pole of the feedback loop should be determined from the response characteristics. is there.

[0010]

As described above,
If a baseband filter is provided in a DC feedback loop that operates during a no-signal period, the feedback loop becomes unstable, causing oscillation and the like, and there has been a problem that a DC offset generated in a signal output cannot be effectively suppressed.

An object of the present invention is to provide a DC feedback circuit capable of stably suppressing a DC offset even when a baseband filter is present in a feedback loop operating during a no-signal period.

[0012]

According to the present invention, in order to solve the above-mentioned problems, in a DC feedback circuit for performing DC feedback during a non-signal period, an input signal input from an input terminal is provided.
While outputting from the output terminal through the filter, during the non-signal period, the difference between the DC component generated at the output terminal and a reference voltage is detected, and the DC component output from the signal output terminal is compared with the reference voltage. Thus, a DC feedback loop for varying the DC component of the previous stage of the filter is operated, and the DC characteristic of the filter is stabilized by changing the frequency characteristic without changing the DC gain of the filter, so that the signalless period Otherwise, the difference between the DC component of the output signal and the reference voltage is maintained so that the DC component generated at the output terminal during all periods is made equal to the reference voltage.

With such a means, a DC feedback loop operates during a non-signal period, and the feedback loop can be stabilized by changing the frequency characteristic of the filter. Therefore, the DC offset of the output terminal can be suppressed stably. In addition, the DC offset can be suppressed in all periods other than the non-signal period.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a system diagram for describing an embodiment of the present invention. In FIG. 1, an RF modulation signal having a non-signal period is input as an input signal from an input terminal 1, and this is detected by a mixer 2. The DC component of the input signal is varied by the DC level shift circuit 4 and supplied to the baseband filter 5. The baseband filter 5 removes unnecessary components and outputs a desired baseband signal from the output terminal 6. A frequency conversion carrier for detection is supplied to the input terminal 3 and supplied to the mixer 2.

The baseband signal output from the baseband filter 5 is also supplied to a sample / hold circuit 7 composed of a variable gain amplifier GA and a hold condenser C. The sample and hold circuit 7 detects the DC component of the baseband signal at the time of sampling based on a sample and hold signal having the non-signal period supplied to the control terminal 8 as a sample period, and outputs the detection result at the time of holding other than the non-signal period. Hold. The sample-and-hold signal is also supplied to the baseband filter 5 to change the frequency characteristic without changing the DC gain during the non-signal period.

The comparator 9 supplies the detection result held by the sample-and-hold circuit 7, and outputs the detection result to the reference potential Vr.
The dc component of the dc level shift circuit 4 is varied so as to make ef coincide with ef.

In this system, the DC component generated at the output terminal 6 by the mixer 2 and the baseband filter 5 is
The signal is detected by the sample and hold circuit 7 during the non-signal period and stored in the hold capacitor C, and the DC component stored in the hold capacitor C is held during periods other than the non-signal period. The held DC component is compared with the reference voltage Vref by the comparator 9, and a control signal corresponding to the comparison result is output. Based on this control signal, a DC component level shift is performed by the DC level shift circuit 4 inserted in the baseband signal path so as to suppress the output DC offset.

By performing such control, a DC feedback loop operates during a non-signal period, and the feedback loop can be stabilized by changing the frequency characteristics of the filter. Can be suppressed stably, and the control signal of the DC level shift circuit 4 is kept in a state other than the non-signal period, so that the DC offset can be suppressed in the entire period.

Even if the frequency characteristic of the filter is changed, it has no effect on subsequent signal processing since it is a signalless period. However, the DC gain of the filter in the non-signal period and in the period other than the non-signal period must be substantially the same.

Next, a specific example of frequency characteristic control by the baseband filter 5 of FIG. 1 will be described with reference to FIGS.

First, a specific circuit example of the baseband filter 5 will be described with reference to FIG. That is, the other end of the resistor R1 whose one end is connected to the input terminal 11 to which the output of the preceding level shift circuit 4 is supplied is connected to the resistors R2 and R3.
It is connected to one end of each of the capacitors C1. The other end of the capacitor C1 is grounded via the switch S1.
The other end of the resistor R2 is connected to the inverting input of the operational amplifier OP whose non-inverting input is grounded, and to one end of the capacitor C2. The other end of the resistor R1 is connected between the output of the operational amplifier OP and the output terminal 12. Capacitor C2
Is connected to the output terminal 12 via the switch S2. The switches S1 and S2 perform on / off control based on a hold signal supplied to the input terminal 8.

This band-pass filter is a secondary active low-pass filter, and switches S1 and S2 are short-circuited except during the non-signal period. The transfer function in this case is as follows.

Vo / Vi =-(R3 / R1) / [s ² C
1C2R2R3 + sC2R2R3 ｛(1 / R1) + (1
/ R2) + (1 / R3)｝ + 1] Since the switches S1 and S2 are both open during the no-signal period, the transfer function changes as follows.

Vo / Vi =-(R3 / R1) Therefore, during a non-signal period, this filter is merely an amplifier, so that the frequency characteristic can be changed. The DC gain does not change during the entire period.

Next, how the DC feedback loop can be stabilized by this control will be described. FIG. 3 (a)
Is the frequency characteristic of the baseband filter 5. In the signal period, a low-pass characteristic is shown as shown by a solid line, but in the non-signal period, the amplifier has a flat frequency characteristic. FIG.
(B) is an open-loop characteristic of a DC feedback loop that operates during a no-signal period. In this case, the first pole is a pole of the baseband filter. The second pole is another dominant pole in the feedback loop, for example due to the hold capacitance of the sample and hold circuit. The solid line in the figure is
This indicates that the phase margin is insufficient and the feedback loop is not stable. However, by controlling the frequency characteristics of the baseband filter, the position of the first pole changes as shown by the broken line, and the feedback loop can be stabilized.

FIGS. 3C and 3D are explanatory diagrams in the case where the pole of the baseband filter is higher in frequency than the other dominant poles in the DC feedback loop. FIG. 3C shows the frequency characteristics of the baseband filter, and FIG. 3D shows the open-loop characteristics of the DC feedback loop that operates during the non-signal period. Also in this case, the feedback loop can be stabilized by controlling the frequency characteristics of the baseband filter.

As described above, the purpose of the present invention is to stabilize the loop characteristics of the DC feedback loop by changing the frequency characteristics of the baseband filter. Therefore, the method of controlling the frequency characteristics of the baseband filter is not limited to the above.

FIG. 4 shows another specific circuit example of the baseband filter 5. In FIG. 4, an input terminal 11 to which one end is supplied with the output of the level shift circuit 4 at the preceding stage is connected to the non-inverting input of the transconductance amplifier GM1. The output of the transconductance amplifier GM1 is
The capacitor C1 is grounded via the switch S1, and is connected to the non-inverting input of the transconductance amplifier GM2. The output of the transconductance amplifier GM2 is grounded via a capacitor C2 and a switch S2, and is connected to an output terminal 12 via a buffer B1. The output of the buffer B1 is grounded via the resistors R4 and R5. The connection points of the resistors R4 and R5 are connected to the inverting inputs of the transconductance amplifiers GM1 and GM2, respectively. The switches S1 and S2 perform on / off control based on a hold signal supplied to the input terminal 8.

This baseband filter is also a second-order active low-pass filter, and the switches S1 and S2 are both short-circuited except during the non-signal period. The transfer function in this case is as follows.

Vo / Vi = (1 / m) / ｛(s ² T1T
2 / m) + sT1 + 1} where T1 is represented by C1 / Gm1, T2 is represented by C2 / Gm2, m is represented by R5 / (R4 + R5), and Gm1 and Gm2 are transconductances of the transconductance amplifiers GM1 and GM2, respectively.

Since the switches S1 and S2 are both opened during the non-signal period, the transfer function is as follows.

Vo / Vi = (1 / m) Therefore, in this case, just like in the case of FIG. 2, during a no-signal period, this filter becomes a mere amplifier, and can change the frequency characteristic. Does not change for the entire period. In this circuit example, since the polarity of the transfer function of the filter shown in FIG. 2 is inverted, care should be taken so that negative feedback occurs in the entire DC feedback loop, for example, by reversing the control direction of the level shift.

As is clear from the above description, the gist of the present invention is that a circuit having a frequency characteristic such as a baseband filter that inhibits the stability of the loop is inserted in a DC feedback loop. That is, the frequency characteristic is changed during a no-signal period in which the loop operates to maintain the stability of the DC feedback loop. For this reason, by inserting a switch in series with a capacitor that characterizes the frequency characteristic that hinders the stability of the DC feedback loop so as to change the frequency characteristic without changing the DC gain, and opening the switch during the no signal period, The frequency characteristics can be changed without changing the DC gain.

Thus, it is apparent that such frequency control does not depend on the circuit type of the filter, and that the frequency characteristics can be easily controlled in other than the above-described embodiment. In practice, it is difficult to change a baseband filter to an amplifier having a completely flat band. This is because the band of the operational amplifier in the circuit is finite and the band is limited by the parasitic capacitance of the wiring. However, the intended purpose can be achieved as long as the poles of the filter can be moved to such a high frequency that does not affect the stability of the DC feedback loop by the above-described frequency control.

As is apparent from these, it is not necessary to insert a switch in series with all the capacitors in the circuit, and a switch is inserted in series only with a capacitor forming a pole which hinders the stability of the DC feedback loop. What is necessary is just to make it open in a non-signal period.

FIG. 5 shows a specific circuit example of the switches S1 and S2 in FIG. 2 or FIG. This circuit is composed of the drain of the NMOS transistor M1 and the PMO
The sources of the S transistors M2 are commonly connected,
Connected to the first input terminal 21, the NMOS transistor M
1 and the drain of the PMOS transistor M2 are commonly connected, connected to the second input terminal 22, the gate of the NMOS transistor M1 is connected to the control terminal 8 of the switch, and the PMOS transistor M2 is connected via the inverter I1. Connect to the gate of

When the potential of the control terminal 8 for controlling the switch is high and the drain and source of the transistors M1 and M2 are conducted, the input terminals 21 and 22 of the switch are short-circuited, and the control terminal 8 of the switch is low. When the drain and source of M1 and M2 are isolated, the input terminal 2 of the switch
Open between 1-22.

In this circuit example, even if one of the NMOS transistor and the PMOS transistor is removed, the function of the switch is maintained. It is needless to say that the same effect can be obtained by using a bipolar element instead of the MOS transistor.

In the above description, the feedback loop operates during the no-signal period. However, if the DC component during this period is equal to the DC component at the time of no signal, even if noise or a high-frequency signal is superimposed. No problem. This is because a DC component can be extracted by the sample and hold circuit.

[0040]

As described above, according to the present invention,
Activate the DC feedback loop during no signal period,
The frequency characteristics are changed without changing the DC gain of the baseband filter, so even if the baseband filter is incorporated in the DC feedback loop, the feedback loop can be stabilized and the DC offset compensation capability is improved. I do. In addition, the degree of freedom in selecting the sample hold time constant is improved, and the sample hold capacity can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram for explaining an embodiment of the present invention;

FIG. 2 is a circuit diagram illustrating a configuration example of a baseband filter of FIG. 1;

FIG. 3 is an explanatory diagram for describing control of frequency characteristics in FIG. 1;

FIG. 4 is a circuit diagram for explaining another configuration example of the baseband filter of FIG. 1;

FIG. 5 is a circuit diagram illustrating a configuration example of the switch in FIG. 1;

FIG. 6 is a block diagram for explaining a conventional detection unit for extracting a baseband signal.

[Explanation of symbols]

1, 3: input terminal, 2: mixer, 4: DC level shift circuit, 5: baseband filter, 6: output terminal, 7
... Sample hold circuit, 8 ... Control terminal, 9 ... Comparator,
GA: variable gain amplifier, C: hold transducer, Vr
ef: reference potential.

Claims (5)

[Claims] 1. An input terminal for inputting a signal having no signal period, a level shift means for varying a DC component of an input signal input from the input terminal, and an output terminal of the level shift means. A filter, an output terminal for extracting an output signal from the filter, a reference potential, an input terminal for inputting a sample hold signal having a non-signal period as a sample period, and detecting a DC component of the output signal at the time of sampling. Sample and hold means for holding the detection result at the time of holding other than the non-signal period; and control means for varying a DC component of the level shift means so that the detection result and the reference potential held by the sample and hold means coincide with each other. Means for changing the frequency characteristic without changing the DC gain of the filter at the time of the sample; DC feedback circuit, characterized by comprising. 2. A DC feedback circuit for performing DC feedback during a no-signal period, wherein an input signal input from an input terminal is output from an output terminal via a filter, and is generated at the output terminal during the no-signal period. Detecting a difference between a DC component and a reference voltage, and actuating a DC feedback loop for varying a DC component of the preceding stage of the filter so that the DC component output from the signal output terminal becomes the reference voltage, By changing the frequency characteristic without changing the DC gain, stabilizes the DC feedback loop, and holds the difference between the DC component of the output signal and the reference voltage except during the non-signal period, A DC feedback circuit, wherein a DC component generated at the output terminal during all periods is made equal to the reference voltage. 3. The filter includes a filter input terminal serving as an input of the filter, an output terminal serving as an output of the filter, a first resistor having one end connected to the filter input terminal, and one end connected to the first resistor. , A second capacitor having one end connected to the other end of the first resistor, and a non-inverting input grounded. , The inverting input to the second
And an operational amplifier having an output connected to the filter output terminal and one end connected to the other end of the second resistor, and the other end connected to the output of the operational amplifier via a second switch. A second capacitor connected thereto, and one end connected to the first capacitor.
And a control terminal for supplying a control signal for controlling the first and second switches, the third resistor being connected to the other end of the resistor and the other end being connected to the output of the operational amplifier. The direct current feedback circuit according to claim 1 or 2, wherein: 4. The filter includes a filter input terminal serving as an input of the filter, an output terminal serving as an output of the filter, a fourth resistor having one end connected to the filter output terminal, and a fourth resistor having one end connected to the filter output terminal. And a fifth resistor grounded at the other end, a non-inverting input connected to the filter input terminal, and an inverting input connected to the interconnection point of the fourth resistor and the fifth resistor. A first transconductance amplifier, a first capacitor having one end connected to the output of the first transconductance amplifier, the other end grounded via a first switch, and a non-inverting input to the first transconductance amplifier. A second transconductance amplifier connected to the output of the transconductance amplifier and having an inverting input connected to an interconnection point of the fourth resistor and the fifth resistor; and one end of the second transconductance amplifier. A buffer connected to the output of the second transconductance amplifier and connected to the output of the second transconductance amplifier, and a second capacitor connected to the output of the second amplifier and having the other end grounded via a second switch. 3. The direct current feedback circuit according to claim 1, comprising an input terminal for supplying a control signal for controlling the first and second switches. 5. The filter has at least a capacitor for characterizing frequency characteristics, and a switch connected in series with the capacitor. The switch is opened during a no-signal period, and the switch is opened during a period other than the no-signal period. 3. The DC feedback circuit according to claim 1, wherein the switch short-circuits the switch.