JP2007252020A - Power conversion equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problems such as the enlargement of a device, the increase of cost, etc. due to necessity of surplus elements, though continuous operation is possible by residual normal elements even in case that element destruction has occurred by increasing the number of series of elements in advance in consideration of occurrence of element destruction. <P>SOLUTION: In a semiconductor switch circuit comprising self-arc-extinguishing semiconductor elements connected serially in plural numbers and gate driving circuits provided in each semiconductor element, the value of either or both of the forward bias voltage and the reverse bias voltage of each gate driving circuit is changed so that the turn off action of residual normal elements may be slow, when any of the semiconductor elements breaks and the circuit between the collector and the emitter short-circuits. The spike voltage at turn off becomes small by slowing down the turn off action, thus it makes the continuous operation in a less number of series possible. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a power conversion device configured by a plurality of self-extinguishing semiconductor elements (hereinafter referred to as elements) connected in series, and in particular, when a short-circuit failure occurs in any of the elements connected in series, It is related with the technique which continues driving | running | working without stopping an apparatus by changing.

  FIG. 5 shows a circuit configuration example of an inverter using a conventional technique. The application elements 11 to 14 are IGBTs, and four of them are connected in series to constitute an upper arm 1 and a lower arm 2. The number of elements in series here is the minimum necessary for the DC voltage Edc. That is, since the DC voltage applied to each element is Edc / 4 when the element is off, the surge voltage ΔV at the time of turn-off is taken into consideration so that the element applied voltage is within the rated voltage as shown in FIG. The number of elements in series is set in Here, it is assumed that the IGBT 11 is broken among the four elements and the collector-emitter is short-circuited. At this time, since the DC voltage Edc is shared by the remaining three elements, IGBTs 12 to 14, the DC voltage applied per element is Edc / 3, which is the DC voltage applied compared to the normal time. The voltage increases.

If the switching speed of the element is equal, the voltage increase of the surge voltage is the same as in FIG. 6A, and exceeds the breakdown voltage of the element as shown in FIG. 6B. As a result, all elements constituting the arm are destroyed, and the operation of the apparatus cannot be continued. FIG. 7 shows a circuit configuration that enables continuous operation. Compared with FIG. 5, the number of elements in series is increased from four to five. The turn-off waveform per element at this time is shown in FIG. Compared with FIG. 6 (a), the DC voltage applied to one element is normally reduced to Edc / 5 when normal, so the peak value of the spike voltage (applied voltage to the element obtained by adding a surge voltage to the DC voltage) It can be seen that there is a margin with respect to the element rated voltage. In this state, when the IGBT 11 is broken and short-circuited, the DC voltage sharing becomes Edc / 4, which is the same as that shown in FIG. 6A, so that the peak value of the spike voltage does not exceed the element rated voltage. Thereby, continuous operation is possible. Details of this method are described in Patent Document 1.
Japanese Patent Laid-Open No. 11-252894

As described above, in consideration of the occurrence of element destruction, it is possible to continue operation with the remaining normal elements even when element destruction occurs in the arm by increasing the number of elements in series. However, an extra element is required, which causes problems such as an increase in size and cost of the apparatus.
Therefore, an object of the present invention is to reduce the size and cost of the apparatus by configuring the arm by series connection with the minimum number of elements and enabling continuous operation even when an element failure occurs. It is to plan.

  In order to solve the above-mentioned problem, in the first invention, a semiconductor switch circuit comprising a plurality of self-extinguishing semiconductor elements connected in series and a gate drive circuit provided in each of the semiconductor elements, wherein the semiconductor One or both of the forward bias voltage and reverse bias voltage of the gate drive circuit is delayed so that when one of the elements breaks down and the collector-emitter is short-circuited, the turn-off operation of the remaining normal elements is delayed. Change the value of.

  In the second invention, in the upper and lower arms in which a plurality of self-extinguishing semiconductor elements connected in series and a semiconductor switch circuit comprising a gate drive circuit provided in each of the semiconductor elements are connected in series, When one of the semiconductor elements is destroyed and the collector-emitter is short-circuited, the forward bias of the gate drive circuit is set so that the turn-on operation of the semiconductor element of the semiconductor switch circuit of the arm opposite to the arm is delayed. The value of one or both of the voltage and the reverse bias voltage is changed.

  In the third invention, in the first and second inventions, means for changing the value of one or both of the forward bias voltage and the reverse bias voltage of the gate drive circuit is common to the upper and lower arms having a current limiting characteristic. AC power supply and means for simultaneously turning on the forward bias semiconductor switch and the reverse bias semiconductor switch in the gate drive circuit to overload the AC power supply.

  In the present invention, when a short circuit failure occurs in any of the elements in the arm connected in series, the surge voltage is suppressed by changing the gate driving conditions of the remaining elements and the driving conditions of the elements of the opposite arm. Therefore, the spike voltage applied to the element is suppressed below the rated voltage of the element, and the operation of the apparatus can be continued. As a result, it is no longer necessary to determine the number of series elements with a margin on the assumption that the elements have been destroyed as in the prior art, and the apparatus can be reduced in size and cost.

  The main point of the present invention is that, when a short circuit failure occurs in any of the elements in the plurality of arms connected in series, the surge voltage is suppressed by changing the gate driving conditions of the remaining elements and the driving conditions of the elements of the opposite arm. In this way, the spike voltage applied to the element is suppressed below the rated voltage of the element, and the operation is continued.

  FIG. 1 shows a first embodiment (overall configuration) of the present invention. This circuit constitutes one phase of a two-level inverter, and four IGBTs (11 to 14) are connected in series as elements. Here, as in FIG. 5, the minimum number of series is required. Reference numerals 21 to 24 denote gate drive circuits for the respective elements, and reference numeral 3 denotes an AC power supply for an AC output drive circuit, which supplies forward bias power and reverse bias power to each gate drive circuit. Further, in order to detect the collector-emitter voltage of each element, the collector of each element is input to each gate drive circuit 21 to 24 via resistors 31 to 34, respectively.

  FIG. 2 shows a detailed configuration diagram for one element of the gate drive circuit. 56 is a forward bias transistor, 57 is a reverse bias transistor, the transistor 56 is turned on when the input signal Vi is an on signal, and the transistor 57 is turned on when the input signal Vi is an off signal, and a bias voltage is applied to the gate of the IGBT 11. VFB and VRB are forward bias voltage and reverse bias voltage, 58 and 59 are gate resistors for forward bias and reverse bias, Rg (on) is the resistance value of resistor 58, and Rg (off) is resistance 59 of resistor 59, respectively. Resistance value. 54 is a transformer for insulating from each gate drive circuit, and 55 is a rectifier circuit, which generates a forward bias voltage VFB and a reverse bias voltage VRB from an AC power source. Here, a capacitor 60 is connected between PM and a capacitor 61 is connected between MN to obtain a smooth driving power source. The voltage detection circuit 51 detects the collector-emitter voltage of the IGBT 11, detects the presence / absence of the voltage by comparison with a reference value, and outputs a logic signal thereof. The failure determination circuit 52 is supplied from the voltage detection circuit 51. This is a circuit that detects a failure from the relationship between the signal and the input signal Vi and outputs the failure signal to the pulse distribution circuit 53. In the normal state, the pulse distribution circuit 53 outputs a signal corresponding to the input signal to the transistors 56 and 57, and turns on both the transistors 56 and 57 when receiving an element failure signal from the failure determination circuit 52. Make the signal output.

  FIG. 3 shows a time chart of each signal. Here, it is assumed that element breakdown occurs when the IGBT 11 is turned off and the collector-emitter is short-circuited. When the IGBT 11 is destroyed, a “no voltage” signal is output from the voltage detection circuit 51 even though the input signal is off as shown in FIG. Based on the relationship between the input signal Vi and the IGBT voltage VCE 1, the failure determination circuit 52 determines that a failure has occurred, and this signal is output to the pulse distribution circuit 53. Thereafter, the pulse distribution circuit 53 outputs a signal for turning on both the transistors 56 and 57. At this time, a very large current Ips flows in the output of the driving power supply (the output of the rectifier 55) as compared with the current flowing in the normal time. The maximum value Ips (max) of Ips is expressed by the following equation.

Ips (max) = (VFB + VRB) / {Rg (on) + Rg (off)}
Here, the overcurrent limit level of the AC power supply 3 is set to be Ips (max), and when this current flows, the current limit function is activated in the AC power supply so that the output voltage is lowered. As a result, the levels of both VFB and VRB are lowered as shown in FIG.

  The turn-off waveform of the normal element at this time is shown in FIG. FIG. 4A shows a waveform when normal, and FIG. 4B shows a waveform when a failure is detected. In FIG. 4A, since the voltage is equally shared by the four elements, the maximum applied voltage of the element is Edc / 4 + ΔV as shown in the figure for the waveform of one element. When one element breaks down and becomes short-circuited, the voltage is shared by the other three elements, so the DC applied voltage becomes Edc / 3, and the sharing of the DC voltage increases as shown in FIG. 4B. Thereafter, when the element is turned off, the difference voltage ΔVB between the forward bias voltage and the reverse bias voltage decreases as described above. As a result, the gate current is reduced, and the operation is equivalent to the case where the gate resistance is increased. That is, the gate voltage is gradually changed from VFB to VRB. As a result, the turn-off operation is delayed and the surge voltage ΔV is suppressed. With the above operation, the normal element can be continuously operated without exceeding the rated voltage.

  When the lower arm IGBT is turned on in the mode in which the upper arm is turned on and the current flows through the parallel-connected free-wheeling diode (FWD), the free-wheeling diode (FWD) built in the IGBTs 11 to 14 reversely recovers, and the spike voltage Is applied. However, if the AC power supply 3 is common to the upper and lower arms, the turn-on operation of the lower arm element is delayed in the same manner as the above operation when a failure is detected. That is, the gate voltage is gradually changed from VRB to VFB. As a result, reverse recovery of the freewheeling diode (FWD) becomes gentle, spike voltage is suppressed, and continuous operation can be performed.

  As described above, when an element failure occurs, the speed of charging / discharging the gate of the IGBT (time change rate of the gate voltage) is reduced by reducing the voltage of the driving power supply, and as a result, the IGBT is turned off. The spike voltage at the time and the spike voltage at the reverse recovery of the freewheeling diode are reduced.

  As means for changing one or both of the forward bias voltage and the reverse bias voltage, IGBT failure information is sent from each gate drive circuit to the AC power supply common to the upper and lower arms, and the output voltage of the AC power supply is changed. This can also be realized by changing the set value.

  The present invention can be applied to a high-voltage and large-capacity conversion device configured by connecting a plurality of self-extinguishing semiconductor elements in series, a semiconductor high-voltage circuit breaker, and the like.

Circuit configuration diagram showing an embodiment of the present invention when four elements are connected in series Configuration diagram of gate drive circuit per element of FIG. Example of operation waveforms in FIG. Waveform to explain the operation at turn-off Conventional circuit diagram Fig. 5 Turn-off waveform Circuit configuration that enables conventional continuous operation Fig. 7 Turn-off waveform

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Upper arm 2 ... Lower arm 3 ... AC power supply 4 ... DC power supply 11-15 ... IGBT
21-24 ... Gate drive circuit 31-34, 58, 59 ... Resistor 51 ... Voltage detection circuit 52 ... Fault determination circuit 53 ... Pulse distribution circuit 54 ... Transformer 55 ... Rectifier circuit 56, 57 ... Transistor 60, 61 ... Capacitor

Claims (3)

  In a semiconductor switch circuit comprising a plurality of self-extinguishing semiconductor elements connected in series and a gate drive circuit provided in each semiconductor element, one of the semiconductor elements is destroyed and the collector-emitter is short-circuited A power conversion device characterized by changing one or both of the forward bias voltage and the reverse bias voltage of the gate drive circuit so that the turn-off operation of the remaining normal elements is delayed when   In the upper and lower arms in which a plurality of series-connected self-extinguishing semiconductor elements and a semiconductor switch circuit including a gate driving circuit provided in each semiconductor element are connected in series, one of the semiconductor elements of the upper and lower arms is destroyed. When the collector-emitter is short-circuited, one of the forward bias voltage and the reverse bias voltage of the gate drive circuit is set so that the turn-on operation of the semiconductor element of the semiconductor switch circuit of the arm opposite to the arm is delayed. Or the power converter characterized by changing both values.   The means for changing the value of one or both of the forward bias voltage and the reverse bias voltage of the gate drive circuit includes: an AC power supply having a current limiting characteristic, and an AC power supply common to the upper and lower arms; a forward bias semiconductor switch in the gate drive circuit; 3. The power conversion device according to claim 1, further comprising means for simultaneously turning on the reverse bias semiconductor switch to overload the AC power source.

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