JP2007250693A - SiC SUBSTRATE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce dislocation not only within a micropipe but also the surface of a base bottom, and to reduce lamination defects in a manufacturing method of an SiC substrate, the SiC substrate, and a semiconductor device. <P>SOLUTION: In the manufacturing method of the SiC substrate for performing the chemical vapor phase epitaxy of an SiC epitaxial growth layer 2 on an SiC single-crystal substrate 1 having micropipes, the growth process of the SiC epitaxial growth layer 2 comprises a closure layer growth process for growing a first epitaxial growth layer 2a where the micropipe is blocked following lamination, and a distortion layer growth process for growing at least a layer of second epitaxial growth layer 2b having an impurity concentration of 3×10<SP>19</SP>cm<SP>-3</SP>or higher in the middle of the first epitaxial growth layer 2a. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an SiC substrate manufacturing method, an SiC substrate, and a semiconductor device suitable for a substrate for forming a power device or the like.

  In recent years, SiC (silicon carbide), which has a larger band gap, higher saturation drift velocity, higher thermal conductivity, higher breakdown field strength, etc. than silicon, has attracted attention as a substrate for forming power devices and high-frequency devices for power control. Has been. For example, a power device using SiC can be reduced in loss, improved in performance and reduced in size, and is considered to contribute greatly to energy saving of power conversion, improvement of performance of hybrid vehicles and electric vehicles. ing.

A SiC single crystal substrate used for a power device is known to be produced from a single crystal SiC ingot grown by a so-called modified Rayleigh method which is a sublimation growth technique using a seed substrate.
When manufacturing a power device or the like using SiC, a SiC epitaxial growth layer is grown as a device formation region on a SiC single crystal substrate, but a commercially available substrate of α-SiC such as 4H—SiC having a high bulk mobility has a crystal. Many hollow penetrating defects called micropipes exist along the c-axis, and defects have also occurred in the SiC epitaxial growth layer grown on the substrate. If even one of these micropipes is present in the device region of the manufactured power device, there has been a disadvantage that the device characteristics are greatly deteriorated.

Conventionally, for example, Patent Document 1 proposes a method of growing a SiC epitaxial growth layer by a liquid phase growth method (LPE) as a method of closing a micropipe.
Patent Document 2 proposes a method of closing a micropipe by repeatedly heating and lowering a heat treatment step in an atmosphere where a silicon carbide single crystal is coated and saturated with silicon carbide vapor species. Has been.

  Furthermore, in Patent Document 3, as a method of closing a micropipe with a CVD (chemical vapor deposition) furnace, the supply ratio C / Si of a C (carbon) raw material and a Si (silicon) raw material is controlled by a carbon supply rate-determining method. It is described that nearly 100% of the micropipes were blocked by growing the SiC epitaxial growth layer (micropipe blocking layer) under the conditions. According to this method, it becomes possible to continuously produce the blocking layer of the micropipe and the device active layer using the same furnace.

Patent Document 4 proposes a method in which a micropipe is not inherited on the crystal surface by growing the crystal in the plane orientation (11-20) direction.
Also. Patent Document 5 includes a suppression layer that includes at least one high-concentration SiC layer containing a high-concentration impurity and has a function of suppressing the inheritance of a micropipe, and an active region formed on the suppression layer. Semiconductor devices have been proposed. In this semiconductor device, it is described that the strain caused by the high concentration SiC layer suppresses the growth of the micropipe. In this semiconductor device, the impurity concentration in the high-concentration SiC layer doped with nitrogen is set to 1 × 10 ¹⁸ cm ^−3, and the impurity concentration in the high-concentration SiC layer is further increased to about 1 × 10 ¹⁸ cm ^−3. It is supposed to be possible.

US Pat. No. 5,679,153 JP 2000-34199 A International Publication No. 03/078702 Pamphlet JP 2000-319099 A JP 2002-329670 A

The following problems remain in the conventional technology.
In other words, the technique described in Patent Document 1 has a problem that the unevenness of the sample surface becomes very large instead of closing the micropipe. Moreover, it was difficult to apply to a large-area substrate.
Moreover, in the technique described in Patent Document 2, additional steps such as a covering step and a heat treatment step are required, and the SiC crystal to be covered is polymorphic different from the substrate, so that it is easy to form stacking faults, It was difficult to apply to electronic devices.
Further, in the technique described in Patent Document 4, the micropipe can be reduced because it grows in a direction perpendicular to the micropipe, but there is a problem that a stacking fault is easily formed. Such stacking faults have the disadvantage of adversely affecting the electrical characteristics of the device.
On the other hand, with the technique described in Patent Document 3, it is reported that a sufficient micropipe blockage rate can be obtained. However, according to T. Ohno et al., J.Crys.Growth 271 (2004) 1-7., There is a problem that many dislocations in the basal plane remain on the crystal surface. This dislocation includes basal plane dislocations due to the occurrence of basal plane dislocation-threading edge dislocation pairs, which are defects during epitaxial growth that frequently occur in a carbon supply-controlled atmosphere. Such basal plane dislocations also have the disadvantage of adversely affecting the electrical characteristics of the device. Furthermore, with respect to the techniques described in Patent Documents 1 and 3, it has been reported that an element manufactured at a location where a micropipe is blocked deteriorates during energization (R. Rupp, et al., 5th European Conference on Silicon Carbide and Related Materials (ECSCRM2004), Aug 31-Sept 4, Bologna (Italy), Sa11-03).
In the technique described in Patent Document 5, an attempt is made to suppress the growth of the micropipe by forming a high-concentration SiC layer having an impurity concentration of 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ . Actually, the growth of micropipes could not be effectively suppressed with this impurity concentration.

  The present invention has been made in view of the above-described problems. An SiC substrate manufacturing method capable of reducing not only micropipes but also dislocations and stacking faults in the basal plane, and an SiC substrate and a semiconductor device manufactured thereby are provided. The purpose is to provide.

As a result of intensive research on the correlation between impurity concentration and strain, the present inventors have found that the crystal lattice cannot be effectively distorted unless the impurity concentration exceeds a certain level due to the nonlinearity of the lattice strain. I found out. Therefore, the present invention has been obtained from the above findings, and the following configuration has been adopted in order to solve the above problems.
That is, the SiC substrate manufacturing method of the present invention is a SiC substrate manufacturing method in which an SiC epitaxial growth layer is chemically vapor-grown on an SiC single crystal substrate having a micropipe, and the growth step of the SiC epitaxial growth layer includes A closed layer growth step of growing a first epitaxial growth layer in which the micropipes are closed along with the lamination, and a second epitaxial growth having an impurity concentration of 3 × 10 ¹⁹ cm ⁻³ or more in the middle of the first epitaxial growth layer And a strained layer growth step of growing at least one layer.

The SiC substrate of the present invention is a SiC substrate comprising a SiC single crystal substrate having a micropipe and a SiC epitaxial growth layer formed on the SiC single crystal substrate, wherein the SiC epitaxial growth layer is a laminated layer. And a second epitaxial growth layer in which at least one layer is grown in the middle of the first epitaxial growth layer and an impurity concentration is 3 × 10 ¹⁹ cm ⁻³ or more. It is characterized by.

In these SiC substrate manufacturing methods and SiC substrates, at least one second epitaxial growth layer having a concentration of 3 × 10 ¹⁹ cm ⁻³ or more as an impurity concentration at which crystal distortion rapidly increases is provided in the middle of the first epitaxial growth layer. Since the crystal grows, high-density defects are generated in the second epitaxial growth layer where the sudden strain is generated and at the interface between the first epitaxial growth layer and the second epitaxial growth layer, and stress caused by the blockage of the micropipe is generated. It can be mitigated in the defect occurrence region.

  In particular, defects are concentrated on the interface to relieve stress, and the extension of dislocations in the basal plane caused by stress to stacking faults can be reduced. Also, the dislocation direction changes at the interface and is converted into a different type of dislocation, and in the first epitaxial growth layer grown thereafter, the dislocation within the basal plane is changed to a dislocation that does not adversely affect the electrical characteristics of the device. Can do.

  The SiC substrate of the present invention is characterized by being produced by any one of the above-described SiC substrate manufacturing methods of the present invention. That is, since this SiC substrate is produced by any one of the above-described SiC substrate manufacturing methods of the present invention, the stress in the SiC epitaxial growth layer is relieved, the micropipe density is reduced, and the dislocation density in the basal plane is reduced. Can have good crystallinity.

The SiC substrate of the present invention is characterized in that a SiC layer is further formed on the SiC epitaxial growth layer by epitaxial growth.
A semiconductor device of the present invention is characterized by using any of the SiC substrates of the present invention.
That is, since this SiC substrate is manufactured by the method of manufacturing an SiC substrate of the present invention, all the micropipes are closed and have a good surface state in which basal plane dislocations and stacking faults are reduced. The SiC layer having a good crystal state can be obtained by epitaxially growing the SiC layer on the substrate. Therefore, by using this SiC substrate, a semiconductor device (semiconductor device) having excellent element characteristics can be obtained.

The present invention has the following effects.
That is, according to the method for manufacturing an SiC substrate and the SiC substrate according to the present invention, the second impurity having a concentration of 3 × 10 ¹⁹ cm ⁻³ or more as the impurity concentration at which the crystal strain rapidly increases in the middle of the first epitaxial growth layer. Since at least one epitaxial growth layer is grown, stress is relieved at the interface between the second epitaxial growth layer and the first epitaxial growth layer, dislocations in the basal plane and stacking faults can be reduced, and the directionality of the dislocations can be reduced. It can be changed to dislocations that do not adversely affect the electrical characteristics.
Therefore, in this SiC substrate, the stress of the micropipe blockage is reduced and the direction of dislocation is changed, and in the SiC epitaxial growth layer grown thereafter, the micropipe is closed and the basal plane dislocations and stacking faults are reduced. The Furthermore, in a semiconductor device formed using these SiC substrates, good electrical characteristics of the device can be obtained, and excellent reliability can be obtained with little characteristic deterioration.

  Hereinafter, an embodiment of a method for manufacturing a SiC substrate, a SiC substrate, and a semiconductor device according to the present invention will be described with reference to FIGS.

  The SiC substrate manufacturing method of this embodiment is a method for manufacturing a substrate for forming a power device for power control, a high-frequency device, or the like. As shown in FIG. 1, a SiC single unit having a micropipe (not shown) is used. In this method, a SiC epitaxial growth layer 2 that closes a micropipe is chemically vapor-deposited on a crystal substrate 1. In this SiC substrate manufacturing method, a substrate having an off angle of 0 ° to 15 ° of the α-SiC Si surface (0001) and the C surface (000-1) is used as the SiC single crystal substrate 1. For example, a Si-surface mirror substrate having an off-angle in which the <0001> axis of 4H—SiC is inclined by 8 ° in the <11-20> direction is used.

On this SiC single crystal substrate 1, SiC epitaxial growth layer 2 which is a micro pipe blocking layer is formed by a horizontal reduced pressure HW-CVD (hot wall chemical vapor deposition) furnace. The SiC epitaxial growth layer 2 is formed in a state of being inserted in the middle of the first epitaxial growth layer 2a and the first epitaxial growth layer 2a in which the micropipes are closed as the stack is stacked, and the impurity concentration is 3 × 10 ¹⁹ cm ^{−. And three} or more second epitaxial growth layers 2b.

For example, the first epitaxial growth layer 2a is supplied under the conditions of temperature T = 1585 ° C., hydrogen (carrier gas) flow rate 45 slm, pressure P = 100 mbar, SiH ₄ = 7.2 sccm, and carbon supply rate-limiting conditions. The film is formed with the ratio C / Si = 1.2 (blocking layer growth step). Further, by adding nitrogen, a film is formed so as to be an n-type semiconductor with an impurity concentration of 5 × 10 ¹⁷ cm ⁻³ , for example. Under these film forming conditions, the relationship between the size of the micropipe closed by the lamination of the second epitaxial growth layer 2a and the film thickness is approximately 1: 1. For example, a micropipe with an inner diameter of 3 μm is a condition that can be substantially blocked by depositing the first epitaxial growth layer 2 a by 3 μm.

The second epitaxial growth layer 2b has, for example, the following conditions as film formation: temperature T = 1585 ° C., hydrogen (carrier gas) flow rate 45 slm, pressure P = 100 mbar, SiH ₄ = 3.0 sccm, supply ratio C / Si = The film is set to 1.8 (strained layer growth step). The second epitaxial growth layer 2b is formed so as to be an n-type semiconductor with an impurity concentration of 3 × 10 ¹⁹ cm ⁻³ or more, for example, 5 × 10 ¹⁹ cm ⁻³ by adding nitrogen.
In the present embodiment, the second epitaxial growth layer 2b is formed by depositing the first epitaxial growth layer 2a with a layer thickness of 0.5 μm and then with a layer thickness of 0.5 μm. The epitaxial growth layer 2a was formed with a layer thickness of 2.5 μm.

In addition, as a comparative example, a sample by a conventional manufacturing method in which only the first epitaxial growth layer 2a was formed up to 3 μm after the initial annealing under the above film formation conditions to form the SiC epitaxial growth layer 2 was also manufactured.
In addition, every SiC single crystal substrate 1 used had about 200 micropipes on the surface, and had micropipes with a maximum inner diameter of 2.5 μm.

The reason why the impurity concentration of the second epitaxial growth layer 2b is set to 3 × 10 ¹⁹ cm ⁻³ or more will be described below.
For example, FIG. 2 shows the relationship between the concentration of nitrogen (N) normally used as an n-type impurity and aluminum (Al) normally used as a p-type impurity and the strain in the c-axis direction. As can be seen from FIG. 2, regardless of the type of impurity, lattice distortion abruptly occurs in any impurity at a concentration of 3 × 10 ¹⁹ cm ⁻³ or more.

Usually, when the impurity atom B is substituted at a ratio of x at the A atom site of the host crystal, if the ionic radii of the A atom and B atom are Ra and Rb, respectively, the original crystal lattice constant r is
r {1-x} Ra + xRb} / Ra
Only deformed is expected. This is a linear law called Vegard's Law. However, in the relationship of FIG. 2, a linear deformation region according to Vegard's Law is seen in a concentration region lower than 3 × 10 ¹⁹ cm ⁻³ , and the distortion in this region is Log as shown by the vertical axis in FIG. When illustrated in a linear scale instead of a scale, it is so small that it almost touches the horizontal axis.

Therefore, it can be seen that the crystal distortion in the c-axis direction of the SiC crystal increases rapidly without following the linear rule at an impurity concentration of 3 × 10 ¹⁹ cm ⁻³ or more regardless of the type of impurity. Since nitrogen and aluminum have a large difference in the depth of impurity levels in α-SiC, the number of active carriers at room temperature varies greatly even at the same impurity concentration. Therefore, it can be seen that this phenomenon is not the carrier concentration but the nonlinearity of the lattice strain according to the impurity concentration itself that can be detected by SIMS (secondary ion mass spectrometry), RBS (Rutherford backscattering analysis) or the like.
As for the literature on the above lattice constant, for nitrogen, refer to `` HJChung et al., J.Crys.Growth 259 (2003) 52. '', for aluminum, refer to `` SWHuh, et al., J. Appl. Phys. 96 (2004) 4637. "

Next, in order to produce the semiconductor device of this embodiment, an active layer (semiconductor layer) 3 is further formed on the SiC substrate as shown in FIG. The active layer 3 is set, for example, as a film forming condition: temperature T = 1585 ° C., hydrogen (carrier gas) flow rate 45 slm, pressure P = 100 mbar, SiH ₄ = 7.2 sccm, supply ratio C / Si = 1.8. Then, the film is formed with a layer thickness of 5 μm. Further, a film is formed so as to be an n-type semiconductor having an impurity concentration of 5 × 10 ¹⁵ cm ⁻³ by adding nitrogen. In addition, the active layer 3 was laminated | stacked similarly about the SiC substrate of the said comparative example.
When the surface of the substrate thus formed was observed, all the micropipes were closed on both the substrates of this embodiment and the comparative example.

Further, a Schottky electrode 4 is formed on the front surface side (active layer 3 side) of the SiC substrate, an ohmic electrode 5 is formed on the back surface side, and a Schottky barrier portion is provided between the Schottky electrode 4 and the active layer 3. A Schottky barrier diode (semiconductor device) 6 in which (semiconductor element) was formed was produced.
In the comparative example, electrodes (Schottky electrode 4 and ohmic electrode 5) were similarly formed on the front and back surfaces to produce a Schottky barrier diode.

  Of the manufactured Schottky barrier diodes 6, 50 diodes including portions after the micropipes were closed in the Schottky electrode 4 were subjected to an endurance test with respect to a reverse breakdown voltage, and leakage currents were compared. As a result, it was found that the comparative example had a large increase in leakage current and low resistance compared to the example.

Thus, in the manufacturing method of the SiC substrate of this embodiment and the SiC substrate manufactured thereby, an impurity concentration of 3 × 10 ¹⁹ cm ^{−3 at} which the crystal distortion rapidly increases in the middle of the first epitaxial growth layer 2a. Since the second epitaxial growth layer 2b having the above concentration is grown as an intermediate relaxation layer, the second epitaxial growth layer 2b in which abrupt distortion has occurred and the interface between the first epitaxial growth layer 2a and the second epitaxial growth layer 2b. High-density defects are generated in this area, and the stress caused by the blockage of the micropipes can be relieved in these defect generation regions.

  In particular, the defects are concentrated on the interface to relieve stress, and the extension of dislocations in the basal plane caused by stress to stacking faults can be reduced. Further, the direction of dislocation changes at the interface and is converted into a different type of dislocation, and in the first epitaxial growth layer 2a grown thereafter, the dislocation within the basal plane is changed to a dislocation that does not adversely affect the electrical characteristics of the device. be able to.

  The technical scope of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention.

For example, the crystal growth of the first epitaxial growth layer 2a may be performed in a carbon supply-limited atmosphere as in the above embodiment, but the silicon supply-limited film formation and the carbon supply-limited film formation are continuously performed. The film may be formed by repeating. Alternatively, the film formation may be performed at a target growth rate by appropriately increasing the amount of source gas from an extremely slow state of 1 μm / h or less.
In the above embodiment, the second epitaxial growth layer 2b is grown in a state where only one layer is inserted into the first epitaxial growth layer 2a. However, two or more second epitaxial growth layers 2b are grown in the first epitaxial growth layer 2a. You can grow it in the middle of

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an essential part cross-sectional view showing a SiC substrate in a SiC substrate manufacturing method, a SiC substrate, and a semiconductor device according to an embodiment of the present invention. It is a graph which shows the relationship between impurity concentration and c-axis distortion. It is sectional drawing which shows the semiconductor device of this embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... SiC single crystal substrate, 2 ... SiC epitaxial growth layer, 2a ... 1st epitaxial growth layer, 2b ... 2nd epitaxial growth layer, 3 ... Active layer (semiconductor layer), 4 ... Schottky electrode, 5 ... Ohmic electrode, 6 ... Schottky barrier diode (semiconductor device)

Claims (5)

A method for producing a SiC substrate, wherein a SiC epitaxial growth layer is chemically vapor-grown on a SiC single crystal substrate having a micropipe,
The step of growing the SiC epitaxial growth layer includes a closed layer growth step of growing a first epitaxial growth layer in which the micropipes are closed along with the stacking;
A strained layer growth step of growing at least one second epitaxial growth layer having an impurity concentration of 3 × 10 ¹⁹ cm ⁻³ or more in the middle of the first epitaxial growth layer. Production method.   A SiC substrate manufactured by the method for manufacturing a SiC substrate according to claim 1. A SiC single crystal substrate having micropipes;
An SiC epitaxial growth layer formed on the SiC single crystal substrate, and an SiC substrate comprising:
The SiC epitaxial growth layer is a first epitaxial growth layer in which the micropipe is closed as the stack is formed;
A SiC substrate comprising: a second epitaxial growth layer grown at least in the middle of the first epitaxial growth layer and having an impurity concentration of 3 × 10 ¹⁹ cm ⁻³ or more. In the SiC substrate according to claim 2 or 3,
A SiC substrate in which a SiC layer is further formed by epitaxial growth on the SiC epitaxial growth layer. A semiconductor device using the SiC substrate according to claim 2.

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